CN107525828A - A kind of C/V integrated capacitances type humidity sensor interface circuit - Google Patents
A kind of C/V integrated capacitances type humidity sensor interface circuit Download PDFInfo
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- CN107525828A CN107525828A CN201610449702.7A CN201610449702A CN107525828A CN 107525828 A CN107525828 A CN 107525828A CN 201610449702 A CN201610449702 A CN 201610449702A CN 107525828 A CN107525828 A CN 107525828A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N27/00—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
- G01N27/02—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance
- G01N27/22—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance by investigating capacitance
- G01N27/223—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance by investigating capacitance for determining moisture content, e.g. humidity
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N27/00—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
- G01N27/02—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance
- G01N27/22—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance by investigating capacitance
- G01N27/228—Circuits therefor
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Abstract
A kind of C/V integrated capacitances type humidity sensor interface circuit, suitable for Internet of Things field.Humidity sensor interface circuit is made up of folded cascode Op Amp, reference current source, biasing circuit, compensation circuit.The first order uses Foldable cascade structure, there is provided higher gain；The second level uses common source level structure, there is provided higher output voltage swing.Biasing circuit uses the bootstrap reference current source with self-starting, so as to reduce influence of the supply voltage to capacitor charge and discharge.Circuit sensitivity is high, dynamic response is fast, good, simple in construction, the easy digitlization of stability, and has good anti-interference and reliability.
Description
Art
The present invention relates to a kind of C/V integrated capacitances type humidity sensor interface circuit, suitable for Internet of Things field.
Background technology
Sensor finds out the feeler of nature information as the mankind, and it can need people the various non electrical quantity information found out
Measurable information about power is changed into, recognizes for people and controls corresponding object to provide condition and foundation.With modern surveying, control
The continuous development of system and automatic technology, sensor technology is increasingly paid attention to by people, with the communication technology and computer skill
Art forms three big pillars of modern information industry, is the important foundation of information industry, it is e measurement technology, semiconductor technology, meter
Numerous subject phases such as calculation machine technology, the information processing technology, microelectronics, optics, acoustics, precision optical machinery, bionics and materialogy
One of comprehensive cutting edge technology mutually intersected, it is the commanding elevation that 21 century people fight in terms of hi-tech development.
Humidity sensor is a kind of important sensor, is widely applied in many fields, and serve important
Effect.Such as:Precision electronic element manufacture, space missile, the storage of rocket, the mould proof and aerological sounding etc. of grain.But
It is that humidity is to be most difficult to a parameter of accurate measurement in the ambient parameter of routine.Widely known hair hygrograph, wet and dry bulb
Hygrometer oneself be unsatisfactory for being actually needed for modern requirements.Because the measurement of humidity can be by other factors (atmospheric pressure, temperature)
Influence, in addition, the calibration of humidity is also a problem, so being all always very come the research for humidity sensor both at home and abroad
Active.
Capacitance type transducers are a kind of important sensors in sensor family.It is to utilize capacitor principle, by non-electrical
Amount is converted into capacitance, and then the device of the parameter such as voltage, electric current or frequency for converting to measure and transmit, it is every can be with
Being converted to the amount of spacing, area and dielectric constant can be measured with capacitance type transducers.With other types of sensor phase
Than, have the advantages that measurement range big, high sensitivity, dynamic response is fast, stability is good, it is simple in construction, easily digitize, wet
Very extensive application has been obtained in terms of the measurements such as degree, temperature, displacement, pressure, thickness, amplitude, liquid level, constituent analysis, has been one
Sensor of the kind with good development prospect.The effect of sensor signal processing circuit is to be converted into signal caused by sensor
It is a very important connecting link to be available for the electric signal analyzed, calculate, show and handled, its performance directly influences
The measurement accuracy of whole system and sensitivity, or even determine the realization of measuring system.
However, with the continuous development and application of capacitance type transducers, the requirement for capacitance measurement circuit is also increasingly
It is high.Mainly there is the difficulty of following several respects in measurement small capacitance at this stage：（1）Capacitance type transducers capacitance can not possibly be big,
Generally pF magnitudes, and the change of micro- electric capacity as caused by these physical quantitys is more small, generally makees fF even aF magnitudes.Such as
This small variable quantity is a challenge to the design for detecting circuit, if detecting circuit without corresponding small-signal, then basic
The practical of sensor can not be realized, therefore micro- capacitance sensing is detected and be treated as using special interface integrated circuit
The important method of device；(2) measuring circuit will typically use a certain amount of electronic switch, but the Charge injection effect pair of electronic switch
The influence of measuring system is difficult to eliminate.
The content of the invention
The present invention provides a kind of C/V integrated capacitances type humidity sensor interface circuit, and the first order is total to using collapsible common source
Grid structure, there is provided higher gain；The second level uses common source level structure, there is provided higher output voltage swing.Biasing circuit is adopted
With the bootstrap reference current source with self-starting, so as to reduce influence of the supply voltage to capacitor charge and discharge.Circuit sensitivity is high, dynamic
State response is fast, good, simple in construction, the easy digitlization of stability, and has good anti-interference and reliability.
The technical solution adopted in the present invention is：
C/V integrated capacitances type humidity sensor interface circuit by folded cascode Op Amp, reference current source, biasing circuit,
Compensation circuit forms.
The folded cascode circuitry is first order circuit, and Differential Input pair can be realized using NMOS or PMOS,
Using NMOS as Differential Input pair, higher mutual conductance can be provided, be advantageous to improve the DC current gain of amplifier, but need to use
PMOS is as cascade pipe, and under same bias condition, the mutual conductance of PMOS is the 1/2~1/3 of NMOS tube, limits fortune
Calculate the secondary pole frequency of amplifier；According to PMOS as Differential Input pair, amplifier has relatively low noise and higher secondary pole
Dot frequency, but DC current gain is smaller.Considered based on the compromise to DC current gain and unity gain bandwidth, employ PMOS as poor
Divide input pair.The problem of its output voltage swing is relatively low can be solved by second level amplifier.
In the reference current source circuit, M1 and M2 make it that electric current I2 and 12 is equal.I2 flows through M4 and produces voltage VGS4, I1
Flow through resistance R2 and produce voltage I1R2.Because the two voltages connect together, an equalization point is determined that out.In order to avoid circuit
The equalization point of mistake is selected, devises start-up circuit.If circuit is in undesirable equalization point, I1, I2 are equal to 0.M23 will
The electric current for providing M4 causes circuit work to be transferred to equalization point Q.As circuit works close to Q points, M23 source voltage increase,
So that M23 electric current reduces.In Q points, M4 electric current should be equal with M2 electric current.
The biasing circuit uses the form of fundamental current mirror, and output current I0 and reference current IR ratio is only by device
The ratio of size determines, can accurately replica current source electric current, without being influenceed by flow-route and temperature, therefore can be system
More accurate biasing is provided.M1 and M2 is the enhanced MOSFET of N-channel, and IR is referred to as reference current, and I0 is referred to as output current, V0
Referred to as output voltage.Because M1 VDSI=VGSI, it is always operating at saturation region.And M2 will then see that VDS2 size is come
Determine which region it is operated in.Generally, it is desirable to which M2 is operated in saturation region.
In the compensation circuit, in two-stage amplifying circuit, high output impedance is presented in the first order, and the second level provides appropriate increase
Benefit, the multiplication using Miller effect to electric capacity, an electric capacity is accessed on feedback network internally to overcome this shortcoming.
One low-frequency pole is established with a medium capacitance, saves considerable chip area, miller compensation not only reduces
Required capacitance, also output limit is moved to the direction for leaving origin.It is exactly based in two interpole point miller compensations electricity
Hold mode in series with a resistor to compensate channel frequency, make the phase margin of circuit stable about 60 degree, ensure that electricity
The stability and operating rate on road.
The beneficial effects of the invention are as follows：Circuit sensitivity is high, dynamic response is fast, stability is good, it is simple in construction, be easy to numeral
Change, and there is good anti-interference and reliability.
Brief description of the drawings
The present invention is further described with reference to the accompanying drawings and examples.
Fig. 1 is the folded cascode circuitry of the present invention.
Fig. 2 is the reference current source circuit of the present invention.
Fig. 3 is the biasing circuit of the present invention.
Fig. 4 is the compensation circuit of the present invention.
Embodiment
The invention will be further described with reference to the accompanying drawings and examples.
Such as Fig. 1, folded cascode circuitry is first order circuit, and Differential Input pair can be realized using PMOS, is used
NMOS can provide higher mutual conductance, be advantageous to improve the DC current gain of amplifier, but need to use PMOS as Differential Input pair
As cascade pipe, under same bias condition, the mutual conductance of PMOS is the 1/2~1/3 of NMOS tube, limits computing and puts
The secondary pole frequency of big device；According to PMOS as Differential Input pair, amplifier has relatively low noise and higher secondary limit frequency
Rate, but DC current gain is smaller.Considered based on the compromise to DC current gain and unity gain bandwidth, it is defeated as difference to employ PMOS
Enter pair.The problem of its output voltage swing is relatively low can be solved by second level amplifier.
Such as Fig. 2, in reference current source circuit, M1 and M2 make it that electric current I2 and 12 is equal.I2 flows through M4 and produces voltage VGS4,
I1 flows through resistance R2 and produces voltage I1R2.Because the two voltages connect together, an equalization point is determined that out.In order to avoid electricity
The equalization point of road selection mistake, devises start-up circuit.If circuit is in undesirable equalization point, I1, I2 are equal to 0.M23
By the electric current for providing M4 so that circuit work is transferred to equalization point Q.Increase as circuit works close to Q points, M23 source voltage
Add so that M23 electric current reduces.In Q points, M4 electric current should be equal with M2 electric current.
Such as Fig. 3, biasing circuit uses the form of fundamental current mirror, and output current I0 and reference current IR ratio is only by device
The ratio of part size determines, can accurately replica current source electric current, without being influenceed by flow-route and temperature, therefore can be to be
System provides more accurate biasing.M1 and M2 is the enhanced MOSFET of N-channel, and IR is referred to as reference current, and I0 is referred to as output current,
V0 is referred to as output voltage.Because M1 VDSI=VGSI, it is always operating at saturation region.And M2 will then see VDS2 size
To determine which region it is operated in.Generally, it is desirable to which M2 is operated in saturation region.
Such as Fig. 4, in compensation circuit, in two-stage amplifying circuit, high output impedance is presented in the first order, and the second level provides appropriate
Gain, the multiplication using Miller effect to electric capacity, an electric capacity is accessed on feedback network internally to overcome this to lack
Point.One low-frequency pole is established with a medium capacitance, saves considerable chip area, miller compensation not only reduces
Required capacitance, also output limit is moved to the direction for leaving origin.It is exactly based in two interpole point miller compensations
Electric capacity mode in series with a resistor compensates to channel frequency, makes the phase margin of circuit stable about 60 degree, ensure that
The stability and operating rate of circuit.
Claims (8)
1. a kind of C/V integrated capacitances type humidity sensor interface circuit, it is characterized in that：Described humidity sensor interface circuit by
Folded cascode Op Amp, reference current source, biasing circuit, compensation circuit composition.
2. a kind of C/V integrated capacitances type humidity sensor interface circuit according to claim 1, it is characterized in that：The folding
Stacked cascode amplifier is first order circuit, and Differential Input using PMOS to being realized.
3. a kind of C/V integrated capacitances type humidity sensor interface circuit according to claim 1, it is characterized in that：Described
In reference current source circuit, M1 and M2 make it that electric current I2 and 12 is equal, and I2 flows through M4 generation voltages VGS4, I1 and flows through resistance R2 productions
Raw voltage I1R2.
4. a kind of C/V integrated capacitances type humidity sensor interface circuit according to claim 1, it is characterized in that：Described
In reference current source circuit, M23 is by the electric current for providing M4 so that circuit work is transferred to equalization point Q, as circuit works close to Q
Point, M23 source voltage increase so that M23 electric current reduces.
5. a kind of C/V integrated capacitances type humidity sensor interface circuit according to claim 1, it is characterized in that：It is described inclined
Circuits use the form of fundamental current mirror, and output current I0 and reference current IR ratio are only determined by the ratio of device size
It is fixed, can accurately replica current source electric current.
6. a kind of C/V integrated capacitances type humidity sensor interface circuit according to claim 1, it is characterized in that：It is described inclined
In circuits, M1 and M2 are the enhanced MOSFET of N-channel, and IR is referred to as reference current, and I0 is referred to as output current, and V0 is referred to as exporting electricity
Pressure, M1 are operated in saturation region.
7. a kind of C/V integrated capacitances type humidity sensor interface circuit according to claim 1, it is characterized in that：The benefit
Repay in circuit, in two-stage amplifying circuit, high output impedance is presented in the first order, and the second level is provided appropriate gain, imitated using Miller
Tackle the multiplication of electric capacity.
8. a kind of C/V integrated capacitances type humidity sensor interface circuit according to claim 1, it is characterized in that：The benefit
Repay in circuit, an electric capacity accessed on feedback network internally, a low-frequency pole is established with a medium capacitance,
Save considerable chip area.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610449702.7A CN107525828A (en) | 2016-06-21 | 2016-06-21 | A kind of C/V integrated capacitances type humidity sensor interface circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610449702.7A CN107525828A (en) | 2016-06-21 | 2016-06-21 | A kind of C/V integrated capacitances type humidity sensor interface circuit |
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| Publication Number | Publication Date |
|---|---|
| CN107525828A true CN107525828A (en) | 2017-12-29 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610449702.7A Pending CN107525828A (en) | 2016-06-21 | 2016-06-21 | A kind of C/V integrated capacitances type humidity sensor interface circuit |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109557143A (en) * | 2018-10-30 | 2019-04-02 | 电子科技大学 | A kind of capacitive humidity sensor interface circuit |
| CN112737565A (en) * | 2021-04-02 | 2021-04-30 | 深圳市中科蓝讯科技股份有限公司 | Interface circuit and chip |
| US11820333B2 (en) * | 2018-09-28 | 2023-11-21 | Asahi Kasei Kabushiki Kaisha | Humidity measuring device and dew point temperature measuring device |
-
2016
- 2016-06-21 CN CN201610449702.7A patent/CN107525828A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11820333B2 (en) * | 2018-09-28 | 2023-11-21 | Asahi Kasei Kabushiki Kaisha | Humidity measuring device and dew point temperature measuring device |
| CN109557143A (en) * | 2018-10-30 | 2019-04-02 | 电子科技大学 | A kind of capacitive humidity sensor interface circuit |
| CN112737565A (en) * | 2021-04-02 | 2021-04-30 | 深圳市中科蓝讯科技股份有限公司 | Interface circuit and chip |
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| PB01 | Publication | ||
| PB01 | Publication | ||
| WD01 | Invention patent application deemed withdrawn after publication | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20171229 |