CN107507594A - The driving method and device of liquid crystal panel - Google Patents
The driving method and device of liquid crystal panel Download PDFInfo
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- CN107507594A CN107507594A CN201710863193.7A CN201710863193A CN107507594A CN 107507594 A CN107507594 A CN 107507594A CN 201710863193 A CN201710863193 A CN 201710863193A CN 107507594 A CN107507594 A CN 107507594A
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- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 83
- 238000000034 method Methods 0.000 title claims abstract description 29
- 230000005611 electricity Effects 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 23
- 239000010409 thin film Substances 0.000 description 19
- 239000013078 crystal Substances 0.000 description 4
- 239000010408 film Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 239000007788 liquid Substances 0.000 description 3
- 230000007812 deficiency Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000007323 disproportionation reaction Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000010408 sweeping Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3648—Control of matrices with row and column drivers using an active matrix
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/06—Adjustment of display parameters
- G09G2320/0626—Adjustment of display parameters for control of overall brightness
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal (AREA)
Abstract
A kind of driving method of liquid crystal panel provided by the invention, methods described are applied to the liquid crystal panel, and the liquid crystal panel includes multi-strip scanning line, a plurality of data lines and pel array, it is characterised in that methods described includes：The start-up time of scan line and the start-up time of corresponding data wire corresponding to every one-row pixels unit of the drive device control pel array, to meet the first preparatory condition；The drive device control increases pre-charge voltage in preset duration, to the corresponding data wire of each row pixel cell of the pel array, to meet the second preparatory condition；The drive device controls the scan line and the data wire to drive the pel array according to first preparatory condition and second preparatory condition.The embodiment of the present invention additionally provides a kind of drive device of liquid crystal panel.Using the embodiment of the present invention, the brightness uniformity of the diverse location of liquid crystal panel is improved, improves the picture taste of liquid crystal panel.
Description
Technical field
The present invention relates to the driving method and device in liquid panel technique field, more particularly to a kind of liquid crystal panel.
Background technology
In current information-intensive society, thin film transistor-liquid crystal display (Thin Film Transistor-Liquid
Crystal Display, TFT-LCD) have been widely used for life in various aspects, from the mobile phone of small size, video camera,
Digital camera, the notebook computer of middle size, desktop computer, large-sized domestic TV to large-scale projector equipment etc., and with it is frivolous,
The advantages that environmental protection, high-performance, size the more is done the more big, and resolution ratio the more is done the more high, and application is more and more wider.
Scan line and data wire are powered for the thin film transistor (TFT) of liquid crystal panel.Principle of equal effects circuit schemes institute such as a in Fig. 1
Show, the voltage at electric capacity C1 and electric capacity C2 both ends is the voltage of the scanning line voltage of thin film transistor (TFT), electric capacity C3 and electric capacity C4 both ends
For the data line voltage of thin film transistor (TFT).Due to the delay effect of RC circuits, from scan line voltage source and data line voltage source to
During the transistor input voltage of liquid crystal panel, there is delay from control source to voltage stabilization.On liquid crystal panel, the crystalline substance per a line
Body pipe is from left to right powered, and delay is gradual to increase, and the transistor of each row is powered from top to bottom postpones also gradually increase.
Therefore following situation can be produced：Referring to the figure b in Fig. 1, the figure is that the film in the upper left side region of liquid crystal panel is brilliant
The schematic diagram of scan line and data wire corresponding to body pipe.From scheming b, the thin film transistor (TFT) pair in the upper left side region of liquid crystal panel
The scan line and data wire answered do not postpone, and the pixel voltage for writing the region thin film transistor (TFT) is correct.Referring to the figure c in Fig. 1,
The figure is the schematic diagram of scan line and data wire corresponding to the thin film transistor (TFT) in the upper right side region of liquid crystal panel.From scheming c,
Data wire corresponding to the thin film transistor (TFT) in the upper right side region of liquid crystal panel does not postpone, and scan line postpones, now
The region thin film transistor (TFT) can be caused by not yet to close, data wire has been switched to the pixel voltage of next scan line, leads
Cause the pixel voltage for writing the region thin film transistor (TFT) incorrect, produce the problem of mistake is filled.Referring to the figure d in Fig. 1, the figure is liquid
The schematic diagram of scan line and data wire corresponding to the thin film transistor (TFT) of the bottom-left quadrant of crystal panel.From scheming d, liquid crystal panel
Bottom-left quadrant thin film transistor (TFT) corresponding to scan line do not postpone, and data wire postpones, can now cause by
Closed in scan line, be still its corresponding pixel voltage on data wire, the pixel voltage for causing the region thin film transistor (TFT) is just
It is true, the problem of but there may be undercharge.Referring to the figure e in Fig. 1, the figure is the film in the lower right region of liquid crystal panel
The schematic diagram of scan line corresponding to transistor and data wire.From scheming d, the thin film transistor (TFT) in the lower right region of liquid crystal panel
Corresponding scan line and data wire postpone, and the thin film transistor (TFT) in the region can produce wrong fill or/and person's undercharge
Problem.The film crystal tube voltage mistake of liquid crystal panel is filled or the brightness disproportionation of liquid crystal panel can be caused the problem of undercharge
It is even, influence the picture taste of liquid crystal panel.
The content of the invention
It is an object of the invention to provide a kind of driving method of liquid crystal panel and device, liquid crystal panel is advantageously accounted for
Film crystal tube voltage mistake is filled or the problem of undercharge, is improved the brightness uniformity of liquid crystal panel, is improved liquid crystal panel
Picture quality.
In a first aspect, the embodiments of the invention provide a kind of driving method of liquid crystal panel, methods described is applied to described
Liquid crystal panel, the liquid crystal panel include multi-strip scanning line, a plurality of data lines and pel array, and methods described includes：
The start-up time of scan line corresponding to every one-row pixels unit of drive device control pel array and correspondingly
Data wire start-up time, to meet the first preparatory condition；
The drive device control is in preset duration, to the corresponding number of each row pixel cell of the pel array
Increase pre-charge voltage according to line, to meet the second preparatory condition；
The drive device controls the scan line and institute according to first preparatory condition and second preparatory condition
State data wire and drive the pel array.
In a kind of feasible embodiment, first preparatory condition is：
The relative delay of pixel cell A start-up time is less than the previous pixel cell adjacent with the pixel cell A
Start-up time relative delay；And the relative delay of the start-up time of the pixel cell A is more than and the pixel cell A phases
The start-up time relative delay of adjacent the latter pixel cell；
Wherein, the pixel cell A for it is described per in one-row pixels unit except the first and the last in
Any one；The relative delay of the start-up time is the corresponding data wire of scan line start-up time corresponding to pixel cell
Start-up time difference.
In a kind of feasible embodiment, the start-up time of the previous pixel cell adjacent with the pixel cell A
Relative delay, the pixel cell A start-up time relative delay and relative with the start-up time of the pixel cell A prolong
Late into arithmetic progression；
Wherein, the tolerance of the arithmetic progression is less than 0.
In a kind of feasible embodiment, the phase of start-up time corresponding to the q row pixel cells in the pel array
To in delay, the relative delay of start-up time is equal corresponding to the contiguous pixels unit of part；
Wherein, the q rows pixel cell is any a line of the pel array.
In a kind of feasible embodiment, second preparatory condition is：
From top to bottom, the absolute value of the increased precharge voltage value of pixel cell B data wire is more than and the pixel list
The absolute value of the increased precharge voltage value of data wire of a upper pixel cell adjacent first B, and the number of the pixel cell B
It is less than the data wire of the next pixel cell adjacent with the pixel cell B according to the absolute value of the increased precharge voltage value of line
The absolute value of increased precharge voltage value；
The pixel cell B is except the first and the last any one in each row pixel cell
It is individual.
In a kind of feasible embodiment, the data wire of a upper pixel cell adjacent the pixel cell B is increased
The absolute value of precharge voltage value, the pixel cell B the increased precharge voltage value of data wire absolute value and with it is described
The absolute value of the increased precharge voltage value of data wire of next pixel cell adjacent pixel cell B is into arithmetic progression；
The tolerance of the arithmetic progression is more than 0.
In a kind of feasible embodiment, the preliminary filling of data wire corresponding to the pth row pixel cell in the pel array
In the absolute value of piezoelectric voltage value, the absolute value of the precharge voltage value of data wire is equal corresponding to the contiguous pixels unit of part；
Wherein, any one row that it is the pel array that the pth row pixel cell, which is,.
Second aspect, the embodiments of the invention provide a kind of drive device of liquid crystal panel, the drive device is applied to
Described to have liquid crystal panel, the liquid crystal panel includes scan line, data wire and pel array, including：
The drive device electrically connects with the scan line and the data wire respectively, the scan line and the data wire
Electrically connected with the pel array；
The drive device, all or part of method described in 1-7 is required for perform claim.
In a kind of feasible embodiment, the drive device is driving chip or drive circuit.
The third aspect, the embodiments of the invention provide a kind of liquid crystal display device, including liquid crystal display device body, liquid crystal
Panel and the drive device as described in any one of claim 18 or 9, the liquid crystal display device body and described liquid crystal
Show that panel electrically connects, the liquid crystal panel electrically connects with the drive device.
As can be seen that in the scheme of the embodiment of the present invention, for the pixel list of every a line due to above-mentioned pel array
The delay gradual increase from left to right of the start-up time of scan line corresponding to member, corresponding to the caused pixel cell per a line
The start-up time of scan line from left to right gradually increases with the relative time delay of the start-up time of corresponding data wire, ultimately results in picture
Pixel voltage Problem-Error on plain unit, drive device control per a line pixel cell corresponding to scan line start-up time with
The relative delay of the start-up time of corresponding data wire is from left to right sequentially reduced so that is scanned corresponding to per one-row pixels unit
The start-up time of line is consistent with the relative delay of the start-up time of corresponding data wire, solves the pixel electricity of pixel cell
The problem of pressure mistake is filled；For the pixel cell of each row due to above-mentioned pel array corresponding data wire voltage on to
It is gradually reduced, the problem of causing the pixel voltage deficiency of pixel cell, each row of the above-mentioned drive device in above-mentioned pel array
Pixel cell corresponding to increase the pre-charge voltage gradually increased from top to bottom on data wire so that above-mentioned pel array it is every
Pixel voltage on the pixel cell of one row is sufficient.Compared with prior art, by the above method, liquid crystal panel is advantageously accounted for
Pixel cell (i.e. thin film transistor (TFT)) voltage mistake fill or the problem of undercharge, improve the diverse location of liquid crystal panel
Brightness uniformity, improve liquid crystal panel picture taste.
Brief description of the drawings
More clearly to illustrate the construction feature and effect of the present invention, it is entered with specific embodiment below in conjunction with the accompanying drawings
Row describes in detail.
Fig. 1 shows for the scan line and data wire of a kind of liquid crystal panel schematic diagram provided in an embodiment of the present invention and liquid crystal panel
It is intended to；
Fig. 2 is a kind of structural representation of liquid crystal panel provided in an embodiment of the present invention；
Fig. 3 is the schematic diagram of the liquid crystal display panel of another embodiment of the present invention；
Fig. 4 is the scan line and data wire schematic diagram of the q row pixel cells of the pel array on liquid crystal panel；
Fig. 5 is a kind of pel array schematic diagram provided in an embodiment of the present invention；
Fig. 6 is the scan line and data wire schematic diagram of the pth row pixel cell of the pel array on liquid crystal panel；
Fig. 7 is a kind of pel array schematic diagram provided in an embodiment of the present invention；
Fig. 8 is the data wire and scan line schematic diagram of each pixel cell in the pel array on liquid crystal panel.
Specific embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation describes.Wherein, being given for example only property of accompanying drawing illustrates that expression is only schematic diagram, it is impossible to is interpreted as the limitation to this patent.
Referring to Fig. 2, Fig. 2 is a kind of structural representation of liquid crystal panel provided in an embodiment of the present invention.As shown in Fig. 2 should
Liquid crystal panel includes liquid crystal panel 200 and drive device 201, and the liquid crystal panel 200 includes data wire 202, scan line 203 and picture
Pixel array 204.Wherein, above-mentioned drive device 201 controls above-mentioned data wire 202 and above-mentioned scan line 203 to be powered to pel array.
Above-mentioned pel array 204 includes m*n pixel cell, and in order to represent convenient, only pixel cell is represented with rectangle in figure.
It is pointed out that above-mentioned data wire 202 is located at the different layers of above-mentioned liquid crystal panel from above-mentioned scan line 203,
And insulated between above-mentioned data wire 202 and above-mentioned scan line 203 by insulating barrier.In the scheme of the embodiment of the present invention,
The a plurality of scan line 203 is horizontally disposed and vertically-spaced arrangement, and a plurality of data wire 292 is vertically arranged and along water
Square to being spaced.
In order to facilitate description, above-mentioned scan line (Gate Line, GL) 203 is numbered, wherein, according to from top to bottom
Order the scan line 203 is named as first scan line GL (1), Article 2 scan line GL (2) respectively, Article 3 scanning
Line GL (2) ..., the m-2 articles scan line GL (m-2), (m-1) article scan line GL (m-1), (m) article scan line GL (m), its
In, m is the number of a plurality of scan line 203, and m is positive integer.Similarly, to the data wire (Data Line, DL) 202
It is numbered, wherein, the data wire 202 is named as the first data line DL (1), respectively according to order from left to right
Two data line DL (2), Article 3 data wire DL (3) ..., (n-3) data line DL (n-3), (n-2) data line DL
(n-2), (n-1) data line DL (n-1), nth bar data wire DL (n), wherein, n is the number of a plurality of data wire 202
Mesh, and n is positive integer.
Referring to Fig. 3, Fig. 3 is a kind of driving method schematic flow sheet of liquid crystal panel provided in an embodiment of the present invention.Such as Fig. 3
Shown, this method includes：
S301, the drive device of liquid crystal panel control the unlatching of scan line corresponding to every one-row pixels unit of pel array
Moment and the start-up time of corresponding data wire, to meet the first preparatory condition.
Wherein, above-mentioned first fore condition is specially：
The relative delay of pixel cell A start-up time is less than the previous pixel cell adjacent with pixel cell A
The relative delay of start-up time；And the relative delay of above-mentioned pixel cell A start-up time is more than adjacent with pixel cell A
The start-up time relative delay of the latter pixel cell；
Wherein, pixel cell A be it is above-mentioned per in one-row pixels unit except the first and the last in it is any
One；The relative delay of above-mentioned start-up time is opened for the corresponding data wire of scan line start-up time corresponding to pixel cell
Open the difference at moment.
In a kind of feasible embodiment, the start-up time of the previous pixel cell adjacent with above-mentioned pixel cell A
Relative delay, above-mentioned pixel cell A start-up time relative delay and relative delay with pixel cell A start-up time
Into arithmetic progression, the tolerance of the arithmetic progression is less than 0；
Above-mentioned pixel cell A be it is above-mentioned per in one-row pixels unit except the first and the last in it is any one
It is individual.
The tolerance value of above-mentioned arithmetic progression is related to the equivalent resistance R and equivalent capacity C of above-mentioned pixel cell.The tolerance value
5 times of timeconstantτ can be equal to, the timeconstantτ=RC, other values can also be equal to.
For example, referring to Fig. 4, Fig. 4 is the scan line sum of the q row pixel cells of the pel array on liquid crystal panel
According to line schematic diagram.It should be noted that solid line is scan line in the figure, dotted line is data wire.As shown in figure 4, figure a1 is this
Scan line and data wire schematic diagram on first capable pixel cell, from the figure a1 in Fig. 4, the unlatching of the pixel cell
The relative delay t1 at moment, the magnitude of voltage of data wire is V1.Scheme b1 be this line second pixel unit on scan line and
Data wire schematic diagram, from the figure b1 in Fig. 4, the relative delay of the start-up time of the pixel cell is t2, the electricity of data wire
Pressure value is V2.The scan line and data wire schematic diagram on n-th of (i.e. last) pixel cell that c1 is this line are schemed, by scheming
Figure c1 in 4 understands that the relative delay of the start-up time of the pixel cell is tn, and the magnitude of voltage of data wire is Vn.
It is pointed out that the magnitude of voltage of above-mentioned data wire can be understood as the charging voltage of pixel cell.
Wherein, above-mentioned V1=V2=...=Vn, i.e., the magnitude of voltage of the data wire of the pixel cell of above-mentioned q rows is equal,
And V1, V2 ..., Vn are all higher than 0.Above-mentioned t1>t2>…>Tn, and t1, t2 ..., tn be arithmetic progression, now the arithmetic progression
Tolerance is less than 0.
In a kind of feasible embodiment, start-up time is relative corresponding to the q row pixel cells in above-mentioned pel array
In delay, the relative delay of start-up time is equal corresponding to the contiguous pixels unit of part, wherein, above-mentioned q row pixel cells are
Any a line of above-mentioned pel array.
Illustrate, it is assumed that the quantity of the one-row pixels unit of above-mentioned pel array is the 4th of 10 and above-mentioned pel array
The relative delay of start-up time corresponding to row pixel cell is respectively t1, t2, t3, t4, t5, t6, t7, t8, t9, t10.Wherein,
Above-mentioned t1, t2, t3, t4, t5, t6, t7, t8, t9, t10 magnitude relationship can be t1=t2=t3>t4>T5=t6=t7>T8=
t9>T10, can also be t1=t2>T3=t4>T5=t6>T7=t8>T9=t10, can also be t1=t2=t3=t4=t5>t6
=t7=t8=t9=t10, other magnitude relationships are can also be, but that need to meet is t1, t2, t3, t4, t5, t6, t7, t8,
The relative delay of start-up time equal two-by-two is adjacent in t9, t10.
In a kind of feasible embodiment, the start-up time of the pixel cell in the first predeterminable area of above-mentioned pel array
Relative delay it is equal.
For example, referring to Fig. 5, Fig. 5 is a kind of pel array schematic diagram provided in an embodiment of the present invention.As figure 5 illustrates, on
Stating in pel array includes 7*9 pixel cell.The delay of the start-up time of pixel cell in region 501 is equal, region 502
The delay of the start-up time of interior pixel cell is equal, and the delay of the start-up time of the pixel cell in region 503 is equal, region
The delay of the start-up time of pixel cell in 504 is equal.
It should be noted that above-mentioned zone 501, region 502, region 503 and region 504 are only intended to explain the present invention's
First predeterminable area of embodiment, it is not the limitation to the embodiment of the present invention.
S302, drive device control are in preset duration, to pair of each row pixel cell of the pel array
The data wire increase pre-charge voltage answered, to meet the second preparatory condition.
Wherein, the initial time of above-mentioned preset duration be above-mentioned data wire start-up time, the termination of above-mentioned preset duration
Moment is more than the start-up time of scan line, and close moment and the close moment of above-mentioned data wire less than the scan line.
Wherein, above-mentioned second preparatory condition is：
From top to bottom, the absolute value of the increased precharge voltage value of pixel cell B data wire is more than and pixel cell B
The absolute value of the increased precharge voltage value of data wire of an adjacent upper pixel cell, and above-mentioned pixel cell B data
The absolute value of the increased precharge voltage value of line is less than the data wire increase of the next pixel cell adjacent with pixel cell B
Precharge voltage value absolute value；
Above-mentioned pixel cell B is except the first and the last any one in above-mentioned each row pixel cell
It is individual.
In a kind of feasible embodiment, the data wire of an above-mentioned upper pixel cell adjacent with pixel cell B increases
The absolute value of the precharge voltage value added, the absolute value of the increased precharge voltage value of pixel cell B data wire and with it is above-mentioned
The absolute value of the increased precharge voltage value of data wire of next pixel cell adjacent pixel cell B into arithmetic progression, and
The tolerance of the arithmetic progression is more than 0.
For example, referring to Fig. 6, Fig. 6 is the scan line sum of the pth row pixel cell of the pel array on liquid crystal panel
According to line schematic diagram.It should be noted that solid line is scan line in the figure, dotted line is data wire.As shown in fig. 6, figure a2 arranges for pth
First pixel cell on scan line and data wire schematic diagram, from the figure a2 in Fig. 6, first picture of above-mentioned p row
The absolute value of the increased precharge voltage value of data wire of plain unit is V1OD, and the data line voltage value of the pixel cell is V1,
And the relative delay of the start-up time of the pixel cell is t1.It is sweeping on the second pixel unit of pth row by Fig. 6 figure b2
Line and data wire schematic diagram are retouched, it is increased pre- from the figure b2 in Fig. 6, the data wire of the second pixel unit of above-mentioned P row
The absolute value of charging voltage value is V2OD, and the data line voltage value of the pixel cell is V2, and the relative delay of start-up time is t2.
The scan line and data wire schematic diagram on m-th of (i.e. last) pixel cell that c2 is above-mentioned pth row are schemed, by Fig. 6
Scheme c2 to understand, the absolute value of the increased precharge voltage value of data wire of above-mentioned pixel cell is VmOD, the number of the pixel cell
It is Vm according to line voltage value, the relative delay of start-up time is tm.
Wherein, V1OD<V2OD<…<VmOD, and V1OD, V2OD ..., VmOD are arithmetic progression, and the public affairs of the arithmetic progression
Difference is more than 0.Above-mentioned V1=V2=...=Vm, i.e., the magnitude of voltage of the data wire of the pixel cell of above-mentioned pth row is equal, above-mentioned t1
=t2=...=tm, i.e., the relative delay of the start-up time of the pixel cell of above-mentioned pth row are consistent.
In a kind of feasible example, the precharge of data wire corresponding to the pth row pixel cell in above-mentioned pel array
In the absolute value of magnitude of voltage, the absolute value of the precharge voltage value of data wire is equal corresponding to the contiguous pixels unit of part, wherein,
Above-mentioned pth row pixel cell is any one row of above-mentioned pel array.
Illustrate, it is assumed that the quantity of a row pixel cell of above-mentioned pel array be 8 when and above-mentioned pel array the 3rd
The absolute value of the precharge voltage value of data wire corresponding to row pixel cell is respectively V1OD, V2OD, V3OD, V4OD, V5OD,
V6OD,V7OD,V8OD.Wherein, above-mentioned V1OD, V2OD, V3OD, V4OD, V5OD, V6OD, V7OD, V8OD magnitude relationship can be
V1OD=V2OD=V3OD<V4OD<V5OD=V6OD=V7OD<V8OD, can also be V1OD<V2OD<V3OD=V4OD=V5OD<
V6OD=V7OD<V8OD, the magnitude relationship of other forms is can also be, but that need to meet is V1OD, V2OD, V3OD, V4OD,
The precharge voltage value of data wire equal two-by-two is adjacent in V5OD, V6OD, V7OD, V8OD.
In a kind of feasible embodiment, number corresponding to the pixel cell in the second predeterminable area in above-mentioned pel array
Absolute value according to the precharge voltage value of line is equal.
For example, referring to Fig. 7, Fig. 7 is a kind of pel array schematic diagram provided in an embodiment of the present invention.As shown in fig. 7,
Include 8*8 pixel cell in above-mentioned pel array.The precharge voltage value phase of data wire corresponding to pixel cell in region 701
Deng, the precharge voltage value of data wire corresponding to pixel cell is equal in region 702, in region 703 corresponding to pixel cell number
It is equal according to the precharge voltage value of line.
It should be noted that above-mentioned zone 701, region 702 and region 703 are only intended to explain embodiments of the invention
Second predeterminable area, it is not the limitation to the embodiment of the present invention.
It is pointed out that the voltage of above-mentioned data wire is alternating voltage, above-mentioned steps S302 associated description is to be directed to
The increased pre-charge voltage of voltage (alternating voltage) positive half period of data wire.Pixel list on each row of above-mentioned pel array
The absolute value of the increased precharge voltage value of voltage negative half-cycle of data wire corresponding to member meets the voltage just half of the data wire
The variation tendency of the increased precharge voltage value in cycle is consistent, for details, reference can be made to above-mentioned steps S302 associated description.
S303, the drive device control the scanning according to first preparatory condition and second preparatory condition
Line and the data wire drive the pel array.
Wherein, to every one-row pixels unit of above-mentioned pel array, above-mentioned drive device is according to described in above-mentioned steps S301
Method control above-mentioned scan line and above-mentioned data wire to be powered；It is above-mentioned to each row pixel cell of above-mentioned pel array
Drive device controls above-mentioned scan line and above-mentioned data wire to be powered according to the method described in above-mentioned steps S302.
It is pointed out that above-mentioned pixel cell can be understood as the thin film transistor (TFT) in above-mentioned liquid crystal panel.
For example, referring to Fig. 8, Fig. 8 is the data wire of each pixel cell in the pel array on liquid crystal panel and sweeps
Retouch line schematic diagram.It should be noted that solid line is scan line in the figure, dotted line is data wire.As shown in figure 8, above-mentioned pixel battle array
The relative delay of start-up time is from left to right sequentially reduced corresponding to the pixel cell of every a line of row, for details, reference can be made to above-mentioned step
Rapid S301 associated description, is no longer described, the pixel cell respective data lines of each row of above-mentioned pel array are increased herein
Precharge voltage value from top to bottom, becomes big, for details, reference can be made to above-mentioned steps S302 associated description, no longer describe herein successively.
As can be seen that in the scheme of the embodiment of the present invention, for the pixel list of every a line due to above-mentioned pel array
The delay gradual increase from left to right of the start-up time of scan line corresponding to member, corresponding to the caused pixel cell per a line
The start-up time of scan line from left to right gradually increases with the relative time delay of the start-up time of corresponding data wire, ultimately results in picture
Pixel voltage Problem-Error on plain unit, drive device control per a line pixel cell corresponding to scan line start-up time with
The relative delay of the start-up time of corresponding data wire is from left to right sequentially reduced so that is scanned corresponding to per one-row pixels unit
The start-up time of line is consistent with the relative delay of the start-up time of corresponding data wire, solves the pixel electricity of pixel cell
The problem of pressure mistake is filled；For the pixel cell of each row due to above-mentioned pel array corresponding data wire voltage on to
It is gradually reduced, the problem of causing the pixel voltage deficiency of pixel cell, each row of the above-mentioned drive device in above-mentioned pel array
Pixel cell corresponding to increase the pre-charge voltage gradually increased from top to bottom on data wire so that above-mentioned pel array it is every
Pixel voltage on the pixel cell of one row is sufficient.Compared with prior art, by the above method, liquid crystal panel is advantageously accounted for
Pixel cell (i.e. thin film transistor (TFT)) voltage mistake fill or the problem of undercharge, improve the diverse location of liquid crystal panel
Brightness uniformity, improve liquid crystal panel picture taste.
The embodiment of the present invention also provides a kind of drive device 201 of liquid crystal panel, and the drive device has liquid applied to described
Crystal panel, above-mentioned liquid crystal panel include scan line 203, data wire 202 and pel array 204, including：
Above-mentioned drive device 201 electrically connects with above-mentioned scan line 203 and above-mentioned data wire 202 respectively, above-mentioned scan line 203
Electrically connected with above-mentioned data wire 202 with above-mentioned pel array 204；
Above-mentioned drive device 201, all or part of method described in 1-7 is required for perform claim.
The embodiment of the present invention also provides a kind of liquid crystal display device 900, and the liquid crystal display device 900 includes liquid crystal display
Device body 910 and above-mentioned liquid crystal display panel 200, the liquid crystal display device body 910 and described LCD
Plate 200 electrically connects.
Described above is the preferred embodiment of the present invention, it is noted that for those skilled in the art
For, under the premise without departing from the principles of the invention, some improvements and modifications can also be made, these improvements and modifications are also considered as
Protection scope of the present invention.
Claims (10)
1. a kind of driving method of liquid crystal panel, methods described is applied to the liquid crystal panel, and the liquid crystal panel includes a plurality of
Scan line, a plurality of data lines and pel array, it is characterised in that methods described includes：
The start-up time of scan line and corresponding number corresponding to every one-row pixels unit of the drive device control pel array
According to the start-up time of line, to meet the first preparatory condition；
The drive device control is in preset duration, to the corresponding data wire of each row pixel cell of the pel array
Increase pre-charge voltage, to meet the second preparatory condition；
The drive device controls the scan line and the number according to first preparatory condition and second preparatory condition
The pel array is driven according to line.
2. the method as described in claim 1, it is characterised in that first preparatory condition is：
The relative delay of pixel cell A start-up time is less than opening for the previous pixel cell adjacent with the pixel cell A
Open the relative delay at moment；And the relative delay of the start-up time of the pixel cell A is more than adjacent with the pixel cell A
The start-up time relative delay of the latter pixel cell；
Wherein, the pixel cell A be it is described per in one-row pixels unit except the first and the last in it is any
One；The relative delay of the start-up time is opened for the corresponding data wire of scan line start-up time corresponding to pixel cell
Open the difference at moment.
3. method as claimed in claim 2, it is characterised in that
The relative delay of the start-up time of the previous pixel cell adjacent with the pixel cell A, the pixel cell A are opened
Open the relative delay at moment and with the relative delay of the start-up time of the pixel cell A into arithmetic progression；
Wherein, the tolerance of the arithmetic progression is less than 0.
4. method as claimed in claim 2, it is characterised in that opened corresponding to the q row pixel cells in the pel array
In the relative delay for opening the moment, the relative delay of start-up time is equal corresponding to the contiguous pixels unit of part；
Wherein, the q rows pixel cell is any a line of the pel array.
5. the method as described in claim 1, it is characterised in that second preparatory condition is：
From top to bottom, the absolute value of the increased precharge voltage value of pixel cell B data wire is more than and the pixel cell B phases
The absolute value of the increased precharge voltage value of data wire of an adjacent upper pixel cell, and the data wire of the pixel cell B
The absolute value of increased precharge voltage value is less than the data wire increase of the next pixel cell adjacent with the pixel cell B
Precharge voltage value absolute value；
The pixel cell B is any one in each row pixel cell except the first and the last.
6. method as claimed in claim 5, it is characterised in that
It is the absolute value of the increased precharge voltage value of data wire of a upper pixel cell adjacent the pixel cell B, described
The absolute value of the pixel cell B increased precharge voltage value of data wire and the next pixel adjacent with the pixel cell B
The absolute value of the increased precharge voltage value of data wire of unit is into arithmetic progression；
The tolerance of the arithmetic progression is more than 0.
7. method as claimed in claim 5, it is characterised in that
In the absolute value of the precharge voltage value of data wire corresponding to pth row pixel cell in the pel array, partly connect
The absolute value of the precharge voltage value of data wire is equal corresponding to continuous pixel cell；
Wherein, any one row that it is the pel array that the pth row pixel cell, which is,.
8. a kind of drive device of liquid crystal panel, the drive device has liquid crystal panel, the liquid crystal panel bag applied to described
Include scan line, data wire and pel array, it is characterised in that including：
The drive device electrically connects with the scan line and the data wire respectively, the scan line and the data wire with
The pel array electrical connection；
The drive device, all or part of method described in 1-7 is required for perform claim.
9. drive device as claimed in claim 8, it is characterised in that the drive device is driving chip or driving electricity
Road.
10. a kind of liquid crystal display device, it is characterised in that including liquid crystal display device body, liquid crystal panel and such as claim 8
Or 9 drive device described in any one, the liquid crystal display device body electrically connect with described liquid crystal display panel, the liquid
Crystal panel electrically connects with the drive device.
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| WO2020151375A1 (en) * | 2019-01-25 | 2020-07-30 | 京东方科技集团股份有限公司 | Driving method for display device, and display device |
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| TWI781796B (en) * | 2021-10-19 | 2022-10-21 | 大陸商常州欣盛半導體技術股份有限公司 | Timing control method using pulse width modulation, timing controller and display device |
| TWI790780B (en) * | 2021-10-19 | 2023-01-21 | 大陸商常州欣盛半導體技術股份有限公司 | Timing control method using pulse frequency modulation, timing controller and display device |
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| CN113643672A (en) * | 2021-10-19 | 2021-11-12 | 常州欣盛半导体技术股份有限公司 | Multi-pulse frequency modulation timing sequence control method, timing sequence controller and display device thereof |
| CN113870809A (en) * | 2021-10-19 | 2021-12-31 | 常州欣盛半导体技术股份有限公司 | Pulse frequency modulation time sequence control method, time sequence controller and display device |
| TWI781796B (en) * | 2021-10-19 | 2022-10-21 | 大陸商常州欣盛半導體技術股份有限公司 | Timing control method using pulse width modulation, timing controller and display device |
| TWI790780B (en) * | 2021-10-19 | 2023-01-21 | 大陸商常州欣盛半導體技術股份有限公司 | Timing control method using pulse frequency modulation, timing controller and display device |
| WO2023077535A1 (en) * | 2021-11-02 | 2023-05-11 | Tcl华星光电技术有限公司 | Pixel charging method and display panel |
| US12073805B2 (en) | 2021-11-02 | 2024-08-27 | Tcl China Star Optoelectronics Technology Co., Ltd. | Pixel charging method and display panel |
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