CN107505933A - Subordinate inverter controller test system - Google Patents
Subordinate inverter controller test system Download PDFInfo
- Publication number
- CN107505933A CN107505933A CN201710792572.1A CN201710792572A CN107505933A CN 107505933 A CN107505933 A CN 107505933A CN 201710792572 A CN201710792572 A CN 201710792572A CN 107505933 A CN107505933 A CN 107505933A
- Authority
- CN
- China
- Prior art keywords
- fpga
- chip microcomputer
- test system
- inverter controller
- subordinate inverter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B23/00—Testing or monitoring of control systems or parts thereof
- G05B23/02—Electric testing or monitoring
- G05B23/0205—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults
- G05B23/0218—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults characterised by the fault detection method dealing with either existing or incipient faults
- G05B23/0221—Preprocessing measurements, e.g. data collection rate adjustment; Standardization of measurements; Time series or signal analysis, e.g. frequency analysis or wavelets; Trustworthiness of measurements; Indexes therefor; Measurements using easily measured parameters to estimate parameters difficult to measure; Virtual sensor creation; De-noising; Sensor fusion; Unconventional preprocessing inherently present in specific fault detection methods like PCA-based methods
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Automation & Control Theory (AREA)
- Microcomputers (AREA)
Abstract
The invention provides a kind of subordinate inverter controller test system, including：Single-chip microcomputer：By internal analog to digital conversion circuit to detect external sensor signal, and data interaction is carried out by communication interface and tested controller；FPGA：Slave pattern is configured to, is interacted with the single-chip data, the single-chip microcomputer carries out IGBT drivings by the FPGA, IGBT feedback signals detect and communication, realizes chain control.The present invention is using single-chip microcomputer to FPGA traveling software merit ratings, in upper electricity debugging, it is only necessary to carry out download program to single-chip microcomputer, you can be automatically performed coupled FPGA software merit rating, after configuration, software and hardware configuration and debugging are carried out in the case where being not brought up the DLL of other chips.
Description
Technical field
The present invention relates to railcar hardware testing technical field, in particular it relates to which a kind of subordinate inverter controller is surveyed
Test system.
Background technology
Controller is the main body for realizing control function, it is applied as most important part in current industrial control module
Throughout most automation control areas.Once device outlet problem on the circuit or plate of controller, will cause entirely to control
The afunction of molding block, or even cause irreversible damage.Therefore, it is necessary to be surveyed offline to the basic function of controller
Examination.
Railcar is mainly worked by subordinate inverter to export three-phase alternating current for stand-by motor, while again through over commutation
Direct current is exported to use for train battery and emergency cell charging.With the variation of electrical equipment in railcar, to auxiliary
Help the requirement of circuit control device also increasingly harsher.
It is in the test process of subordinate inverter controller, it is necessary to corresponding according to the circuit structure design of tested controller
Testing scheme, detect the design requirement whether its input meets product with output signal.Meanwhile when circuit goes wrong, survey
Test system will build corresponding feedback mechanism, correctly reflect faulty loop, to allow maintenance personal to carry out failure
Diagnosis and maintenance.
Current debugging circuit board, mainly carries out on-line debugging by serial ports to tested controller, may be programmed when there is other
The interface for needing for this to be tested controller in the presence of logic controller is drawn, then is debugged with corresponding development environment.Work as quilt
Controller is surveyed not needed for extraction during interface, or even needs carry out extra welding job to tested controller and could tested
Work.
The content of the invention
For in the prior art the defects of, it is an object of the invention to provide a kind of subordinate inverter controller test system.
According to a kind of subordinate inverter controller test system provided by the invention, including：
Single-chip microcomputer：External sensor signal is detected by internal analog to digital conversion circuit, and by communication interface with being tested
Controller carries out data interaction；
FPGA：Slave pattern is configured to, is interacted with the single-chip data, the single-chip microcomputer carries out IGBT by the FPGA
Driving, the detection of IGBT feedback signals and communication, realize chain control.
Preferably, the slave pattern includes：The CCLK pins of the FPGA are as output end, as retaking of a year or grade clock；DONE
Pin represents the completion of configuration process as output end；Pin forces FPGA as the effective input of low level
Its configuration memory is removed, is passed throughPin initializes a configuration cycle.
Preferably, it is describedThe external pull-up resistor of pin.
Preferably, the FPGA is loaded into configuration file, and the instruction of the single-chip microcomputer is performed according to the logic of configuration file.
Preferably, in addition to host computer, the host computer interrupt debugging using serial ports, tested controller are sent different
Instruction, according to the corresponding functional module of instruction testing, final result is shown in the serial ports software of host computer.
Preferably, in addition to analog peripheral, the analog to digital conversion circuit of the single-chip microcomputer is inputted by amplifying circuit.
Preferably, IGBT drive signals are exported by the PWM pins of the single-chip microcomputer.
Compared with prior art, the present invention has following beneficial effect：
The present invention utilizes single-chip microcomputer to FPGA traveling software merit ratings, in upper electricity debugging, it is only necessary to enter stroke to single-chip microcomputer
Sequence is downloaded, you can is automatically performed coupled FPGA software merit rating, after configuration, is being not brought up the volume of other chips
Software and hardware configuration and debugging are carried out in the case of journey interface.
Brief description of the drawings
The detailed description made by reading with reference to the following drawings to non-limiting example, further feature of the invention,
Objects and advantages will become more apparent upon：
Fig. 1 is single-chip microcomputer configuration schematic diagram；
Fig. 2 is auxiliary circuit control device test schematic diagram；
Fig. 3 is the structural framing figure of the system.
Embodiment
With reference to specific embodiment, the present invention is described in detail.Following examples will be helpful to the technology of this area
Personnel further understand the present invention, but the invention is not limited in any way.It should be pointed out that the ordinary skill to this area
For personnel, without departing from the inventive concept of the premise, some changes and improvements can also be made.These belong to the present invention
Protection domain.
A kind of subordinate inverter controller test system provided by the invention, including：SCM＆FPGA, in the present embodiment
In, single-chip microcomputer uses ST10R167, FPGA to use XC4003E.
Single-chip microcomputer, to detect external sensor signal, and is connect by internal analog to digital conversion circuit by RS232 and CAN communication
Mouth carries out data interaction with tested controller；FPGA：Single-chip microcomputer to FPGA by carrying out serial slave mode configuration, with single-chip microcomputer number
According to interaction, single-chip microcomputer carries out IGBT drivings by FPGA, IGBT feedback signals detect and communication, realizes chain control.
Single-chip microcomputer to FPGA by carrying out serial slave mode configuration, pin needed for configuration：FPGA CCLK pins are from mould
Output end is used as under formula, after configuring, CCLK has a weak pull-up resistor, as retaking of a year or grade clock；DONE pins are in the slave mode
As output end, the completion of configuration process is represented；Pin forces FPGA to remove as the effective input of low level
Its configuration memory, passes throughPin initializes a configuration cycle,One should be connected outside pin and draws electricity
Resistance.
Bit configuration files are converted to by the software independently write by hex configuration files.FPGA is being loaded into the process of data
In, the crc value being embedded in configuration file is compared with the crc value calculated in FPGA.When crc value is consistent, represent to be successfully loaded
Configuration file, FPGA can perform the instruction of single-chip microcomputer according to the logic of configuration file.When crc value is inconsistent, by that can pass through
Serial ports sends configuration failure and terminates configuration, as shown in Figure 1.
Debugged as shown in Fig. 2 debugging routine is interrupted by serial ports, it is main that different fingers is sent to controller using host computer
Order, according to the corresponding functional module of instruction testing, final result is shown in host computer serial ports software.
The signal of detection power module is fed back in FPGA by controller circuitry, and single-chip microcomputer receives the number that FPGA is collected
According to, and judge whether supply voltage is normal according to data.03 instruction is sent by serial ports software and carries out power module detection, and is connect
Feedback data is received, whether normal directly displays output voltage.
Analog peripheral is inputted, and single-chip microcomputer digital-to-analogue conversion interface is input to after amplifier circuit.ST10R167 is carried
Supply on the analog/digital converter and a holding circuit chip of 10 bit resolutions.Digital-to-analogue is selected by configuring ADCON
After translation function, ADBSY registers are set to 1, start analog conversion function, thus can show that digital-to-analogue conversion is each led to one by one
The data in road.02 instruction is sent in serial ports software, shows the data of digital-to-analogue conversion.
IGBT drive signals are exported by the PWM of single-chip microcomputer, and ST10R167 pulse-modulator module has the PWM of 4 tunnel independences
Signal forms.00 instruction is sent in serial ports software, shows IGBT output states.IGBT feedback signals connect by FPGA interface
Receive, monolithic section collection feedback signal, judge whether IGBT feedbacks are normal, and feedback information is shown in serial ports software.It is soft in serial ports
01 instruction is sent in part, shows feedback states.
As shown in figure 3, the present invention utilizes single-chip microcomputer to FPGA traveling software merit ratings, in upper electricity debugging, it is only necessary to list
Piece machine carries out download program, you can is automatically performed coupled FPGA software merit rating, after configuration, is being not brought up it
In the case of the DLL of his chip by FPGA enter line sensor input detection, supply voltage detection and IGBT output/
Feedback detection, host computer interact with single-chip data, the operation of real-time supervisory control device test system.
The specific embodiment of the present invention is described above.It is to be appreciated that the invention is not limited in above-mentioned
Particular implementation, those skilled in the art can make a variety of changes or change within the scope of the claims, this not shadow
Ring the substantive content of the present invention.In the case where not conflicting, the feature in embodiments herein and embodiment can any phase
Mutually combination.
Claims (7)
- A kind of 1. subordinate inverter controller test system, it is characterised in that including：Single-chip microcomputer：External sensor signal is detected by internal analog to digital conversion circuit, and passes through communication interface and tested control Device carries out data interaction；FPGA：Slave pattern is configured to, is interacted with the single-chip data, the single-chip microcomputer carries out IGBT drives by the FPGA Dynamic, IGBT feedback signals detection and communication, realize chain control.
- 2. subordinate inverter controller test system according to claim 1, it is characterised in that the slave pattern includes： The CCLK pins of the FPGA are as output end, as retaking of a year or grade clock；DONE pins represent the complete of configuration process as output end Into；Pin forces FPGA to remove its configuration memory, passed through as the effective input of low level Pin initializes a configuration cycle.
- 3. subordinate inverter controller test system according to claim 2, it is characterised in that describedPin External pull-up resistor.
- 4. subordinate inverter controller test system according to claim 1, it is characterised in that the FPGA is loaded into configuration File, the instruction of the single-chip microcomputer is performed according to the logic of configuration file.
- 5. subordinate inverter controller test system according to claim 1, it is characterised in that also including host computer, institute State host computer and debugging is interrupted using serial ports, different instructions is sent to being tested controller, according to the corresponding function mould of instruction testing Block, final result are shown in the serial ports software of host computer.
- 6. subordinate inverter controller test system according to claim 1, it is characterised in that also including analog peripherals electricity Road, the analog to digital conversion circuit of the single-chip microcomputer is inputted by amplifying circuit.
- 7. subordinate inverter controller test system according to claim 1, it is characterised in that IGBT drive signals are by institute State the PWM pins output of single-chip microcomputer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710792572.1A CN107505933A (en) | 2017-09-05 | 2017-09-05 | Subordinate inverter controller test system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710792572.1A CN107505933A (en) | 2017-09-05 | 2017-09-05 | Subordinate inverter controller test system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN107505933A true CN107505933A (en) | 2017-12-22 |
Family
ID=60695644
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710792572.1A Pending CN107505933A (en) | 2017-09-05 | 2017-09-05 | Subordinate inverter controller test system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107505933A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113419516A (en) * | 2021-06-23 | 2021-09-21 | 上海地铁电子科技有限公司 | Off-line detection system and method for subway train traction control unit |
Citations (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100400068B1 (en) * | 2003-02-21 | 2003-09-29 | Bong Taek Kim | Performance test equipment system of train driving device and test method thereof |
| CN201117149Y (en) * | 2007-11-06 | 2008-09-17 | 南京信息工程大学 | Programmable experiment development device of modularization design |
| CN101382585A (en) * | 2007-09-07 | 2009-03-11 | 比亚迪股份有限公司 | Test method, apparatus and generator for inverter in generator |
| CN201397368Y (en) * | 2009-05-12 | 2010-02-03 | 广州市地下铁道总公司 | Testing equipment for control unit of auxiliary inverter |
| CN201890228U (en) * | 2010-11-18 | 2011-07-06 | 南车资阳机车有限公司 | Diesel generator and storage battery hybrid power alternating-current drive locomotive control system |
| CN102609286A (en) * | 2012-02-10 | 2012-07-25 | 株洲南车时代电气股份有限公司 | System for updating FPGA (Field Programmable Gate Array) configuration program from a long distance based on control of processor and method therefor |
| CN102706386A (en) * | 2012-05-23 | 2012-10-03 | 烽火通信科技股份有限公司 | Single disc used for simulating heat consumption of IC (integrated circuit) chip |
| CN202870621U (en) * | 2012-10-30 | 2013-04-10 | 广东易事特电源股份有限公司 | Device for testing inverter control panel |
| CN103091587A (en) * | 2013-01-24 | 2013-05-08 | 山东新风光电子科技发展有限公司 | Energy-saving inverter test circuit and control method |
| CN103430470A (en) * | 2011-03-21 | 2013-12-04 | 迪尔公司 | System for detecting failure associated with inverter or associated machine |
| CN103809120A (en) * | 2014-03-03 | 2014-05-21 | 广东机电职业技术学院 | Testing system and method for electric part of power system for weak hybrid electric vehicle |
| CN103926915A (en) * | 2014-04-08 | 2014-07-16 | 国家电网公司 | Three-phase four-wire system APF control-panel debugging method |
| CN204423141U (en) * | 2015-01-28 | 2015-06-24 | 上海申通地铁集团有限公司 | For the Special testing device of the traction inverter controller of railcar system |
| CN105955071A (en) * | 2016-07-13 | 2016-09-21 | 北京润科通用技术有限公司 | Load simulation circuit and power level motor simulation test equipment |
| CN106137077A (en) * | 2015-03-27 | 2016-11-23 | 青岛海尔洗碗机有限公司 | A kind of use in dishwasher spray system with subregion washing function and dish-washing machine |
| CN205864286U (en) * | 2016-07-29 | 2017-01-04 | 成都运达科技股份有限公司 | A kind of train three-phase subordinate inverter |
| CN205959061U (en) * | 2016-07-18 | 2017-02-15 | 上海申通地铁集团有限公司 | A testing arrangement that is used for contrary controller of assistance of railcar system |
| CN106919409A (en) * | 2015-12-25 | 2017-07-04 | 航天信息股份有限公司 | A kind of FPGA unit updating apparatus, system and method |
-
2017
- 2017-09-05 CN CN201710792572.1A patent/CN107505933A/en active Pending
Patent Citations (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100400068B1 (en) * | 2003-02-21 | 2003-09-29 | Bong Taek Kim | Performance test equipment system of train driving device and test method thereof |
| CN101382585A (en) * | 2007-09-07 | 2009-03-11 | 比亚迪股份有限公司 | Test method, apparatus and generator for inverter in generator |
| CN201117149Y (en) * | 2007-11-06 | 2008-09-17 | 南京信息工程大学 | Programmable experiment development device of modularization design |
| CN201397368Y (en) * | 2009-05-12 | 2010-02-03 | 广州市地下铁道总公司 | Testing equipment for control unit of auxiliary inverter |
| CN201890228U (en) * | 2010-11-18 | 2011-07-06 | 南车资阳机车有限公司 | Diesel generator and storage battery hybrid power alternating-current drive locomotive control system |
| CN103430470A (en) * | 2011-03-21 | 2013-12-04 | 迪尔公司 | System for detecting failure associated with inverter or associated machine |
| CN102609286A (en) * | 2012-02-10 | 2012-07-25 | 株洲南车时代电气股份有限公司 | System for updating FPGA (Field Programmable Gate Array) configuration program from a long distance based on control of processor and method therefor |
| CN102706386A (en) * | 2012-05-23 | 2012-10-03 | 烽火通信科技股份有限公司 | Single disc used for simulating heat consumption of IC (integrated circuit) chip |
| CN202870621U (en) * | 2012-10-30 | 2013-04-10 | 广东易事特电源股份有限公司 | Device for testing inverter control panel |
| CN103091587A (en) * | 2013-01-24 | 2013-05-08 | 山东新风光电子科技发展有限公司 | Energy-saving inverter test circuit and control method |
| CN103809120A (en) * | 2014-03-03 | 2014-05-21 | 广东机电职业技术学院 | Testing system and method for electric part of power system for weak hybrid electric vehicle |
| CN103926915A (en) * | 2014-04-08 | 2014-07-16 | 国家电网公司 | Three-phase four-wire system APF control-panel debugging method |
| CN204423141U (en) * | 2015-01-28 | 2015-06-24 | 上海申通地铁集团有限公司 | For the Special testing device of the traction inverter controller of railcar system |
| CN106137077A (en) * | 2015-03-27 | 2016-11-23 | 青岛海尔洗碗机有限公司 | A kind of use in dishwasher spray system with subregion washing function and dish-washing machine |
| CN106919409A (en) * | 2015-12-25 | 2017-07-04 | 航天信息股份有限公司 | A kind of FPGA unit updating apparatus, system and method |
| CN105955071A (en) * | 2016-07-13 | 2016-09-21 | 北京润科通用技术有限公司 | Load simulation circuit and power level motor simulation test equipment |
| CN205959061U (en) * | 2016-07-18 | 2017-02-15 | 上海申通地铁集团有限公司 | A testing arrangement that is used for contrary controller of assistance of railcar system |
| CN205864286U (en) * | 2016-07-29 | 2017-01-04 | 成都运达科技股份有限公司 | A kind of train three-phase subordinate inverter |
Non-Patent Citations (2)
| Title |
|---|
| 徐文波，田耘: "主串模式", 《XILINX FPGA开发实用教程》 * |
| 罗杰: "《Verilog HDL与数字ASIC设计基础》", 31 March 2008 * |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113419516A (en) * | 2021-06-23 | 2021-09-21 | 上海地铁电子科技有限公司 | Off-line detection system and method for subway train traction control unit |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN100573378C (en) | A kind of portable vibration data collector and method based on embedded technology | |
| RU2515602C2 (en) | Method for manufacturing of smart system for complex development and testing of high-voltage converter | |
| CN102081145B (en) | Functional verification platform of battery management system | |
| CN202533798U (en) | Intelligent detection platform for new energy vehicle control unit | |
| CN101806857A (en) | Online fault diagnostic apparatus for circuit board | |
| CN209746085U (en) | SOC chip testing and verifying system | |
| CN106708003A (en) | Motor controller fault detection system and method thereof | |
| CN102944770B (en) | A kind of IGBT and the intelligent test system and the method for testing thereof that drive composite module | |
| CN107526020A (en) | A kind of automatic checkout system of the acoustic logging signal acquisition circuit based on SoC | |
| CN106774030A (en) | A kind of general purpose controller of the power electronic system based on DSP+FPGA | |
| CN106226679A (en) | For detecting frock and the method for testing thereof of embedded pos payment terminal mainboard | |
| CN106772206A (en) | Portable carrier module detector | |
| CN107505933A (en) | Subordinate inverter controller test system | |
| CN201562271U (en) | Computer system | |
| CN206696415U (en) | Battery management system insulating monitoring module detecting device | |
| CN201305392Y (en) | Portable device based on a USB interface for acquiring dynamic characteristic data of elevator | |
| CN201142137Y (en) | Portable single-channel vibration data collector based on embedded technology | |
| CN202285042U (en) | Automatic test system for complex programmable logic device (CPLD) | |
| CN107861052A (en) | A kind of test box of circuit board | |
| CN104198871B (en) | Electronic device tester and testing method thereof | |
| CN204347152U (en) | A kind of Multi-bus circuit board test diagnosis system | |
| CN206833184U (en) | Interface module for microcontroller | |
| CN203788304U (en) | Device for testing function of hardware interface | |
| CN206004543U (en) | Power amplifier device | |
| CN211352215U (en) | 5G communication module test assembly and computer equipment |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20171222 |
|
| RJ01 | Rejection of invention patent application after publication |