CN107482029B - Image sensor and packaging process thereof - Google Patents
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- CN107482029B CN107482029B CN201710906316.0A CN201710906316A CN107482029B CN 107482029 B CN107482029 B CN 107482029B CN 201710906316 A CN201710906316 A CN 201710906316A CN 107482029 B CN107482029 B CN 107482029B
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- 238000012858 packaging process Methods 0.000 title claims abstract description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 43
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 40
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 40
- 239000010703 silicon Substances 0.000 claims abstract description 40
- 239000000758 substrate Substances 0.000 claims abstract description 40
- 238000003466 welding Methods 0.000 claims abstract description 33
- 238000002161 passivation Methods 0.000 claims abstract description 27
- 239000002184 metal Substances 0.000 claims abstract description 22
- 229920000642 polymer Polymers 0.000 claims abstract description 9
- 239000010410 layer Substances 0.000 claims description 86
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 19
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 19
- 235000012239 silicon dioxide Nutrition 0.000 claims description 18
- 239000000377 silicon dioxide Substances 0.000 claims description 18
- 238000004519 manufacturing process Methods 0.000 claims description 10
- 229920002120 photoresistant polymer Polymers 0.000 claims description 10
- 238000000151 deposition Methods 0.000 claims description 9
- 239000011241 protective layer Substances 0.000 claims description 4
- 239000011521 glass Substances 0.000 claims description 3
- 229910052814 silicon oxide Inorganic materials 0.000 abstract description 7
- 238000005137 deposition process Methods 0.000 abstract description 3
- 230000032798 delamination Effects 0.000 abstract 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 abstract 1
- 238000005530 etching Methods 0.000 description 3
- 235000012431 wafers Nutrition 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000000227 grinding Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 239000002131 composite material Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
- 238000009863 impact test Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000012811 non-conductive material Substances 0.000 description 1
- 229920000620 organic polymer Polymers 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 239000012780 transparent material Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14632—Wafer-level processed structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1462—Coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14636—Interconnect structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14685—Process for coatings or optical elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14687—Wafer level processing
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Solid State Image Pick-Up Elements (AREA)
Abstract
The invention provides an image sensor and a packaging process thereof, wherein the image sensor comprises: a transparent cover plate and an image sensor chip; the image sensor chip comprises a silicon substrate, a passivation layer, a metal circuit layer and a precut edge covering structure, wherein the surface of the silicon substrate, where a welding pad is located, is bonded on a transparent cover plate, a through hole is formed in the silicon substrate, the passivation layer is located on the other surface of the silicon substrate, the passivation layer extends into the through hole, the metal circuit layer is located on the passivation layer and distributed on the surface of the passivation layer and extends into the through hole to be connected with the welding pad, the precut edge covering structure comprises precut structures and edges, the precut structures are respectively arranged close to the side surfaces of the image sensor chip, the welding pad is located between the precut structures, and the edges are filled in the through hole and the precut structures. The invention solves the problem of pulling the welding pad by a large amount of polymers, increases the bonding force between the silicon oxide and the Si surface by the SIN deposition process, reduces the risk of side delamination by adopting a precut structure, and prevents water vapor from entering.
Description
Technical Field
The present invention relates to the field of image sensors, and more particularly, to an image sensor and a packaging process thereof.
Background
An image sensor is an electronic device for imaging, and in order to expose a bonding pad on the back surface of a wafer, the existing image sensor adopts a combined structure of a groove and a hole to expose the bonding pad. However, the grooves of the above structure are filled with a large amount of photoresist, resulting in a large pulling stress, especially for wafers with low dielectric constants. In addition, the conventional image sensor side wafer and CV interface have a problem of being easily layered in a cold and hot impact test.
Therefore, in view of the above problems, it is necessary to propose a further solution.
Disclosure of Invention
The invention aims to provide an image sensor and a packaging process thereof, which are used for overcoming the defects in the prior art.
In order to solve the technical problems, the technical scheme of the invention is as follows:
an image sensor, comprising: a transparent cover plate and an image sensor chip bonded on the transparent cover plate;
the image sensor chip comprises a silicon substrate, a passivation layer, a metal circuit layer and a precut edge wrapping structure, wherein the surface of a welding pad of the silicon substrate is bonded on the transparent cover plate through photoresist, a through hole communicated with the welding pad is formed in the silicon substrate, the passivation layer is located on the other surface of the silicon substrate, the passivation layer extends into the through hole, the metal circuit layer is located on the passivation layer and distributed on the surface of the passivation layer and extends into the through hole to be connected with the welding pad, the precut edge wrapping structure comprises a precut structure longitudinally penetrating through the image sensor chip and an edge wrapping structure, the precut structure is respectively close to the side surface of the image sensor chip, the welding pad is located between the precut structures, and the edge wrapping structure is filled in the through hole and the precut structure.
As an improvement of the image sensor of the invention, the transparent cover plate is glass.
As an improvement of the image sensor, the through hole is a straight hole or an inclined hole, and the diameter of the inclined hole is gradually increased from a direction away from the welding pad.
As an improvement of the image sensor, the aspect ratio of the straight hole is 2:1-4:1.
As an improvement of the image sensor of the present invention, the inclination of the sidewall of the inclined hole is 65-85 °.
As an improvement of the image sensor of the invention, the passivation layer comprises a silicon nitride layer on the other surface of the silicon substrate and a silicon dioxide layer on the surface of the silicon nitride layer and extending into the through hole.
As an improvement of the image sensor of the invention, the silicon dioxide layer in the through hole comprises a side part contacted with the side wall of the through hole and a bottom contacted with the welding pad, a partial area of the bottom is provided with a window for exposing the welding pad, and the metal circuit layer is connected with the welding pad through the window.
As an improvement of the image sensor, the metal circuit layer is also provided with a bump, and the bump extends out of the protective layer.
As an improvement of the image sensor, a cofferdam is arranged between the transparent cover plate and the image sensor chip, and the precut structure extends into the cofferdam.
In order to solve the technical problems, the technical scheme of the invention is as follows:
an image sensor packaging process comprises the following steps:
s1, providing a silicon substrate and a transparent cover plate, and bonding a welding pad surface on the silicon substrate with the transparent cover plate through photoresist;
s2, thinning the bonded silicon substrate;
s3, depositing a silicon nitride layer on the thinned silicon substrate;
s4, manufacturing through holes exposing the bonding pads on the silicon substrate and the silicon nitride layer;
s5, depositing a silicon dioxide layer on the surface of the silicon nitride layer and in the through hole;
s6, windowing is carried out on a part of the bottom of the silicon dioxide layer in the through hole, and a welding pad is exposed;
s7, depositing a seed layer on the silicon dioxide layer, and manufacturing a metal circuit layer connected with the welding pad to form an image sensor chip;
s8, precutting the image sensor chip, and filling a polymer in a structure formed by precutting to form a binding;
s9, manufacturing salient points on the metal circuit layer.
Compared with the prior art, the invention has the beneficial effects that: the invention overcomes the problem of pulling the welding pad by a large amount of polymers, and increases the binding force between the silicon oxide and the Si surface by the SIN deposition process. In addition, the invention also adds precutting and realizes the edge wrapping by filling the polymer, thereby solving the layering phenomenon of the side cold and hot impact reliability test. Meanwhile, the bottom of the silicon dioxide layer in the passivation layer is windowed, so that the stress of the contact position of the welding pad is reduced.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments described in the present invention, and other drawings may be obtained according to the drawings without inventive effort to those skilled in the art.
FIG. 1 is a schematic diagram of an image sensor according to an embodiment of the present invention;
FIGS. 2 to 11 are schematic process flow diagrams of the image sensor packaging process according to the present invention;
wherein the broken line represents the cutting position when the product is cut.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
As shown in fig. 1, the image sensor of the present invention includes: a transparent cover plate 1 and an image sensor chip 2 bonded to the transparent cover plate 1.
The image sensor chip 2 includes a silicon substrate 21, a passivation layer 22, a metal wiring layer 23, and a precut border structure 24.
The transparent cover plate 1 may be glass or other transparent materials which serve the same function. The transparent cover plate 1 and the image sensor chip 2 are further provided with a cofferdam 3, the cofferdam 3 is used for exposing a chip sensing area, and the position of the cofferdam 3 corresponds to the position of the welding pad 25 on the silicon substrate 21. The dam 3 covers the pad 25 and is connected to the silicon substrate 21. The material of the bank 3 may be selected from non-conductive materials such as photoresist, non-photoresist polymer, plastic, etc.
The silicon substrate 21 has a front surface and a back surface, and the back surface thereof is provided with pads 25. The surface of the bonding pad 25 of the silicon substrate 21 is bonded to the transparent cover plate 1 through photoresist, so as to expose the bonding pad 25. The silicon substrate 21 is further provided with a through hole for communicating with the bonding pad 25, and the through hole longitudinally penetrates through the silicon substrate 21. By providing the through holes, the problem of a large number of polymer pulling pads is overcome.
In one embodiment, the through holes are straight holes, and in this case, the aspect ratio of the straight holes is 2:1-4:1. In another embodiment, the through hole is an inclined hole, and at this time, or the inclined hole has a diameter gradually increasing from a direction away from the pad 25. Preferably, the inclination of the side wall of the inclined hole is 65-85 degrees.
The passivation layer 22 is located on the other side of the silicon substrate 21, and in particular, the passivation layer 22 has a composite structure. Wherein the passivation layer 22 includes a silicon nitride layer 222 on the other surface of the silicon substrate 21 and a silicon oxide layer 221 on the surface of the silicon nitride layer 222 and extending into the through hole.
The silicon nitride layer 222 is located on the surface of the silicon substrate 21, and the silicon dioxide layer 221 is located on the surface of the silicon nitride layer 222, and the silicon nitride layer and the silicon dioxide layer form a laminated structure. Meanwhile, the silicon oxide layer 221 also extends from the surface of the silicon substrate 21 into the through hole. The provision of the silicon nitride layer 222 is advantageous in increasing the bonding force of silicon oxide to the Si surface.
The silicon oxide layer 221 located in the via includes a side portion in contact with the via sidewall and a bottom portion in contact with the pad 25. Wherein, the partial area of the bottom has a window exposing the bonding pad 25, and the metal circuit layer 23 is connected with the bonding pad 25 through the window. By locally windowing, the stress at the contact position of the bonding pad 25 can be reduced, which is beneficial to the protection of the bonding pad 25.
The metal circuit layer 23 is located on the passivation layer 22, and is distributed on the surface of the passivation layer 22 and extends into the through hole to be connected with the bonding pad 25. The protection layer 24 covers the metal circuit layer 23 and the exposed passivation layer 22. The metal circuit layer 23 is further provided with a bump 26, and the bump 26 extends out of the protective layer 24.
The precut edge covering structure 24 can prevent the bonding pad from being wetted and corroded, and can improve the reliability of the product. Meanwhile, the layering phenomenon of the side cold and hot impact reliability test is solved.
Specifically, the precut border structure 24 includes a precut structure extending longitudinally through the image sensor chip 2 and a border. The pre-cut structures are used to define the position of the product when finally cut, so that they are respectively arranged close to the sides of the image sensor chip 2 and extend into the cofferdam. The bonding pads 25 are located between the precut structures. The selvedge is filled in the through hole and the precut structure, so that the side of the image sensor chip 2 is covered by the bag Bian Baofu after the final cutting of the product. Thus, the bonding pad can be prevented from being wetted and corroded, and the reliability of the product can be improved. Meanwhile, the layering phenomenon of the side cold and hot impact reliability test is solved. The selvedge may be an organic polymer.
Based on the image sensor of the present invention as described above, the present invention also provides a packaging process of an image sensor, which includes the following steps S1 to S8:
as shown in fig. 2:
s1, providing a silicon substrate and a transparent cover plate, and bonding a welding pad surface on the silicon substrate with the transparent cover plate through photoresist.
As shown in fig. 3:
s2, thinning the bonded silicon substrate.
The thinning mode can be grinding or etching or a combination of the grinding and the etching.
As shown in fig. 4:
s3, depositing a silicon nitride layer on the thinned silicon substrate.
As shown in fig. 5:
s4, manufacturing through holes exposing the bonding pads on the silicon substrate and the silicon nitride layer.
The through hole can be manufactured by firstly arranging a mask and then manufacturing the through hole through an etching process.
As shown in fig. 6:
s5, depositing a silicon dioxide layer on the surface of the silicon nitride layer and in the through hole.
And S6, windowing is carried out on a part of the bottom of the silicon dioxide layer in the through hole, and the welding pad is exposed.
When the bottom is windowed, photoresist can be coated first, only the middle area of the bottom of the through hole is exposed and developed, and partial silicon dioxide layers are still reserved on the two sides of the exposed area, so that the stress of the contact position of the welding pad can be reduced.
As shown in fig. 7 and 8:
and S7, depositing a seed layer on the silicon dioxide layer, and manufacturing a metal circuit layer connected with the welding pad to form the image sensor chip.
As shown in fig. 9 and 10:
s8, precutting the image sensor chip, and filling a polymer in a structure formed by precutting to form a binding.
As shown in fig. 11:
s9, manufacturing salient points on the metal circuit layer.
In summary, the invention overcomes the problem of pulling the bonding pad by a large amount of polymers, and increases the bonding force between the silicon oxide and the Si surface by the SIN deposition process. In addition, the invention also adds precutting and realizes the edge wrapping by filling the polymer, thereby solving the layering phenomenon of the side cold and hot impact reliability test. Meanwhile, the bottom of the silicon dioxide layer in the passivation layer is windowed, so that the stress of the contact position of the welding pad is reduced.
It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Furthermore, it should be understood that although the present disclosure describes embodiments, not every embodiment is provided with a separate embodiment, and that this description is provided for clarity only, and that the disclosure is not limited to the embodiments described in detail below, and that the embodiments described in the examples may be combined as appropriate to form other embodiments that will be apparent to those skilled in the art.
Claims (4)
1. An image sensor, the image sensor comprising: a transparent cover plate and an image sensor chip bonded on the transparent cover plate;
the image sensor chip comprises a silicon substrate, a passivation layer, a metal circuit layer and a precut edge-wrapping structure, wherein the surface of a welding pad of the silicon substrate is bonded on the transparent cover plate through photoresist, through holes communicated with the welding pad are formed in the silicon substrate, the passivation layer is positioned on the other surface of the silicon substrate, the passivation layer extends into the through holes, the metal circuit layer is positioned on the passivation layer, is distributed on the surface of the passivation layer and extends into the through holes to be connected with the welding pad, the precut edge-wrapping structure comprises precut structures and edges, the precut structures longitudinally penetrate through the image sensor chip, the precut structures are respectively arranged close to the side surfaces of the image sensor chip, the welding pads are positioned between the precut structures, and the edges are filled in the through holes and the precut structures; the transparent cover plate is glass; the through holes are straight holes, and the depth-to-width ratio of the straight holes is 2:1-4:1; the passivation layer comprises a silicon nitride layer positioned on the other surface of the silicon substrate and a silicon dioxide layer positioned on the surface of the silicon nitride layer and extending into the through hole; the silicon dioxide layer in the through hole comprises a side part contacted with the side wall of the through hole and a bottom contacted with the welding pad, a partial area of the bottom is provided with a window for exposing the welding pad, and the metal circuit layer is connected with the welding pad through the window; at least two protruding points are further arranged on the metal circuit layer, the protruding points extend out of the protective layer, and the protective layer covers the metal circuit layer and the exposed passivation layer; and a cofferdam is further arranged between the transparent cover plate and the image sensor chip, and the precut structure extends into the cofferdam.
2. The image sensor of claim 1, wherein the through hole is an inclined hole, and a diameter of the inclined hole increases gradually from a direction away from the pad.
3. The image sensor of claim 2, wherein the sidewall of the angled hole has an inclination of 65-85 °.
4. A packaging process of an image sensor, the packaging process comprising the steps of:
s1, providing a silicon substrate and a transparent cover plate, and bonding a welding pad surface on the silicon substrate with the transparent cover plate through photoresist;
s2, thinning the bonded silicon substrate;
s3, depositing a silicon nitride layer on the thinned silicon substrate;
s4, manufacturing through holes exposing the bonding pads on the silicon substrate and the silicon nitride layer;
s5, depositing a silicon dioxide layer on the surface of the silicon nitride layer and in the through hole;
s6, windowing is carried out on a part of the bottom of the silicon dioxide layer in the through hole, and a welding pad is exposed;
s7, depositing a seed layer on the silicon dioxide layer, and manufacturing a metal circuit layer connected with the welding pad to form an image sensor chip;
s8, precutting the image sensor chip, and filling a polymer in a structure formed by precutting to form a binding;
s9, manufacturing salient points on the metal circuit layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710906316.0A CN107482029B (en) | 2017-09-29 | 2017-09-29 | Image sensor and packaging process thereof |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201710906316.0A CN107482029B (en) | 2017-09-29 | 2017-09-29 | Image sensor and packaging process thereof |
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| CN107482029A CN107482029A (en) | 2017-12-15 |
| CN107482029B true CN107482029B (en) | 2023-12-08 |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105226074A (en) * | 2015-10-28 | 2016-01-06 | 苏州晶方半导体科技股份有限公司 | Image sensing chip-packaging structure and method for packing |
| CN106449533A (en) * | 2016-12-08 | 2017-02-22 | 华天科技（昆山）电子有限公司 | Chip multi-facet package protective structure and manufacture method thereof |
| CN107068629A (en) * | 2017-04-24 | 2017-08-18 | 华天科技（昆山）电子有限公司 | Wafer stage chip encapsulating structure and preparation method thereof |
| CN207558796U (en) * | 2017-09-29 | 2018-06-29 | 华天科技（昆山）电子有限公司 | Imaging sensor |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105226074A (en) * | 2015-10-28 | 2016-01-06 | 苏州晶方半导体科技股份有限公司 | Image sensing chip-packaging structure and method for packing |
| CN106449533A (en) * | 2016-12-08 | 2017-02-22 | 华天科技（昆山）电子有限公司 | Chip multi-facet package protective structure and manufacture method thereof |
| CN107068629A (en) * | 2017-04-24 | 2017-08-18 | 华天科技（昆山）电子有限公司 | Wafer stage chip encapsulating structure and preparation method thereof |
| CN207558796U (en) * | 2017-09-29 | 2018-06-29 | 华天科技（昆山）电子有限公司 | Imaging sensor |
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| CN107482029A (en) | 2017-12-15 |
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