Detailed Description
In one embodiment, as shown in fig. 1, a CAN signal wake-up circuit includes a voltage comparison circuit 120 and a CAN signal detection circuit 110 for connecting to a CAN network, the CAN signal detection circuit 110 is connected to a first input terminal of the voltage comparison circuit 120 and is further used for connecting to the CAN network 300, a second input terminal of the voltage comparison circuit 120 is used for receiving an external voltage, and an output terminal of the voltage comparison circuit 120 is further used for connecting to the device to be woken up 200.
Specifically, the CAN signal detection circuit 110 is configured to receive a CAN signal in the CAN network 300, convert the CAN signal into a first voltage signal CAN _ V1, and output the first voltage signal CAN _ V1 to a first input terminal of the voltage comparison circuit 120; the voltage comparison circuit 120 receives the first voltage signal CAN _ V1 and the external voltage VCC2, and outputs a corresponding control signal to the device to be wakened 200 for wake-up control according to the first voltage signal CAN _ V1 and the external voltage VCC 2.
Above-mentioned CAN signal awakening circuit converts first voltage signal CAN _ V1 and exports to voltage comparison circuit 120's first input to the CAN signal of receiving, specifically exports to voltage comparison circuit 120's homophase input, and voltage comparison circuit 120's second input receives external voltage, and the control signal that corresponds is exported to waiting to awaken the equipment according to first voltage signal CAN _ V1 and external voltage and awakens up the control, and control mode is simple, and the response is fast, does not require to use the chip of taking CAN signal awakening function certainly, effective control system cost.
In one embodiment, as shown in fig. 2, the CAN signal detection circuit 110 includes a high-speed transceiver U1, a rectification circuit 112 and a tank circuit 114, the high-speed transceiver U1 is connected to the rectification circuit 112 and the CAN network 300, the rectification circuit 112 is connected to the tank circuit 114, the tank circuit 114 is connected to a first input terminal of the voltage comparison circuit 120, and the high-speed transceiver U1 is configured to receive a CAN signal in the CAN network 300 and send the CAN signal to the rectification circuit 112; the rectifying circuit 112 receives the CAN signal, rectifies and converts the CAN signal to obtain a converted CAN signal, and sends the converted CAN signal to the energy storage circuit 114; the energy storage circuit 114 is configured to receive the converted CAN signal for storing energy, and obtain and output a first voltage signal to a first input terminal of the voltage comparison circuit 120.
Specifically, the rectifying circuit 112 is a circuit that converts ac power into dc power, the first power supply input terminal VCC1 supplies power to the CAN signal detection circuit 110, the output terminal is GNDC, the CANH terminal of the high-speed transceiver U1 is connected to the rectifying circuit 112, the CANL terminal of the high-speed transceiver U1 is connected to the rectifying circuit 112, when a certain main control CAN chip in the CAN network 300 is powered on, and the high-speed transceiver U1 receives a CAN signal, and after the CAN signal is received by the high-speed transceiver U1, the CAN-H-CAN-L-2.5V, the electromotive force is loaded to the energy storage circuit 114 through the rectifying circuit 112, so as to generate a first voltage signal CAN _ V1, and the first input terminal of the voltage comparison circuit 120 is accessed.
In one embodiment, the rectifying circuit 112 includes a first diode D1, a first current-limiting resistor R3, a second diode D2, and a second current-limiting resistor R4, an anode of the first diode D1 is connected to the first pin CANH of the high-speed transceiver U1, a cathode of the first diode D1 is connected to the first end of the first current-limiting resistor R3, a second end of the first current-limiting resistor R3 is connected to the energy storage circuit 114, an anode of the second diode D2 is connected to the second pin CANL of the high-speed transceiver U1, a cathode of the second diode D2 is connected to the first end of the second current-limiting resistor R4, and a second end of the second current-limiting resistor R4 is connected to the energy storage circuit 114.
Specifically, the first diode D1 and the second diode D2 are rectifier diodes.
In one embodiment, the energy storage circuit 114 includes a first capacitor C3 and a third current limiting resistor R5, the first capacitor C3 and the third current limiting resistor R5 are connected in parallel, first ends of the first capacitor C3 and the third current limiting resistor R5 are both connected to a common end of the first input end of the rectifying circuit 112 and the voltage comparison circuit 120, and second ends of the first capacitor C3 and the third current limiting resistor R5 are commonly connected to the ground GNDC.
Specifically, the first ends of the first capacitor C3 and the third current limiting resistor R5 are both connected to the common end of the second end of the first current limiting resistor R3 and the second end of the second current limiting resistor R4 in the rectifier circuit 112.
In another embodiment, the CAN signal detecting circuit 110 further includes a first filter circuit 116, the high-speed transceiver U1 is connected to the rectifying circuit 112 through the first filter circuit 116, the first filter circuit 116 includes a second capacitor C2, a third capacitor C1 and a bleed-off resistor R2, a first end of the second capacitor C2 is connected to the second pin CANL of the high-speed transceiver U1 and the rectifying circuit 112, a first end of the third capacitor C1 is connected to the first pin CANH of the high-speed transceiver U1 and the rectifying circuit 112, a second end of the second capacitor C2 and a second end of the third capacitor C1 are commonly grounded GNDC, a first end of the bleed-off resistor R2 is connected to the second pin CANL of the high-speed transceiver U1 and the rectifying circuit 112, and a second end of the bleed-off resistor R2 is connected to the first pin CANH of the high-speed transceiver U1 and the rectifying circuit 112.
Specifically, a first end of the second capacitor C2 is connected to the second pin CANL of the high-speed transceiver U1 and the anode of the second diode D2 in the rectifier circuit 112, a first end of the third capacitor C1 is connected to the first pin CANH of the high-speed transceiver U1 and the anode of the first diode D1 in the rectifier circuit 112, a first end of the bleed resistor R2 is connected to the second pin CANL of the high-speed transceiver U1 and the anode of the second diode D2 in the rectifier circuit 112, and a second end of the bleed resistor R2 is connected to the first pin CANH of the high-speed transceiver U1 and the anode of the first diode D1 in the rectifier circuit 112.
In yet another embodiment, the CAN signal detecting circuit 110 further includes a diode protection circuit 118, the diode protection circuit 118 is connected to the rectifying circuit 112, the diode protection circuit 118 includes a first three-terminal diode D3 and a second three-terminal diode D4, a first terminal of the first three-terminal diode D3 and a first terminal of the second three-terminal diode D4 are connected to the first pin CANH of the high-speed transceiver U1 and the rectifying circuit 112, a second terminal of the first three-terminal diode D3 and a second terminal of the second three-terminal diode D4 are connected to the second pin CANL of the high-speed transceiver U1 and the rectifying circuit 112, and a control terminal of the first three-terminal diode D3 and a control terminal of the second three-terminal diode D4 are respectively connected to the ground GNDC.
Specifically, a first terminal of the first three-terminal diode D3 and a first terminal of the second three-terminal diode D4 are connected to the first pin CANH of the high-speed transceiver U1 and the anode of the first diode D1 in the rectifying circuit 112, and a second terminal of the first three-terminal diode D3 and a second terminal of the second three-terminal diode D4 are connected to the second pin CANL of the high-speed transceiver U1 and the anode of the second diode D2 in the rectifying circuit 112. Further, the first three-terminal diode D3 and the second three-terminal diode D4 are ESD protection diodes for protecting the CAN bus.
In another embodiment, the CAN signal detection circuit 110 further comprises a filter L2, and the filter L2 is connected to the rectifying circuit 112.
Specifically, the filter L2 is connected to the rectifier circuit 112 through the diode protection circuit 118, a first port of the filter L2 is connected to the first pin CANH of the high-speed transceiver U1, the anode of the first diode D1 in the rectifier circuit 112, the first ends of the first three-terminal diode D3 and the second three-terminal diode D4, and a second port of the filter L2 is connected to the second pin CANL of the high-speed transceiver U1, the anode of the second diode D2 in the rectifier circuit 112, the first three-terminal diode D3 and the second end of the second three-terminal diode D4.
In another embodiment, the CAN signal detecting circuit 110 further includes a fifth current limiting resistor R1, a first terminal of the fifth current limiting resistor R1 is connected to the RS pin of the high-speed transceiver U1, and a second terminal of the fifth current limiting resistor R1 is connected to the ground GNDC.
In a more detailed embodiment, the first power input VCC1 supplies power to the CAN signal detection circuit 110, the output terminal is connected to GNDC, the RS pin of U1 is grounded to GNDC through R1, the CANH terminal of U1 is connected to one end of a resistor R2, one end of a capacitor C1, the positive terminal of a diode D1, the negative terminals of three-terminal diodes D3 and D4 and the port No. 1 of a filter L2, the CANL terminal of U1 is connected to the other end of a resistor R2, one end of a capacitor C2, the positive terminal of a diode D1, the negative terminals of three-terminal diodes D3 and D4 and the port No. 2 of a filter L4, the other ends of capacitors C4 and C4 are connected to ground, the common-negative terminal of the three-terminal diodes is grounded to the negative terminal of the diode, the negative terminal of the diode D4 is connected to one end of the R4, the negative terminal of the capacitor C4 is connected to one end of the capacitor C4, the first end of the first comparison circuit 120 of the resistor R4, and the first comparison circuit 120 is, The other end of resistor R5 is connected to ground GNDC. When a master CAN chip is powered on, and after the chip U1 receives a CAN signal, the CAN-H-CAN-L-2.5V, the electromotive force is loaded to the energy storage networks C3 and R7 through D1 and R3, D2 and R4, so as to generate a first voltage signal CAN _ V1, and is connected to the first input terminal of the voltage comparison circuit 110.
In one embodiment, the structure of the voltage comparison circuit 120 may be various, but is not unique, in this embodiment, as shown in fig. 3, the voltage comparison circuit 120 includes a comparator U2, a filtering voltage division circuit 122, and a voltage stabilizing circuit 124, the comparator U2 includes a non-inverting input terminal, an inverting input terminal, and an output terminal, the non-inverting input terminal of the comparator U2 serves as the first input terminal of the voltage comparison circuit 110, the output terminal of the comparator U2 serves as the output terminal of the voltage comparison circuit 110, the inverting input terminal of the comparator U2 is connected to the filtering voltage division circuit 122, the output terminal of the comparator U2 is used for connecting the device to be awakened 200, the filtering voltage division circuit 122 is connected to the second input terminal, the voltage stabilizing circuit 124 is connected to the second input terminal and the filtering voltage division circuit 122, the filtering voltage division circuit 122 is used for receiving an external voltage VCC2, filtering and dividing the external voltage VCC2 to obtain a voltage signal V2, and sending, the comparator U2 is configured to receive the first voltage signal CAN _ V1 and the voltage signal V2, compare the magnitudes of the first voltage signal CAN _ V1 and the voltage signal V2, output a corresponding control signal to the device to be wakened 200 according to the comparison result, and perform wake-up control, where the voltage stabilizing circuit 124 is configured to control the voltage signal V2 output by the filtering voltage dividing circuit 122 to be constant.
Specifically, the voltage stabilizing circuit 124 is configured to control the voltage signal V2 output by the filtering voltage dividing circuit 122 to be constant, where constant means that the fluctuation amplitude of the voltage signal V2 output by the filtering voltage dividing circuit 122 is controlled within a preset range. Further, a corresponding control signal is output to the device to be awakened 200 according to the comparison structure for performing awakening control, specifically, when the first voltage signal CAN _ V1 output by the CAN signal detection circuit 110 is greater than the voltage signal V2 at the inverting input terminal, the voltage comparison circuit 120 outputs a high level signal CAN _ V3, so as to awaken the device to be awakened 200.
In another embodiment, the voltage comparing circuit 120 may also be a comparator U2, and the comparator U2 receives the first voltage signal CAN _ V1 and an adjustable external voltage (the adjustable external voltage CAN be understood as an adjustable voltage signal V2), directly compares the signals, and outputs a corresponding control signal to the device to be wakened 200 according to the comparison result for performing the wake-up control.
Specifically, the output signal CAN _ V1 of the CAN signal detection circuit 110 is connected to the first input terminal of the voltage comparison circuit 120, the inverting input terminal of the comparator U2 in the voltage comparison circuit 120 receives the voltage signal V2, and the output terminal of the voltage comparison circuit 120 is connected to the device to be waken 200; further, the voltage signal V2 is adjustable, and a user can preset the voltage signal V2 after adjusting the voltage division by adjusting the parameter of the element in the filtering voltage division circuit 122; further, the comparator U2 receives the first voltage signal CAN _ V1 sent by the non-inverting input terminal and the voltage signal V2 of the inverting input terminal, compares the magnitudes of the first voltage signal CAN _ V1 and the voltage signal V2, and outputs the corresponding control signal CAN _ V3 to the device to be waken 200 according to the comparison result, specifically, the manner of outputting the corresponding control signal to wake up the device to be waken 200 is not unique, for example, the device to be waken 200 CAN be waken up by controlling the closing of the switch by the control signal.
In one embodiment, the filtering voltage divider circuit 122 includes a first voltage-dividing resistor R17, a fourth capacitor C5, and a third diode D5, a first terminal of the first voltage-dividing resistor R17 is connected to the VCC power supply pin of the comparator U2, a second terminal of the first voltage-dividing resistor R17 is connected to the inverting input terminal of the comparator U2, the fourth capacitor C5 and the third diode D5 are connected in parallel, a first terminal of the fourth capacitor C5 and an anode of the third diode D5 are both connected to the inverting input terminal of the comparator U2, and a second terminal of the fourth capacitor C5 and a cathode of the third diode D5 are both connected to the regulator circuit 124.
Specifically, after receiving the external voltage, the filtering voltage-dividing circuit 122 filters the divided voltage to obtain a voltage signal V2, and sends the filtered voltage signal V2 to the inverting input terminal of the comparator U2, so that the comparison result is more accurate, and further, the voltage-dividing ratio can be adjusted by adjusting the parameter of the first voltage-dividing resistor R17.
In one embodiment, the voltage stabilizing circuit 124 includes a second voltage-dividing resistor R12, a third voltage-dividing resistor R11 and a three-terminal zener diode Z1, a first terminal of the second voltage-dividing resistor R12 and a second terminal of the three-terminal zener diode Z1 are connected to the first terminal of the filtering voltage-dividing circuit 122, a second terminal of the second voltage-dividing resistor R12 is connected to the first terminal of the third voltage-dividing resistor R11, a second terminal of the three-terminal zener diode Z1 is connected to the second terminal of the filtering voltage-dividing circuit 122, a first terminal of the three-terminal zener diode Z1 and a second terminal of the third voltage-dividing resistor R11 are commonly connected to the ground GND, and a third terminal of the three-terminal zener diode Z1 is connected to the second terminal of the second voltage-dividing resistor R12 and the common terminal of the first.
Specifically, the first terminal of the second voltage-dividing resistor R12 and the output terminal of the three-terminal zener diode Z1 are connected to the first terminal of the first voltage-dividing resistor R17 in the filtering voltage-dividing circuit 122, and the input terminal of the three-terminal zener diode Z1 is connected to the cathode of the third diode D5 in the filtering voltage-dividing circuit 122.
In another embodiment, the voltage comparison circuit 120 further includes a fifth capacitor C7, the fifth capacitor C7 is connected in parallel with the voltage stabilizing circuit 124, a first terminal of the fifth capacitor C7 is connected to the first terminal of the filter voltage dividing circuit 122, specifically, the first terminal of the first voltage dividing resistor R17 in the filter voltage dividing circuit 122, and a second terminal of the fifth capacitor C7 is connected to the second terminal of the filter voltage dividing circuit 122, specifically, the cathode of the third diode D5 in the filter voltage dividing circuit 122.
In another embodiment, the voltage comparison circuit 120 further includes a sixth capacitor C4 and a sixth current-limiting resistor R19, a first end of the sixth capacitor C4 and a first end of the sixth current-limiting resistor R19 are connected to the first input terminal of the comparator U2, a second end of the sixth capacitor C4 is connected to the GND, and a second end of the sixth current-limiting resistor R19 is connected to the CAN signal detection circuit 110 as the first input terminal of the voltage comparison circuit 120.
Specifically, the non-inverting input terminal of the comparator U2 is connected to one terminal of the sixth capacitor C4 and one terminal of the sixth current limiting resistor R19, the other terminal of the sixth current limiting resistor R19 is connected to the output signal CAN _ V1 of the CAN signal detection circuit 110, and the other terminal of the sixth capacitor C4 is connected to the ground GND to filter the input signal.
In yet another embodiment, the voltage comparison circuit 120 further includes a seventh current limiting resistor R9 and a pull-up resistor R18, a first terminal of the seventh current limiting resistor R9 serves as the second input terminal of the voltage comparison circuit 120, a second terminal of the seventh current limiting resistor R9 is connected to the VCC pin of the comparator U2, a first terminal of the pull-up resistor R18 is connected to the second terminal of the seventh current limiting resistor R9 and the VCC pin of the comparator U2, and a second terminal of the pull-up resistor R18 is connected to the output terminal of the comparator U2.
In a detailed embodiment, the voltage comparison circuit includes a comparator U2, a current-limiting resistor R9, a pull-up resistor R18, a filter voltage-dividing circuit R17, C5, D5, a filter capacitor C7, a non-inverting input terminal input signal CAN _ V1 and its current-limiting resistor R19 and filter capacitor C4, and an inverting input terminal adjustable voltage signal V2, V2 provided by a voltage-stabilizing circuit 124 composed of an external voltage VCC2 and a three-terminal voltage-stabilizing diode Z1, resistors R11, R12. The external voltage VCC2 supplies power to the comparator U2 circuit through R9, the output end is connected with GND, the in-phase input end of U2 is connected with one end of a capacitor C4 and one end of a resistor R19, the other end of R19 is connected with the output signal CAN _ V1 of the CAN signal detection circuit 110, the other end of the capacitor C4 is grounded with GND, and the input signal is filtered. The VCC pin of U2 is connected to resistance R17 one end, connect the one end of filter capacitor C7, connect the negative pole of three-terminal zener diode Z1, connect the one end of divider resistance R12, the one end of electric capacity C5 is connected to resistance R17 other end, the anodal of diode D5 and the inverting input of U2, the other end ground GND of electric capacity C5 filters the inverting input signal, diode D5's negative pole end ground connection GDN provides predetermined voltage signal V2 for the inverting input. The other end of the divider resistor R12 is connected with the reference end of the three-terminal voltage-stabilizing diode, one end of the divider resistor R11, the other end of the filter capacitor C7 and the anode of the three-terminal voltage-stabilizing diode, and the other end of the divider resistor R11 is connected with the ground GND. If CAN _ V1 output by the CAN signal interface detection circuit 100 is greater than V2, the voltage comparator U2 circuit 110 outputs a high level signal to wake up the BMS power supply, otherwise, outputs a low level signal not to wake up the BMS power supply, so that the BMS power supply continues to sleep.
In one embodiment, as shown in fig. 4, the CAN signal wake-up circuit further includes a signal isolation circuit 130, the ground terminal GNDC of the CAN signal detection circuit is connected to the ground terminal GND of the voltage comparison circuit 120 through the signal isolation circuit 130, and the signal isolation circuit 130 is used for electrically isolating the CAN signal detection circuit 110 and the voltage comparison circuit 120.
Specifically, the CAN signal detection circuit is further connected to the first power input terminal VCC1, the voltage comparison circuit is connected to the second power input terminal VCC2 (i.e., the second input terminal), the ground terminal GNDC of the CAN signal detection circuit and the ground terminal GND of the voltage comparison circuit 120 are not the same ground terminal, and the two power input terminals and the two ground terminals are independent, so that the signal isolation circuit 130 is utilized to electrically isolate the CAN signal detection circuit 110 from the voltage comparison circuit 120. The electrical isolation means that the power supply is electrically isolated from the circuit, i.e. the branch circuit for power utilization is isolated from the whole electrical system, so that the branch circuit becomes a safety system which is electrically isolated, and the safety of the whole circuit is improved.
In one embodiment, as shown in fig. 5, the signal isolation circuit 130 includes a fourth current-limiting resistor R6 and an inductor L1, a first terminal of the fourth current-limiting resistor R6 is connected to the ground terminal GNDC of the CAN signal detection circuit 110, a second terminal of the fourth current-limiting resistor R6 is connected to the first terminal of the inductor L1, and the second terminal of the inductor is connected to the ground terminal GND of the voltage comparison circuit 120.
Specifically, the signal isolation circuit includes a fourth current-limiting resistor R6 and an inductor L1, which form an electrical isolation network between the CAN signal detection circuit 110 and the voltage comparison circuit 120, a ground terminal GNDC of the signal isolation circuit is connected to a ground terminal GNDC of the CAN signal detection circuit 110, the other end of the signal isolation circuit is connected to a ground terminal GND of the voltage comparator U2 circuit, and the two ground terminals GNDC and GND are electrically isolated by a resistor-inductor series network.
Above-mentioned CAN signal awakening circuit converts first voltage signal CAN _ V1 and exports to voltage comparison circuit's first input to the CAN signal of receiving, and voltage comparison circuit's second input receives external voltage, exports corresponding control signal according to first voltage signal CAN _ V1 and external voltage and awakens up control, and control mode is simple, and the response is fast, does not require to use the chip of taking CAN signal awakening function certainly, effective control system cost.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.