CN107452423A - Computing system, non-volatile memory module and the method for operating storage device - Google Patents
Computing system, non-volatile memory module and the method for operating storage device Download PDFInfo
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- CN107452423A CN107452423A CN201710248135.3A CN201710248135A CN107452423A CN 107452423 A CN107452423 A CN 107452423A CN 201710248135 A CN201710248135 A CN 201710248135A CN 107452423 A CN107452423 A CN 107452423A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0659—Command handling arrangements, e.g. command buffers, queues, command scheduling
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/32—Timing circuits
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
Abstract
A kind of method for operating storage device is disclosed, this method includes：External equipment will be sent to the request of the built-in function time for built-in function, the built-in function order corresponding with request is received from external equipment, and based on performing built-in function during built-in function order internally operating time.
Description
The cross reference of related application
This application claims on April 20th, 2016 US provisional patent submitted the 62/325,051st, in May, 2016
The korean patent application of " method of computing system, non-volatile memory module and storage device " submitting, entitled on the 18
The rights and interests of No. 10-2016-0061012.Two applications are incorporated by reference in its entirety.
Technical field
One or more embodiments described herein are related to computing system, non-volatile memory module and for depositing
The method for storing up equipment.
Background technology
Have attempted to the nonvolatile memory with the various interface compatibilities of existing computing system.For example, taste
Pinged flash memory (or working storage) installed in identical with the main storage or working storage of computer system
Slot or passage on, flash memory or working storage are used as data storage device or working storage.However, these
Trial has proved to be defective.
The content of the invention
According to one or more embodiments, the operating method of storage device includes：By to the inside behaviour for built-in function
The request for making the time (internal operation time) is sent to external equipment；Received from external equipment with asking relatively
The built-in function order answered；And based on performing built-in function during built-in function order internally operating time.Request is internal
Operating time can transfer a request to external equipment including the use of the response message of asynchronous event request command.To built-in function
The request of time can be included the messaging including the built-in function time needed for execution built-in function to external equipment.
According to one or more other embodiments, non-volatile memory module includes：At least one volatile memory；
At least one nonvolatile memory；And memorizer control circuit, for controlling at least one volatile memory and at least
One nonvolatile memory, wherein, memorizer control circuit internally operates and passes built-in function request message when being performed
External equipment is sent to, the built-in function order corresponding with built-in function request message is received from external equipment, and based on interior
Portion's operational order internally performs built-in function during the operating time, and wherein, built-in function request message includes internal grasp
Make the time.
According to one or more other embodiments, memory module includes：Multiple dynamic RAMs (DRAM)；
And memorizer control circuit, based on order and address control DRAM, wherein, memorizer control circuit is used for：Will be to for interior
The request of the built-in function time of portion's operation is sent to main frame (host), when receiving the built-in function corresponding with request from main frame
Between approval/refusal information, and based on the built-in function time ratify/refuse information perform totality operation or partial interior behaviour
Make.
According to one or more other embodiments, dynamic RAM includes：Memory cell array；And brush
New controller, the operation for the request of built-in function is sent to external equipment, receives the built-in function corresponding with message
Order, internally performs built-in function during the operating time, wherein, built-in function is the refresh operation of memory cell array,
And wherein, message includes the information on the built-in function time.
According to one or more other embodiments, device includes：Signal wire；And controller, based on the letter on signal wire
Number at least one volatile memory or at least one nonvolatile memory are controlled, wherein, controller is internally operated and held
Built-in function request message is sent to external equipment during row, received from external equipment corresponding with built-in function request message
Built-in function order, and built-in function is internally performed during the operating time based on built-in function order, and wherein, it is internal
Operation requests message includes the built-in function time.
Brief description of the drawings
By specifically describing the exemplary embodiment of refer to the attached drawing, feature will be clear for those skilled in the art,
Wherein：
Fig. 1 shows the embodiment of computing system；
Fig. 2 shows the embodiment of storage device；
Fig. 3 shows the embodiment of the built-in function time request and response of computing system；
Fig. 4 shows another embodiment of computing system；
Fig. 5 shows the embodiment of non-volatile memory module；
Fig. 6 shows the embodiment of HPI timing；
Fig. 7 shows another embodiment of HPI timing；
Fig. 8 shows another embodiment of computing system；
Fig. 9 shows the embodiment of the timing for multiple memory modules；
Figure 10 shows the embodiment of built-in function order；
Figure 11 shows the embodiment of computing system；
Figure 12 shows the embodiment of computing system；
Figure 13 shows the embodiment of dynamic RAM；
Figure 14 shows another embodiment of computing system；
Figure 15 shows the embodiment of the operating method for main frame；
Figure 16 shows the embodiment of the built-in function method for storage device；And
Figure 17 shows the embodiment of data server system.
Embodiment
Fig. 1 shows the embodiment of computing system 10, and computing system 10 can include main frame 100 and storage device 200.Meter
Calculation system 10 can be, for example, computer, portable computer, super mobility personal computer (UMPC), work station, data
Server, net book, personal digital assistant (PDA), online flat board, radio telephone, mobile phone, smart mobile phone, e-book, just
Take formula multimedia player (PMP), digital camera, digital audio tape/player, digital picture/video cassette recorder/player,
Portable game machine, navigation system, black box (black box), 3D television sets, letter can be sent and received in the wireless context
One of one of the equipment of breath, the various electronic equipments for forming home network, the various electronic equipments for forming computer network, form
One of various electronic equipments of telematics (telematics) network, radio frequency identification (RFID) or composition calculate system
One of various electronic equipments of system.
Main frame 100 can control the overall operation of computing system 10.In embodiment, main frame 100 can include at least one
Individual processor, CPU (CPU), graphics processing unit (GPU), Memory Controller etc..In embodiment, processor
General purpose microprocessor, polycaryon processor, digital signal processor (DSP), application specific integrated circuit (ASIC), or it can be included
Combination.In embodiment, Memory Controller may be implemented as controlling storage device 200.
In embodiment, main frame 100 can the request based on storage device 200, it is internal to provide instruction for storage device 200
The approval of operating time or the information of refusal.The built-in function time can be the time for the built-in function for performing storage device 200.
In embodiment, the type based on order or data, built-in function time approval/refusal letter can be transmitted or determined
Breath.In another embodiment, the built-in function time ratify/refuse information can be by between main frame 100 and storage device 200
Separate lines (separate line) are transmitted.
In fig. 1 it is shown that embodiment, wherein request of the main frame 100 based on storage device 200 passes the built-in function time
It is sent to storage device 200.In another embodiment, host device 100 can be incited somebody to action based on inner strategy (internal policy)
Information transmission is ratified/refused to the built-in function time to storage device 200, the request without storage device.
Storage device 200 may be coupled to main frame 100, to store the data of the operation for main frame 100.Storage device
200 can be at least one in volatile memory, nonvolatile memory or its combination.For example, storage device 200 can be with
Be dual-inline memory module (DIMM), non-volatile dual-inline memory module (NVDIMM), solid state hard disc (SSD),
General flash memory (UFS), embedded multi-media card (eMMC), secure digital (SD) card, dynamic RAM
(DRAM), static RAM (SRAM), NAND flash, vertical nand flash memory, phase transformation RAM (PRAM), or resistance-type
RAM(RRAM)。
In one embodiment, storage device 200 can be connected to main frame according to double data rate (DDR) interface standard
100.For example, storage device 200 can be realized with any one in DDRx serial (x is integer).Storage device 200 can be with
Main frame 100 is connected to by the various communication interfaces in addition to ddr interface.For example, communication interface can follow following communication mark
It is accurate：It is high speed nonvolatile memory (NVMe), peripheral component interconnection (PCIe), serial AT attachments standards (SATA), small-sized
Computer system interface (SCSI), serial attached SCSI (SAS), universal serial bus (USB) attachment SCSI (UAS), internet
Small computer system interface (iSCSI), optical-fibre channel or Ethernet light channel (FCoE).
In embodiment, when to perform built-in function according to inner strategy determination, storage device 200 can be from main frame
100 ask the built-in function time for built-in function.In embodiment, the request of built-in function time can be with fixing in advance
The message of formula or the type of signal with preassigned pattern are sent to main frame 100.
In embodiment, the message with the request of built-in function time can be by between main frame 100 and storage device 200
At least one data channel, at least one clock lane, at least one control passage, at least one specific information passage or
Combinations thereof, it is sent to main frame 100.For example, when the built-in function time, request was sent by data channel, it can be by
It is included in the response message corresponding with asynchronous command.Asynchronous command can include asynchronous event request command.Asynchronous event
It can be used for notifying the state, mistake and health and fitness information of storage device 200 into the software or controller to main frame 100.
Above-mentioned built-in function time request can be transmitted with the type of message.In another embodiment, during built-in function
Between request main frame 100 can be provided to the type of signal, for request selecting with for built-in function built-in function when
Between corresponding register.
In embodiment, ratify in the built-in function time of Receiving Host 100/refuse information after, storage device 200 can be with
It is implemented to performing built-in function.Built-in function can be including the refreshing with such as internal data, timing alignment, process voltage temperature
Spend (PVT) compensation, the various operations that internal data transfer is associated or other operations., can be according to inside in embodiment
Operating time ratifies/refused information and performs all or part of built-in function.Therefore, approval/refusal built-in function temporal information can
It can also include the information of the execution on all or part of built-in function.
In the computing system 10 according to embodiment, storage device 200 directly can ask to set for storage from main frame 100
The built-in function time of standby 200 built-in function.Main frame 100 can be based on described ask during the operating time internally to storage
Equipment 200 transmits the mandate (authority) on the time.Therefore, sufficiently internal grasp can be carried out to storage device 200
Make.For example, main frame 100 can ratify the built-in function time of the built-in function for storage device 200.
Fig. 2 shows the embodiment for the storage device 200 realized with memory module.With reference to figure 2, storage device 200 can
With including multiple DRAM 211 to 214 and memory module controller (RCD) 220.Each DRAM 211 to 214 can be
Input and output data under the control of memory module controller 220.DRAM 211 to 214 quantity is 4 in Fig. 2, but
Can be different quantity in another embodiment.
Memory module controller 220 can receive order and/or address from main frame 100, and control DRAM 211 is arrived
214 input/output operations.In embodiment, memory module controller 220 can be sent out based on inner strategy to main frame 100
Send the built-in function time request for built-in function.In embodiment, memory module controller 220 can be based on from main frame
The built-in function time of 100 transmission ratifies/refused information and performs built-in function.
In embodiment, storage device 200 can also include the DRAM 215 for even-odd check.In embodiment, deposit
Storage equipment 200 can also include data buffer DB, to be buffered in the data DQ between main frame 100 and DRAM 211 to 214.
In embodiment, storage device 200 can be implemented to meet DDRx SDRAM Specifications.For example, storage device 200 can be implemented
To meet DDR4SDRAM specifications of future generation.The built-in function time can be realized in a manner of set of registers.
Fig. 3 shows the reality built-in function time based on set of registers mode in computing system 10 asked and responded
Apply example.With reference to figure 3, storage device 200 can include storage multiple built-in function times RT1 to RTk, and (K is the nature of two or more
Number) set of registers.For example, built-in function first time, RT1 time can correspond to the time of 16 clocks, and for the second time
The built-in function time, RT2 can correspond to the time of 8 clocks.The clock can correspond to predetermined period (or frequency)
The clock signal changed between high level and low level.N number of clock may mean that N number of cycle of clock signal.
The Memory Controller of main frame 100 can be asked the built-in function time based on storage device 200, and register is selected
Select signal and be sent to storage device 200.Register selection signal can be for being selected among the register of set of registers
Corresponding to the signal of the register of built-in function time request.For example, register selection signal can include the built-in function time
Approval/refusal information.In embodiment, in the memory module controller 220 that set of registers can be located in Fig. 2 or it is located at
Different positions.
Computing system 10 in Fig. 1 to Fig. 3 describes the embodiment of built-in function time.In another embodiment, calculate
System 10 can send built-in function request and the built-in function order corresponding with built-in function request obtain context in retouch
State.
Fig. 4 shows another embodiment of computing system 20, and it can include main frame 100a and nonvolatile memory mould
Block (NVDIMM) 300.Main frame 100a can receive built-in function request from non-volatile memory module 300, be grasped based on inside
Built-in function order IOP is sent as request, and the built-in function order IOP sent is sent to non-volatile memory module
300.Built-in function order IOP can include the built-in function time for built-in function.In embodiment, built-in function order
IOP can also include the information corresponding with the approval of built-in function request or refusal.
In embodiment, built-in function request can be by, for example, data pin, data strobe pin, address/command
Pin, control signal pin, message-specific pin or combinations thereof, are sent to main frame 100a.It is interior in embodiment
Portion operational order IOP can use (RFU) pin or combinations thereof next life in the future by command/address pin, reservation
Into.
When that will perform built-in function order according to inner strategy, non-volatile memory module 300 can be by inside
Operation requests are sent to main frame 100a.For example, built-in function request can be realized with the type of such as message/signal.For example,
The built-in function request transmitted with the type of message/signal can include the built-in function time for built-in function.
In embodiment, non-volatile memory module 300 can be connected to main frame by DDRx interfaces (x is natural number)
100a.For example, non-volatile memory module 300 can be implemented to meet DDR4 SDRAM Specifications of future generation.
In embodiment, non-volatile memory module 300 can use the non-volatile biserial for meeting such as JEDEC standard
Straight cutting memory module (NVDIMM) is realized.NVDIMM can be such memory module, even in accident power-off or be
System failure, even in system normal switching-off, electric power is interrupted, and can also preserve data.NVDIMM can be used for improving application
Performance, shorten recover data security system failure needed for time and improve SSD durability and reliability.
NVDIMM can have various forms.NVDIMM one embodiment is with memory speed or to approach memory speed
Degree access can byte addressing memory mapping equipment.DDR4 SDRAM NVDIMM is supported, can be supplied by multiple hardwares
Answer any one commercialization in business.NVDIMM another embodiment is the flash memory device module on interconnecting channel.It is such
NVDIMM can access for example, by the Drive Module of main frame., can be with when there is front-end cache (cache) loss
Access flash memory device.NVDIMM another embodiment is with the DRAM and Large Copacity nonvolatile memory that can quickly access
The module of all advantages.
Non-volatile memory module 300 can be sent to disappearing for main frame 100a including built-in function request message by it
Cease passage.In embodiment, DQ passages, DQS passages, clock lane, control passage or combinations thereof may be used as message
Passage.In another embodiment, message channel can have the designated lane for being used for transmitting built-in function request message.
In embodiment, built-in function request message can be included from the nonvolatile memory that will perform built-in function
Module 300 asks the built-in function time, so as to which main frame 100a will not be sent out in the predetermined time to non-volatile memory module 300
Send new order.In another embodiment, even if main frame 100a sends new order in the predetermined time, built-in function life is received
The non-volatile memory module 300 of order can also ignore new order.
In one embodiment, the built-in function time can be for example based in the execution of non-volatile memory module 300
Portion operation species and change.For example, the built-in function time for refresh operation can be about several microseconds.For internal number
The built-in function time according to transmission operation can be such as about hundreds of microseconds.
In embodiment, main frame 100a can ratify or refuse built-in function request when receiving built-in function request.Example
Such as, if main frame 100a approval built-in function requests, main frame 100a can send the inside behaviour corresponding with built-in function request
Make order IOP, and send it to non-volatile memory module 300.For example, if main frame 100a refusal built-in functions please
Ask, non-volatile memory module 300 can postpone built-in function.In embodiment, non-volatile memory module 300 can be with
Built-in function is internally performed during the operating time without main frame 100a interrupt instruction.
Fig. 5 shows another embodiment of non-volatile memory module 300, and non-volatile memory module 300 can be with
Including the first and second nonvolatile memory 310L and 310R, the first and second volatile memory 320L and 320R, first
With the second data buffer 330L and 330 and memorizer control circuit (MMCD) 330.
Each in first and second nonvolatile memory 310L and 310 can include at least one non-volatile
Memory.In embodiment, at least one nonvolatile memory can be NAND flash, the storage of vertical nand flash
Device (VNAND), NOR flash memory, resistor type random access access memory (RRAM), phase transition storage (PRAM), reluctance type with
Machine accesses memory (MRAM), ferroelectric random-access memory (FRAM), spin-transfer torque random access storage device (STT-RAM)
Or IGCT RAM (TRAM).
In addition, nonvolatile memory can be implemented with three-dimensional matrix structure.In embodiment, three can be provided
Tie up 3D memory arrays.3D memory arrays can silicon base and the circuit associated with the operation of memory cell (no matter
Associated circuit is above substrate or within substrate) top deposits with those of effective coverage (active area)
Monolithically (monolithically) shape in one or more physical layer levels (physical level) of the array of storage unit
Into.Associated circuit in such substrate over or within.Term " monomer (monolithic) " can correspond to straight
Meet each of the array on the layer (layer) for each base level (underlying level) for being arranged in the array
The layer of level.
In embodiment, 3D memory arrays include vertical nand string vertically, so as at least one memory list
Member is on another memory cell.At least one memory cell can include electric charge capture layer.Each vertical nand
String can be included at least one selection transistor on memory cell.At least one selection transistor can have with depositing
Storage unit identical structure, and monolithically formed with memory cell.
3 D memory array includes multiple levels, and with the wordline or bit line shared between level.Following text
Part applied by Co., Ltd of Samsung, be related to including multiple levels, between level shared word line and/or bit line three
The example arrangement of memory array is tieed up, it is incorporated herein by reference：U.S. Patent No. 7,679,133, No. 8,553,466,
8th, 654, No. 587 and the 8th, 559, No. 235, and U.S. Patent Publication the 2011/0233648th.Nonvolatile memory
Go for charge-trapping flash memory (CTF) and flash memory device, in charge-trapping flash memory (CTF) insulating barrier by with
Make charge storage layer, and conductive floating gates are used as charge storage layer in flash memory device.
Each in first and second volatile memory 320L and 320R can include at least one DRAM.In reality
Apply in example, at least one DRAM can be realized with dual-port DRAM.For example, at least one DRAM first port can connect
It is at least one at least the first and second nonvolatile memory 310L and 310R, and its second port may be coupled to
One and second one corresponding in data buffer 330R and 330L.
Memorizer control circuit 340 can be implemented to receive order or address from main frame 100a, and is generated for controlling
Make the first and second nonvolatile memory 310L and 310R the first command/address CAN or easy for control first and second
Second command/address CAD of the property lost memory and 320L and 320R.
In embodiment, memorizer control circuit 340 can send for internal operation built-in function request and by its
It is sent to main frame 100a.In embodiment, memorizer control circuit 340 can receive built-in function order IOP from main frame 100a,
And built-in function is performed based on the built-in function order IOP received.Built-in function order IOP can include being used for inside
The built-in function time of operation.
Non-volatile memory module 300 in Fig. 5 can include at least the first nonvolatile memory 310L, at least the
One volatile memory 320L and the first data buffer 330L, they are arranged on relative to memorizer control circuit 340
Left side, and at least the second nonvolatile memory 310R, at least the second volatile memory 320R, Yi Ji can be included
Two data delay device 330R, and they are arranged on the right side relative to memorizer control circuit 340.In another embodiment, it is non-easy
The property lost memory module 300 can have memory, memorizer control circuit, buffer of different arrangements etc..
Fig. 6 shows the timing of the HPI corresponding with the built-in function of non-volatile memory module 300 request
Embodiment.In this embodiment, built-in function request IOP can pass through main frame 100a and non-volatile memory module 300
Between HPI be sent to main frame 100a.HPI can be such as memory inside passage.It is internal in embodiment
Operation requests can include being used for the built-in function time for completing built-in function or the information on the built-in function time.
When being sent to main frame 100a by message pin MSG including the message that built-in function is asked, with built-in function
Time corresponding information can also be sent to main frame 100a.The information corresponding with the built-in function time can pass through data
Pin DQ0 to DQ7 is transmitted.In one embodiment, the information corresponding with the built-in function time can pass through command/address
Pin CA (such as CKE pins, CS pins, CK pins, or ODT pin) is transmitted.
Information with built-in function time correlation can be by message pin MSG switching (toggling) by optionally
It is sent to main frame 100a.In embodiment, message pin MSG continuous switching frequency can indicate the built-in function time.
For example, message pin MSG continuous switching frequency can be built-in function time.
In one embodiment, the built-in function request in message can be all or the inside of some thesaurus (bank)
Operation requests.If asked by the main frame 100a built-in functions that have approved for all thesaurus, non-volatile memory module
300 can perform built-in function when main frame 100a fails to access non-volatile memory module 300 for all thesaurus.
If asked by the main frame 100a built-in functions that have approved for some thesaurus, can lead to only among some thesaurus
The thesaurus for crossing built-in function request selecting performs built-in function.In this case, remained in addition to selected thesaurus
Remaining thesaurus can be accessed for read/write operations.
In embodiment, if receiving built-in function request and the information corresponding with the built-in function time, main frame
100a can determine approval or refusal built-in function request.
If built-in function request goes through, main frame 100a can send built-in function order IOP, non-volatile so as to allow
Memory module 300 starts built-in function.Afterwards, main frame 100a can not internally send during the operating time non-for accessing
The new order of volatile 300.
If built-in function request is rejected, main frame 100a can be ignored by not performing a built-in function order
Built-in function is asked, and the order for refusal built-in function request of giving notice.Non-volatile memory module 300 can identify
Main frame 100a refusal notice, and postpone or abandon the operation of built-in function.In one embodiment, the built-in function time batch
Standard/refusal information can not be in the built-in function request of non-volatile memory module 300.
Fig. 7 shows the another of the timing of the HPI of the built-in function request for non-volatile memory module 300
One embodiment.In this embodiment, built-in function request can be carried with dual operation program (two-operation procedure)
For.
In the first operation, non-volatile memory module 300 can be by the signal for asking built-in function by disappearing
Breath passage MSG is sent only to main frame 100a, and the information (temporal information) joined with built-in function time correlation is stored in non-
In the buffering area (buffer area) of volatile 300.
In the second operation, main frame 100a can read buffering area and be grasped with sending for the inside extracted for built-in function
Make the reading order of time.In embodiment, main frame 100a can be based on read access time delivering built-in function order IOP.
Afterwards, non-volatile memory module 300 can be grasped based on inside is performed during built-in function order IOP internally operating time
Make.
Also, in the second operation, main frame 100a sends the reading order of the built-in function time for extracting buffering area.
In another embodiment, non-volatile memory module 300 can be deposited with Intrusion Detection based on host 100a built-in function order IOP, reading
Information is ratified/refused to the built-in function time of storage in the buffer, and during the built-in function time of reading inside execution
Operation.
Fig. 8 shows another implementation of the computing system of two memory modules including being connected to a storage channel
Example.With reference to figure 8, main frame can be connected to by a storage channel CH the first and second memory module DIMM1 and
DIMM2.Each in first and second memory module DIMM1 and DIMM2 can carry out built-in function.For ease of retouching
State, it is assumed in the following that second memory module DIMM2 performs built-in function.
Fig. 9 show when the computing system in Fig. 8 second memory module DIMM2 perform built-in function when, the first He
The embodiment of second memory module DIMM1 and DIMM2 timing.
With reference to figure 8 and Fig. 9, second memory module DIMM2 can be based on built-in function order IOP internally operating times
Period performs built-in function.Built-in function can be the data transfer operation performed in second memory module DIMM2.When interior
When portion's operation is performed, main frame can forbid the access to second memory module DIMM2.Even if main frame does not access the second storage
Device module DIMM2, it can also access the first memory module DIMM1 of idle condition.For example, in fig.9, first memory
Module DIMM1 can be sequentially received precharge command PRE, activation command (active command) ACT and read life
Order/address RD, and export data D0 to the D7 corresponding with reading order/address RD.Afterwards, first memory module
DIMM1 can continue executing with next read operation.
After data communication between main frame and first memory module DIMM1, computing system can hide second and deposit
Memory modules DIMM2 built-in function.Because second memory module DIMM2 inner working is hidden, the performance of system can
With elevated.
Figure 10 shows the embodiment of the built-in function order sent by the main frame of computing system.With reference to figure 10, work as allowance
During built-in function, main frame can based on memory module DIMM/ non-volatile memory modules NVDIMM built-in function ask,
Send built-in function order IOPA and IOPB.Built-in function order IOPA can indicate non-volatile for memory module DIMM/
The built-in function of property memory module NVDIMM all thesaurus.Second built-in function order IOPB can be indicated for storage
The built-in function of device module DIMM/ non-volatile memory modules NVDIMM single thesaurus.
In embodiment, all thesaurus built-in functions can be distinguished using the address pin in such as Figure 10 and single are deposited
Bank built-in function.In embodiment, built-in function order IOPA and IOPB can be from the particular combinations of order/address pin
Generation.The reservation that such combination can be preserved for typical DDR4SDRAM uses (RFU) in the future.In embodiment, with
Built-in function order IOPA and IOPB associated command/address pin can include CKE, CS, CAS, RAS, ACT, thesaurus
Address and address pin.
In embodiment, built-in function order IOPA and IOPB can include the value according to the programming for being applied to address pin
(programmed value) and change the built-in function time.For example, the value of programming can be programmed to draw corresponding to address
Pin A0 to A9.
In figs. 8 and 9, a computing system be able to will be connected with mutually the same two memory modules DIMM1 and DIMM2
It is connected to a storage channel.In another embodiment, computing system can be by memory module DIMM and non-volatile memories
Device module NVDIMM is connected to a storage channel.
Figure 11 shows the embodiment of server system.With reference to figure 11, computing system can by memory module DIMM and
Non-volatile memory module NVDIMM is connected to a storage channel.Performed when to non-volatile memory module NVDIMM
During above-mentioned built-in function, main frame can be with access storage module DIMM, and vice versa.Memory module DIMM is held for example, working as
During the above-mentioned built-in function of row, main frame can access non-volatile memory module NVDIMM.
In computing system in fig. 11, memory module DIMM and non-volatile memory module NVDIMM are connected to one
Individual storage channel.In one embodiment, computing system includes memory module DIMM and non-volatile memory module
NVDIMM is connected respectively to two storage channels.
Figure 12 shows another embodiment of computing system.With reference to figure 12, main frame can pass through first passage CH1 and storage
The DIMM connections of device module, and be connected by second channel CH2 with non-volatile memory module NVDIMM.When to non-volatile
When memory module NVDIMM performs above-mentioned built-in function, main frame can be with access storage module DIMM.The embodiment can fit
For for example by chip form rather than the DRAM realized in the form of memory module.
Figure 13 shows the embodiment for the DRAM400 that can include memory cell array 410 and refresh controller 420.
Memory cell array 410 can include the multiple DRAM for being arranged separately on the crosspoint (intersection) of wordline and bit line
Unit.Refresh controller 420 can perform the refresh operation of DRAM cell.In embodiment, refresh controller 420 can be based on
The refresh command of main frame or external equipment performs refresh operation.
In embodiment, refresh controller 420 can be when that will perform built-in function out of main frame/external equipment request
Portion's operating time.Main frame/external equipment, which can be based on the request of built-in function time, ratifies the built-in function time/refuses information hair
It is sent to renewal controller 420.Refresh controller 420 can receive the built-in function time and ratify/refuse information internally to grasp
Make to perform refresh operation during the time.In embodiment, refresh controller 420 can perform brush for all or some thesaurus
New operation.The embodiment is applicable to for example that wherein resistance (electric resistance) is used as position (bit) 3D
Xpoint memories.
Figure 14, which is shown, can include processor 41, memory module (DIMM) 42 and nonvolatile memory (NVM) 43
Computing system 40 embodiment.Processor 41 can be with control memory module 42 and nonvolatile memory 43.In embodiment
In, the built-in function request that processor 41 can be based on memory module 42 sends built-in function order.
Memory module 42 can be connected to processor 41 by ddr interface.When built-in function will be performed, memory
Module 42 can ask built-in function to be sent to processor 41.Moreover, memory module 42 can be implemented with based on from
The built-in function order of processor 41 performs built-in function.
Nonvolatile memory 43 can be connected to processor 41 by DDR-T (affairs) interface.In this case, deposit
Memory modules 42 can perform the caching function of nonvolatile memory (43).In embodiment, nonvolatile memory
43 can be 3D-Xpoint memories.The embodiment is applied to the built-in function of such as nonvolatile memory 43.
Figure 15 shows the embodiment of the method for operating main frame.In the method, main frame can store from being connected to
The various storage devices (DIMM, NVDIMM, DRAM, NVM, SSD, eMMC, SD card, UFS etc.) of device passage are received in performing
The built-in function time request (S110) of portion's operation.Main frame can be asked based on the built-in function time to ratify or refuse internal behaviour
Make (for example, storage operation).Main frame can send the built-in function order corresponding with the request of built-in function time.Sent
Built-in function order can include the built-in function time (S120).The built-in function order sent can be sent to storage and set
It is standby, and storage device can be based on built-in function order and internally perform built-in function during the operating time.
Figure 16 shows the embodiment of the method for operating storage device.Figure 16 is arrived with reference to figure 15, in the method, is deposited
Storage equipment can determine whether to perform built-in function according to inner strategy, and will be sent out for the built-in function time of built-in function
It is sent to main frame (S210).The request of built-in function time can be sent to main frame, the various forms such as message in a variety of manners
Form or signal form.For example, storage device, which can be implemented to send to main frame, includes disappearing for built-in function time request
Breath.
Afterwards, storage device can receive the inside for the information for including the approval or refusal for indicating the built-in function time from main frame
Operational order (S220).Storage device can perform all or part of built-in function (S230) based on built-in function order.
In embodiment, when built-in function order includes the information of the approval of instruction built-in function time, storage device
The new order ignoring during built-in function and sent by main frame can performed.In embodiment, when built-in function order includes referring to
When showing the information of the refusal of built-in function time, storage device can receive or handle the new order sent by main frame.Storage
Equipment can perform the new order that receives and cache during built-in function and sent by main frame.Storage device can be based on new life
Order handles new order first after (holding) built-in function is kept.The embodiment goes for such as data, services
Device.
Figure 17, which is shown, can include relational database management system (related database management
System, RDBMS) 51, the embodiment of the data server system 50 of cache server 52 and application server 53.At a high speed
Caching server 52 can be notified based on the disabling (disable) from data base management system 51 to safeguard and delete each other not
Same key and value are to (key and value pairs).As described in referenced in schematic 1 to Figure 16, relational database management system 51,
At least one in cache server 52 or application server 53 can use main frame, memory module DIMM, non-volatile
Memory module NVDIMM, DRAM or nonvolatile memory are realized.
Method described herein, process and/or operation can by will by computer, processor, controller or other
The code of signal handling equipment operation or instruction are realized.Computer, processor, controller or other signal handling equipments can be with
Computer, processor, controller or other signal handling equipments described herein, or except element described herein with
An outer computer, processor, controller or other signal handling equipments.Because basis (or computer, the place of forming method
The operation of reason device, controller or other signal handling equipments) algorithm be described in detail, institute is for implementation method embodiment
Operation code or instruction computer, processor, controller or other signal handling equipments can be converted to for performing
The application specific processor of method described herein.
Controller, processor and other processing features of embodiment disclosed herein can be implemented with logic, described to patrol
Volume can include for example hardware, software, or both.When being implemented at least in part with hardware, controller, processor, Yi Jiqi
He can be at processing feature, for example, any one in various integrated circuits, includes but is not limited to, application specific integrated circuit, field can
Program gate array, the combination of gate, on-chip system, microprocessor or another type of processing or control circuit.
When implemented in software at least in part, controller, processor and other processing features can include, for example, with
Will be by for example, computer, processor, microprocessor, controller or the code of other signal handling equipments operation in storage
Or memory or the other storage devices of instruction.Computer, processor, microprocessor, controller or other signal handling equipments
Can be computer, processor, microprocessor, controller or other signal handling equipments described herein, or except this
In computer, processor, microprocessor, controller or other signal handling equipments beyond the element that describes.Because formation side
The algorithm on the basis (or computer, operation of processor, microprocessor, controller or other signal handling equipments) of method is detailed
Ground describe, for implementation method embodiment operation code or instruction can by computer, processor, controller or
Other signal handling equipments are converted to the application specific processor for performing method described herein.
According to one or more previous embodiments, storage device can directly ask the inside for storage device from main frame
The built-in function time of operation, and main frame will can internally be transmitted during the operating time based on request on the mandate of time
To storage device.Therefore, storage device can fully perform built-in function.
There has been disclosed example embodiment, specific term despite the use of, but they are used and with logical
And the descriptive meaning is explained, rather than purpose for restriction.In some instances, unless otherwise indicated, on
Feature, characteristic, and/or the element of specific embodiment description can be used individually, or with being described on other embodiment
Feature, characteristic, and/or element combinations use.It is, therefore, to be understood that can make in form and details various changes
Become, without departing from the spirit and scope of the embodiment illustrated in detail in the claims.
Claims (20)
1. a kind of operating method of storage device, this method include：
The built-in function request of built-in function for the storage device is sent to external equipment, the built-in function request
Message including indicating the built-in function time；
The built-in function order corresponding with built-in function request is received from external equipment, the built-in function order includes
The approval of the built-in function request；And
The built-in function is performed during the built-in function time by built-in function comamnd confirmation.
2. the method as described in claim 1, in addition to：MRDY message ready signal is sent to external equipment, and is sending institute
Message reading order is received at the storage device before stating built-in function request.
3. the method for claim 1, wherein the built-in function persond eixis perform needed for the built-in function when
The area of a room.
4. the method for claim 1, wherein sending built-in function request includes：
The built-in function time is stored in the buffering area of the storage device；And
Built-in function request is sent to the external equipment using message channel,
Wherein, the built-in function time being stored in the buffering area is read when receiving built-in function order, and in institute
Built-in function is performed during the built-in function time of reading.
5. the method for claim 1, wherein receiving the built-in function order includes drawing by least one order
Pin, at least one address pin or at least one reservation use the internal behaviour of at least one reception in (RFU) pin in the future
Order.
6. the method for claim 1, wherein perform the built-in function include based on the built-in function order for
All or some thesaurus of the storage device perform the built-in function.
7. the method as described in claim 1, wherein：
The built-in function order includes instruction for the approval of the request or the information of refusal, and
This method includes：When the built-in function order includes indicating the information for the approval of the request, ignore from institute
State the new order that external equipment is sent.
8. the method as described in claim 1, wherein：
The built-in function order includes instruction for the approval of the request or the information of refusal, and
This method includes：When the built-in function order includes indicating the information for the refusal of the request, handle from institute
State the new order that external equipment is sent.
9. the method for claim 1, wherein the built-in function includes refresh operation, timing alignment operation or internal
It is at least one in data transfer operation.
10. the method for claim 1, wherein the storage device includes one of the following：Lilline Memory
Module (DIMM), non-volatile dual-inline memory module (NVDIMM), solid-state driving (SSD), general flash memory
(UFS), embedded multi-media card (eMMC), secure digital (SD) card, dynamic RAM (DRAM), static RAM
(SRAM), NAND flash, vertical nand flash memory, phase RAM (PRAM) or resistance-type RAM (RRAM).
11. a kind of memory module, including：
At least one volatile memory；
At least one nonvolatile memory；And
Memorizer control circuit, at least one volatile memory and at least one nonvolatile memory are controlled,
Wherein, the memorizer control circuit is configured as, and when built-in function is performed, built-in function request message is sent to outer
Portion's equipment, the built-in function order corresponding with the built-in function request message is received from the external equipment, and be based on
Told built-in function order internally performs built-in function during the operating time, and wherein, the built-in function request message
Including the built-in function time.
12. memory module as claimed in claim 11, wherein, the memorizer control circuit is held in the built-in function
Ignore the new order sent by the external equipment during row.
13. memory module as claimed in claim 11, wherein, when receiving the refusal including being asked with the built-in function
During the built-in function order of corresponding information, the memorizer control circuit processing is sent new by the external equipment
Order.
14. memory module as claimed in claim 11, wherein, the built-in function order includes the built-in function time
Or the information corresponding with the built-in function time.
15. memory module as claimed in claim 11, wherein, the memorizer control circuit is drawn by least one order
Pin, at least one address pin or at least one reservation use the internal behaviour of at least one reception in (RFU) pin in the future
Order.
16. memory module as claimed in claim 11, wherein, the memorizer control circuit is drawn using at least one data
The built-in function request message is sent to the external equipment by least one in pin or at least one data strobe pin.
17. memory module as claimed in claim 11, wherein, the memorizer control circuit will be used by least one
The signal of message pin switches is sent to the external equipment by the built-in function request message.
18. memory module as claimed in claim 11, wherein, the memorizer control circuit will be used for the built-in function
The built-in function time storage in the buffer, will be corresponding with the built-in function request message by message pin
Signal is sent to the external equipment, and the reading order corresponding with the signal is received from the external equipment, based on being connect
The reading orders of receipts is read the built-in function time being stored in the buffering area, and from the external equipment receive with
The corresponding built-in function order of built-in function time for being read.
19. memory module as claimed in claim 11, wherein, the built-in function is deposited including at least one volatibility
Data transfer operation between reservoir or at least one nonvolatile memory.
20. memory module as claimed in claim 11, wherein, the built-in function order includes the first built-in function order
Or the second built-in function order, the first built-in function order indicates the built-in function for all thesaurus, and the second inside is grasped
Make built-in function of the order instruction for single thesaurus.
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| US201662325051P | 2016-04-20 | 2016-04-20 | |
| US62/325,051 | 2016-04-20 | ||
| KR10-2016-0061012 | 2016-05-18 | ||
| KR1020160061012A KR102646721B1 (en) | 2016-04-20 | 2016-05-18 | Computing system, nonvolatile memory module and operating method of storage device |
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| TWI708150B (en) * | 2018-05-08 | 2020-10-21 | 華碩電腦股份有限公司 | Motherboard and memory module |
| KR20220135504A (en) * | 2021-03-30 | 2022-10-07 | 삼성전자주식회사 | Data Storage device and operating method of data Storage device |
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| TW201738764A (en) | 2017-11-01 |
| TWI737703B (en) | 2021-09-01 |
| CN107452423B (en) | 2022-11-04 |
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