CN107450643A - A kind of low pressure difference linear voltage regulator - Google Patents
A kind of low pressure difference linear voltage regulator Download PDFInfo
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- CN107450643A CN107450643A CN201610384124.3A CN201610384124A CN107450643A CN 107450643 A CN107450643 A CN 107450643A CN 201610384124 A CN201610384124 A CN 201610384124A CN 107450643 A CN107450643 A CN 107450643A
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- voltage regulator
- circuit
- low pressure
- pressure difference
- difference linear
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
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- General Physics & Mathematics (AREA)
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- Automation & Control Theory (AREA)
- Continuous-Control Power Sources That Use Transistors (AREA)
Abstract
The invention discloses a kind of low pressure difference linear voltage regulator.In the low pressure difference linear voltage regulator, including differential circuit, error amplifying circuit and voltage regulator circuit；Due to the characteristic of differential circuit, a zero point can be produced, the amplitude-versus-frequency curve of zero point is risen with every ten frequencys multiplication of+20dB, so it slow down the decline of the amplitude-versus-frequency curve of low pressure difference linear voltage regulator, so that the amplitude-versus-frequency curve of low pressure difference linear voltage regulator and the intersection point of transverse axis move to the direction away from origin, increase the bandwidth of low pressure difference linear voltage regulator, and then improve the response speed of low pressure difference linear voltage regulator, so that the output voltage of low pressure difference linear voltage regulator is relatively stable, simultaneously, due to the component that no introducing power consumption is larger, the low pressure difference linear voltage regulator power consumption will not be dramatically increased.
Description
Technical field
The invention belongs to electronic circuit technology field, and in particular to a kind of low pressure difference linear voltage regulator.
Background technology
Low pressure difference linear voltage regulator (Low-dropout Regulator, LDO) has output noise small, electric
The advantages that line structure is simple, chip occupying area is small and voltage ripple is small, it is important in electric power management circuit
Part, thus be widely used in handheld device and portable type electronic product.
In MIPI (Mobile Industry Processor Interface, mobile Industry Processor Interface) system
In, LPTX (Low Power Transmiter, low-powered transmitter) has strict want to its supply voltage
Ask, because LDO has above-mentioned advantage, therefore generally use LDO powers for it at present.But due to
Current loading instantaneous variation when LPTX sends data every time is larger, and in general LDO output voltage can not
Quickly its upper change of tracking, bit error rate during LPTX transmission data is caused to increase.
Thus it is guaranteed that the stability of LDO output voltages is particularly important.
The content of the invention
The embodiments of the invention provide a kind of low pressure difference linear voltage regulator, and larger power consumption is not being introduced to realize
Ensure low voltage difference linear stabilizer output voltage stability in the case of component.
Low pressure difference linear voltage regulator provided in an embodiment of the present invention, including：Differential circuit, error amplifying circuit
And voltage regulator circuit；
The input of the differential circuit is directly connected to or passed through with the low pressure difference linear voltage regulator output end
Feedback circuit is connected, and the output end of the differential circuit is connected with the input of the error amplifying circuit, institute
Differential circuit is stated to be used to export first voltage according to the feedback voltage of the low pressure difference linear voltage regulator output end,
The waveform of the first voltage reflects the feedback voltage situation of change of the output end；
The output end of the error amplifying circuit is connected with the voltage regulator circuit, for the described first electricity
Pressure and reference voltage carry out differential amplification, export second voltage；
The voltage regulator circuit is used for defeated according to the second voltage regulation low pressure difference linear voltage regulator
Go out the voltage at end.
Specifically, the differential circuit includes：Amplifier, resistance R3 and electric capacity C3；
The in-phase input end of the amplifier is directly connected to the low pressure difference linear voltage regulator output end, or
The in-phase input end of the amplifier is connected by feedback circuit with the low pressure difference linear voltage regulator output end；
The inverting input of the amplifier is grounded by electric capacity C3；
Resistance R3 is connected between the inverting input of the amplifier and the output end of the amplifier.
Specifically, the voltage regulator circuit includes PMOS M1, PMOS M1 grid with
The output end connection of the error amplifying circuit, source electrode are connected with power supply, and drain electrode is used as the low voltage difference
The output end of linear voltage regulator.
Alternatively, compensation circuit is also associated between the error amplifying circuit and the voltage regulator circuit,
The limit of low pressure difference linear voltage regulator output end described in zero compensation caused by the compensation circuit.
Specifically, the compensation circuit includes：PMOS M2 and electric capacity C2；
PMOS M2 grid and the output end of error amplifying circuit are connected, and source electrode is connected with power supply,
Drain electrode is connected by the output end of electric capacity C2 and error amplifying circuit.
Specifically, PMOS M2 resistance value and electric capacity C2 capacitance meet following relations：
Rm=kRL
C2=CL/k
Wherein, RmRepresent PMOS M2 resistance value, RLThe resistance value of load resistance is represented, k is
Constant, C2Represent electric capacity C2 capacitance, CLRepresent the capacitance of the electric capacity in parallel with the load resistance.
Alternatively, it is also associated with buffer circuit between the error amplifying circuit and the compensation circuit；
The buffer circuit is used for the second voltage for following the error amplifying circuit output.
Specifically, the buffer circuit includes：PMOS M3 and PMOS M4；
PMOS M3 grid is connected with bias voltage, and source electrode is connected with power supply, drain electrode and PMOS
Pipe M4 source electrode connection；
PMOS M4 grid is connected with the output end of the error amplifying circuit, grounded drain.
In the above embodiment of the present invention, differential circuit is added in low pressure difference linear voltage regulator, due to micro-
The characteristic of parallel circuit, a zero point can be produced, the amplitude-versus-frequency curve of zero point is with every ten frequencys multiplication of+20dB
Rise, so slow down the decline of the amplitude-versus-frequency curve of low pressure difference linear voltage regulator so that low pressure difference linearity is steady
The amplitude-versus-frequency curve of depressor and the intersection point of transverse axis move to the direction away from origin, that is, increase low voltage difference line
The bandwidth of property voltage-stablizer, improves the response speed of low pressure difference linear voltage regulator, and then ensure that low voltage difference line
The stability of property stabilizer output voltage, simultaneously as the larger component of power consumption is not introduced, Bu Huixian
Writing increases the low pressure difference linear voltage regulator power consumption.
The embodiment of the present invention additionally provides a kind of low pressure difference linear voltage regulator, including：Error amplifying circuit, mend
Repay circuit and voltage regulator circuit；
The input of the error amplifying circuit and the low pressure difference linear voltage regulator output end be directly connected to or
Connected by feedback circuit, the output end of the error amplifying circuit is connected with the voltage regulator circuit, institute
Error amplifying circuit is stated for the feedback voltage and reference voltage to the low pressure difference linear voltage regulator output end
Differential amplification is carried out, exports second voltage；
The compensation circuit, it is connected between the error amplifying circuit and the voltage regulator circuit；It is described
The limit of low pressure difference linear voltage regulator output end described in zero compensation caused by compensation circuit；
The voltage regulator circuit is used for the voltage for adjusting the low pressure difference linear voltage regulator output end.
Specifically, the compensation circuit includes：PMOS M2 and electric capacity C2；
PMOS M2 grid and the output end of error amplifying circuit are connected, and source electrode is connected with power supply,
Drain electrode is connected by the output end of electric capacity C2 and error amplifying circuit.
Specifically, PMOS M2 resistance value and electric capacity C2 capacitance meet following relations：
Rm=kRL
C2=CL/k
Wherein, RmRepresent PMOS M2 resistance value, RLThe resistance value of load resistance is represented, is normal
Number, C2Represent electric capacity C2 capacitance, CLRepresent the capacitance of the electric capacity in parallel with the load resistance.
Specifically, the voltage regulator circuit includes PMOS M1, PMOS M1 grid with
The output end connection of the error amplifying circuit, source electrode are connected with power supply, and drain electrode is used as the low voltage difference
The output end of linear voltage regulator.
Alternatively, the input of the error amplifying circuit is by differential circuit and the low pressure difference linearity voltage stabilizing
Device output end is connected or connected by feedback circuit；
The output end of the differential circuit is connected with the input of the error amplifying circuit, the differential circuit
For exporting first voltage, first electricity according to the feedback voltage of the low pressure difference linear voltage regulator output end
The waveform of pressure reflects the feedback voltage situation of change of the output end.
Specifically, the differential circuit, including：Amplifier, resistance R3 and electric capacity C3；
The in-phase input end of the amplifier is directly connected to the low pressure difference linear voltage regulator output end, or
The in-phase input end of the amplifier is connected by feedback circuit with the low pressure difference linear voltage regulator output end；
The inverting input of the amplifier is grounded by electric capacity C3；
Resistance R3 is connected between the inverting input of the amplifier and the output end of the amplifier.
Alternatively, it is also associated with buffer circuit between the error amplifying circuit and the compensation circuit；
The buffer circuit is used for the second voltage for following the error amplifying circuit output.
Specifically, the buffer circuit includes：PMOS M3 and PMOS M4；
PMOS M3 grid is connected with bias voltage, and source electrode is connected with power supply, drain electrode and PMOS
Pipe M4 source electrode connection；
PMOS M4 grid is connected with the output end of the error amplifying circuit, grounded drain.
In the above embodiment of the present invention, pressure difference linear voltage regulator includes error amplifying circuit, compensation circuit and
Voltage regulator circuit, the compensation circuit, is connected between error amplifying circuit and voltage regulator circuit, compensation
Zero point caused by circuit can compensate the limit of low pressure difference linear voltage regulator output end, to improve low pressure difference linearity
The stability of voltage-stablizer.
Brief description of the drawings
Technical scheme in order to illustrate the embodiments of the present invention more clearly, institute in being described below to embodiment
The accompanying drawing needed to use is briefly introduced, it should be apparent that, drawings in the following description are only the present invention's
Some embodiments, for one of ordinary skill in the art, do not paying the premise of creative labor
Under, other accompanying drawings can also be obtained according to these accompanying drawings.
Fig. 1 is the basic circuit schematic diagram of low pressure difference linear voltage regulator in the prior art；
Fig. 2 is the structured flowchart of low pressure difference linear voltage regulator provided in an embodiment of the present invention；
Fig. 3 is the circuit theory diagrams of low pressure difference linear voltage regulator provided in an embodiment of the present invention；
Fig. 4 is the structured flowchart of another low pressure difference linear voltage regulator provided in an embodiment of the present invention.
Embodiment
In order that the object, technical solutions and advantages of the present invention are clearer, below in conjunction with accompanying drawing to this hair
It is bright to be described in further detail, it is clear that described embodiment is only a part of embodiment of the present invention,
Rather than whole embodiment.Based on the embodiment in the present invention, those of ordinary skill in the art are not doing
Go out under the premise of creative work all other embodiment obtained, belong to the scope of protection of the invention.
The basic circuit schematic diagram for showing low pressure difference linear voltage regulator in the prior art exemplary Fig. 1.Such as
Shown in figure, low pressure difference linear voltage regulator includes error amplifier A, power tube M1, resistance R1, resistance
R2 and electric capacity C1, wherein, error amplifier A is used to amplify between fed-back output voltage and reference voltage
Difference, power tube M1 increases or reduce electric current with control output end voltage, and be electric capacity C1 discharge and recharges,
Realize the stabilization of output voltage.If amplification is passed through in the voltage increase of output end, error amplifier A outputs
Difference voltage increase afterwards so that power tube M1 electric current reduces, therefore the output voltage of output end reduces；
If the voltage of output end reduces, the difference voltage after amplification of error amplifier A outputs reduces, and makes
The increase of power tube M1 electric current is obtained, therefore the output voltage of output end increases.However, in order to realize system
Stabilization, electric capacity C1 should choose larger electric capacity, therefore cause the power consumption of low pressure difference linear voltage regulator larger,
And add the area of chip.
In order to realize the requirement for meeting low pressure difference linear voltage regulator to stability, realizing again reduces power consumption, this
Inventive embodiments provide a kind of low pressure difference linear voltage regulator.
It is a kind of theory diagram of low pressure difference linear voltage regulator provided in an embodiment of the present invention, such as referring to Fig. 2
Shown in figure, the low pressure difference linear voltage regulator includes：Differential circuit 201, error amplifying circuit 202, voltage
Adjust circuit 203.
Wherein, the input that differential circuit 201 is used for is with low pressure difference linear voltage regulator output end by feeding back electricity
Road 206 is connected, and output end is connected with the input of error amplifying circuit 202.Alternatively, the present invention is implemented
The low pressure difference linear voltage regulator that example provides can also omit feedback circuit 206, the output end of differential circuit 201
Directly it can be connected with low pressure difference linear voltage regulator output end.
Differential circuit 201 is used for according to the electricity of the feedback voltage of low pressure difference linear voltage regulator output end output first
Pressure, the feedback voltage situation of change of the waveform reflection low pressure difference linear voltage regulator output end of the first voltage.If
Feedback voltage increase, then the first voltage that differential circuit 201 exports increases therewith, if feedback voltage reduces,
The first voltage that then differential circuit 201 exports decreases.
Due in low pressure difference linear voltage regulator provided in an embodiment of the present invention, adding a differential circuit,
To be that the low pressure difference linear voltage regulator produces a zero point, the amplitude-frequency of the zero point according to the characteristic of differential circuit
Characteristic curve is risen with every ten frequencys multiplication of+20dB, so slow down the amplitude versus frequency characte of low pressure difference linear voltage regulator
The decline of curve so that the amplitude-versus-frequency curve of low pressure difference linear voltage regulator and the intersection point of transverse axis are to away from origin
Direction movement, that is, increase the bandwidth of low pressure difference linear voltage regulator, and then improve low pressure difference linearity voltage stabilizing
The response speed of device, avoids the bit error rate from increasing, and improves the stability of the low pressure difference linear voltage regulator, therefore,
Can need not be in the output end larger electric capacity in parallel of low pressure difference linear voltage regulator, so as to reduce low voltage difference
The power consumption of linear voltage regulator.
The output end of the first input end of error amplifying circuit 202 and differential circuit connects, the second output end with
The output end connection of reference voltage, for carrying out differential amplification, its output end to first voltage and reference voltage
Voltage of the second voltage of output for first voltage and the difference voltage of reference voltage after amplification.If first
The first voltage of input input increases, then the output end N of error amplifying circuit0The second voltage of output subtracts
It is small, if conversely, the first voltage reduction of first input end input, the output end N of error amplifying circuit0
The second voltage increase of output.
Shown voltage regulator circuit 203 is connected with power supply, is carried for the output end of low pressure difference linear voltage regulator
For output voltage；And the second voltage exported according to error amplifying circuit, to the electricity of voltage regulator circuit output
Stream is adjusted, and then adjusts the voltage of the output end of low pressure difference linear voltage regulator.
Alternatively, the low pressure difference linear voltage regulator can also include compensation circuit 204, compensation circuit connection
Between error amplifying circuit and voltage regulator circuit, it is steady to compensate low pressure difference linearity that a zero point can be produced
The limit of depressor output end.
Alternatively, the low pressure difference linear voltage regulator can also include buffer circuit 205, buffer circuit connection
Between error amplifying circuit and buffer circuit, the second voltage available for the output of tracking error amplifying circuit.
Specifically, the circuit theory diagrams of low pressure difference linear voltage regulator provided in an embodiment of the present invention can be such as Fig. 3
It is shown.Certainly, the low pressure difference linear voltage regulator shown in Fig. 3 is only one embodiment of the present of invention, can be with
By using other components, or part component is increased or decreased to realize the above embodiment of the present invention institute
The technique effect reached, the present invention are without limitation.
Differential circuit 301 as shown in Figure 3 includes：Amplifier A, resistance R3 and electric capacity C3.The amplification
Device A in-phase input end is connected by feedback circuit 306 with the output end of low pressure difference linear voltage regulator, and its is anti-
Phase input is grounded by electric capacity C3, and resistance R3 is connected to amplifier A inverting input and amplification
Between device A output end.
Differential circuit as shown in Figure 3, a zero point Z can be provided0：
The zero point can slow down the decline of the amplitude-versus-frequency curve of low pressure difference linear voltage regulator so that low voltage difference line
Property the amplitude-versus-frequency curve of voltage-stablizer and the intersection point of transverse axis to away from origin direction move, that is, increase low pressure
The bandwidth of difference linear constant voltage regulator, and then the response speed of low pressure difference linear voltage regulator is improved, avoid the bit error rate
Increase, improve the stability of the low pressure difference linear voltage regulator.
Error amplifying circuit 302 as shown in Figure 3 includes PMOS M6, PMOS M7, NMOS
Pipe M8, NMOS tube M9, NMOS tube M10, NMOS tube M11, by PMOS M5 with
Power supply connects；Wherein, first input of the PMOS M6 grid as error amplifying circuit 302
End, is connected, PMOS M7 grid is as the error amplifying circuit 302 with the output end of differential circuit
The second input, be connected with the output end of reference voltage, PMOS M7 drain electrode is amplified as error
The output end of circuit 302.The error amplifying circuit can be equivalent to an amplifier, its first input end phase
When in the in-phase input end of amplifier, inverting input of its second output end equivalent to amplifier；Therefore,
If the output end voltage rise of low pressure difference linear voltage regulator, the input electricity of the in-phase input end of the equivalent amplifier
The voltage rise of pressure increase, then its output end, if conversely, the output end voltage drop of low pressure difference linear voltage regulator
Low, then the voltage of its output end reduces.
Buffer circuit 303 as shown in Figure 3 includes PMOS M3 and PMOS M4, PMOS
M3 grid is connected with bias voltage, and source electrode is connected with power supply, drain electrode and PMOS M4 source
Pole is connected, and PMOS M4 grid is connected with the output end of error amplifying circuit 302, grounded drain.
Wherein, output end and voltage regulator circuit, benefit of the PMOS M4 source electrode as buffer circuit 303
Repay the connection of circuit.Due to the source electrode that the output end of buffer circuit 303 is PMOS M4, it is inputted
The grid of the source electrode for PMOS M4 is held, therefore, buffer circuit 303 can amplify electricity with tracking error
The output voltage on road 302.
Compensation circuit 304 as shown in Figure 3 includes PMOS M2 and electric capacity C2, PMOS M2
Grid be connected with the output end of buffer circuit 303, source electrode is connected with power supply, drain electrode pass through electric capacity
The output end of C2 and error amplifier connects.
As shown in figure 3, the resistance R of the output end of the low pressure difference linear voltage regulatorLRepresent load, electric capacity CL
With load resistance RLParallel connection, for preventing the shake of output voltage.Therefore, in the low pressure difference linearity voltage stabilizing
The output end of device can produce a limit P1：
Wherein, RLRepresent the resistance value of load resistance, CLRepresent the electric capacity of the electric capacity in parallel with load resistance
Value.The limit can influence the stability of low pressure difference linear voltage regulator.
And above-mentioned compensation circuit 304 can then provide a zero point Z1：
Wherein, RmRepresent the resistance value of the PMOS M2, C2Represent electric capacity C2 capacitance.
Order
Rm=kRL (4)
C2=CL/k (5)
Wherein k is constant.
Now, there is Z1=P1, therefore, the zero point Z provided using compensation circuit 3041Output can be compensated
Limit P caused by end1, improve the stability of the low pressure difference linear voltage regulator.
Voltage regulator circuit 305 as shown in Figure 3 includes PMOS M1, PMOS M1 grid
It is connected with the output end of buffer circuit 303, source electrode is connected with power supply, and drain electrode is used as the low pressure difference linearity
The output end of voltage-stablizer, with load resistance RL, electric capacity CLAnd feedback circuit 306 connects.
Feedback circuit 306 as shown in Figure 3 includes resistance R1 and resistance R2, passes through resistance R1 and resistance
R2 carries out partial pressure to the voltage of the output end of low pressure difference linear voltage regulator, by the voltage output at resistance R2 both ends
To the input of differential circuit 301.
When the output end voltage rise of low pressure difference linear voltage regulator, the feedback voltage of the output of feedback circuit 306
Corresponding rise, the voltage that differential circuit 301 exports also raise, and the voltage that error amplifying circuit 302 exports
Rise, therefore the voltage of the 303 of buffer circuit outputs also raises, due to being input in voltage regulator circuit 305
PMOS M1 grids voltage rise, cause PMOS M1 drain electrode output electric current reduce, with up to
To the purpose for reducing low pressure difference linear voltage regulator output end voltage.
Similarly, when the output end voltage of low pressure difference linear voltage regulator reduces, the low pressure difference linearity voltage stabilizing is passed through
The loop adjustment of device so that the output end voltage rise of low pressure difference linear voltage regulator.
As shown in figure 3, the power supply circuit of the low pressure difference linear voltage regulator includes PMOS M5, PMOS
Pipe M5 grid is connected with bias voltage, PMOS M5 source electrode and the PMOS in buffer circuit 303
In pipe M3 source electrode, the source electrode of the PMOS M2 in compensation circuit 304, voltage regulator circuit 305
PMOS M1 source electrode is connected, PMOS M5 drain electrode and the PMOS in error amplifying circuit 302
Pipe M6, PMOS M7 source electrode are connected, effect be for error amplifying circuit 302, buffer circuit 303,
Compensation circuit 304 and voltage regulator circuit 305 are powered.
In the above embodiment of the present invention, differential circuit is added in low pressure difference linear voltage regulator, due to micro-
The characteristic of parallel circuit, a zero point can be produced, the amplitude-versus-frequency curve of zero point is with every ten frequencys multiplication of+20dB
Rise, so slow down the decline of the amplitude-versus-frequency curve of low pressure difference linear voltage regulator so that low pressure difference linearity is steady
The amplitude-versus-frequency curve of depressor and the intersection point of transverse axis move to the direction away from origin, that is, increase low voltage difference line
The bandwidth of property voltage-stablizer, and then the response speed of low pressure difference linear voltage regulator is improved, avoid the bit error rate from increasing,
Simultaneously as not introducing the larger component of power consumption, the low pressure difference linear voltage regulator work(will not be dramatically increased
Consumption；On the other hand, compared with the mode in output resistance both ends parallel connection bulky capacitor, because bulky capacitor is in chip
Middle occupied area is larger, and therefore, low pressure difference linear voltage regulator provided in an embodiment of the present invention can also save core
Piece area.
The embodiment of the present invention additionally provides a kind of low pressure difference linear voltage regulator, to realize raising low pressure difference linearity
The stability of voltage-stablizer, the structured flowchart of the low pressure difference linear voltage regulator can be found in Fig. 4.
As illustrated, the low pressure difference linear voltage regulator includes：Error amplifying circuit 401, compensation circuit 402
With voltage regulator circuit 403.
Wherein, the input of error amplifying circuit 401 and low pressure difference linear voltage regulator output end be directly connected to or
Connected by feedback circuit, the output end of error amplifying circuit is connected with voltage regulator circuit 403.Error is put
Feedback voltage and reference voltage the progress difference that big circuit 401 is used for low pressure difference linear voltage regulator output end are put
Greatly, second voltage is exported.Specifically, error amplifying circuit 401 can be error amplification as shown in Figure 3
Circuit.
Compensation circuit 402, it is connected between error amplifying circuit 401 and voltage regulator circuit 403.Specifically
Ground, compensation circuit 402 can be compensation circuits as shown in Figure 3, including PMOS M2 and electric capacity
C2, PMOS M2 grid and the output end of error amplifying circuit are connected, and source electrode is connected with power supply,
Drain electrode is connected by the output end of electric capacity C2 and error amplifying circuit.Compensation circuit 402 act as producing
Zero point is to compensate the limit of the low pressure difference linear voltage regulator output end, as described in formula (2) to formula (5).
Voltage regulator circuit 403 is used for the voltage for adjusting the low pressure difference linear voltage regulator output end.Specifically,
Voltage regulator circuit 403 can be voltage regulator circuit as shown in Figure 3, including PMOS M1, PMOS
Pipe M1 grid can be connected with the output end of error amplifying circuit 401, and source electrode is connected with power supply, leakage
Output end of the pole as the low pressure difference linear voltage regulator.
Alternatively, the input of error amplifying circuit 401 can pass through differential circuit (being not shown)
It is connected with the low pressure difference linear voltage regulator output end or is connected by feedback circuit.The input of the differential circuit
It is connected with low pressure difference linear voltage regulator output end or is connected by feedback circuit, output end and error amplifying circuit
401 input connection.The differential circuit is used for the feedback voltage according to low pressure difference linear voltage regulator output end
First voltage is exported, the waveform of the first voltage can reflect the feedback voltage situation of change of output end.Specifically
Ground, the differential circuit can be differential circuits as shown in Figure 3, including amplifier A, resistance R3 and electricity
Hold C3, amplifier A in-phase input end and low pressure difference linear voltage regulator output end are directly connected to, Huo Zhetong
Cross feedback circuit to be connected with low pressure difference linear voltage regulator output end, amplifier A inverting input passes through electric capacity
C3 is grounded, and resistance R3 is connected between amplifier A inverting input and amplifier A output end.
The differential circuit can produce a zero point, to slow down the amplitude-versus-frequency curve of low pressure difference linear voltage regulator
Decline so that the amplitude-versus-frequency curve of low pressure difference linear voltage regulator and the intersection point of transverse axis are to the side away from origin
To movement, that is, the bandwidth of low pressure difference linear voltage regulator is increased, and then improve low pressure difference linear voltage regulator
Response speed, avoid the bit error rate from increasing, improve the stability of the low pressure difference linear voltage regulator.
Alternatively, buffer circuit can also be connected with (not between error amplifying circuit 401 and compensation circuit 402
Shown in figure), the buffer circuit is used for the second voltage that can be used for the output of tracking error amplifying circuit.Tool
Body, the buffer circuit can be buffer circuits as shown in Figure 3, including PMOS M3 and PMOS
Pipe M4, PMOS M3 grid are connected with bias voltage, and source electrode is connected with power supply, drain electrode with
PMOS M4 source electrode connection, the output end of PMOS M4 grid and the error amplifying circuit
Connection, grounded drain.
In the above embodiment of the present invention, pressure difference linear voltage regulator includes error amplifying circuit, compensation circuit and
Voltage regulator circuit, the compensation circuit, is connected between error amplifying circuit and voltage regulator circuit, compensation
Zero point caused by circuit can compensate the limit of low pressure difference linear voltage regulator output end, to improve low pressure difference linearity
The stability of voltage-stablizer.Compared with the mode in output resistance both ends parallel connection bulky capacitor, because bulky capacitor is in core
Occupied area is larger in piece, and therefore, low pressure difference linear voltage regulator provided in an embodiment of the present invention can also be saved
Chip area.
The present invention is produced with reference to method according to embodiments of the present invention, equipment (system) and computer program
The flow chart and/or block diagram of product describes.It should be understood that can by computer program instructions implementation process figure and
/ or each flow in block diagram and/or square frame and flow in flow chart and/or block diagram and/
Or the combination of square frame.These computer program instructions can be provided to all-purpose computer, special-purpose computer, insertion
Formula processor or the processor of other programmable data processing devices are to produce a machine so that pass through calculating
The instruction of the computing device of machine or other programmable data processing devices is produced for realizing in flow chart one
The device for the function of being specified in individual flow or multiple flows and/or one square frame of block diagram or multiple square frames.
These computer program instructions, which may be alternatively stored in, can guide computer or other programmable datas to handle and set
In the standby computer-readable memory to work in a specific way so that be stored in the computer-readable memory
Instruction produce and include the manufacture of command device, command device realization is in one flow or multiple of flow chart
The function of being specified in one square frame of flow and/or block diagram or multiple square frames.
These computer program instructions can be also loaded into computer or other programmable data processing devices, made
Obtain and series of operation steps is performed on computer or other programmable devices to produce computer implemented place
Reason, so as to which the instruction that is performed on computer or other programmable devices is provided for realizing in flow chart one
The step of function of being specified in flow or multiple flows and/or one square frame of block diagram or multiple square frames.
Although preferred embodiments of the present invention have been described, but those skilled in the art once know base
This creative concept, then other change and modification can be made to these embodiments.So appended right will
Ask and be intended to be construed to include preferred embodiment and fall into having altered and changing for the scope of the invention.
Obviously, those skilled in the art can carry out various changes and modification without departing from this hair to the present invention
Bright spirit and scope.So, if the present invention these modifications and variations belong to the claims in the present invention and
Within the scope of its equivalent technologies, then the present invention is also intended to comprising including these changes and modification.
Claims (16)
- A kind of 1. low pressure difference linear voltage regulator, it is characterised in that including：Differential circuit, error amplification electricity Road and voltage regulator circuit；The input of the differential circuit is directly connected to or passed through with the low pressure difference linear voltage regulator output end Feedback circuit is connected, and the output end of the differential circuit is connected with the input of the error amplifying circuit, institute Differential circuit is stated to be used to export first voltage according to the feedback voltage of the low pressure difference linear voltage regulator output end, The waveform of the first voltage reflects the feedback voltage situation of change of the output end；The output end of the error amplifying circuit is connected with the voltage regulator circuit, for the described first electricity Pressure and reference voltage carry out differential amplification, export second voltage；The voltage regulator circuit is used for defeated according to the second voltage regulation low pressure difference linear voltage regulator Go out the voltage at end.
- 2. low pressure difference linear voltage regulator as claimed in claim 1, it is characterised in that the differential circuit Including：Amplifier, resistance R3 and electric capacity C3；The in-phase input end of the amplifier is directly connected to the low pressure difference linear voltage regulator output end, or The in-phase input end of the amplifier is connected by feedback circuit with the low pressure difference linear voltage regulator output end； The inverting input of the amplifier is grounded by electric capacity C3；Resistance R3 is connected between the inverting input of the amplifier and the output end of the amplifier.
- 3. low pressure difference linear voltage regulator as claimed in claim 1, it is characterised in that the voltage-regulation Circuit includes PMOS M1, the output end of PMOS M1 grid and the error amplifying circuit Connection, source electrode are connected with power supply, the output end to drain as the low pressure difference linear voltage regulator.
- 4. low pressure difference linear voltage regulator as claimed any one in claims 1 to 3, it is characterised in that Compensation circuit, the compensation circuit are also associated between the error amplifying circuit and the voltage regulator circuit The limit of low pressure difference linear voltage regulator output end described in caused zero compensation.
- 5. low pressure difference linear voltage regulator as claimed in claim 4, it is characterised in that the compensation circuit Include：PMOS M2 and electric capacity C2；PMOS M2 grid and the output end of error amplifying circuit are connected, and source electrode is connected with power supply, Drain electrode is connected by the output end of electric capacity C2 and error amplifying circuit.
- 6. low pressure difference linear voltage regulator as claimed in claim 5, it is characterised in that PMOS M2 Resistance value and electric capacity C2 capacitance meet following relations：Rm=kRLC2=CL/kWherein, RmRepresent PMOS M2 resistance value, RLThe resistance value of load resistance is represented, k is Constant, C2Represent electric capacity C2 capacitance, CLRepresent the capacitance of the electric capacity in parallel with the load resistance.
- 7. low pressure difference linear voltage regulator as claimed in claim 4, it is characterised in that the error amplification Buffer circuit is also associated between circuit and the compensation circuit；The buffer circuit is used for the second voltage for following the error amplifying circuit output.
- 8. low pressure difference linear voltage regulator as claimed in claim 7, it is characterised in that the buffer circuit Include：PMOS M3 and PMOS M4；PMOS M3 grid is connected with bias voltage, and source electrode is connected with power supply, drain electrode and PMOS Pipe M4 source electrode connection；PMOS M4 grid is connected with the output end of the error amplifying circuit, grounded drain.
- A kind of 9. low pressure difference linear voltage regulator, it is characterised in that including：Error amplifying circuit, compensation electricity Road and voltage regulator circuit；The input of the error amplifying circuit and the low pressure difference linear voltage regulator output end be directly connected to or Connected by feedback circuit, the output end of the error amplifying circuit is connected with the voltage regulator circuit, institute Error amplifying circuit is stated for the feedback voltage and reference voltage to the low pressure difference linear voltage regulator output end Differential amplification is carried out, exports second voltage；The compensation circuit, it is connected between the error amplifying circuit and the voltage regulator circuit；It is described The limit of low pressure difference linear voltage regulator output end described in zero compensation caused by compensation circuit；The voltage regulator circuit is used for the voltage for adjusting the low pressure difference linear voltage regulator output end.
- 10. low pressure difference linear voltage regulator as claimed in claim 9, it is characterised in that the compensation circuit Include：PMOS M2 and electric capacity C2；PMOS M2 grid and the output end of error amplifying circuit are connected, and source electrode is connected with power supply, Drain electrode is connected by the output end of electric capacity C2 and error amplifying circuit.
- 11. low pressure difference linear voltage regulator as claimed in claim 10, it is characterised in that PMOS M2 resistance value and electric capacity C2 capacitance meet following relations：Rm=kRLC2=CL/kWherein, RmRepresent PMOS M2 resistance value, RLThe resistance value of load resistance is represented, is normal Number, C2Represent electric capacity C2 capacitance, CLRepresent the capacitance of the electric capacity in parallel with the load resistance.
- 12. low pressure difference linear voltage regulator as claimed in claim 9, it is characterised in that the voltage is adjusted Economize on electricity road includes PMOS M1, the output of PMOS M1 grid and the error amplifying circuit End connection, source electrode are connected with power supply, the output end to drain as the low pressure difference linear voltage regulator.
- 13. the low pressure difference linear voltage regulator as any one of claim 9 to 12, it is characterised in that The input of the error amplifying circuit connects by differential circuit and the low pressure difference linear voltage regulator output end Connect or connected by feedback circuit；The output end of the differential circuit is connected with the input of the error amplifying circuit, the differential circuit For exporting first voltage, first electricity according to the feedback voltage of the low pressure difference linear voltage regulator output end The waveform of pressure reflects the feedback voltage situation of change of the output end.
- 14. low pressure difference linear voltage regulator as claimed in claim 13, it is characterised in that the differential electricity Road, including：Amplifier, resistance R3 and electric capacity C3；The in-phase input end of the amplifier is directly connected to the low pressure difference linear voltage regulator output end, or The in-phase input end of the amplifier is connected by feedback circuit with the low pressure difference linear voltage regulator output end； The inverting input of the amplifier is grounded by electric capacity C3；Resistance R3 is connected between the inverting input of the amplifier and the output end of the amplifier.
- 15. low pressure difference linear voltage regulator as claimed in claim 16, it is characterised in that the error Buffer circuit is also associated between amplifying circuit and the compensation circuit；The buffer circuit is used for the second voltage for following the error amplifying circuit output.
- 16. low pressure difference linear voltage regulator as claimed in claim 15, it is characterised in that the buffering electricity Road includes：PMOS M3 and PMOS M4；PMOS M3 grid is connected with bias voltage, and source electrode is connected with power supply, drain electrode and PMOS Pipe M4 source electrode connection；PMOS M4 grid is connected with the output end of the error amplifying circuit, grounded drain.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201610384124.3A CN107450643A (en) | 2016-06-01 | 2016-06-01 | A kind of low pressure difference linear voltage regulator |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610384124.3A CN107450643A (en) | 2016-06-01 | 2016-06-01 | A kind of low pressure difference linear voltage regulator |
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| CN107450643A true CN107450643A (en) | 2017-12-08 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201610384124.3A Withdrawn CN107450643A (en) | 2016-06-01 | 2016-06-01 | A kind of low pressure difference linear voltage regulator |
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| CN108646835A (en) * | 2018-05-31 | 2018-10-12 | 湖南品腾电子科技有限公司 | A kind of low differential voltage linear voltage stabilizer circuit and power supply |
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Application publication date: 20171208 |