CN107426881B

CN107426881B - Integrator, LED current ripple cancellation circuit and method

Info

Publication number: CN107426881B
Application number: CN201710802581.4A
Authority: CN
Inventors: 江儒龙; 郜小茹
Original assignee: Shanghai Bright Power Semiconductor Co Ltd
Current assignee: Shanghai Bright Power Semiconductor Co Ltd
Priority date: 2017-09-07
Filing date: 2017-09-07
Publication date: 2023-09-22
Anticipated expiration: 2037-09-07
Also published as: CN107426881A

Abstract

The application provides an integrator, an LED current ripple eliminating circuit and method, an LED driver and an LED device, wherein the integrator comprises: the voltage comparison module is used for receiving the input voltage and the reference voltage, comparing the input voltage and the reference voltage and outputting corresponding logic signals according to the comparison result of the input voltage and the reference voltage; the counting module is used for counting according to the logic signals output by the voltage comparison module and generating digital control signals; the digital-to-analog conversion module is used for carrying out digital-to-analog conversion on the digital control signals output by the counting module to generate analog control signals. Compared with the related technology adopting the combination of the differential amplifier and the filter capacitor, the circuit has simple structure and higher integration level, particularly, the configuration of a large filter capacitor can be omitted, the simplification of a peripheral circuit is realized, the system cost is reduced, and the failure problem caused by the peripheral filter capacitor is thoroughly eliminated.

Description

Integrator, LED current ripple cancellation circuit and method

Technical Field

The application relates to the technical field of LED driving, in particular to an integrator, an LED current ripple eliminating circuit and method, an LED driver and LED equipment.

Background

LEDs (Light Emitting Diode, light emitting diodes) are used in a variety of electronic applications, for example: building lighting, automobile tail lights, backlight and flash lights of liquid crystal display devices including personal computers and high definition televisions, and the like. LEDs have significant advantages over conventional light sources such as incandescent and fluorescent lamps, including high efficiency, good directivity, color stability, high reliability, long life, small volume, and environmental safety.

LEDs are current-driven devices, and thus, adjusting the drive current through an LED is an important control technique. The driving power of the LED needs to meet some requirements, such as: the LED driving circuit can be used without faults for a long time, can be adjusted according to the change of the load of the LED, and does not generate stroboscopic phenomenon when the LED is driven. The existing LED driving power supplies are various in variety, but have various defects, such as low power factor, complex circuit, large volume, high cost and the like.

For example: in APFC BOOST drive power and LED stroboscopic applications, a loop with a bandwidth of 1/10 to 1/4 of the low frequency ripple frequency needs to be generated, and a large filter capacitor is usually required to be added to such a loop, and in practical circuits, such a filter capacitor is generally above 1 μf. The large filter capacitor cannot be realized in the chip, in practical application, the capacitor can only be externally arranged, and the system cost (such as the cost of the capacitor and corresponding pins which need to be reserved on the chip) and the failure risk are increased due to the externally added capacitor.

Disclosure of Invention

In view of the above-mentioned shortcomings of the prior art, the present application aims to disclose an integrator, an LED current ripple cancellation circuit, an LED current ripple cancellation method, an LED driver, an LED driving chip and an LED device, which are used for solving the problems of complex circuit structure, high cost, high failure risk and the like in the prior art.

To achieve the above and other related objects, a first aspect of the present application discloses an integrator comprising: the voltage comparison module is used for receiving input voltage and reference voltage, comparing the input voltage with the reference voltage and outputting corresponding logic signals according to the comparison result of the input voltage and the reference voltage; the counting module is connected with the voltage comparison module and used for counting according to the logic signals output by the voltage comparison module to generate digital control signals; the digital-to-analog conversion module is connected with the counting module and used for carrying out digital-to-analog conversion on the digital control signals output by the counting module to generate analog control signals.

In certain embodiments of the first aspect of the present application, the voltage comparison module outputs a corresponding logic signal according to a comparison result of the voltage comparison module and the voltage comparison module includes: outputting a first logic signal when the input voltage is greater than or equal to the reference voltage, and outputting a second logic signal when the input voltage is less than the reference voltage; the counting module counts according to the logic signals output by the voltage comparison module, and comprises: a first count is performed when the first logic signal is received and a second count is performed when the second logic signal is received.

In certain embodiments of the first aspect of the present application, the counting module counts according to the logic signal output by the voltage comparing module, including: the up-count is performed when a high level logic signal is received and the down-count is performed when a low level logic signal is received.

In certain embodiments of the first aspect of the present application, the number of up-counts and the number of down-counts are the same in one power frequency period, and the increasing amount and the decreasing amount of the digital control signal are equal.

In certain embodiments of the first aspect of the present application, the integrator further comprises a frequency generation module, connected to the counting module, for outputting a counting frequency to the counting module.

In certain embodiments of the first aspect of the present application, the frequency generating module is a voltage-controlled oscillator, and has two input terminals and an output terminal, wherein one input terminal is used for receiving the input voltage, the other input terminal is used for receiving the reference voltage, and the output terminal is used for outputting the counting frequency; the count frequency is generated using the following formula: f (F) _CLK ＝K*|V _IN -V _REF I, wherein F _CLK To count the frequency, V _IN For input voltage, V _REF K is the frequency modulation factor of the voltage controlled oscillator.

A second aspect of the present application is to disclose an LED current ripple cancellation circuit, comprising: the integrator is characterized in that the input voltage in the integrator is the difference value between the negative voltage of the LED load and a sampling voltage; the signal adjusting module is connected with the digital-to-analog conversion module in the integrator and the LED load and is used for adjusting the voltage or current of the LED load according to the analog control signal output by the digital-to-analog conversion module so that the average current of the LED load is kept stable.

In certain embodiments of the second aspect of the present application, the signal adjustment module includes an adjustment tube located between the LED load and ground, and a control end of the adjustment tube is connected to an output end of the digital-to-analog conversion module.

In some embodiments of the second aspect of the present application, the adjusting transistor is an NMOS transistor, a gate of the MOS transistor is connected to the output terminal of the digital-to-analog conversion module, and a drain of the NMOS transistor is connected to the negative terminal of the LED load and is used as the output terminal of the negative terminal voltage of the LED load.

In some embodiments of the second aspect of the present application, the signal adjustment module includes an amplifier and an adjustment tube, where the amplifier is connected to the digital-to-analog conversion module, and is configured to generate a voltage stabilizing signal after performing signal amplification processing according to an analog control signal and a sampling voltage output by the digital-to-analog conversion module, and the adjustment tube is electrically connected to the amplifier and the LED load, and is configured to adjust and stabilize a current of the LED load according to the voltage stabilizing signal.

In some embodiments of the second aspect of the present application, the amplifier is an operational amplifier, the adjusting tube is an NMOS transistor, wherein a gate of the NMOS transistor is connected to an output terminal of the operational amplifier, a drain of the NMOS transistor is connected to a negative terminal of the LED load and is used as an output terminal of a negative terminal voltage of the LED load, a source of the NMOS transistor is connected to a ground terminal through a sampling resistor and is used as an output terminal of the sampling voltage, a first input terminal of the operational amplifier is connected to an output terminal of the digital-to-analog conversion module, and a second input terminal of the operational amplifier is connected to a source of the NMOS transistor.

A third aspect of the present application is to disclose an LED ripple cancellation chip, comprising: an LED ripple cancellation circuit as described above or an integrator as described above.

A fourth aspect of the present application is to disclose an LED driver comprising: an integrator as described above, wherein the input voltage is the LED negative terminal voltage; the signal adjusting module is connected with the digital-to-analog conversion module in the integrator and the LED load and is used for adjusting the voltage or the current of the LED load according to the analog control signal output by the digital-to-analog conversion module so that the average current of the LED load is kept stable.

In some embodiments of the fourth aspect of the present application, the signal adjustment module includes a pulse width modulator and a switching tube, where the pulse width modulator is connected to the digital-to-analog conversion module, and is configured to perform pulse width modulation of a signal according to an analog control signal output by the digital-to-analog conversion module to generate a switching tube control signal, and the switching tube is connected to the pulse width modulator, and is configured to perform on/off operation according to the switching tube control signal output by the pulse width modulator.

In some embodiments of the fourth aspect of the present application, the pulse width modulator is a comparator, where a first input end of the comparator is connected to the digital-to-analog conversion module, and a second input end of the comparator is connected to a sawtooth wave or triangular wave signal, and the comparator is used for comparing the analog control signal output by the digital-to-analog conversion module with the sawtooth wave or triangular wave signal to generate a control signal, so as to adjust the on time of the switching tube.

In certain embodiments of the fourth aspect of the present application, the input voltage in the integrator is a voltage of a sampling resistor electrically connected to the LED load, and the other end of the sampling resistor is grounded.

A fifth aspect of the present application is to disclose an LED driving chip, comprising: an integrator as described above or an LED driver as described above.

A sixth aspect of the present application is to disclose an LED device comprising: an LED load; the input end of the rectifier bridge is electrically connected to an alternating current power supply and used for rectifying alternating current into direct current; the two ends of the first capacitor are respectively and electrically connected to two rectification branches connected in parallel in the rectification bridge and used for filtering direct current; the LED power supply comprises an energy storage inductor, a freewheeling diode and a second capacitor, wherein the second capacitor is connected with an LED load in parallel and then connected with the freewheeling diode and the energy storage inductor in series, and the other end of the energy storage inductor is coupled to one rectifying branch of the rectifying bridge; the LED driver is arranged between the LED load and the energy storage inductor and is used for adjusting and stabilizing the current of the LED load.

A seventh aspect of the present application is to disclose an LED device comprising: an LED load; the ripple removing capacitor is connected in parallel with the LED load; the LED constant current driving device is connected with the LED load and the ripple removing capacitor and is used for outputting a constant LED driving current; the LED current ripple eliminating circuit is arranged between the LED load and the LED constant current driving device.

An eighth aspect of the present application is to disclose a method for eliminating current ripple of an LED, comprising the steps of: obtaining input voltage related to an LED load, comparing the input voltage with a reference voltage and outputting a corresponding logic signal according to a comparison result of the input voltage and the reference voltage; counting based on the logic signal to generate a digital control signal; performing digital-to-analog conversion on the digital control signal to generate an analog control signal with gentle fluctuation; and adjusting the voltage or current of the LED load according to the analog control signal so as to keep the average current of the LED load stable.

In certain embodiments of the eighth aspect of the present application, the step of comparing the input voltage with a reference voltage and outputting a corresponding logic signal according to the comparison result of the input voltage and the reference voltage comprises: comparing the input voltage with a reference voltage, outputting a first logic signal when the input voltage is greater than or equal to the reference voltage, and outputting a second logic signal when the input voltage is less than the reference voltage; the step of counting based on the logic signals comprises a first counting based on the first logic signal and a second counting based on the second logic signal.

In certain embodiments of the eighth aspect of the present application, the step of counting based on the logic signal comprises counting up based on a high level logic signal and counting down based on a low level logic signal.

In certain embodiments of the eighth aspect of the present application, the number of up-counts and the number of down-counts are the same in one power frequency period, and the increasing amount and the decreasing amount of the digital control signal are equal.

In certain embodiments of the eighth aspect of the present application, the counting frequency on which the counting is based is generated using the following formula: f (F) _CLK ＝K*|V _IN -V _REF I, wherein F _CLK To count the frequency, V _IN For input voltage, V _REF K is the frequency modulation factor of the voltage controlled oscillator.

In certain embodiments of the eighth aspect of the present application, the step of obtaining an input voltage associated with the LED load comprises: detecting the voltage of the negative terminal of an LED load, and taking the difference value between the voltage of the negative terminal and a sampling voltage as an input voltage; alternatively, the negative terminal voltage of the LED load is detected and used as the input voltage.

The integrator, the LED current ripple eliminating circuit, the LED current ripple eliminating method, the LED driver, the LED driving chip and the LED equipment disclosed by the application are characterized in that input voltage and reference voltage are compared, corresponding logic signals are output according to the comparison result of the input voltage and the reference voltage, corresponding digital control signals are formed by counting according to the logic signals and counting frequency, and digital control signals are converted into analog control signals by digital-to-analog conversion.

Drawings

Fig. 1 is a schematic diagram of a circuit structure employing a large filter capacitor in the related art.

Fig. 2 shows a schematic circuit diagram of an integrator according to an embodiment of the present application.

Fig. 3 shows a schematic circuit diagram of an integrator according to another embodiment of the present application.

Fig. 4 is a schematic circuit diagram of the integrator in fig. 3 in an embodiment.

Fig. 5 shows a timing diagram of the signals of fig. 4.

Fig. 6 shows a schematic diagram of an LED device according to the application in an embodiment.

Fig. 7 shows a schematic view of an LED device according to the application in another embodiment.

Fig. 8 is a structural view showing the LED device shown in fig. 6 in an embodiment.

Fig. 9 is a schematic circuit diagram of the LED device in fig. 8 in an embodiment.

Fig. 10 is a schematic flow chart of an LED current ripple cancellation method according to an embodiment of the application.

Fig. 11 shows a structural view of an LED device of the present application in another embodiment.

Fig. 12 is a schematic circuit diagram of the LED device in fig. 11 in an embodiment.

Detailed Description

Further advantages and effects of the present application will become apparent to those skilled in the art from the disclosure of the present application, which is described by the following specific examples.

In the following description, reference is made to the accompanying drawings which describe several embodiments of the application. It is to be understood that other embodiments may be utilized and that mechanical, structural, electrical, and operational changes may be made without departing from the spirit and scope of the present application. The following detailed description is not to be taken in a limiting sense, and the scope of embodiments of the present application is defined only by the claims of the issued patent. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. Spatially relative terms, such as "upper," "lower," "left," "right," "lower," "upper," and the like, may be used herein to facilitate a description of one element or feature as illustrated in the figures as being related to another element or feature.

Although the terms first, second, etc. may be used herein to describe various elements in some examples, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, the first preset threshold may be referred to as a second preset threshold, and similarly, the second preset threshold may be referred to as a first preset threshold, without departing from the scope of the various described embodiments. The first preset threshold and the preset threshold are both described as one threshold, but they are not the same preset threshold unless the context clearly indicates otherwise. Similar situations also include a first volume and a second volume.

Furthermore, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context indicates otherwise. It will be further understood that the terms "comprises," "comprising," "includes," and/or "including" specify the presence of stated features, steps, operations, elements, components, items, categories, and/or groups, but do not preclude the presence, presence or addition of one or more other features, steps, operations, elements, components, items, categories, and/or groups. The terms "or" and/or "as used herein are to be construed as inclusive, or meaning any one or any combination. Thus, "A, B or C" or "A, B and/or C" means "any of the following: a, A is as follows; b, a step of preparing a composite material; c, performing operation; a and B; a and C; b and C; A. b and C). An exception to this definition will occur only when a combination of elements, functions, steps or operations are in some way inherently mutually exclusive.

The inventors of the present application have found that it is desirable to create a loop with a low ripple frequency bandwidth of 1/10 to 1/4 of the associated LED driving technology, where a large filter capacitor is added to achieve such a low bandwidth. Referring to fig. 1, a schematic circuit structure of a related art using a large filter capacitor is shown. In the related art, the circuit includes a differential amplifier EA and a filter capacitor C. The differential amplifier EA is essentially a transconductance amplifier, and its two input terminals respectively receive the input voltage V _IN And reference voltage V _REF Can input voltage V _IN And reference voltage V _REF The resulting input differential voltage being converted into an output current, i.e. the output current being proportional to the input voltage V _IN With reference voltage V _REF Is a voltage difference of (a). The current output by the differential amplifier EA can charge and discharge the filter capacitor C. Specifically, when the input voltage V _IN Greater than or equal to reference voltage V _REF When the differential amplifier EA outputs current, the filter capacitor C is discharged, and the COMP voltage at the output end of the differential amplifier EA is slowly reduced; input voltage V _IN Less than the reference voltage V _REF At this time, the current output from the differential amplifier EA charges the filter capacitor C, and the COMP voltage gradually increases. Because of the large compensation capacitance, the loop bandwidth is slow, COMP changes slowly, and remains substantially unchanged during a common frequency period. However, such a large filter capacitor (the filter capacitor generally has a size of more than 1 μf) cannot be integrated in the relevant control chip, but can only be connected to the relevant control chip in an external manner, which increases the complexity of the whole circuit structure and increases the overall application cost (such as the cost of the filter capacitor and the corresponding pins on the chip). In view of this, the inventors of the present application have proposed an integrator capable of avoiding the adoption of a large-capacitance external mode, and an LED current ripple cancellation circuit, an LED current ripple cancellation method, an LED ripple cancellation chip, an LED driver and LED driving chip, and an LED device provided with the integrator, for the related art.

The application provides in one aspect an integrator comprising a voltage comparison module, a counting module, and a digital to analog conversion module.

The voltage comparison module can be used for receiving the input voltage and the reference voltage, comparing the received input voltage with the reference voltage and outputting corresponding logic signals according to the comparison result of the input voltage and the reference voltage. In this embodiment, please refer to fig. 2, which shows a schematic circuit diagram of an integrator according to an embodiment of the present application. As shown in fig. 2, the voltage comparison module 11 is configured to receive an input voltage V _IN And reference voltage V _REF Will input voltage V _IN With reference voltage V _REF And comparing and outputting corresponding logic signals according to the comparison result of the two. In practical application, the input voltage V _IN With reference voltage V _REF Comparing and according to the input voltage V _IN With reference voltage V _REF Outputting the corresponding logic signal may for example comprise: when the input voltage V _IN Greater than or equal to reference voltage V _REF When the voltage comparison module 11 outputs a first logic signal; while at the input voltage V _IN Less than the reference voltage V _REF When the voltage comparison module 11 outputs the second logic signal. In an embodiment, the voltage comparison module 11 outputting the corresponding logic signal according to the comparison result of the two may include: at input voltage V _IN Greater than or equal to reference voltage V _REF Outputs a logic signal of high level when the voltage V is input _IN Less than the reference voltage V _REF A low logic signal is output. In another embodiment, the voltage comparison module 11 outputting the corresponding logic signal according to the comparison result of the two may include: at input voltage V _IN Greater than or equal to reference voltage V _REF Outputs a logic signal of low level when the voltage V is input _IN Less than the reference voltage V _REF A high logic signal is output.

The counting module is connected with the voltage comparison module and used for counting according to the logic signals output by the voltage comparison module to generate digital control signals. In this embodiment, as shown in fig. 2, the counting module 12 is connected to the voltage comparing module 11, and is configured to receive the logic signal output from the voltage comparing module 11 and count according to the logic signal, thereby generating a digital control signal. In correspondence with the foregoing, in practical application, the counting module 12 counts according to the logic signal output by the voltage comparing module 11 may include, for example: the first count is performed when the first logic signal output from the voltage comparison module 11 is received, the second count is performed when the second logic signal output from the voltage comparison module 11 is received, and the digital control signal having a certain duty ratio is generated by the first count and the second count. In an embodiment, the counting module 12 counts according to the logic signal output by the voltage comparing module 11 may include: the up-count is performed when a high level logic signal is received and the down-count is performed when a low level logic signal is received. Of course, the invention is not limited thereto, and in another embodiment, the counting module 12 may also count according to the logic signal output by the voltage comparing module 11, which includes: the up-count is performed when a low level logic signal is received and the down-count is performed when a high level logic signal is received.

The digital-to-analog conversion module is connected with the counting module and is used for carrying out digital-to-analog conversion on the digital control signal output by the counting module to generate an analog control signal. In this embodiment, as shown in fig. 2, the digital-to-analog conversion module 14 is connected to the counting module 12, and is configured to perform digital-to-analog conversion on the digital control signal output by the counting module 12 to generate an analog control signal. The analog control signal output by the digital-to-analog conversion module 14 is a reference voltage V _REF The low-frequency signal with gradual fluctuation can be said to form an analog control signal with gradual fluctuation in the power frequency period.

In another embodiment, the integrator provided by the application can further comprise a frequency generation module besides the voltage comparison module, the counting module and the digital-to-analog conversion module. The frequency generation module is connected with the counting module and is used for outputting counting frequency to the counting module. Referring to fig. 3, a schematic circuit diagram of an integrator according to another embodiment of the present application is shown. As shown in fig. 3, the integrator of the present application includes: a voltage comparison module 11, a counting module 12, a frequency generation module 13, and a digital-to-analog conversion module 14.

In the present embodiment, the voltage comparison module 11 is configured to receive an input voltage V _IN And reference voltage V _REF Will input voltage V _IN With reference voltage V _REF And comparing and outputting corresponding logic signals according to the comparison result of the two. In one embodiment, the voltage comparison module 11 compares the input voltage V _IN With reference voltage V _REF Comparing and according to the input voltage V _IN With reference voltage V _REF Outputting the corresponding logic signal may include: will input voltage V _IN With reference voltage V _REF Comparing when the input voltage V _IN Greater than or equal to reference voltage V _REF Outputs a high level logic signal, andwhen the input voltage V _IN Less than the reference voltage V _REF A low logic signal is output. Of course, in another embodiment, the voltage comparison module 11 outputting the corresponding logic signal according to the comparison result of the two may also include: at input voltage V _IN Greater than or equal to reference voltage V _REF Outputs a logic signal of low level when the voltage V is input _IN Less than the reference voltage V _REF A high logic signal is output.

The frequency generation module 13 is connected to the counting module 12, and is configured to output a counting frequency to the counting module 12, so that the counting module 12 can perform corresponding counting according to the counting frequency. In one embodiment, the count frequency generated by the frequency generation module 13 is equal to the input voltage V _IN And reference voltage V _REF In relation, for example, the count frequency generated by the frequency generation module 13 is related to the input voltage V _IN And reference voltage V _REF The pressure difference between the two is in direct proportion, namely: input voltage V _IN And reference voltage V _REF The greater the pressure difference between the two, the higher the count frequency generated; input voltage V _IN And reference voltage V _REF The pressure difference between the two is smaller, and the generated counting frequency is lower.

The counting module 12 is connected to the voltage comparing module 11 and the frequency generating module 13, and is configured to receive the logic signal output from the voltage comparing module 11 and the counting frequency of the frequency generating module 13 and count accordingly, thereby generating a digital control signal. In one embodiment, counting module 12 counts according to logic signals and count frequency may include: when the logic signal output by the voltage comparison module 11 is received as a high-level logic signal, counting is performed; when the logic signal output by the voltage comparison module 11 is received as a low level logic signal, a down-count is performed. And, when counting, the counting duration is inversely related to the counting frequency, namely: the higher the count frequency, the shorter the count duration; the lower the count frequency, the longer the count duration. Thus, the input voltage V is combined with the above _IN And reference voltage V _REF Two parameters, counting according to logic signal and counting frequencyThe resulting trend is: if the input voltage V _IN Greater than or equal to reference voltage V _REF Count up is performed and if the voltage V is input _IN With reference voltage V _REF The greater (or smaller) the pressure difference between them, the higher (or lower) the counting frequency at which the counting is performed; if the input voltage V _IN Less than the reference voltage V _REF Then count down is performed, and if the input voltage V _IN With reference voltage V _REF The greater (or lesser) the pressure difference between, the higher (or lower) the count frequency at which the count down is performed. In this way, the digital control signal generated by the counting module 12 after counting is not only adapted to the input voltage V _IN With reference voltage V _REF The result of the comparison between the voltage and the input voltage V _IN With reference voltage V _REF Is related to the pressure difference.

The digital-to-analog conversion module 14 is connected with the counting module 12, and is used for performing digital-to-analog conversion on the digital control signal output by the counting module 12 to generate an analog control signal. The analog control signal output by the digital-to-analog conversion module 14 is a reference voltage V _REF The low-frequency signal with gradual fluctuation can be said to form an analog control signal with gradual fluctuation in the power frequency period.

The application provides an integrator, which is a circuit capable of executing integral operation, wherein an analog control signal output by the integrator is the integral of an input signal, and the analog control signal can be made to be relative to a reference voltage V by utilizing a voltage comparison module, a frequency generation module, a counting module and a digital-to-analog conversion module _REF The low-frequency signal with the fluctuation and the slow variation is used for filtering out the high-frequency component in the input signal.

Referring to fig. 4, a schematic circuit diagram of the integrator in fig. 3 is shown in an embodiment.

In the embodiment of fig. 4, the voltage comparison module 11 may employ, for example, a voltage comparator, with a non-inverting input terminal of the voltage comparator 11 for receiving the input voltage V _IN The inverting input of the voltage comparator 11 is used for receiving a preset reference voltage V _REF . Specifically, the voltage comparator 11 receives the input voltage V _IN With reference electricityPressure V _REF And comparing and outputting the first logic signal or the second logic signal according to the comparison result. Specifically, the voltage comparator 11 outputs the first logic signal or the second logic signal according to the comparison result, and the method specifically includes: when the input voltage V _IN Is greater than or equal to the reference voltage V _REF The first logic signal is output as a high level (the first logic signal may be, for example, a "1" logic signal, and the first logic signal at the high level may be simply referred to as a high level logic signal); when the input voltage V _IN Is less than the reference voltage V _REF The second logic signal is output as a low level (the second logic signal may be, for example, a "0" logic signal, and the second logic signal at the low level may be simply referred to as a low level logic signal). Of course, the voltage comparator 11 inputs the voltage V _IN With reference voltage V _REF Is illustrative only and is not intended to limit the scope of the present application, e.g., in other embodiments, the inverting input of the voltage comparator 11 is used to receive the input voltage V _IN The non-inverting input of the voltage comparator 11 is for receiving a predetermined reference voltage V _REF Thus, when the voltage V is input _IN Is greater than or equal to the reference voltage V _REF The first logic signal with low level (for example, the first logic signal may be a "0" logic signal, and the first logic signal with low level may be simply referred to as a low level logic signal); when the input voltage V _IN Is less than the reference voltage V _REF The second logic signal of high level (the second logic signal may be, for example, "1" logic signal, and the second logic signal of high level may be simply referred to as "high level logic signal") is output. Essentially, the input voltage V is input by means of a voltage comparator 11 _IN With reference voltage V _REF The comparison and the output of corresponding logic signals according to the comparison result of the two are actually an important device for analog-to-digital conversion of signals.

In the embodiment of fig. 4, the frequency generation module 13 may employ, for example, a Voltage-controlled oscillator (VCO) 13 having two inputs and an output, wherein one input is for receiving the inputVoltage V of _IN Another input terminal for receiving a reference voltage V _REF The output end is used for outputting the counting frequency. Since the two inputs of the voltage-controlled oscillator 13 receive an input voltage V _IN And reference voltage V _REF Therefore, the output count frequency is: f (F) _CLK ＝K*|V _IN -V _REF I, wherein F _CLK To count the frequency, V _IN For input voltage, V _REF K is the frequency modulation factor of the voltage controlled oscillator. It can be seen that the output frequency of the voltage-controlled oscillator 13 is equal to the input voltage V _IN With reference voltage V _REF The voltage difference between them being proportional, i.e. if the input voltage V _IN With reference voltage V _REF The greater the pressure difference between them, the higher the output frequency; if the input voltage V _IN With reference voltage V _REF The smaller the pressure difference between them, the lower the output frequency.

In the embodiment of fig. 4, the counting module 12 may for example employ an up-down counter, the up-down counter 12 being connected to the voltage comparator 11 and the voltage controlled oscillator 13 for up-counting according to the count frequency output by the voltage controlled oscillator 13 when receiving the high level logic signal output by the voltage comparator 11 and down-counting according to the count frequency output by the voltage controlled oscillator 13 when receiving the low level logic signal output by the voltage comparator 11. Of course, the up-down counter 12 counts up the high level logic signals and counts down the low level logic signals is only illustrative, and is not intended to limit the scope of the present application. Since the up-down counter 12 performs up-down counting is an AND logic signal (the logic signal is an AND input voltage V _IN And reference voltage V _REF Is related to the comparison result of (a) the count frequency (the count frequency is related to the input voltage V) _IN And reference voltage V _REF The correlation of the voltage difference between them), whereby the digital control signal generated by the counting module 12 as a whole can be adapted to not only the input voltage V _IN With reference voltage V _REF The result of the comparison between the voltage and the input voltage V _IN With reference voltage V _REF Is related to the pressure difference. From the above, by setting a suitable reference voltage V _REF Can make the output signal be a reference voltage V _REF Low-frequency signal with fluctuation and slow variation is used for filtering original input signal V _IN Possibly high frequency components.

In the embodiment of fig. 4, the digital-to-analog conversion module 14 may employ a conventional digital-to-analog converter (Digital to Analog Converter, abbreviated as DAC), and the digital-to-analog converter 14 is connected to the up-down counter 12 for performing digital-to-analog conversion on the digital control signal outputted by the up-down counter 12 for performing up-counting and down-counting to generate the analog control signal V _COMP 。

Referring to fig. 5, a timing diagram of the signals in fig. 4 is shown. As shown in fig. 5, the voltage comparator 11 receives an input voltage V _IN And a preset reference voltage V _REF Comparing when the input voltage V _IN Greater than or equal to reference voltage V _REF When a high level logic signal is outputted (for example, a high level logic signal is outputted as "1"), a voltage V is inputted _IN Less than the reference voltage V _REF When the low level logic signal is output (for example, the low level logic signal is output "0"). The up-down counter 12 counts up when receiving the high level logic signal, and the count frequency of the up-down counter is equal to the input voltage V _IN And reference voltage V _REF The voltage difference between them being proportional, i.e. if the input voltage V _IN With reference voltage V _REF The greater the pressure difference, the higher the count-up frequency; if the input voltage V _IN With reference voltage V _REF The smaller the pressure difference, the lower the count-up frequency. The up-down counter 12 performs down-counting when receiving the low level logic signal, and the count frequency of the down-counting is equal to the input voltage V _IN And reference voltage V _REF The voltage difference between them being proportional, i.e. if the input voltage V _IN With reference voltage V _REF The greater the pressure differential, the higher the count-down frequency; if the input voltage V _IN With reference voltage V _REF The smaller the pressure difference, the lower the count-down frequency. This characteristic is shown in FIG. 5, and it can be seen that the digital control signal outputted after up-down counting by up-down counter 12, if the input voltage V _IN With reference voltage V _REF The larger the pressure difference is, the higher the counting frequency is, the shorter the counting duration is, the shorter the waveform of the formed digital control signal is on the transverse time axis, and the whole waveform is steeper; if the input voltage V _IN With reference voltage V _REF The smaller the differential pressure, the lower the count frequency, the longer the count duration, and the longer the waveform of the formed digital control signal on the lateral time axis, the flatter the waveform overall. For a single count, the time of the waveform of the digital control signal formed on the time axis is inversely proportional to the count frequency. When the digital control signal is in a stable state, the number of the up-counts and the number of the down-counts are the same in one power frequency period, and the increment and the decrement of the formed digital control signal are equal. Digital-to-analog converter 14 outputs analog control signal V _COMP It can be seen that when the voltage V is input _IN Greater than or equal to reference voltage V _REF Analog control signal V obtained at that time _COMP Is a boost signal, when the input voltage V _IN Less than the reference voltage V _REF Analog control signal V obtained at that time _COMP Then it is a buck signal. As can be seen from fig. 5, in one power frequency period, the number of up-counts and the number of down-counts are the same, so that the control signal V is output by the dac 14 after the digital-analog conversion _COMP The increase and decrease in one power frequency cycle are also equal. In general, the analog control signal V _COMP The change is gentle, and thus the analog control signal V can be considered _COMP Is stable in the power frequency period.

As can be seen from the above, the integrator provided by the application adopts the voltage comparison module, the frequency generation module, the counting module and the digital-to-analog conversion module, the voltage comparison module is used for comparing the input voltage with the reference voltage and outputting corresponding logic signals according to the comparison result of the voltage comparison module and the reference voltage, the counting module counts according to the logic signals output by the voltage comparison module and the counting frequency output by the frequency generation module to form corresponding digital control signals, and the digital-to-analog conversion module carries out digital-to-analog conversion on the digital control signals output by the counting module to form analog control signals.

Referring to fig. 6, a schematic diagram of an LED device according to an embodiment of the application is shown. As shown in fig. 6, the LED device of the present application includes: the LED constant current driving device comprises an LED load 10, a ripple removing capacitor C0, an LED constant current driving device 20 and an LED current ripple eliminating chip 30.

The LED load 10 may be composed of one LED lamp or a plurality of LED lamps, and may provide illumination and indication for flashing.

The ripple removing capacitor C0 is connected in parallel to the LED load 10, specifically, a first end of the ripple removing capacitor C0 is connected to a positive end of the LED load 10, and a second end of the ripple removing capacitor C0 is connected to a ground end.

The LED constant current driving device 20 is used to supply an input current. The LED constant current driving device 20 outputs a current signal containing a power frequency ripple, and the current signal containing the ripple generates a voltage signal containing the power frequency ripple on the ripple removing capacitor C0. In the present embodiment, the LED constant current driving device 20 may be, for example, an active power factor correction LED driver.

"power factor" in power factor correction (Power Factor Correction, abbreviated PFC) refers to the relationship between effective power and total power consumption (apparent power), i.e., the ratio of effective power divided by total power consumption (apparent power). Basically, the power factor can measure the extent to which power is effectively utilized, and when the power factor value is larger, the power utilization rate is represented to be higher. Current PFC technology mainly includes passive PFC (also known as passive PFC) and active PFC (also known as active PFC, active Power Factor Correction, APFC). Passive PFC technology is bulky, requiring additional components to better modify the current waveform, enabling power factors of about 0.8 or higher to be achieved, among others. In lower power applications of less than 5W to 40W, almost standard choice flyback topologies require only passive components and minor circuit modifications to achieve a power factor of greater than 0.7. Active PFC technology is typically added to the circuit as a special power conversion section to alter the input current waveform. The input end of the low-power-factor LED power supply is connected with the large-capacitance filtering, so that the output ripple voltage is very small, the stroboscopic effect of the LED lamp is very small and even near to zero, the LED lamp without the stroboscopic effect can not cause people to feel dizziness, meanwhile, the discomfort of eyes caused by long-time work can be reduced, the large capacitance of the input end can reduce the stroboscopic effect, meanwhile, the power factor can be reduced, the low-power-factor power supply can not only accelerate the loss of a circuit, but also increase the burden of a power supply transformer, and the conveying capacity of the whole power grid and the quality of the power grid are greatly weakened. Active PFC typically provides boost, with PFC output voltages ranging up to dc 450Vdc to 277Vdc over a wide input range of ac 100Vac to 277 Vac. In active PFC, a special DC-DC converter needs to be provided to provide current stabilization, i.e.: the DC-DC converter is connected between the rectifier and the load, and a current feedback technology is applied to enable the input end current waveform to track the alternating current input sinusoidal voltage waveform, so that the input end current waveform can be made to be close to a sinusoidal wave, and the total harmonic distortion THD of the input end current is made to be less than 5%, and thus, the power factor can be improved to 0.9 or even higher. The common active power factor correction circuits are divided into two types of continuous current mode control type and discontinuous current mode control type, wherein the continuous current mode control type mainly comprises a Boost type (Boost), a Buck type (Buck) and a Boost type (Buck-Boost). For Boost-type (Boost) control circuits, in one embodiment, may include, for example: the device comprises a rectifier bridge, a filter capacitor, an energy storage inductor, a freewheeling diode and the like, wherein the input end of the rectifier bridge is electrically connected to an alternating current power supply and is used for rectifying alternating current into direct current; the two ends of the filter capacitor are respectively and electrically connected to two rectification branches connected in parallel in the rectification bridge, and are used for filtering direct current so as to inhibit radio frequency interference (Radio Frequency Interference, RFI for short) and electromagnetic interference (Electromagnetic Interference, EMI for short) noise and prevent high-frequency transient impact of a power grid on a main circuit; the energy storage inductor is connected to one rectifying branch of the rectifying bridge and mainly plays a role in energy storage, and ripple output of current can be reduced. Discontinuous current mode control types include Forward type (Forward) and flyback type (Fly-back). The high-power-factor LED power supply has high power factor, reduces the burden of a power grid, and reduces the cost of a line path, however, the output current of the high-power-factor LED power supply contains a power frequency ripple component of 100HZ/120HZ (for example, the power grid frequency is 50Hz, the output current of the high-power-factor LED power supply contains 100Hz ripples, the current in an LED lamp also contains 100Hz ripples, so that the light output contains 100Hz stroboscopic light), and the LED lamp with the high power factor can cause visual fatigue of people after long-time use and influence the health of eyes although the naked eyes can not feel the stroboscopic light.

An LED current ripple cancellation chip 30 is located between the LED driver 20 and the LED load 10. In the present embodiment, the LED current ripple cancellation chip 30 includes at least: a power source terminal HV, a voltage adjusting terminal Drain, a current detecting terminal CS, and a ground terminal connection terminal GND. The power supply terminal HV is connected to the positive terminal of the LED load 10 for obtaining a power supply voltage to supply power to various circuits or components applied to the LED current ripple cancellation chip 30. Further, the power source HV may be further connected to the positive terminal of the LED load 10 through a start resistor R0. The voltage adjustment terminal Drain is connected to the negative terminal of the LED load 10, and is used for detecting and acquiring the negative terminal voltage of the LED load 10. The current detection terminal CS can pass through a sampling resistor R _CS And is connected to ground and outputs a sampled voltage. The ground connection GND is connected to the ground. The LED current ripple cancellation chip 30 generates a stable analog control signal according to a comparison result of the negative terminal voltage and a preset reference voltage by detecting the negative terminal voltage of the LED load 10, so as to control the LED load to obtain a stable driving current, thereby canceling the current ripple of the LED load and keeping the average current of the LED load stable.

As can be seen from fig. 6, in the LED device of the present application, the LED current ripple cancellation chip 30 is configured to detect the negative terminal voltage of the LED load 10 and dynamically generate an analog control signal according to the change state of the negative terminal voltage, for controlling the driving current of the LED load, so that the LED load obtains a stable driving current, thereby canceling the current ripple of the LED load. Compared with the conventional related art, the LED current ripple cancellation chip 30 can dispense with the configuration of a large filter capacitor, thereby simplifying the peripheral circuit, reducing the system cost and thoroughly eliminating the failure problem caused by the peripheral filter capacitor.

It should be noted that fig. 6 is only an exemplary illustration, but is not intended to limit the scope of the present application, for example, refer to fig. 7, which shows a schematic diagram of an LED device according to another embodiment of the present application. As shown in fig. 7, in this other embodiment, the LED current ripple cancellation chip 30 in the LED device includes at least: a power source terminal HV, a voltage adjusting terminal Drain, a current detecting terminal CS, and a ground terminal GND. The power source HV is connected to the negative terminal of the LED load 10, and is used to obtain a power voltage to provide a power supply to each circuit or component in the LED current ripple cancellation chip 30. The voltage adjustment terminal Drain is connected to the negative terminal of the LED load 10, and is used for detecting and acquiring the negative terminal voltage of the LED load 10 as an input voltage. The current detection terminal CS can pass through a sampling resistor R _CS And is connected to ground and outputs a sampled voltage. The ground connection GND is connected to the ground. In the LED device shown in fig. 7, the power supply end HV is connected to the negative terminal of the LED load 10, and the voltage adjustment end Drain is connected to the negative terminal of the LED load 10, so that, for the LED current ripple cancellation chip 30, the pins of the power supply end HV can be multiplexed with the pins of the voltage adjustment end Drain, which can simplify the circuit and chip structure, and reduce the design and manufacturing costs.

With continued reference to fig. 8, a block diagram of the LED device of fig. 6 in one embodiment is shown. As shown in fig. 8, in the present embodiment, the LED device of the present application includes: the LED load 10, the ripple removing capacitor C0, the LED constant current driving device 20 and the LED current ripple eliminating circuit are integrated in an LED ripple eliminating chip.

The LED driver 20 is used to provide an input current. The LED driver 20 outputs a current signal containing a power frequency ripple, which generates a voltage signal containing a power frequency ripple on the ripple removing capacitor C0. In this embodiment, the LED driver may be, for example, an active power factor correction LED driver.

The LED current ripple eliminating chip is internally provided with a power supply circuit and an LED current ripple eliminating circuit.

The power supply circuit is connected with the LED load 10 and the LED driver 20, and is used for generating a power supply applied to each circuit or component in the LED current ripple cancellation chip 30. Further, in an embodiment, the power supply circuit may further include at least an under-voltage lockout circuit (Under Voltage Lock-Out, UVLO) and a bias and reference voltage generation circuit.

The UVLO is an under-voltage locking circuit, and is used for ensuring that once the power supply voltage is lower than the starting threshold voltage of the LED current ripple cancellation chip, the system is closed in a controlled manner, so that unstable oscillation is not generated or under-voltage condition is not entered, and the LED current ripple cancellation chip is not damaged when the power supply voltage is insufficient. For more stable operation, some DC/DC converters have UVLO functionality. After the power is turned on, the UVLO function puts the internal circuit in standby state until the input voltage (V _IN ) The UVLO voltage is reached, so that the current consumption is reduced and misoperation is avoided.

The bias and reference voltage generating circuit is connected with the under-voltage locking circuit and is used for generating corresponding bias voltage V _bias And/or reference voltage V _REF . In one particular example, the bias and reference voltages may generate a bias voltage V _bias . In another embodiment, the bias and reference voltages may generate reference voltage V _REF . In yet another example, the bias and reference voltages may generate a bias voltage V _bias And reference voltage V _REF 。

The LED current ripple cancellation circuit may include the aforementioned integrator, which may include: a voltage comparison module 11, a counting module 12, a frequency generation module 13, and a digital-to-analog conversion module 14. In addition, the LED current ripple cancellation circuit may further include a signal adjustment module connected to the integrator and the LED load 10, for adjusting the voltage or current of the LED load 10 according to the analog control signal output from the integrator, so that the average current of the LED load 10 remains stable.

The voltage comparison module can be used for receiving the input voltage and the reference voltage, comparing the received input voltage with the reference voltage and outputting corresponding logic signals according to the comparison result of the input voltage and the reference voltage. As shown in fig. 8, in the present embodiment, the voltage comparison module 11 is configured to receive an input voltage V _IN And reference voltage V _REF Will input voltage V _IN With reference voltage V _REF And comparing and outputting corresponding logic signals according to the comparison result of the two. It should be noted that, in the present embodiment, the input voltage received by the voltage comparison module 11 may be, for example, a difference between the negative voltage of the LED load 10 and a sampling voltage. In practical application, the input voltage V _IN With reference voltage V _REF Comparing and according to the input voltage V _IN With reference voltage V _REF Outputting the corresponding logic signal may for example comprise: when the input voltage V _IN Greater than or equal to reference voltage V _REF When the voltage comparison module 11 outputs a first logic signal; while at the input voltage V _IN Less than the reference voltage V _REF When the voltage comparison module 11 outputs the second logic signal. In an embodiment, the voltage comparison module 11 outputting the corresponding logic signal according to the comparison result of the two may include: at input voltage V _IN Greater than or equal to reference voltage V _REF Outputs a logic signal of high level when the voltage V is input _IN Less than the reference voltage V _REF A low logic signal is output. In another embodiment, the voltage comparison module 11 outputting the corresponding logic signal according to the comparison result of the two may include: at input voltage V _IN Greater than or equal to reference voltage V _REF Outputs a logic signal of low level when the voltage V is input _IN Less than the reference voltage V _REF A high logic signal is output.

The frequency generation module is connected with the counting module and is used for outputting counting frequency to the counting module so that the counting module can count correspondingly according to the counting frequency. As shown in fig. 8, in the present embodiment, the frequency generating module 13 is connected to the counting module 12, and is configured to output the counting frequency to the counting module 12, so that the counting module 12 can perform corresponding counting according to the counting frequency. In practical application, the counting frequency generated by the frequency generation module 13 is equal to the input voltage V _IN And reference voltage V _REF In relation, for example, the count frequency generated by the frequency generation module 13 is related to the input voltage V _IN And reference voltage V _REF The pressure difference between the two is in direct proportion, namely: input voltage V _IN And reference voltage V _REF The greater the pressure difference between the two, the higher the count frequency generated; input voltage V _IN And reference voltage V _REF The pressure difference between the two is smaller, and the generated counting frequency is lower.

The counting module is connected with the voltage comparison module and the frequency generation module and is used for receiving the logic signals output by the voltage comparison module and the counting frequency of the frequency generation module and counting according to the logic signals and the counting frequency, so that a digital control signal is generated. In the present embodiment, as shown in fig. 8, the counting module 12 is connected to the voltage comparing module 11 and the frequency generating module 13, and is configured to receive the logic signal output from the voltage comparing module 11 and the counting frequency of the frequency generating module 13 and count the logic signal accordingly, thereby generating a digital control signal. In practical applications, receiving the logic signal output from the voltage comparison module and the counting frequency of the frequency generation module and counting according to the frequency may include, for example: the up-count is performed when a high level logic signal is received and the down-count is performed when a low level logic signal is received. Accordingly, counting by the counting module 12 according to the logic signal and the counting frequency may include: when the logic signal output by the voltage comparison module 11 is received as a high-level logic signal, counting is performed; when the logic signal output by the voltage comparison module 11 is received as a low level logic signal, a down-count is performed. And, in the process of When counting, the counting duration is inversely related to the counting frequency, namely: the higher the count frequency, the shorter the count duration; the lower the count frequency, the longer the count duration. Thus, the input voltage V is combined with the above _IN And reference voltage V _REF The two parameters, the general trend of counting according to the logic signal and the counting frequency, may include the following cases. In one case, if the input voltage V _IN Greater than or equal to reference voltage V _REF Outputting a high level logic signal, counting up, and if the input voltage V _IN With reference voltage V _REF The greater (or smaller) the pressure difference between them, the higher (or lower) the counting frequency at which the counting is performed; if the input voltage V _IN Less than the reference voltage V _REF Outputting a logic signal of low level, performing down-counting, and if the input voltage V _IN With reference voltage V _REF The greater (or lesser) the pressure difference between, the higher (or lower) the count frequency at which the count down is performed. In another case, if the input voltage V _IN Greater than or equal to reference voltage V _REF Outputting a logic signal of low level, performing down-counting, and if the input voltage V _IN With reference voltage V _REF The greater (or smaller) the pressure difference between them, the higher (or lower) the count frequency at which the count down is performed; if the input voltage V _IN Less than the reference voltage V _REF Outputting a high level logic signal, counting up, and if the input voltage V _IN With reference voltage V _REF The greater (or smaller) the pressure difference between them, the higher (or lower) the counting frequency at which the counting up is performed. In this way, the digital control signal generated by the counting module 12 after counting is not only adapted to the input voltage V _IN With reference voltage V _REF The result of the comparison between the voltage and the input voltage V _IN With reference voltage V _REF Is related to the pressure difference.

The digital-to-analog conversion module is connected with the counting module and is used for carrying out digital-to-analog conversion on the digital control signal output by the counting module to generate an analog control signal. In the present embodiment, as shown in fig. 8, the digital-to-analog conversion module 14 is connected to the counting module 12 for outputting the number to the counting module 12The word control signal is digital-to-analog converted to generate an analog control signal. The analog control signal output by the digital-to-analog conversion module 14 is a reference voltage V _REF The low-frequency signal with gradual fluctuation can be said to form an analog control signal with gradual fluctuation in the power frequency period.

And the signal adjusting module is connected with the integrator and the LED load and is used for adjusting and stabilizing the current of the LED load according to the analog control signal output by the integrator. In this embodiment, as shown in fig. 8, the signal adjustment module 15 is connected to the digital-to-analog conversion module 14 and the LED load 10 in the integrator, and is configured to adjust and stabilize the current of the LED load 10 according to the analog control signal output by the digital-to-analog conversion module 14. Since the analog control signal outputted from the digital-to-analog conversion module 14 changes smoothly, the current of the LED load 10 can be controlled by the signal adjustment module 15 corresponding to the analog control signal, and the current ripple can be eliminated.

As can be seen from fig. 8, in the LED device of the present application, not only is the simplification of peripheral circuits on hardware realized and the cost of the system reduced by adopting the structural design without filter capacitors, but also the input voltage of the LED load is detected, the input voltage is compared with the preset reference voltage by the voltage comparison module 11 to obtain the corresponding first logic signal or second logic signal, the counting module 12 performs the first counting when receiving the first logic signal and the second counting when receiving the second logic signal, the output of the counting module 12 forms the analog control voltage signal with ripple content eliminated after the digital-analog conversion by the digital-analog conversion module 14, and the voltage or current flowing through the LED load 10 is adjusted by the control voltage signal through the signal adjustment module 15, so that the average current of the LED load 10 is kept stable. Compared with the defects of complexity, cost rise, failure rate increase and the like of the whole circuit structure caused by the fact that a large filter capacitor is required to be externally arranged on a ripple removing chip in the related art, the LED device has the advantages of being simple in circuit structure, simplifying chip design, reducing overall application cost, reducing failure rate and the like.

Referring to fig. 9, a schematic circuit diagram of the LED device in fig. 8 in an embodiment is shown.

In the embodiment of fig. 9, the voltage comparison module 11 may employ, for example, a voltage comparator, with a non-inverting input terminal of the voltage comparator 11 for receiving the input voltage V _IN The inverting input of the voltage comparator 11 is used for receiving a preset reference voltage V _REF . It should be noted that, in the present embodiment, the input voltage V received by the voltage comparison module 11 _IN Which may be, for example, the negative terminal voltage V of the LED load 10 _Drain And a sampling voltage V _CS Is a difference in (c). Thus, in a circuit design, a subtractor may be provided having two inputs and an output, wherein one input is connected to the negative terminal of the LED load for receiving the negative terminal voltage V of the LED load _Drain Another input terminal for receiving a sampling voltage V _CS The output end is used for outputting the negative voltage V of the LED load 10 _Drain And a sampling voltage V _CS Is a difference in (c). Returning to the voltage comparator 11, in particular, the voltage comparator 11 will receive an input voltage V _IN With reference voltage V _REF And comparing and outputting the first logic signal or the second logic signal according to the comparison result. Specifically, the voltage comparator 11 outputs the first logic signal or the second logic signal according to the comparison result, and the method specifically includes: when the input voltage V _IN Is greater than or equal to the reference voltage V _REF When the first logic signal is outputted as a high level (short, a high level logic signal, which may output "1", for example); when the input voltage V _IN Is less than the reference voltage V _REF When this is the case, a second logic signal (abbreviated as low logic signal) is outputted as a low level, and the low logic signal may output "0", for example. Of course, the voltage comparator 11 inputs the voltage V _IN With reference voltage V _REF Is illustrative only and is not intended to limit the scope of the present application, e.g., in other embodiments, the inverting input of the voltage comparator 11 is used to receive the input voltage V _IN The non-inverting input of the voltage comparator 11 is for receiving a predetermined reference voltage V _REF Thus, when the voltage V is input _IN Is greater than or equal to the reference voltage V _REF When the first logic signal is outputted as a low level (short, a low level logic signal, which may output "0", for example); when the input voltage V _IN Is less than the reference voltage V _REF When this is the case, a second logic signal (abbreviated as high logic signal) is outputted as a high level, and the high logic signal may output "1", for example.

In the embodiment of fig. 9, the frequency generation module 13 may employ, for example, a Voltage-controlled oscillator (VCO) 13 having two inputs and an output, wherein one input is for receiving the input Voltage V _IN Another input terminal for receiving a reference voltage V _REF The output end is used for outputting the counting frequency. Since the two inputs of the voltage-controlled oscillator 13 receive an input voltage V _IN And reference voltage V _REF Therefore, the output count frequency is: f (F) _CLK ＝K*|V _IN -V _REF I, wherein F _CLK To count the frequency, V _IN For input voltage, V _REF K is the frequency modulation factor of the voltage controlled oscillator. It can be seen that the output frequency of the voltage-controlled oscillator 13 is equal to the input voltage V _IN With reference voltage V _REF The voltage difference between them being proportional, i.e. if the input voltage V _IN With reference voltage V _REF The greater the pressure difference between them, the higher the output frequency; if the input voltage V _IN With reference voltage V _REF The smaller the pressure difference between them, the lower the output frequency.

In the embodiment of fig. 9, the counting module 12 may, for example, employ an up-down counter, where the up-down counter 12 is connected to the voltage comparator 11 and the voltage controlled oscillator 13, and is configured to count up according to the count frequency output by the voltage controlled oscillator 13 when receiving the high level logic signal output by the voltage comparator 11 and count down according to the count frequency output by the voltage controlled oscillator 13 when receiving the low level logic signal output by the voltage comparator 11. Since the up-down counter 12 performs up-down counting is an AND logic signal (the logic signal is an AND input voltage V _IN And reference voltage V _REF Correlation of comparison results of (c)Number frequency (counting frequency is the frequency corresponding to the input voltage V _IN And reference voltage V _REF The correlation of the voltage difference between them), whereby the digital control signal generated by the counting module 12 as a whole can be adapted to not only the input voltage V _IN With reference voltage V _REF The result of the comparison between the voltage and the input voltage V _IN With reference voltage V _REF Is related to the pressure difference. From the above, by setting a suitable reference voltage V _REF Can make the output signal be a reference voltage V _REF Low-frequency signal with fluctuation and slow variation is used for filtering original input signal V _IN Possibly high frequency components.

In the embodiment of fig. 9, the digital-to-analog conversion module 14 may employ a conventional digital-to-analog converter (Digital to Analog Converter, abbreviated as DAC), and the digital-to-analog converter 14 is connected to the up-down counter 12 for performing digital-to-analog conversion on the digital control signal outputted by the up-down counter 12 for performing up-counting and down-counting to generate the analog control signal V _COMP . It can be said that the analog control signal V is output through the digital-to-analog conversion module 14 _COMP The change is gentle in the power frequency period.

In the embodiment of fig. 9, the signal conditioning module 15 further includes an amplifier 151 and a conditioning tube 152, wherein the amplifier 151 may be an operational amplifier, and the conditioning tube 152 may be a power transistor (here, an NMOS transistor is taken as an example), and a first input terminal of the operational amplifier 151 is connected to the dac 14 for receiving the analog control signal V output by the dac 14 _COMP A second input terminal of the operational amplifier 151 is connected to the source of the NMOS transistor 152 for receiving the sampling voltage V from the source of the NMOS transistor 152 _CS The output end of the operational amplifier 151 is connected with the gate of the NMOS transistor 152, the drain of the NMOS transistor 152 is connected with the LED load 10 and outputs the negative terminal voltage V of the LED load 10 _Drain The source of NMOS transistor 152 passes through a sampling resistor R _CS And is connected with the ground terminal to output a sampling voltage V _CS . In the present embodiment, the non-inverting input terminal of the operational amplifier 151 is used as the first input terminal, and the inverting input terminal of the operational amplifier 151 is used as the inverting input terminalThe terminal serves as a second input terminal. In addition, the output end of the operational amplifier 151 is connected with the inverting input end of the operational amplifier 151 after passing through the NMOS transistor 152 to form a negative feedback (Negative Feedback) configuration, so that the inverting input end of the operational amplifier 151 is sampled to obtain the current of the NMOS transistor, and the stable operation of the circuit can be ensured. By using the operational amplifier 151, the voltage stabilizing signal output by the operational amplifier 151 is made to be the same as the analog control signal V _COMP Phase synchronous and numerically proportional. The signal adjustment module, for example, the NMOS transistor 152, can further realize the linear stabilization of the signal according to the voltage stabilizing signal.

In the operational amplifier 151, the operational amplifier 151 receives the analog control signal V outputted from the digital-to-analog converter 14 _COMP According to the analog control signal V _COMP And a feedback signal of the source of the NMOS transistor 152, outputting a voltage stabilizing signal, wherein the output voltage stabilizing signal is an analog control signal V with two input ends _COMP Proportional to the voltage difference of the feedback signal. For the NMOS transistor 152, the voltage stabilizing signal output by the operational amplifier 151 can adjust the current flowing through the NMOS transistor 152 due to the analog control signal V _COMP The change is gentle, and thus, the analog control signal V _COMP Current I in NMOS transistor 152 controlled by the corresponding voltage stabilizing signal _M Will also be smooth in variation, eliminating current ripple. Due to the driving current I flowing through the LED load 10 _L Equal to current I _M Thus, the driving current I _L Current ripple is also eliminated.

It should be noted that, in the schematic circuit diagram of the LED device shown in fig. 9, the signal adjustment module 15 includes the amplifier 151 and the adjustment tube 152, but not limited thereto, in other embodiments, the signal adjustment module 15 may be modified, for example: the signal adjustment module may include an adjustment tube, where the adjustment tube is located between the LED load and the ground, and the adjustment tube may use an NMOS transistor, where a gate of the NMOS transistor is connected to the output end of the digital-to-analog converter 14, a drain of the NMOS transistor is connected to the negative terminal of the LED load and is used as the output end of the negative terminal voltage of the LED load 10, and a source of the NMOS transistor may be connected to the ground through a resistor.

Furthermore, the LED device of the present application may further comprise an Over-voltage protection circuit (OVP) which may be arranged between the drain of the NMOS transistor 152 and the first input terminal of the operational amplifier 151.

As can be seen from fig. 9, in the LED device of the present application, not only the simplification of peripheral circuits on hardware and the reduction of system cost are realized by adopting the structural design without filter capacitor, but also the detection of the negative terminal voltage of the LED is used as the input voltage V _IN The input voltage V is input by the voltage comparator 11 _IN With a preset reference voltage V _REF The comparison is performed to obtain a corresponding first logic signal or a second logic signal, then the up-down counter 12 performs a first count when receiving the first logic signal and performs a second count when receiving the second logic signal, the output of the up-down counter 12 performs digital-to-analog conversion through the digital-to-analog converter 14 to form an analog control voltage signal with ripple content eliminated, and the current in the NMOS transistor is adjusted through the operational amplifier 151 and the NMOS transistor by the control voltage signal, so that the average current of the LED load is kept stable. Compared with the defects of complexity, cost rise, failure rate increase and the like of the whole circuit structure caused by the fact that a large filter capacitor is required to be externally arranged on a ripple removing chip in the related art, the LED current ripple eliminating circuit and the LED equipment comprising the LED current ripple eliminating circuit have the advantages of being simple in circuit structure, simplifying chip design, reducing overall application cost, reducing failure rate and the like.

Referring to fig. 10, a flow chart of an LED current ripple cancellation method according to an embodiment of the application is shown. As shown in fig. 10, the method for eliminating the current ripple of the LED of the present application may include the steps of:

step S101, an input voltage related to the LED load is obtained, the input voltage is compared with a reference voltage, and a corresponding logic signal is output according to the comparison result of the input voltage and the reference voltage. In this embodiment: obtaining an input voltage associated with an LED load, comprising: detecting the voltage of the negative terminal of the LED load, taking the difference value between the voltage of the negative terminal and a sampling voltage as an input voltage, or detecting the voltage of the negative terminal of the LED load, and taking the voltage of the negative terminal as the input voltage. Comparing the input voltage with a reference voltage and outputting a corresponding logic signal according to the comparison result of the input voltage and the reference voltage, comprising: the input voltage is compared with a reference voltage, a first logic signal is output when the input voltage is greater than or equal to the reference voltage, and a second logic signal is output when the input voltage is less than the reference voltage. The first logic signal and the second logic signal may be adjusted in time according to the circuit design, for example, in one case, the first logic signal may be a high level logic signal, and the second logic signal may be a low level logic signal; in another case, the first logic signal may be, for example, a low level logic signal, and the second logic signal may be, for example, a high level logic signal.

Step S103, counting based on the logic signal, and generating a digital control signal. In this embodiment, counting based on the logic signal includes: the up-count is based on the high level logic signal and the down-count is based on the low level logic signal. As mentioned above, in one case, if the first logic signal is, for example, a high logic signal, then counting is performed; if the second logic signal is a low level logic signal, performing down-counting; in another case, if the first logic signal is, for example, a low logic signal, then the count down is performed; if the second logic signal is, for example, a high logic signal, an up-count is performed.

Notably, in counting, the frequency of counting is based on which is closely related to the input voltage and the reference voltage. In this embodiment, the count frequency is generated using the following formula: f (F) _CLK ＝K*|V _IN -V _REF I, wherein F _CLK To count the frequency, V _IN For input voltage, V _REF K is the frequency modulation factor of the voltage controlled oscillator.

Step S105, digital-to-analog conversion is performed on the digital control signal to generate an analog control signal with gentle fluctuation. In this embodiment, performing digital-to-analog conversion on the digital control signal may include: and D, performing digital-to-analog conversion on the digital control signals obtained by up-counting to form ascending analog control signals, and performing digital-to-analog conversion on the digital control signals obtained by down-counting to form descending analog control signals. In general, when the LED driving circuit is stable, the number of up-counts and the number of down-counts are the same in one power frequency period, and thus the increase and decrease of the output analog control signal in one power frequency period are equal, and the overall change of the analog control signal is gentle.

In step S107, the voltage or current of the LED load is adjusted according to the analog control signal so that the average current of the LED load remains stable. In this embodiment, since the analog control signal is related to the input voltage, which is related to the voltage and current of the LED load, the voltage or current of the LED load can be adjusted directly by the analog control signal or according to the analog control signal, so that the voltage or current of the LED load is stabilized.

The LED current ripple eliminating method comprises the steps of comparing an input voltage with a reference voltage, outputting corresponding logic signals according to a comparison result of the input voltage and the reference voltage, counting according to the logic signals and counting frequency to form corresponding digital control signals, performing digital-to-analog conversion on the digital control signals to form analog control signals, and adjusting the voltage or current of an LED load to enable the average current of the LED load to be stable.

The following description of the flow of the LED device shown in fig. 9 in application to LED current ripple cancellation may include, in conjunction with fig. 9 and 10:

an input voltage related to the LED load is obtained, the input voltage is compared with a preset reference voltage, and a first logic signal or a second logic signal is output according to a comparison result. Specifically, the input voltage V is received by the voltage comparator 11 _IN And reference voltage V _REF Will input voltage V _IN With reference voltage V _REF Comparing, and indicating the input voltage V _IN Greater than or equal to reference voltage V _REF Outputting a first logic signal whenThe comparison result shows that the input voltage V _IN Less than the reference voltage V _REF A second logic signal is output. The first logic signal and the second logic signal can be adjusted in time according to the circuit design, for example, in the present embodiment, in the LED device shown in fig. 9, the non-inverting input terminal of the voltage comparator 11 is used for receiving the input voltage V _IN The inverting input of the voltage comparator 11 is used for receiving a preset reference voltage V _REF When the input voltage V _IN Is greater than or equal to the reference voltage V _REF When the voltage V is input, the logic signal is outputted as a high level logic signal _IN Is less than the reference voltage V _REF And outputting the logic signal with the low level as a second logic signal. The first logic signal and the second logic signal can be adjusted in time according to the circuit design, for example, if the inverting input terminal of the voltage comparator 11 is used for receiving the input voltage V _IN The non-inverting input of the voltage comparator 11 is for receiving a predetermined reference voltage V _REF When the input voltage V _IN Is greater than or equal to the reference voltage V _REF When the voltage V is input, the logic signal is outputted as a low level logic signal _IN Is less than the reference voltage V _REF And outputting the logic signal with the high level as a second logic signal. In addition, in the present embodiment, the input voltage V received by the voltage comparison module 11 _IN Which may be, for example, the negative terminal voltage V of the LED load 10 _Drain And a sampling voltage V _CS Is a difference in (c).

The first count is performed according to the first logic signal and the second count is performed according to the second logic signal, and the count frequency of the first count and the second count is proportional to the difference between the input voltage and the reference voltage. In the present embodiment, the up-down counter 12 is used to receive the comparison result output from the voltage comparator 11 to perform corresponding counting, that is, to perform a first counting when the first logic signal is received and to perform a second counting when the second logic signal is received, thereby generating a digital control signal. If the following assumption is made: the up-count is performed when a high level logic signal is received and the down-count is performed when a low level logic signal is received. In this embodiment, in the LED device shown in fig. 9, the first counting according to the first logic signal and the second counting according to the second logic signal specifically include: when the first logic signal output by the comparison result is a high-level logic signal, counting up; and when the second logic signal output by the comparison result is a low-level logic signal, performing down counting. Of course, in other embodiments, other variations may be made, for example, in other variations, performing a first count based on the first logic signal and performing a second count based on the second logic signal may also include: when the first logic signal output by the comparison result is a low-level logic signal, performing count-down; and when the second logic signal output by the comparison result is a high-level logic signal, counting up.

The up-down frequency of the up-down counter 12 is based on the input voltage V _IN And reference voltage V _REF Related, i.e. the counting frequency is related to the input voltage V _IN And reference voltage V _REF The difference between the two is proportional, i.e. if the input voltage V _IN With reference voltage V _REF The greater the pressure differential, the higher the required count frequency; if the input voltage V _IN With reference voltage V _REF The smaller the pressure difference, the lower the required count frequency.

An analog control signal is generated based on the count result. In the present embodiment, the digital control signal output by the up-down counter 12 for performing the first count and the second count is digital-to-analog converted by the digital-to-analog converter 14 to generate the analog control signal V _COMP . Specifically, digital control signals obtained by up-counting are subjected to digital-to-analog conversion to form ascending analog control signals, and digital control signals obtained by down-counting are subjected to digital-to-analog conversion to form descending analog control signals. In general, when the LED driving circuit is stable, the number of up-counts and the number of down-counts are the same in one power frequency period, and thus the analog control signal V is outputted _COMP The increase and decrease in one power frequency cycle are also equal.

The voltage stabilizing signal is output based on the analog control signal. In the present embodiment, the operational amplifier 151 is used to receive the analog control signal V _COMP And a feedback signal (i.e., a sampling voltage V) from the NMOS transistor 152 _CS ) Calculating to obtain an analog control signal V _COMP And a sampling voltage V as a feedback signal _CS And (3) carrying out gain amplification processing on the difference value to obtain a voltage stabilizing signal. The output voltage stabilizing signal is the analog control signal V _COMP Phase synchronous and numerically proportional. And obtaining stable driving current by utilizing the voltage stabilizing signal. In the present embodiment, the voltage stabilizing signal outputted from the operational amplifier 151 adjusts the current flowing through the NMOS transistor 152, and further adjusts the current and voltage of the LED load. Due to the analogue control signal V _COMP The change is gentle, and thus, the analog control signal V _COMP The current in the NMOS transistor 152 controlled by the corresponding voltage stabilizing signal will also be smoothly varying, eliminating current ripple and keeping the average current in the NMOS transistor 152 stable. Since the drive current flowing through the LED load 10 is equal to the current in the NMOS transistor 152, the current ripple is also eliminated and the average current of the LED load is kept stable.

Thus, in the LED device of the present application, the input voltage V received by the integrator _IN The analog control signal V which is output after being processed by the integrator is increased _COMP Increasing the current through the NMOS transistor, sampling voltage V _CS Increasing, pulling down the negative terminal voltage V of the LED load 10 _Drain Input voltage V _IN A reduction; input voltage V received by integrator _IN The analog control signal V which is output after being processed by the integrator is reduced _COMP Reduced current through NMOS transistor, sampled voltage V _CS Reducing the negative terminal voltage V of the LED load 10 _Drain Increase the input voltage V _IN And (3) increasing. Thus, the voltage and average current across the LED load can be ensured to remain stable.

In addition, regarding the NMOS transistor 152, the voltage stabilizing signal outputted from the operational amplifier 151 can adjust the current flowing through the NMOS transistor 152 due to the analog control signal V _COMP The change is gentle, and thus, the analog control signal V _COMP Current I in NMOS transistor 152 controlled by the corresponding voltage stabilizing signal _M Will also be smooth in variation, eliminating current ripple. Due to the driving current I flowing through the LED load 10 _L Equal to current I _M Thus, the driving current I _L Current ripple is also eliminated.

Referring to fig. 11, a block diagram of an LED device according to another embodiment of the present application is shown. As shown in fig. 11, in the present embodiment, the LED device of the present application includes: the LED driving circuit comprises an LED load 10, a rectifier bridge 21, a first capacitor C1, an energy storage inductor L, a freewheeling diode D, a second capacitor C2 and an LED driver.

The input of the rectifier bridge 21 is electrically connected to an ac power source for rectifying ac power to dc power. In the present embodiment, the rectifier bridge 21 has a full-bridge structure, and the full-bridge structure is formed by integrally connecting and packaging four rectifier diodes in the form of a bridge full-wave rectifier circuit.

The two ends of the first capacitor C1 are respectively and electrically connected to two parallel rectifying branches in the rectifying bridge 21, for filtering the direct current.

The second capacitor C2 is connected in parallel with the LED load 10, i.e. the first end of the second capacitor C2 is connected with the positive end of the LED load 10, and the second end of the second capacitor C2 is connected with the negative end of the LED load 10 and with the ground.

The energy storage inductor L is connected in series with a freewheeling diode D, the other end of the energy storage inductor is coupled to one rectifying branch of the rectifying bridge 21, and the other end of the freewheeling diode D is connected to the positive end of the LED load 10.

The LED driver is disposed between the LED load 10 and the energy storage inductor L, and is used for controlling the average current of the LED load 10 to be unchanged. In this embodiment, the LED driver is integrated into an LED driver chip. The LED driving chip may include: a power source terminal HV, a voltage input terminal IN, a control signal terminal COMP, a current detection terminal CS, a ground terminal connection terminal GND, and a switching signal terminal SW. The power supply end HV is used for obtaining power supply voltage so as to provide power supply for each circuit or component in the APFC control chip. The voltage input terminal IN is connected to the negative terminal of the LED load 10, and is configured to receive the negative terminal voltage of the LED load as an input voltage, and IN fact, the negative terminal voltage is the voltage of a sampling resistor R electrically connected to the LED load 10. The switching signal end SW is connected to a power tube M, and is used for controlling the power tube M by being controlled by a control signal output by the control signal end COMP.

The LED driver in the LED driving chip further comprises an integrator and a signal adjusting module, wherein the input voltage in the integrator is the negative terminal voltage of the LED. In an embodiment, the input voltage in the integrator is electrically connected to the voltage of a sampling resistor R of the LED load 10, the other end of the sampling resistor R is grounded, and the signal adjustment module is connected to the output end of the integrator and the LED load 10, so that the average current of the LED load 10 is unchanged according to the analog control signal output by the integrator.

As can be seen from fig. 11, in the LED device of the present application, since the LED driver is integrated in the LED driving chip and the LED driver includes the integrator and the signal adjustment module, the integrator and the signal adjustment module can be used to ensure that the average current of the LED load 10 is unchanged, so that the LED device of the present application can dispense with configuring a large filter capacitor, simplify the peripheral circuit, reduce the system cost, and thoroughly eliminate the failure problem caused by the peripheral filter capacitor.

Referring to fig. 12, a schematic circuit diagram of the LED device in fig. 11 in an embodiment is shown.

The LED device of the present application comprises: the LED driving circuit comprises an LED load 10, a rectifier bridge 21, a first capacitor C1, an energy storage inductor L, a freewheeling diode D, a second capacitor C2 and an LED driver.

The LED load 10 can be composed of one LED lamp or a plurality of LED lamps, and a sampling resistor R is further connected between the LED load 10 and the ground.

The LED driver is disposed between the LED load 10 and the energy storage inductor L, and is used for controlling the average current of the LED load 10 to be unchanged. In this embodiment, the LED driver may include an integrator and a signal adjustment module as described above, and the integrator may further include a voltage comparison module 21, a counting module 22, a frequency generation module 23, and a digital-to-analog conversion module 24.

The voltage comparison module 21 is used for receiving the input voltage V _IN And reference voltage V _REF Will input voltage V _IN With reference voltage V _REF And comparing and outputting corresponding logic signals according to the comparison result of the two. In the present embodiment, the input voltage V received by the voltage comparison module 21 _IN For example, the negative terminal voltage of the LED load 10 (actually, the negative terminal voltage is the voltage of a sampling resistor R electrically connected to the LED load 10, one end of the sampling resistor is connected to the LED load, and the other end is connected to the ground). In the embodiment of fig. 12, the voltage comparison module 21 may, for example, employ a voltage comparator, an inverting input of the voltage comparator 21 being connected to a negative terminal of the LED load 10 for receiving the input voltage V _IN The non-inverting input of the voltage comparator 21 is for receiving a predetermined reference voltage V _REF . The voltage comparator 21 receives the input voltage V _IN With reference voltage V _REF And comparing and outputting the first logic signal or the second logic signal according to the comparison result. In detail, the voltage comparator 21 outputs a first logic signal or according to the comparison resultThe second logic signal specifically includes: when the input voltage V _IN Is greater than or equal to the reference voltage V _REF When the first logic signal is outputted as a low level (short, a low level logic signal, which may output "0", for example); when the input voltage V _IN Is less than the reference voltage V _REF When this is the case, a second logic signal (abbreviated as high logic signal) is outputted as a high level, and the high logic signal may output "1", for example. Of course, the voltage comparator 21 is connected to the input voltage V _IN With reference voltage V _REF Is illustrative only and is not intended to limit the scope of the present application, for example, in other embodiments, the positive input of the voltage comparator 21 is connected to the negative terminal of the LED load 10 for receiving the input voltage V _IN The negative input of the voltage comparator 21 is used for receiving a preset reference voltage V _REF . The voltage comparator 21 receives the input voltage V _IN With reference voltage V _REF And comparing and outputting the first logic signal or the second logic signal according to the comparison result. Specifically, the voltage comparator 21 outputs the first logic signal or the second logic signal according to the comparison result, and the method specifically includes: when the input voltage V _IN Is greater than or equal to the reference voltage V _REF When the first logic signal is outputted as a high level (short, a high level logic signal, which may output "1", for example); when the input voltage V _IN Is less than the reference voltage V _REF When this is the case, a second logic signal (abbreviated as low logic signal) is outputted as a low level, and the low logic signal may output "0", for example.

The frequency generation module 23 is connected to the counting module 22, and is configured to output a counting frequency to the counting module 22, so that the counting module 22 can perform corresponding counting according to the counting frequency. In practical application, the counting frequency generated by the frequency generating module 23 is equal to the input voltage V _IN And reference voltage V _REF Related to each other. In the embodiment of fig. 12, the frequency generation module 23 may employ, for example, a Voltage-controlled oscillator (VCO) having two inputs and an output, wherein one input is for receivingInput voltage V _IN Another input terminal for receiving a reference voltage V _REF The output end is used for outputting the counting frequency. Since the two inputs of the voltage-controlled oscillator 23 receive the input voltage V _IN And reference voltage V _REF Therefore, the output count frequency is: f (F) _CLK ＝K*|V _IN -V _REF I, wherein F _CLK To count the frequency, V _IN For input voltage, V _REF K is the frequency modulation factor of the voltage controlled oscillator. It can be seen that the output frequency of the voltage-controlled oscillator 23 is equal to the input voltage V _IN With reference voltage V _REF The voltage difference between them being proportional, i.e. if the input voltage V _IN With reference voltage V _REF The greater the pressure difference between them, the higher the output frequency; if the input voltage V _IN With reference voltage V _REF The smaller the pressure difference between them, the lower the output frequency.

The counting module 22 is connected to the voltage comparing module 21 and the frequency generating module 23, and is configured to receive the logic signal output from the voltage comparing module 21 and the counting frequency of the frequency generating module 23 and count accordingly, thereby generating a digital control signal. In the embodiment of fig. 12, the counting module 22 may for example employ an up-down counter, the up-down counter 22 being connected to the voltage comparator 21 and the voltage controlled oscillator 23 for up-counting according to the count frequency output by the voltage controlled oscillator 13 when receiving the high level logic signal output by the voltage comparator 11 and down-counting according to the count frequency output by the voltage controlled oscillator 13 when receiving the low level logic signal output by the voltage comparator 11. Since the up-down counter 22 performs up-down counting is an AND logic signal (the logic signal is an AND input voltage V _IN And reference voltage V _REF Is related to the comparison result of (a) the count frequency (the count frequency is related to the input voltage V) _IN And reference voltage V _REF The correlation of the voltage difference between them), whereby the digital control signal generated by the counting module 22 as a whole can be adapted to not only the input voltage V _IN With reference voltage V _REF The result of the comparison between the voltage and the input voltage V _IN With reference voltage V _REF Is related to the pressure difference. From the topBy setting a suitable reference voltage V _REF Can make the output signal be a reference voltage V _REF Low-frequency signal with fluctuation and slow variation is used for filtering original input signal V _IN Possibly high frequency components.

The digital-to-analog conversion module 24 is connected to the counting module 22, and is configured to output an analog control signal based on the counting result output by the counting module 22. In the embodiment of fig. 12, the digital-to-analog conversion module 24 may employ a conventional digital-to-analog converter (Digital to Analog Converter, abbreviated as DAC), and the digital-to-analog converter 24 is connected to the up-down counter 22 for performing digital-to-analog conversion on the digital control signal outputted by the up-down counter 22 for performing up-counting and down-counting to generate the analog control signal V _COMP . It can be said that the analog control signal V is output through the digital-to-analog conversion module 24 _COMP The change is gentle in the power frequency period.

The signal adjustment module is connected to the digital-to-analog conversion module 24 and the LED load 10, and is configured to make the average current of the LED load 10 unchanged according to the analog control signal output by the digital-to-analog conversion module 24. Further, the signal adjusting module may further include a pulse width modulator 25 and a switching tube 26, wherein the pulse width modulator 25 is connected to the digital-to-analog conversion module 24, and is used for performing pulse width modulation of signals according to the analog control signal output by the digital-to-analog conversion module 24 to generate a switching tube control signal, and the switching tube 26 is connected to the pulse width modulator 25, and is used for performing on/off operation according to the switching tube control signal output by the pulse width modulator 25. In the embodiment of fig. 12, the PWM 25 may be a PWM comparator and the switching transistor 26 may be an NMOS transistor. The PWM comparator 25 has a first input connected to the digital-to-analog converter 24 and a second input for receiving a sawtooth or triangular signal (which may be generated by an oscillator, for example), the output of the PWM comparator 25 being connected to the gate of the NMOS transistor 26, the source of the NMOS transistor 26 being connected to a sampling resistor R _CS The drain of the NMOS transistor 26 is connected to the power transistor M. Thus, the PWM comparator 25 can output the analog control signal V from the DAC 24 _COMP With said sawtooth or triangular wave signalThe numbers are compared to generate a control signal to adjust the on time of NMOS transistor 26. In the embodiment of fig. 12, the non-inverting input of PWM comparator 25 receives an analog control signal V _COMP The inverting input of the PWM comparator 25 receives a sawtooth or triangular signal, and the PWM comparator 25 compares the sawtooth or triangular signal with the analog control signal V _COMP The pulse signal is outputted to form a control signal for controlling the conduction of the NMOS transistor 26 when the pulse signal is larger than the sawtooth or triangle wave signal, wherein the width of the outputted pulse signal (i.e. the control signal) is determined by the analog control signal V at the time of the falling edge of the pulse _COMP The greater the width of the pulse signal, the longer the duration that the NMOS transistor 26 is turned on.

Thus, in the LED device of the present application, when the current of the LED load 10 increases, the input voltage V received by the integrator _IN The analog control signal V which is output after being processed by the integrator is increased _COMP The reduction of the pulse width of the control signal output by the pulse width modulator, the reduction of the on time of the switching tube, the reduction of the energy storage inductance current, the reduction of the current flowing through the LED load 10, and the input voltage V _IN Reduction; when the current of the LED load 10 decreases, the input voltage V received by the integrator _IN The analog control signal V output after the integrator processing is reduced _COMP Increasing the pulse width of the control signal output by the pulse width modulator, increasing the on time of the switching tube, increasing the energy storage inductance current, increasing the current flowing through the LED load 10, and inputting the voltage V _IN And (3) increasing. In this way, it is ensured that the average current inside the LED load remains stable.

In addition, due to the analog control signal V _COMP The variation in the period is gentle, and the current ripple is eliminated, so that the current flowing through the LED load 10 can be made, and thus, the current of the LED load 10 can also be eliminated.

The following procedure for explaining the application of the LED device shown in fig. 12 to the elimination of LED current ripple may include:

obtaining an input voltage related to an LED load, and comparing the input voltage with a preset referenceThe voltages are compared and the first logic signal or the second logic signal is output according to the comparison result. In the present embodiment, in the LED device shown in fig. 12, the input voltage V is received by the voltage comparator 21 _IN And reference voltage V _REF Will input voltage V _IN With reference voltage V _REF Comparing, and indicating the input voltage V _IN Greater than or equal to reference voltage V _REF A logic signal with low level is output as a first logic signal, and the comparison result shows that the input voltage V _IN Less than the reference voltage V _REF The output is a high logic signal as the second logic signal. The first logic signal and the second logic signal can be adjusted in time according to the circuit design, for example, if the non-inverting input terminal of the voltage comparator 11 is used for receiving the input voltage V _IN The inverting input of the voltage comparator 11 is used for receiving a preset reference voltage V _REF When the input voltage V _IN Is greater than or equal to the reference voltage V _REF When the voltage V is input, the logic signal is outputted as a high level logic signal _IN Is less than the reference voltage V _REF And outputting the logic signal with the low level as a second logic signal. In addition, in the present embodiment, the input voltage V received by the voltage comparison module 11 _IN May be, for example, the negative terminal voltage of the LED load 10 (in practice, the negative terminal voltage is the voltage of a sampling resistor R to which the LED load 10 is electrically connected).

The first count is performed according to the first logic signal and the second count is performed according to the second logic signal, and the count frequency of the first count and the second count is proportional to the difference between the input voltage and the reference voltage. In the present embodiment, the up-down counter 22 is used to receive the comparison result output from the voltage comparator 21 to perform corresponding counting, that is, to perform a first counting when the first logic signal is received and to perform a second counting when the second logic signal is received, thereby generating a digital control signal. If the following assumption is made: the up-count is performed when a high level logic signal is received and the down-count is performed when a low level logic signal is received. . In this embodiment, in the LED device shown in fig. 12, performing the first count according to the first logic signal and performing the second count according to the second logic signal specifically includes: when the first logic signal output by the comparison result is a low-level logic signal, performing count-down; and when the second logic signal output by the comparison result is a high-level logic signal, counting up. Of course, in other embodiments, other variations may be made, for example, in other variations, performing a first count based on the first logic signal and performing a second count based on the second logic signal may also include: when the first logic signal output by the comparison result is a high-level logic signal, counting up; and when the second logic signal output by the comparison result is a low-level logic signal, performing down counting.

The up-down frequency of the up-down counter 22 is based on the input voltage V _IN And reference voltage V _REF Related, i.e. the counting frequency is related to the input voltage V _IN And reference voltage V _REF The difference between the two is proportional, i.e. if the input voltage V _IN With reference voltage V _REF The greater the pressure differential, the higher the required count frequency; if the input voltage V _IN With reference voltage V _REF The smaller the pressure difference, the lower the required count frequency.

An analog control signal is generated based on the count result. In the present embodiment, the digital control signal output by the up-down counter 22 for performing the first count and the second count is digital-to-analog converted by the digital-to-analog converter 24 to generate the analog control signal V _COMP . Specifically, digital control signals obtained by up-counting are subjected to digital-to-analog conversion to form ascending analog control signals, and digital control signals obtained by down-counting are subjected to digital-to-analog conversion to form descending analog control signals. In general, when the LED driving circuit is stable, the number of the first counts (for example, up counts) and the number of the second counts (for example, down counts) are the same in one power frequency period, and thus the analog control signal V is outputted _COMP The increase and decrease in one power frequency cycle are also equal.

Based on mouldThe voltage stabilizing signal is outputted by the analog control signal. In the present embodiment, the operational amplifier 151 is used to receive the analog control signal V _COMP And a feedback signal (i.e., a sampled voltage) from NMOS transistor 152, calculated as analog control signal V _COMP And sampling voltage V as a feedback signal _CS And (3) carrying out gain amplification processing on the difference value to obtain a voltage stabilizing signal. The output voltage stabilizing signal is the analog control signal V _COMP Phase synchronous and numerically proportional. And obtaining stable driving current by utilizing the voltage stabilizing signal. In the present embodiment, the voltage stabilizing signal outputted from the operational amplifier 151 adjusts the current flowing through the NMOS transistor 152. Due to the analogue control signal V _COMP The change is gentle, and thus, the analog control signal V _COMP The current in the NMOS transistor 152 controlled by the corresponding voltage stabilizing signal will also be smoothly varying, eliminating current ripple. Since the driving current flowing through the LED load 10 is equal to the current in the NMOS transistor 152, the current ripple is also eliminated.

As can be seen from the above, in the LED device of the present application, not only the simplification of peripheral circuits on hardware and the reduction of system cost are realized by adopting the structural design without filter capacitor, but also the input voltage V is obtained by detecting the negative terminal voltage of the LED load by using the voltage comparator 21 _IN With a preset reference voltage V _REF The comparison is carried out to obtain a corresponding first logic signal or a second logic signal, then the up-down counter 22 carries out first counting when receiving the first logic signal and carries out second counting when receiving the second logic signal, the output of the up-down counter 22 carries out digital-to-analog conversion through the digital-to-analog converter 24 to form an analog control voltage signal, then a corresponding pulse width modulation signal is output according to the control voltage signal, the on-off and on-off duration time of the power switch tube are controlled by the pulse width modulation signal, the current of the LED load is adjusted, and then the average current in the LED load is kept stable, so that the LED equipment can obtain higher power factor. Compared with the defects of complexity, cost rise, failure rate increase and the like of the whole circuit structure caused by the fact that a large filter capacitor is needed to be externally arranged on a ripple removing chip in the related art, the LED current rippleThe wave eliminating circuit and the LED equipment comprising the LED current ripple eliminating circuit have the advantages of simple circuit structure, simplified chip design, reduced overall application cost, reduced failure rate and the like.

The above embodiments are merely illustrative of the principles of the present application and its effectiveness, and are not intended to limit the application. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the application. Accordingly, it is intended that all equivalent modifications and variations of the application be covered by the claims, which are within the ordinary skill of the art, be within the spirit and scope of the present disclosure.

Claims

1. An integrator, comprising:

the voltage comparison module is used for receiving input voltage and reference voltage, comparing the input voltage with the reference voltage and outputting corresponding logic signals according to the comparison result of the input voltage and the reference voltage;

the counting module is connected with the voltage comparison module and used for counting according to the logic signals output by the voltage comparison module to generate digital control signals;

the frequency generation module is connected with the counting module and is used for outputting counting frequency to the counting module, wherein the counting frequency generated by the frequency generation module is related to the pressure difference between the input voltage and the reference voltage, so that the digital control signal generated by the counting module is not only suitable for the comparison result between the input voltage and the reference voltage, but also related to the pressure difference between the input voltage and the reference voltage in the whole; and

the digital-to-analog conversion module is connected with the counting module and is used for carrying out digital-to-analog conversion on the digital control signal output by the counting module to generate an analog control signal, and the analog control signal is a low-frequency signal which is slowly changed relative to the fluctuation of the reference voltage.

2. The integrator of claim 1, wherein the integrator comprises a filter,

The voltage comparison module outputs corresponding logic signals according to the comparison result of the voltage comparison module and the voltage comparison module, and the voltage comparison module comprises: outputting a first logic signal when the input voltage is greater than or equal to the reference voltage, and outputting a second logic signal when the input voltage is less than the reference voltage; and

the counting module counts according to the logic signals output by the voltage comparison module, and comprises: a first count is performed when the first logic signal is received and a second count is performed when the second logic signal is received.

3. The integrator of claim 1 or 2, wherein the counting module counts according to the logic signal output by the voltage comparison module, comprising: the up-count is performed when a high level logic signal is received and the down-count is performed when a low level logic signal is received.

4. The integrator of claim 3 wherein the number of up counts and the number of down counts are the same and the number of digital control signals are equal in both increases and decreases over a single power frequency cycle.

5. The integrator of claim 4, wherein the integrator comprises a filter,

the frequency generation module is a voltage-controlled oscillator and is provided with two input ends and an output end, wherein one input end is used for receiving the input voltage, the other input end is used for receiving the reference voltage, and the output end is used for outputting counting frequency;

The count frequency is generated using the following formula:

F _CLK ＝K*|V _IN |-V _REF |

wherein F is _CLK To count the frequency, V _IN For input voltage, V _REF K is the frequency modulation factor of the voltage controlled oscillator.

6. An LED current ripple cancellation circuit, comprising:

an integrator as claimed in any one of claims 1 to 5; the input voltage in the integrator is the difference value between the negative terminal voltage of the LED load and a sampling voltage; and

the signal adjusting module is connected with the digital-to-analog conversion module in the integrator and the LED load and is used for adjusting the voltage or current of the LED load according to the analog control signal output by the digital-to-analog conversion module so that the average current of the LED load is kept stable.

7. The LED current ripple cancellation circuit of claim 6, wherein the signal conditioning module comprises a conditioning tube positioned between the LED load and ground, a control terminal of the conditioning tube being connected to an output terminal of the digital-to-analog conversion module.

8. The LED current ripple cancellation circuit of claim 7, wherein the adjustment tube is an NMOS transistor, a gate of the MOS transistor is connected to the output of the digital-to-analog conversion module, and a drain of the NMOS transistor is connected to the negative terminal of the LED load and is used as the output of the negative terminal voltage of the LED load.

9. The LED current ripple cancellation circuit of claim 6, wherein the signal adjustment module comprises an amplifier and an adjustment tube, the amplifier is connected with the digital-to-analog conversion module, and is configured to generate a voltage stabilizing signal after performing signal amplification processing according to an analog control signal and a sampling voltage output by the digital-to-analog conversion module, and the adjustment tube is electrically connected with the amplifier and the LED load, respectively, and is configured to adjust and stabilize a current of the LED load according to the voltage stabilizing signal.

10. The LED current ripple cancellation circuit of claim 9, wherein the amplifier is an operational amplifier, the adjustment tube is an NMOS transistor, wherein a gate of the NMOS transistor is connected to an output terminal of the operational amplifier, a drain of the NMOS transistor is connected to a negative terminal of the LED load and is used as an output terminal of a negative terminal voltage of the LED load, a source of the NMOS transistor is connected to a ground terminal through a sampling resistor and is used as an output terminal of the sampling voltage, a first input terminal of the operational amplifier is connected to an output terminal of the digital-to-analog conversion module, and a second input terminal of the operational amplifier is connected to a source of the NMOS transistor.

11. An LED ripple cancellation chip, comprising:

an LED current ripple cancellation circuit according to any one of claims 6 to 10 or an integrator according to any one of claims 1 to 5.

12. An LED driver, comprising:

an integrator as claimed in any one of claims 1 to 5; the input voltage in the integrator is the negative end voltage of the LED; and

the signal adjusting module is connected with the digital-to-analog conversion module and the LED load in the integrator and is used for adjusting the voltage or the current of the LED load according to the analog control signal output by the digital-to-analog conversion module so that the average current of the LED load is kept stable.

13. The LED driver of claim 12, wherein the signal conditioning module comprises a pulse width modulator and a switching tube, wherein the pulse width modulator is connected to the digital-to-analog conversion module for pulse width modulating a signal according to an analog control signal output by the digital-to-analog conversion module to generate a switching tube control signal, and wherein the switching tube is connected to the pulse width modulator for performing on/off operation according to the switching tube control signal output by the pulse width modulator.

14. The LED driver of claim 13, wherein the pwm is a comparator, a first input terminal of the comparator is connected to the dac module, and a second input terminal of the comparator is connected to a saw-tooth wave or triangle wave signal, and the comparator is used for comparing the analog control signal output by the dac module with the saw-tooth wave or triangle wave signal to generate a control signal for adjusting the on-time of the switching tube.

15. The LED driver of claim 12, wherein the input voltage in the integrator is a voltage of a sampling resistor electrically connected to the LED load, the other end of the sampling resistor being grounded.

16. An LED driving chip, comprising:

an integrator as claimed in any one of claims 1 to 5 or an LED driver as claimed in any one of claims 12 to 15.

17. An LED device, comprising:

an LED load;

the input end of the rectifier bridge is electrically connected to an alternating current power supply and used for rectifying alternating current into direct current;

the two ends of the first capacitor are respectively and electrically connected to two rectification branches connected in parallel in the rectification bridge and used for filtering direct current;

The LED power supply comprises an energy storage inductor, a freewheeling diode and a second capacitor, wherein the second capacitor is connected with an LED load in parallel and then connected with the freewheeling diode and the energy storage inductor in series, and the other end of the energy storage inductor is coupled to one rectifying branch of the rectifying bridge;

the LED driver according to any one of claims 12 to 15, being arranged between the LED load and the energy storage inductance for adjusting and stabilizing the current of the LED load.

18. An LED device, comprising:

an LED load;

the ripple removing capacitor is connected in parallel with the LED load;

the LED constant current driving device is connected with the LED load and the ripple removing capacitor and is used for outputting a constant LED driving current; and

the LED current ripple cancellation circuit of any one of claims 6 to 10, provided between the LED load and the LED constant current drive device.

19. The LED current ripple eliminating method is characterized by comprising the following steps:

obtaining input voltage related to an LED load, comparing the input voltage with a reference voltage and outputting a corresponding logic signal according to a comparison result of the input voltage and the reference voltage;

counting based on the logic signals to generate a digital control signal, wherein the counting frequency is related to the voltage difference between the input voltage and the reference voltage, so that the digital control signal is not only suitable for the comparison result between the input voltage and the reference voltage, but also related to the voltage difference between the input voltage and the reference voltage in the whole;

Performing digital-to-analog conversion on the digital control signal to generate an analog control signal with gentle fluctuation relative to a reference voltage; and

and adjusting the voltage or current of the LED load according to the analog control signal so as to keep the average current of the LED load stable.

20. The LED current ripple cancellation method of claim 19, wherein the step of comparing the input voltage with a reference voltage and outputting a corresponding logic signal based on the comparison of the input voltage and the reference voltage comprises: comparing the input voltage with a reference voltage, outputting a first logic signal when the input voltage is greater than or equal to the reference voltage, and outputting a second logic signal when the input voltage is less than the reference voltage; the step of counting based on the logic signals comprises a first counting based on the first logic signal and a second counting based on the second logic signal.

21. The LED current ripple cancellation method of claim 19 or 20, wherein the step of counting based on the logic signal comprises counting up based on a high level logic signal and counting down based on a low level logic signal.

22. The method of claim 21, wherein the number of up-counts and the number of down-counts are the same in one power frequency period, and the number of up-counts and the number of down-counts are equal in each digital control signal.

23. The LED current ripple cancellation method of claim 19, wherein the counting frequency based upon which the counting is performed is generated using the following formula:

F _CLK ＝K*|V _IN -V _REF |

24. The LED current ripple cancellation method of claim 20, wherein the step of obtaining an input voltage associated with the LED load comprises: detecting the voltage of the negative terminal of an LED load, and taking the difference value between the voltage of the negative terminal and a sampling voltage as an input voltage; alternatively, the negative terminal voltage of the LED load is detected and used as the input voltage.