CN107425830B - Pulse generation circuit, current detection circuit, switching power supply and pulse generation method - Google Patents
Pulse generation circuit, current detection circuit, switching power supply and pulse generation method Download PDFInfo
- Publication number
- CN107425830B CN107425830B CN201710774927.4A CN201710774927A CN107425830B CN 107425830 B CN107425830 B CN 107425830B CN 201710774927 A CN201710774927 A CN 201710774927A CN 107425830 B CN107425830 B CN 107425830B
- Authority
- CN
- China
- Prior art keywords
- signal
- circuit
- voltage
- active
- control signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims abstract description 12
- 238000001514 detection method Methods 0.000 title claims description 16
- 230000000737 periodic effect Effects 0.000 claims abstract description 53
- 230000007423 decrease Effects 0.000 claims abstract description 9
- 230000001360 synchronised effect Effects 0.000 claims description 33
- 238000005070 sampling Methods 0.000 claims description 22
- 239000003990 capacitor Substances 0.000 claims description 19
- 238000010586 diagram Methods 0.000 description 14
- 230000000630 rising effect Effects 0.000 description 5
- 230000003247 decreasing effect Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000007599 discharging Methods 0.000 description 1
- 238000011010 flushing procedure Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K7/00—Modulating pulses with a continuously-variable modulating signal
- H03K7/08—Duration or width modulation ; Duty cycle modulation
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
- H02M1/0009—Devices or circuits for detecting current in a converter
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
Abstract
The invention discloses a pulse generating circuit, a current detecting circuit, a switching power supply and a pulse generating method, wherein an input pulse signal and a periodic signal are changed from invalid to valid at the same moment, the valid time of the periodic signal is longer than the valid time of the pulse signal, and the periods of the pulse signal and the periodic signal are the same; the first control signal and the second control signal are invalid when the input pulse signal is valid, the first voltage linearly rises when the input pulse signal is valid, the voltage is kept unchanged when the periodic signal is valid and the input pulse signal is invalid, the first control signal starts to linearly decline when the periodic signal is changed from valid to invalid, the first control signal is changed from valid to invalid when the first voltage is reduced to a fixed voltage, the second control signal is changed from invalid to valid, the magnitude of the first voltage is kept at the fixed voltage until the input pulse signal is changed from invalid to invalid, and the second control signal is changed from valid to invalid; the first control signal is a signal that characterizes a particular pulse width.
Description
Technical Field
The invention relates to the technical field of power electronics, in particular to a pulse generation circuit, a current detection circuit, a switching power supply and a pulse generation method.
Background
In circuits it is often necessary to find a specific moment of one input pulse, generating another specific pulse. In the prior art, an input pulse signal generates delay through an RC circuit, and a specific moment of the input pulse is found, so that another pulse is generated. However, since the resistance of the resistor and the capacitance of the capacitor have discrete values, the deviation is large, and thus the specific time of the input pulse cannot be found accurately. In addition, in the integrated circuit, the discrete type of RC parameters is larger than that of discrete elements, and the areas of resistance and capacitance are large, so that the area of the whole chip is enlarged, and the production cost of the integrated circuit is increased.
Disclosure of Invention
Accordingly, the present invention is directed to a pulse generating circuit, a current detecting circuit, a switching power supply and a pulse generating method, which are used for solving the problem that a specific moment of an input pulse cannot be precisely found and another pulse is generated in the prior art.
The technical solution of the present invention is to provide a pulse generating circuit, in which an input pulse signal and a periodic signal are changed from inactive to active at the same time, the active time of the periodic signal is longer than that of the pulse signal, and the periods of the pulse signal and the periodic signal are the same;
a first control signal and a second control signal are deactivated when the input pulse signal is active, a first voltage linearly rises when the input pulse signal is active, a voltage remains unchanged when the periodic signal is active and the input pulse signal is inactive, a linear decrease starts when the periodic signal is changed from active to inactive, and the first control signal is changed from inactive to active, the first control signal is changed from active to inactive when the first voltage is reduced to a fixed voltage, the second control signal is changed from inactive to active, the magnitude of the first voltage is maintained at the fixed voltage until the input pulse signal is changed from inactive to active, and the second control signal is changed from active to inactive;
the first control signal is a signal characterizing a particular pulse width.
Optionally, the pulse generating circuit includes: a waveform generation circuit, a comparison circuit, and a logic circuit;
the waveform generation circuit receives the first control signal, the second control signal and the input pulse signal, the output voltage of the waveform generation circuit is the first voltage, the waveform generation circuit is connected to the first input end of the comparison circuit, the fixed voltage is connected to the second input end of the comparison circuit, the output end of the comparison circuit is connected to the first input end of the logic circuit, the second input end of the logic circuit receives the input pulse signal, the third input end of the logic circuit receives the periodic signal, and the logic circuit outputs the first control signal and the second control signal;
alternatively, the logic circuit controls the first control signal and the second control signal to be inactive when the input pulse signal is active, the waveform generation circuit controls the first voltage to linearly rise when the input pulse signal is active, the voltage remains unchanged when the periodic signal is active and the input pulse signal is inactive, the periodic signal starts to linearly fall when the periodic signal is changed from active to inactive, and the logic circuit controls the first control signal to be changed from inactive to active; when the comparison circuit detects that the first voltage drops to the fixed voltage, the output of the comparison circuit jumps, the logic circuit detects that the output of the comparison circuit jumps, the first control signal is controlled to be changed from effective to ineffective, and the second control signal is controlled to be changed from ineffective to effective; the waveform generation circuit controls the magnitude of the first voltage to be maintained at the fixed voltage until the waveform generation circuit detects that the input pulse signal is changed from inactive to active, and controls the second control signal to be changed from active to inactive.
Optionally, the waveform generation circuit includes a first current source, a second current source, a first switch, a second switch, a third switch and a first capacitor,
the first current source and the first switch are connected in series in any order, and are a first series circuit, the second current source and the second switch are connected in series in any order, and are a second series circuit, wherein a first end of the first series circuit is connected to a high potential end, a second end of the first series circuit is connected to a first end of the second series circuit, and a second end of the second series circuit is connected to a low potential end; the common node of the first series circuit and the second series circuit is the output end of the waveform generation circuit; the fixed voltage is connected to the output terminal of the waveform generation circuit through the third switch, the first terminal of the first capacitor is connected to the output terminal of the waveform generation circuit, the second terminal is connected to the second terminal of the second series circuit,
the first switch is turned on when the input pulse signal is effective, and turned off when the input pulse signal is ineffective; the second switch is turned on when the first control signal is effective, and turned off when the input pulse signal is ineffective; the third switch is turned on at any time when the second control signal is active, and turned off at the rest of time.
Alternatively, the first voltage drops at a rate twice the rising rate, and the pulse width of the first control signal is half of the input pulse signal.
Optionally, the pulse generating circuit is used for a switching power supply, the switching power supply includes a first switching tube, a first inductor, a first freewheeling diode or a first synchronous rectifying tube, when the first switching tube is turned on, the first inductor current rises, when the first freewheeling diode or the first synchronous rectifying tube is turned on, the first inductor current drops, the first switching tube or the first freewheeling diode or the first synchronous rectifying tube is a power device, the period of the periodic signal is N times of the switching period, the effective time of each periodic signal is M times of the switching period, M and N are natural numbers, N is greater than M, N is greater than or equal to 2, M is greater than or equal to 1, and the input pulse signal is a conduction signal of one of the power devices in the periodic signal.
A further technical solution of the present invention is to provide a current detection circuit for a switching power supply, characterized in that: the power device comprises a current sampling circuit, wherein the current sampling circuit samples the current of the power device when the first control signal generated by the pulse generating circuit is changed from effective to ineffective, and the obtained current or voltage represents the average current of the power device.
Alternatively, the first control signals are generated by X pulse generating circuits that alternately operate, and the current sampling circuit samples the power device current when each of the first control signals changes from active to inactive, X being a natural number of 2 or more.
Optionally, the current detection circuit further includes a voltage holding circuit, and the voltage holding circuit receives the first control signal and the current or voltage representing the current magnitude of the power device, and holds the current or voltage representing the current magnitude of the power device when the first control signal is changed from valid to invalid, where the obtained current or voltage represents the input or output average current.
Optionally, the switching circuit further comprises a ratio circuit, wherein the ratio of the on time of the first switch tube to the switching period is a first ratio, the ratio of the on time of the first freewheeling diode or the first synchronous rectifying tube to the switching period is a second ratio, a third ratio is the sum of the first ratio and the second ratio, the ratio circuit receives the power tube on signal and the output signal of the voltage holding circuit, and the output size of the ratio circuit is the output signal of the voltage holding circuit multiplied by a third ratio, and the output current or the voltage represents the input or output average current.
A further technical solution of the present invention is to provide a switching power supply.
Another technical solution of the present invention is to provide a pulse generating method, which is characterized in that: the method comprises the steps that an input pulse signal and a periodic signal are changed from invalid to valid at the same moment, the valid time of the periodic signal is longer than that of the pulse signal, and the periods of the pulse signal and the periodic signal are the same;
a first control signal and a second control signal are deactivated when the input pulse signal is active, a first voltage linearly rises when the input pulse signal is active, a voltage remains unchanged when the periodic signal is active and the input pulse signal is inactive, a linear decrease starts when the periodic signal is changed from active to inactive, and the first control signal is changed from inactive to active, the first control signal is changed from active to inactive when the first voltage is reduced to a fixed voltage, the second control signal is changed from inactive to active, the magnitude of the first voltage is maintained at the fixed voltage until the input pulse signal is changed from inactive to active, and the second control signal is changed from active to inactive;
the first control signal is a signal characterizing a particular pulse width.
Compared with the prior art, the circuit structure and the method have the following advantages: the circuit is simple, and specific pulses with various widths can be generated according to input pulse signals by adjusting the rising and falling rates of the first voltage. Since the proportional accuracy of the first voltage rise and fall can be much higher than the accuracy of the RC parameter, the width accuracy of the specific pulse generated is high. The first voltage can be increased and decreased in a mode of charging and discharging the capacitor by adopting the current source, and in the integrated circuit, the area of the current source is far smaller than that of the resistor capacitor, so that the area of the whole chip is reduced, and the cost of the integrated circuit is reduced.
Drawings
FIG. 1 is a waveform diagram of the present invention;
FIG. 2 is a block diagram of a pulse generation circuit 100 according to the present invention;
FIG. 3 is a schematic circuit diagram of one embodiment of a waveform generation circuit 101 of the present invention;
fig. 4 (a) is a waveform diagram of the input pulse signal when the input pulse signal is the first switching tube on signal in the switching power supply of the present invention;
fig. 4 (b) is a waveform diagram of the switching power supply according to the present invention when the input pulse signal is the on signal of the first freewheeling diode or the first synchronous rectifier;
FIG. 5 is a circuit block diagram of a current detection circuit 200 according to the present invention;
FIG. 6 is a schematic circuit diagram of one embodiment of a current sampling circuit 201 of the present invention;
FIG. 7 is a schematic circuit diagram of another embodiment of a current sampling circuit 201 according to the present invention;
FIG. 8 is a schematic diagram of a first control signal of the current detection circuit 200 of the present invention generated by X alternately operating pulse generating circuits;
fig. 9 is a circuit block diagram of a current detection circuit 200 of the present invention including a voltage holding circuit 202;
FIG. 10 is a schematic circuit diagram of one embodiment of a voltage holding circuit 202 of the present invention;
FIG. 11 is a circuit block diagram of a current detection circuit 200 of the present invention including a ratio circuit 203;
FIG. 12 is a schematic circuit diagram of one embodiment of the ratio circuit 203 of the present invention;
fig. 13 is a waveform diagram of the ratio circuit 203 of the present invention.
Detailed Description
The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings, but the present invention is not limited to these embodiments only. The invention is intended to cover any alternatives, modifications, equivalents, and variations that fall within the spirit and scope of the invention.
In the following description of preferred embodiments of the invention, specific details are set forth in order to provide a thorough understanding of the invention, and the invention will be fully understood to those skilled in the art without such details.
The invention is more particularly described by way of example in the following paragraphs with reference to the drawings. It should be noted that the drawings are in a simplified form and are not to scale precisely, but rather are merely intended to facilitate and clearly illustrate the embodiments of the present invention.
Referring to fig. 1, the present invention provides a pulse generating circuit, in which an input pulse signal vpa and a periodic signal pha are changed from inactive to active at the same time, the period of the periodic signal pha is longer than the period of the pulse signal vpa, and the periods of the pulse signal vpa and the periodic signal pha are the same; in the figures, the active level is represented by a high level, and in general, it is considered that the active level means a logic high level, and the inactive level means a logic low level. But may be said to be active to be a logic low level and inactive to be a logic high level.
The first control signal td and the second control signal tr are inactive when the input pulse signal vpa is active, the first voltage V1 is linearly increased when the input pulse signal vpa is active, the voltage remains unchanged when the periodic signal pha is active and the input pulse signal vpa is inactive, the linear decrease starts when the periodic signal pha is changed from active to inactive, the first control signal td is changed from inactive to active, the first control signal td is changed from active to inactive when the first voltage V1 is decreased to a fixed voltage Vm, the second control signal tr is changed from inactive to active, the magnitude of the first voltage V1 is maintained at the fixed voltage Vm until the input pulse signal vpa is changed from inactive to active, and the second control signal tr is changed from active to inactive; the first control signal td is a signal representing a specific pulse width.
By adjusting the rate at which the first voltage V1 rises and falls, specific pulses of various widths can be generated from the input pulse signal vpa. Since the proportional accuracy of the rising and falling of the first voltage V1 can be much higher than the accuracy of the RC parameter, the width accuracy of the specific pulse generated is high.
In one embodiment, referring to fig. 2, the pulse generating circuit 100 includes: a waveform generation circuit 101, a comparison circuit 102, and a logic circuit 103;
the waveform generation circuit 101 receives the first control signal td, the second control signal tr and the input pulse signal vpa, the output voltage of the waveform generation circuit 101 is the first voltage V1, the waveform generation circuit is connected to the first input terminal of the comparison circuit 102, the fixed voltage Vm is connected to the second input terminal of the comparison circuit 102, the output terminal V3 of the comparison circuit 102 is connected to the first input terminal of the logic circuit 103, the second input terminal of the logic circuit 103 receives the input pulse signal vpa, the third input terminal of the logic circuit 103 receives the periodic signal pha, and the logic circuit 103 outputs the first control signal td and the second control signal tr;
in one embodiment, the logic circuit 103 controls the first control signal td and the second control signal tr to be inactive when the input pulse signal vpa is active, the waveform generation circuit 101 controls the first voltage V1 to linearly rise when the input pulse signal vpa is active, the voltage remains unchanged when the periodic signal pha is active and the input pulse signal vpa is inactive, the voltage starts to linearly fall when the periodic signal pha is changed from active to inactive, and the logic circuit 103 controls the first control signal td to be changed from inactive to active; when the comparison circuit 102 detects that the first voltage V1 drops to the fixed voltage Vm, the output V3 thereof jumps, the logic circuit 103 detects that the output of the comparison circuit 102 jumps, and controls the first control signal td to be changed from valid to invalid and the second control signal tr to be changed from invalid to valid; the waveform generation circuit 101 controls the magnitude of the first voltage V1 to be maintained at the fixed voltage Vm until the waveform generation circuit 101 detects that the input pulse signal vpa is changed from inactive to active, and controls the second control signal tr to be changed from active to inactive.
In one embodiment, the waveform generation circuit 101 includes a first current source 1013, a second current source 1015, a first switch 1012, a second switch 1014, a third switch 1011 and a first capacitor 1016,
the first current source 1013 and the first switch 1012 are connected in series in any order, and are a first series circuit, the second current source 1015 and the second switch 1014 are connected in series in any order, and are a second series circuit, a first end of the first series circuit is connected to a high potential end such as a power supply end of a system, a second end of the first series circuit is connected to a first end of the second series circuit, and a second end of the second series circuit is connected to a low potential end such as a reference ground of the system; the common node of the first series circuit and the second series circuit is the output terminal V1 of the waveform generation circuit 101; the fixed voltage Vm is connected to the output terminal V1 of the waveform generation circuit 101 through the third switch 1011, a first terminal of the first capacitor 1016 is connected to the output terminal V1 of the waveform generation circuit 101, a second terminal is connected to a second terminal of the second series circuit,
the first switch 1012 is turned on when the input pulse signal vpa is active and turned off when the input pulse signal vpa is inactive; the second switch 1014 is turned on when the first control signal td is active and turned off when the input pulse signal vpa is inactive; the third switch 1011 is turned on at any time when the second control signal tr is active, and is turned off at the rest of time.
When the input pulse signal vpa is valid, the first voltage V1 is linearly increased, the first switch 1012 is turned on, the second switch 1014 and the third switch 1011 are turned off; when the periodic signal pha is valid and the input pulse signal vpa is invalid, the first switch 1012, the second switch 1014 and the third switch 1011 are all turned off, the voltage of the first voltage V1 is kept unchanged, when the periodic signal pha is changed from valid to invalid, the second switch 1014 is turned on, the first switch 1012 and the third switch 1011 are turned off, and the first voltage V1 starts to linearly decrease; when the first control signal is changed from active to inactive and the second control signal is changed from inactive to active, the first switch 1012, the second switch 1014, and the third switch 1011 are all turned off, and the third switch 1011 is turned on at any time when the second control signal tr is active, so that the first voltage is maintained at the fixed voltage Vm.
By adjusting the rate at which the first voltage drops and rises, the width of the first control signal td can be adjusted. The first voltage is reduced at a rate n times the rising rate, and the pulse width of the first control signal td is 1/n of the input pulse signal, wherein n is a number greater than 1. In one embodiment, the first voltage drops at twice the rising rate, and the first control signal td has a pulse width half that of the input pulse signal;
in one embodiment, the pulse generating circuit is used for a switching power supply, the switching power supply comprises a first switching tube, a first inductor, a first freewheeling diode or a first synchronous rectifying tube, and when the first switching tube is conducted, the first inductor current i L When the first freewheeling diode or the first synchronous rectifier is turned on, the first inductor current i L Falling, the first inductance current i L The waveforms are shown in fig. 4 (a) and (b), the first switching tube or the first freewheeling diode or the first synchronous rectifying tube is a power device, the period of the periodic signal pha is N times of the switching period, each effective time of the periodic signal pha is M times of the switching period, M and N are natural numbers, N is greater than M, N is greater than or equal to 2, M is greater than or equal to 1, and the input pulse signal vpa is a conduction signal of one of the power devices in the periodic signal pha. As shown in fig. 4 (a) and (b), N is 2 and m is 1. In FIG. 4 (a), the pulse is inputThe flushing signal vpa is a first switching tube conduction signal, and the first switching tube conduction signal can be a signal for controlling the first switching tube to be conducted by a system, or can be a signal for detecting the conduction of a freewheeling diode by the system; in fig. 4 (b), the input pulse signal vpa is a first freewheeling diode or first synchronous rectifier turn-on signal. The freewheeling diode on-signal may be a signal that the system detects freewheeling diode on. When the switching power supply works stably, that is, the width of each switching period is consistent, the on time of the first switching tube is consistent, the on time of the first freewheeling diode or the first synchronous rectifying tube is also consistent, when the width of the first control signal td is half of the input pulse signal vpa, the high level is set to be effective, and the low level is set to be ineffective, in fig. 4 (a), the falling edge of the first control signal td is the midpoint of the on signal of the first switching tube; in fig. 4 (b), the falling edge of the first control signal td is the midpoint of the first freewheeling diode or the first synchronous rectifier turn-on signal.
Referring to fig. 5, a further technical solution of the present invention is to provide a current detection circuit 200 for a switching power supply, which includes a current sampling circuit 201, where the current sampling circuit 201 samples the current of the power device when the first control signal td generated by the pulse generating circuit 100 changes from active to inactive, and the resulting current or voltage characterizes the magnitude of the average current of the power device.
Referring to fig. 6, a current sampling circuit includes NMOS transistors 2011 and 2013, an operational amplifier 2012, a current mirror 2014, and a resistor 2015. The on-resistance of the NMOS2011 is k times that of the power tube 301, the gate of the NMOS2011 is connected to the gate of the power tube 301, the source of the NMOS2011 is connected to the source of the power tube 301, the drain of the power tube 301 is connected to the positive input of the operational amplifier 2012, the drain of the NMOS2011 is connected to the negative input of the operational amplifier 2012 and to the source of the NMOS2013, the output of the operational amplifier 2012 is connected to the gate of the NMOS2013, the drain of the NMOS2013 is connected to the input of the current mirror 2014, the output of the current mirror 2014 is connected to one end of the resistor 2015, the other end of the resistor 2015 is connected to the ground potential, and the output current of the current mirror 2014 or the voltage on the resistor 2015 is the current representing the magnitude of the power tube 301. The operational amplifier 2012 equalizes the voltages of the power tube 301 and the NMOS drain by adjusting the current flowing through the NMOS2011 and 2013, and since the resistance of the NMOS2011 is k times that of the power tube 301, the current on the NMOS2011 is 1/k times that on the power tube 301, and the current on the NMOS2011 is mirrored to the output terminal of the current mirror 2014 through the current mirror 2014, so that the output current of the current mirror 2014 and the voltage on the resistance 2015 are indicative of the current on the power tube 301.
Referring to fig. 7, an alternative current sampling circuit is shown, which includes MOS transistor 2111, MOS transistor 2113, MOS transistor 2115, MOS transistor 2116, a first current source and an operational amplifier 2114,
the on-resistance of the MOS tube 2111 and the MOS tube 2113 is k times of that of the power tube 301, the drain electrode of the MOS tube 2111 is connected with the source electrode of the power tube 301, the source electrode of the MOS tube 2111 is connected to the reference ground through the current source 2112, and the common end of the MOS tube 2111 and the current source 2112 is connected to the negative input end of the operational amplifier 2114; the drain electrode of the MOS tube 2113 is connected to the drain electrode of the switch tube, the source electrode of the MOS tube 2113 is connected to the drain electrode of the MOS tube 2115, the source electrode of the MOS tube 2115 is connected to the reference ground, and the common end of the MOS tube 2113 and the MOS tube 2115 is connected to the positive input end of the operational amplifier 2114; the gates of the MOS transistor 2111 and the MOS transistor 2113 are connected to a fixed voltage; the output end of the operational amplifier 2114 is connected to the gates of the MOS tube 2115 and the MOS tube 2116; the source of the MOS tube 2116 is connected to the ground, and the source of the MOS tube 2116 is the output end of the switch tube current detection circuit.
The operational amplifier 2114 adjusts the gate voltage of the MOS transistor 2115, so as to adjust the current of the MOS transistor 2115, so that the source voltages of the MOS transistor 2111 and the MOS transistor 2113 are equal, and since the current of the current source 2112 is I2112, the current of the MOS transistor 2113 is I301/k+i2112, where I301 is the current of the power transistor 301.
In one embodiment, as shown in fig. 8, the first control signals td are generated by X alternately operating pulse generating circuits, and the current sampling circuit samples the power device current when each of the first control signals td is changed from active to inactive, where X is a natural number equal to or greater than 2. For example, when the switching power supply is unstable, two pulse generating circuits that alternately operate may have the first control signal td in each switching period, so that the current of the power device may be sampled in each switching period.
Since the current sampling circuit 201 only characterizes the current required by the sampled rate tube when the first control signal td changes from active to inactive, in practice the current value needs to be maintained to obtain a constant voltage or current. Thus, referring to fig. 9, in one embodiment, the current detection circuit further comprises a voltage holding circuit 202. The voltage holding circuit 202 receives the first control signal td and the current or voltage representing the current level of the power device, and holds the current or voltage representing the current level of the power device when the first control signal td is changed from active to inactive, and the obtained current or voltage represents the input or output average current.
In a switching power supply, for example, a BUCK circuit and a BOOST circuit, when the switching power supply is operated in a Continuous Conduction Mode (CCM), a first switching tube is turned on, so that an inductor current iL rises, a first switching tube is turned off, a first freewheeling diode or a first synchronous rectifying tube is turned on, and the inductor current iL falls. In the BUCK circuit, the average value of the inductance current iL is equal to the output current, the current on the first switching tube is sampled at the moment of the middle point of the conduction of the first switching tube, and the sampled current is the output average current; or sampling the current on the first freewheel diode or the first synchronous rectifying tube at the midpoint moment of the signal conducted by the first freewheel diode or the first synchronous rectifying tube, wherein the sampled current is the output average current; in a BOOST circuit, the average value of the inductance current is equal to the input current, the current on the first switching tube is sampled at the moment of the middle point of the conduction of the first switching tube, and the sampled current is the input average current; or sampling the current on the first freewheel diode or the first synchronous rectifying tube at the midpoint moment of the signal conducted by the first freewheel diode or the first synchronous rectifying tube, wherein the sampled current is the input average current.
Referring to fig. 10, an embodiment of a voltage holding circuit 202 is shown, which is an embodiment of a voltage holding circuit 202, wherein a sampled voltage vsense representing the instantaneous current of a switching tube is equal to the voltage on a resistor 2015 in fig. 6, and is connected to a positive input terminal of an operational amplifier 2023 through a switch 2021, and is connected to a first terminal of a capacitor 2022, the other terminal of the capacitor 2022 is connected to a reference ground, a negative input terminal and an output terminal of the operational amplifier 2023 are connected, and is connected to the output terminal Vavg of the voltage holding circuit 202 through a switch 2024, the output terminal of the voltage holding circuit 202 is connected to the reference ground through a capacitor 2026, when a first control signal td is active, the switch 2021 is turned on, the switch 2024 is turned off, the voltage on the operational amplifier 2023 is connected to a voltage follower, and the output voltage thereof is the vsense voltage, when the first control signal td is inactive, the switch 2024 is turned off, and the voltage on the capacitor 2026 is held at the first control signal td when the first control signal td is inactive, and thus the output voltage of the voltage holding circuit 202 is turned on at the value of the first inactive voltage vsense.
Referring to fig. 11, in one embodiment, the current sampling circuit 200 further includes a ratio circuit 203, where the ratio of the on time of the first switching tube to the switching period is a first ratio, the ratio of the on time of the first freewheeling diode or the first synchronous rectifying tube to the switching period is a second ratio, a third ratio is a sum of the first ratio and the second ratio, the ratio circuit receives the on signal of the power tube and the output signal of the voltage holding circuit, and the magnitude of the output of the ratio circuit 203 is the output signal of the voltage holding circuit multiplied by a third ratio, and the output current or the voltage thereof represents the input or the output average current.
Referring to fig. 12 and 13, which show an embodiment of the ratio circuit 203, the output voltage Vavg of the voltage holding circuit 202 is connected to the input terminal of the voltage-to-current circuit 2031, the output terminal of the voltage-to-current circuit 2031 is connected to the first terminal of the capacitor 2033 through the switch 2032, the common terminal of the switch 2032 and the capacitor 2033 is Vcap, and is connected to the drain of the NMOS2035, the gate of the NMOS2035 is connected to the gate of the NMOS2036, and is connected to ground through the capacitor 2037, the sources of the NMOS2035 and 2036 are both connected to the ground, and the drain of the NMOS2035 is connected to the gate thereof through the switch 2034. Referring to fig. 13, taking the output of the ratio circuit 203 as the input voltage Vavg multiplied by the third ratio as an example, runsw is active when the first power transistor or the freewheeling diode or the synchronous rectifier is on, otherwise runsw is inactive, and SAH is a signal when runsw is changed from active to inactive. The switch 2032 is on when runsw is active and the switch 2032 is off when runsw is inactive. Switch 2034 is turned on when runsw becomes active for a time much less than the switching period and switch 2034 is turned off for the rest of the time. Since the gates of the NMOS2035 and the NMOS2036 are connected, and the sources are also connected, the current flowing through the NMOS2035 and the NMOS2036 is equal, that is, the output current Iout of the voltage-to-current circuit 2031 is i1, when runsw is effective, the switch 2032 is turned on, the current i1-Iout charges the capacitor 2033, when Vcap voltage rises, runsw is ineffective, the switch 2032 is turned off, the current Iout discharges the capacitor 2033, vcap voltage drops, and at the same time, the switch 2034 is turned on for a certain time, so that the voltage on the capacitor 2037 is kept at the peak voltage of Vcap, i1×trunk=iout×tsw, wherein, trunk is effective time, tsw is a switching period, and therefore iout=i1×tsw (trunk/Tsw), wherein (trunk/Tsw) is a third ratio. When the ratio circuit is the input multiplied by the first ratio, runsw is the first switching tube conduction signal, and when the ratio circuit is the input multiplied by the second ratio, runsw is the first freewheeling diode or the first synchronous rectifying tube conduction signal.
In a switching power supply, such as a BUCK circuit and a BOOST circuit, when operating in a Discontinuous Conduction Mode (DCM), a first switching tube is turned on to induce a current i L Rising, the first switch tube is turned off, the first freewheeling diode or the first synchronous rectifying tube is turned on, and the inductor current i L Falling when the inductance current i L And the first switch tube, the first freewheeling diode or the first synchronous rectifying tube is turned off when the current drops to zero, and the inductance current is zero.
In the BUCK circuit, when the BUCK circuit works in DCM, the average value of the inductance current is equal to the output current, the current on the first switching tube is sampled at the moment of the middle point of the conduction of the first switching tube, and the sampled current is multiplied by a third ratio to obtain the output average current; or sampling the current on the first freewheel diode or the first synchronous rectifying tube at the midpoint moment of the signal conducted by the first freewheel diode or the first synchronous rectifying tube, and multiplying the sampled current by a third ratio to obtain the output average current; and at the moment of the middle point of the conduction of the first switching tube, sampling the current on the first switching tube, and multiplying the sampled current by a first ratio to obtain the input average current.
In the BOOST circuit, when working in DCM, the average value of the inductance current is equal to the input current, the current on the first switching tube is sampled at the midpoint moment of the conduction of the first switching tube, and the sampled current is multiplied by a third ratio to obtain the input average current; or sampling the current on the first freewheel diode or the first synchronous rectifying tube at the midpoint moment of the signal conducted by the first freewheel diode or the first synchronous rectifying tube, and multiplying the sampled current by a third ratio to obtain the input average current; and sampling the current on the first free-wheeling diode or the first synchronous rectifying tube at the midpoint moment of the signal conducted by the first free-wheeling diode or the first synchronous rectifying tube, and multiplying the sampled current by a second ratio to obtain the output average current.
In a BUCK-BOOST circuit, when the circuit works in CCM or DCM, sampling the current on the first switching tube at the moment of the middle point of the conduction of the first switching tube, and multiplying the sampled current by a first ratio to obtain the input average current; and sampling the current on the first free-wheeling diode or the first synchronous rectifying tube at the midpoint moment of the signal conducted by the first free-wheeling diode or the first synchronous rectifying tube, and multiplying the sampled current by a second ratio to obtain the output average current.
A further technical solution of the present invention is to provide a switching power supply.
Another technical solution of the present invention is to provide a pulse generating method, in which an input pulse signal and a periodic signal are changed from inactive to active at the same time, the period of the periodic signal is longer than the period of the pulse signal, and the periods of the pulse signal and the periodic signal are the same;
a first control signal and a second control signal are deactivated when the input pulse signal is active, a first voltage linearly rises when the input pulse signal is active, a voltage remains unchanged when the periodic signal is active and the input pulse signal is inactive, a linear decrease starts when the periodic signal is changed from active to inactive, and the first control signal is changed from inactive to active, the first control signal is changed from active to inactive when the first voltage is reduced to a fixed voltage, the second control signal is changed from inactive to active, the magnitude of the first voltage is maintained at the fixed voltage until the input pulse signal is changed from inactive to active, and the second control signal is changed from active to inactive; the first control signal is a signal characterizing a particular pulse width.
In addition, although the embodiments are described and illustrated separately above, it will be apparent to those skilled in the art that some common techniques may be substituted and integrated between the embodiments, and that reference may be made to another embodiment without explicitly recited in one of the embodiments.
The above-described embodiments do not limit the scope of the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the above embodiments should be included in the scope of the present invention.
Claims (11)
1. A pulse generating circuit, characterized by: the pulse signal generating circuit is used for generating a pulse signal, comparing the pulse signal with the pulse signal, and outputting the pulse signal to the logic circuit;
a first control signal and a second control signal are deactivated when the input pulse signal is active, a first voltage linearly rises when the input pulse signal is active, a voltage remains unchanged when the periodic signal is active and the input pulse signal is inactive, a linear decrease starts when the periodic signal is changed from active to inactive, and the first control signal is changed from inactive to active, the first control signal is changed from active to inactive when the first voltage is reduced to a fixed voltage, the second control signal is changed from inactive to active, the magnitude of the first voltage is maintained at the fixed voltage until the input pulse signal is changed from inactive to active, and the second control signal is changed from active to inactive;
the first control signal is a signal representing a specific pulse width;
the waveform generation circuit receives the first control signal, the second control signal and the input pulse signal, is connected to a first input end of the comparison circuit, is connected to a second input end of the comparison circuit by a fixed voltage, is connected to a first input end of the logic circuit by an output end of the comparison circuit, receives the input pulse signal by a second input end of the logic circuit, receives the periodic signal by a third input end of the logic circuit, and outputs the first control signal and the second control signal.
2. The pulse generating circuit according to claim 1, wherein the logic circuit controls the first control signal and the second control signal to be inactive when the input pulse signal is active, the waveform generating circuit controls the first voltage to linearly rise when the input pulse signal is active, the voltage is kept unchanged when the periodic signal is active and the input pulse signal is inactive, the voltage starts to linearly fall when the periodic signal is changed from active to inactive, and the logic circuit controls the first control signal to be changed from inactive to active; when the comparison circuit detects that the first voltage drops to the fixed voltage, the output of the comparison circuit jumps, the logic circuit detects that the output of the comparison circuit jumps, the first control signal is controlled to be changed from effective to ineffective, and the second control signal is controlled to be changed from ineffective to effective; the waveform generation circuit controls the magnitude of the first voltage to be maintained at the fixed voltage until the waveform generation circuit detects that the input pulse signal is changed from inactive to active, and controls the second control signal to be changed from active to inactive.
3. The pulse generating circuit of claim 1, wherein the waveform generating circuit comprises a first current source, a second current source, a first switch, a second switch, a third switch, and a first capacitor, the first current source and the first switch being in series in any order, being a first series circuit, the second current source and the second switch being in series in any order, being a second series circuit, a first end of the first series circuit being connected to a high potential end, a second end of the first series circuit being connected to a first end of the second series circuit, a second end of the second series circuit being connected to a low potential end; the common node of the first series circuit and the second series circuit is the output end of the waveform generation circuit; the fixed voltage is connected to the output terminal of the waveform generation circuit through the third switch, the first terminal of the first capacitor is connected to the output terminal of the waveform generation circuit, the second terminal is connected to the second terminal of the second series circuit,
the first switch is turned on when the input pulse signal is effective, and turned off when the input pulse signal is ineffective; the second switch is turned on when the first control signal is effective, and turned off when the input pulse signal is ineffective; the third switch is turned on at any time when the second control signal is active, and turned off at the rest of time.
4. The pulse generating circuit of claim 1, wherein the first voltage decreases at twice the rate of rise and the first control signal has a pulse width that is half the input pulse signal.
5. The pulse generating circuit according to claim 4, wherein the switching power supply comprises a first switching tube, a first inductor, a first flywheel diode or a first synchronous rectifier tube, wherein when the first switching tube is turned on, the first inductor current rises, and when the first flywheel diode or the first synchronous rectifier tube is turned on, the first inductor current falls, and the first switching tube or the first flywheel diode or the first synchronous rectifier tube is a power device, the period of the periodic signal is N times of the switching period, the effective time of each of the periodic signals is M times of the switching period, M and N are natural numbers, N is greater than or equal to M, N is greater than or equal to 2, M is greater than or equal to 1, and the input pulse signal is a conduction signal of one of the power devices in the periodic signal.
6. A current detection circuit for a switching power supply, characterized by: comprising a current sampling circuit that samples a power device current when the first control signal generated by the pulse generating circuit according to claim 5 changes from active to inactive, the resulting current or voltage being indicative of the magnitude of the average current of the power device.
7. The current detecting circuit according to claim 6, wherein the first control signals are generated by X alternately operating pulse generating circuits, and the current sampling circuit samples the power device current when each of the first control signals is changed from active to inactive, X being a natural number of 2 or more.
8. The current detection circuit of claim 6, further comprising a voltage holding circuit that receives the first control signal and the current or voltage indicative of the magnitude of the power device current and holds the current or voltage indicative of the magnitude of the power device current when the first control signal changes from active to inactive, the resulting current or voltage being indicative of the input or output average current.
9. The current detection circuit of claim 6, further comprising a ratio circuit, wherein the ratio of the first switching tube on-time to the switching period is a first ratio, the ratio of the first freewheeling diode or the first synchronous rectifying tube on-time to the switching period is a second ratio, a third ratio is a sum of the first ratio and the second ratio, the ratio circuit receives the power tube on-signal and the output signal of the voltage holding circuit, and the ratio circuit outputs a magnitude that is the output signal of the voltage holding circuit multiplied by a third ratio, the output current or voltage of which characterizes the input or output average current.
10. A switching power supply, characterized by: a current detection circuit comprising any one of claims 6 to 9.
11. A pulse generation method, characterized in that: the method comprises the steps that an input pulse signal and a periodic signal are changed from invalid to valid at the same moment, the valid time of the periodic signal is longer than that of the pulse signal, and the periods of the pulse signal and the periodic signal are the same;
a first control signal and a second control signal are deactivated when the input pulse signal is active, a first voltage linearly rises when the input pulse signal is active, a voltage remains unchanged when the periodic signal is active and the input pulse signal is inactive, a linear decrease starts when the periodic signal is changed from active to inactive, and the first control signal is changed from inactive to active, the first control signal is changed from active to inactive when the first voltage is reduced to a fixed voltage, the second control signal is changed from inactive to active, the magnitude of the first voltage is maintained at the fixed voltage until the input pulse signal is changed from inactive to active, and the second control signal is changed from active to inactive;
the first control signal is a signal characterizing a particular pulse width.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720312190 | 2017-03-28 | ||
| CN201720312190X | 2017-03-28 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107425830A CN107425830A (en) | 2017-12-01 |
| CN107425830B true CN107425830B (en) | 2023-06-27 |
Family
ID=60434495
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201721107757.6U Withdrawn - After Issue CN207460122U (en) | 2017-03-28 | 2017-08-31 | A kind of pulse-generating circuit, current detection circuit and Switching Power Supply |
| CN201710774927.4A Active CN107425830B (en) | 2017-03-28 | 2017-08-31 | Pulse generation circuit, current detection circuit, switching power supply and pulse generation method |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201721107757.6U Withdrawn - After Issue CN207460122U (en) | 2017-03-28 | 2017-08-31 | A kind of pulse-generating circuit, current detection circuit and Switching Power Supply |
Country Status (1)
| Country | Link |
|---|---|
| CN (2) | CN207460122U (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN207460122U (en) * | 2017-03-28 | 2018-06-05 | 杰华特微电子（张家港）有限公司 | A kind of pulse-generating circuit, current detection circuit and Switching Power Supply |
| TWI685183B (en) * | 2018-07-04 | 2020-02-11 | 群光電能科技股份有限公司 | Hybrid-mode boost power factor corrector |
| CN112803923A (en) * | 2020-12-26 | 2021-05-14 | 沈小东 | Self-adaptive electroosmosis pulse generation device and electroosmosis pulse control method |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101847982A (en) * | 2009-01-22 | 2010-09-29 | 三洋电机株式会社 | Circuit for generating triangular wave |
| CN106385176A (en) * | 2016-10-19 | 2017-02-08 | 杰华特微电子（杭州）有限公司 | Switching power supply, control circuit thereof, and control method thereof |
| CN207460122U (en) * | 2017-03-28 | 2018-06-05 | 杰华特微电子（张家港）有限公司 | A kind of pulse-generating circuit, current detection circuit and Switching Power Supply |
-
2017
- 2017-08-31 CN CN201721107757.6U patent/CN207460122U/en not_active Withdrawn - After Issue
- 2017-08-31 CN CN201710774927.4A patent/CN107425830B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101847982A (en) * | 2009-01-22 | 2010-09-29 | 三洋电机株式会社 | Circuit for generating triangular wave |
| CN106385176A (en) * | 2016-10-19 | 2017-02-08 | 杰华特微电子（杭州）有限公司 | Switching power supply, control circuit thereof, and control method thereof |
| CN207460122U (en) * | 2017-03-28 | 2018-06-05 | 杰华特微电子（张家港）有限公司 | A kind of pulse-generating circuit, current detection circuit and Switching Power Supply |
Also Published As
| Publication number | Publication date |
|---|---|
| CN207460122U (en) | 2018-06-05 |
| CN107425830A (en) | 2017-12-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR100953362B1 (en) | Current-mode controlled switching regulator and control method therefor | |
| JP3467679B2 (en) | DC / DC converter | |
| US9966854B2 (en) | Synchronous rectification control method and control circuit and switching voltage regulator | |
| US10211741B2 (en) | Systems and methods for voltage regulation of primary side regulated power conversion systems with compensation mechanisms | |
| JP5151830B2 (en) | Current mode control type DC-DC converter | |
| US10218272B2 (en) | Control circuit and control method for switch power supply, and switch power supply | |
| US7777472B2 (en) | Current detector circuit and current mode switching regulator | |
| US9184659B2 (en) | Self-adaptive current-mode-control circuit for a switching regulator | |
| CN102141817B (en) | Buck voltage stabilizing circuit with load minimum energy point tracking (MEPT) circuit | |
| CN106877846B (en) | Pulse generation circuit, switching power supply circuit and average current calculation method | |
| US20140002041A1 (en) | Digital low drop-out regulator | |
| JP5347748B2 (en) | DC / DC converter and control method of DC / DC converter | |
| US9013166B2 (en) | DC-DC converter controller | |
| TW201338369A (en) | Switching power supply, its control circuit and method | |
| TW201722041A (en) | Synchronous BUCK DC-DC converter and method thereof | |
| CN107425830B (en) | Pulse generation circuit, current detection circuit, switching power supply and pulse generation method | |
| CN114337273B (en) | Control circuit with slope compensation and method | |
| US8643355B2 (en) | Method for generating a signal and structure therefor | |
| US8138740B2 (en) | Non-linear compensation ramp for current mode pulse width modulation | |
| US10770961B2 (en) | Power converter with adjustable ramp | |
| Chen et al. | Integrated current sensing circuit suitable for step-down dc-dc converters | |
| JP2010220355A (en) | Switching regulator | |
| KR101774601B1 (en) | Switching regulator control circuit and switching regulator | |
| CN219918721U (en) | Power converter and control circuit thereof | |
| CN117155072A (en) | Switching converter and control circuit thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| CB02 | Change of applicant information | ||
| CB02 | Change of applicant information |
Address after: 215600 west side of Guotai North Road, Zhangjiagang Economic and Technological Development Zone, Suzhou City, Jiangsu Province Applicant after: JOULWATT TECHNOLOGY (HANGZHOU) CO.,LTD. Address before: 215600, 5th Floor, Building A, Shazhouhu Science and Technology Innovation Park, Yangshe Town, Zhangjiagang, Suzhou City, Jiangsu Province Applicant before: JOULWATT TECHNOLOGY (HANGZHOU) CO.,LTD. |
|
| GR01 | Patent grant | ||
| GR01 | Patent grant |