CN107425236B

CN107425236B - Filtering integrated single-pole double-throw switch and microstrip line filtering integrated single-pole double-throw switch

Info

Publication number: CN107425236B
Application number: CN201710451497.2A
Authority: CN
Inventors: 纪玉雪; 许进; 李照照; 王欢
Original assignee: Xian Electronic Engineering Research Institute
Current assignee: Xian Electronic Engineering Research Institute
Priority date: 2017-06-15
Filing date: 2017-06-15
Publication date: 2019-12-17
Anticipated expiration: 2037-06-15
Also published as: CN107425236A

Abstract

The invention relates to a filtering integrated single-pole double-throw switch and a microstrip line filtering integrated single-pole double-throw switch.A common-stage parallel LC resonance circuit of a non-loading switch circuit, a middle-stage parallel LC resonance circuit of two groups of loading switch circuits and a final-stage parallel LC resonance circuit are connected through four coupling capacitors to form two signal circulation paths; under the control of direct current bias voltage with the same absolute value and opposite polarity, one signal circulation path has low loss and high selectivity band-pass filtering characteristics, and the other signal circulation path has high rejection stop band characteristics in a wider frequency range, so that the filtering integrated single-pole double-throw switch function is formed. The invention has the following advantages: the filter has the advantages that two component functions of the switch and the filter are integrated, the circuit is simple and compact in size, the on state has steep broadband band-pass filtering characteristics, the off state has full-resistance characteristics with high suppression degree, the ports have high isolation, and the filter has a high suppression function on harmonic waves in a wide frequency range.

Description

Filtering integrated single-pole double-throw switch and microstrip line filtering integrated single-pole double-throw switch

Technical Field

The invention belongs to the switch and filter technology, and relates to a filtering integrated single-pole double-throw switch and a microstrip line filtering integrated single-pole double-throw switch.

Background

The switch is one of key components of a radio frequency front end of a system such as time division multiplexing, switch beam forming arrays, multiple input and output and the like, and is used for realizing that a receiving and transmitting channel shares a pair of antennas and reducing the volume and redundancy of the radio frequency front end. The switch is also a key component of a numerical control phase shifter, a numerical control attenuator and the like. The conventional switch design mainly focuses on solving the problems of working frequency and bandwidth, insertion loss, isolation, port impedance matching, power capacity, switching speed, switch life, circuit size and the like, and the common implementation modes mainly include a mechanical switch, a ferrite switch, a solid-state switch p-i-n diode, a field effect transistor and the like, a radio frequency micro-electromechanical system switch and the like. Among them, the solid-state switch has the advantages of high feasibility, long service life, fast switching time, easy integration, medium power capacity, etc., and is most widely applied. While conventional switches can effectively address the above needs, the operating band is less steep and does not provide sufficient out-of-band rejection. Therefore, the switch usually needs to be cascaded with a filter to select and pass the desired signal, suppress out-of-band interference and noise, and further improve the signal-to-noise ratio of the system. Most of the current design methods are to separately and independently design the switch and the filter, and then cascade the switch and the filter by using 50 omega characteristic impedance lines. The design method not only increases the circuit area and the signal transmission mismatch loss, but also is not beneficial to saving the system cost. In fact, the industry and academia have begun to study the design of devices with the same operating band in a coordinated or fused manner. Therefore, by means of the design concept, the switch which integrates the switch and the filter to form the integrated filtering function can be effectively researched.

Disclosure of Invention

Technical problem to be solved

In order to avoid the defects of the prior art, the invention provides a filtering integrated single-pole double-throw switch and a microstrip line filtering integrated single-pole double-throw switch.

Technical scheme

A filtering integrated single-pole double-throw switch is characterized by comprising three resonant inductors L-L_tThree resonant inductors L_tTwo resonant inductors L, two resonant capacitors C_mA resonant capacitor C_pFour coupling capacitors C_efour DC blocking capacitors C_bFour choke resistors R_SWFour semiconductor diodes D_SW11、D_SW12、D_SW21And D_SW22Two DC bias voltages V_SW1、V_SW2(ii) a The resonant inductor L-L_tAnd a resonant inductor L_tHave a series relationship; four coupling capacitors C_eforming a series circuit with a center node formed by a resonant capacitor C_pWith a resonant inductor L-L_tA resonant inductor L_tThe common-stage parallel LC resonance circuit is grounded, wherein the resonance inductance L-L_tAnd a resonant inductor L_tThe middle nodes form a shared first input/output port; stringOne end of the parallel circuit is connected with the resonant capacitor C and the resonant inductor L-L_ta resonant inductor L_tFormed final parallel LC resonator ground and semiconductor diode D_SW12The negative polarity end is connected with a DC blocking capacitor C_bThe other end of the back earth is connected with the ground through a resonance capacitor C and a resonance inductor L-L_tA resonant inductor L_tFormed final parallel LC resonator ground and semiconductor diode D_SW22The negative polarity end is connected with a DC blocking capacitor C_bBack ground of which the semiconductor diode D_SW12negative terminal and blocking capacitor C_bThe node between the two is connected with a choke resistor R_SWConnecting a DC offset V_SW1Semiconductor diode D_SW22Negative terminal and blocking capacitor C_bThe node between the two is connected with a choke resistor R_SWConnecting a DC offset V_SW2(ii) a The and semiconductor diode D_SW12Adjacent resonant inductances L-L_tAnd a resonant inductor L_tThe middle node forms a second input/output port; the and semiconductor diode D_SW22Adjacent resonant inductances L-L_tAnd a resonant inductor L_tThe middle node forms a third input/output port; and a semiconductor diode D_SW12Two adjacent coupling capacitors C_eThe node between them is formed by a resonant capacitor C_mAn intermediate-stage parallel LC resonance circuit composed of a resonance inductor L, a semiconductor diode D and a grounding_SW11The negative polarity end is connected with a DC blocking capacitor C_bBack ground of which the semiconductor diode D_SW11Negative terminal and blocking capacitor C_bThe node between the two is connected with a choke resistor R_SWConnecting a DC bias voltage V_SW1(ii) a And a semiconductor diode D_SW22Two adjacent coupling capacitors C_ethe node between them is formed by a resonant capacitor C_mAn intermediate-stage parallel LC resonance circuit composed of a resonance inductor L, a semiconductor diode D and a grounding_SW21The negative polarity end is connected with a DC blocking capacitor C_bBack ground of which the semiconductor diode D_SW21Negative terminal and blocking capacitor C_bThe node between the two is connected with a choke resistor R_SWConnection ofDC bias V_SW2(ii) a The DC bias voltage V_SW1And V_SW2Voltages with equal absolute values and opposite polarities; when V is_SW1Is negative, V_SW2To be positive, the semiconductor diode D_SW11、D_SW12Cut-off, semiconductor diode D_SW21、D_SW22The second input/output port is turned on, the third input/output port is turned off, and signals flow in or out between the first input/output port and the second input/output port; when V is_SW1Is positive and negative_SW2When negative, the semiconductor diode D_SW11、D_SW12Conducting, semiconductor diode D_SW21、D_SW22When the first input/output port is turned off, the second input/output port is turned off, the third input/output port is turned on, and a signal flows in or out between the first input/output port and the third input/output port.

A structure for realizing the filtering integrated single-pole double-throw switch in claim 1 by adopting microstrip lines to realize quasi-lumped capacitance and inductance elements is characterized by comprising a metal cavity 1, a dielectric substrate 3 arranged on the metal cavity 1, three SMA connectors 2 and four semiconductor diodes D_SW11、D_SW12、D_SW21And D_SW22Four choke resistors R_SWFour DC blocking capacitors C_bEtching the circuit layer on the upper surface of the dielectric substrate and the grounding metal layer on the lower surface of the dielectric substrate; the circuit layer etched on the upper surface of the dielectric substrate comprises three 50-omega input and output feeders 4, four interdigital lines 5, five bent grounding high-resistance lines 6-1-1, 6-1-2, 6-2-1, 6-2-2, 6-3, five fan-shaped branch lines 7-1-1, 7-1-2, 7-2-1, 7-2-2 and 7-3 and a grounding through hole 8; the three SMA connectors 2 are arranged on three sides of the medium substrate 3; four interdigital lines 5 are four coupling capacitors C_eForming a series circuit; the middle position is connected with a fan-shaped branch line 7-3 as a resonant capacitor C_pThe bent grounding high-resistance wire 6-3 is a resonant inductor L-L_tAnd a resonant inductor L_tThe point A1 in the middle of the fold line of the bent high-resistance grounding wire 6-3 is connected with an SMA connector through a 50 omega input/output feeder line to serve as a first input/output port, wherein the bent high-resistance grounding wire between the point A1 and the grounding via hole 8 serves as a resonant inductor L_t(ii) a One end of the series circuit is connected with a fan-shaped branch line 7-1-1 and a bent grounding high-resistance line 6-1-1, the fan-shaped branch line 7-1-1 is a resonant capacitor C, and the resonant capacitor C passes through a semiconductor diode D_SW12The negative polarity end is connected with a DC blocking capacitor C_bBack ground of which the semiconductor diode D_SW12Positive polarity terminal and blocking capacitor C_bThe node between the two is connected with a choke resistor R_SWConnecting a DC offset V_SW1(ii) a The bent grounding high-resistance wire 6-1-1 is a resonance inductor L-L_tAnd a resonant inductor L_tThe point A2 at the middle position is connected with an SMA connector through a 50 omega input/output feeder line to serve as a second input/output port, wherein the bent grounding high-resistance line between the point A2 and the grounding via hole serves as a resonant inductor L_t(ii) a The other end of the series circuit is connected with a fan-shaped branch line 7-1-2 and a bent grounding high-resistance line 6-1-2, the fan-shaped branch line 7-1-2 is a resonant capacitor C, and the resonant capacitor C is connected with a semiconductor diode D_SW22The negative polarity end is connected with a DC blocking capacitor C_bBack ground of which the semiconductor diode D_SW22Positive polarity terminal and blocking capacitor C_bThe node between the two is connected with a choke resistor R_SWConnecting a DC offset V_SW2(ii) a The bent high-resistance wire 6-1-2 is a resonance inductor L-L_tAnd a resonant inductor L_tThe middle position A3 point is connected with an SMA connector through a 50 omega input/output feeder line to serve as a third input/output port, wherein the bent grounding high-resistance line between the A3 point and the grounding via hole serves as a resonant inductor L_t(ii) a And a semiconductor diode D_SW12The middle position of two adjacent interdigital wires is connected with a fan-shaped branch line 7-2-1 and a bent grounding high-resistance line 6-2-1, and the two adjacent interdigital wires are connected with each other through a semiconductor diode D_SW11The negative polarity end is connected with a DC blocking capacitor C_bRear grounded, semiconductor diode D_SW11Positive polarity terminal and blocking capacitor C_bThe node between the two is connected with a choke resistor R_SWConnecting a DC offset V_SW1(ii) a Wherein: the sector branch line 7-2-1 is a resonance capacitor C_mThe bent grounding high-resistance wire 6-2-1 is a resonant inductor L; and a semiconductor diode D_SW22The middle position of two adjacent interdigital wires 5 is connected with a fan-shaped branch line 7-2-2 and a bent grounding high-resistance line 6-2-2 and passes through a semiconductor diode D_SW21Negative electrodeThe neutral end is connected with a DC blocking capacitor C_bRear grounded, semiconductor diode D_SW21Positive polarity terminal and blocking capacitor C_bThe node between the two is connected with a choke resistor R_SWConnecting a DC offset V_SW2(ii) a Wherein: the sector branch line 7-2-2 is a resonance capacitor C_mThe bent grounding high-resistance wire 6-2-2 is a resonant inductor L; the DC bias voltage V_SW1And V_SW2Voltages with equal absolute values and opposite polarities; when V is_SW1Is negative, V_SW2To be positive, the semiconductor diode D_SW11、D_SW12Cut-off, semiconductor diode D_SW21、D_SW22The second input/output port is turned on, the third input/output port is turned off, and signals flow in or out between the first input/output port and the third input/output port; when V is_SW1Is positive and negative_SW2When negative, the semiconductor diode D_SW11、D_SW12Conducting, semiconductor diode D_SW21、D_SW22When the first input/output port is turned off, the second input/output port is turned off, the third input/output port is turned on, and a signal flows in or out between the first input/output port and the third input/output port.

The five bent grounding high-resistance lines 6-1-1, 6-1-2, 6-2-1, 6-2-2 and 6-3 are equal in width and length.

Advantageous effects

The invention provides a filtering integrated single-pole double-throw switch and a microstrip line filtering integrated single-pole double-throw switch, which adopt a semiconductor diode, a blocking capacitor, a choke resistor and direct-current bias voltage to form a switch circuit, and then connect a common-stage parallel LC resonance circuit without loading the switch circuit and intermediate-stage parallel LC resonance circuits and final-stage parallel LC resonance circuits of two groups of loading switch circuits through four coupling capacitors to form two signal circulation paths; under the control of direct current bias voltage with the same absolute value and opposite polarity, one signal circulation path has low loss and high selectivity band-pass filtering characteristics, and the other signal circulation path has high rejection stop band characteristics in a wider frequency range, so that the filtering integrated single-pole double-throw switch function is formed. The filtering integrated single-pole double-throw switch has a flexible circuit implementation form, and is realized by using microstrip lines to realize quasi-lumped capacitance and inductance, realizing resonant inductance by adopting bent grounding high-resistance lines, realizing resonant capacitance by adopting fan-shaped branch lines and realizing coupling capacitance by adopting interdigital lines. The invention has the following advantages: the filter has the advantages that two component functions of the switch and the filter are integrated, the circuit is simple and compact in size, the on state has steep broadband band-pass filtering characteristics, the off state has full-resistance characteristics with high suppression degree, the ports have high isolation, and the filter has a high suppression function on harmonic waves in a wide frequency range. The invention can reduce impedance mismatch loss, has low requirement on processing precision, simple realization, low manufacturing cost and convenient production.

Compared with the prior art, the invention has the advantages and beneficial effects that:

1. The functions of two components of a switch and a filter are integrated, so that impedance mismatch loss is reduced;

2. The filtering integrated single-pole double-throw switch has steep band-pass filtering characteristics when being switched on, and the relative bandwidth of a pass band can be more than 30%;

3. The filter integrated single-pole double-throw switch has the characteristics of high suppression degree and high isolation degree when being cut off;

4. The filtering integrated single-pole double-throw switch has a high harmonic suppression function in a wider frequency range;

5. The whole filtering integrated single-pole double-throw switch has low circuit complexity and low implementation cost, and can be implemented by adopting a flexible process according to the working frequency band.

Drawings

FIG. 1 is a schematic diagram of a filtering integrated single-pole double-throw switch lumped element circuit;

Fig. 2 is a structural diagram of a quasi-lumped capacitive and inductive element implemented using microstrip lines to implement the filtering integrated single-pole double-throw switch;

FIG. 3 is a schematic diagram of an ideal third order bandpass filter circuit;

Fig. 4 is a typical frequency response of example 1.

Detailed Description

The invention will now be further described with reference to the following examples and drawings:

Referring to fig. 3, considering that the filtering integrated single-pole double-throw switch related to the present invention is equivalent to a third-order bandpass filter in the on state, the implementation of the present invention starts with an ideal third-order bandpass filter. The resonant inductance L of FIG. 3 is due to the fact that the negative capacitance characteristic of the admittance inverter can be absorbed by the capacitance of the adjacent resonator_i-L_itResonant inductor L_itResonant capacitor C_iAnd an absorption capacitor C_ieForming a final parallel LC resonator, a resonant inductor L_i-L_itResonant inductor L_itResonant capacitor C_mAnd an absorption capacitor C_ieAn intermediate stage parallel LC resonator is constructed. Resonant frequency f of the final parallel LC resonator_esAnd the resonant frequency f of the intermediate-stage parallel LC resonator_msRespectively as follows:

Coupling capacitor C_ieThe coupling coefficient M corresponding to the formed admittance inverter can be determined by:

Wherein f is₀The center frequency of the third order band pass filter. The 50 omega feed line is connected with the resonant inductor L_i-L_itAnd a resonant inductor L_itBetween for input and output, resonant inductance L_itIs determined by the external quality factor Q of the final parallel LC resonator_eIs of a size of, and Q_eCan be calculated from the following formula:

Wherein

for the center frequency, ripple bandwidth and return loss of band-pass filtering characteristics when a given filtering integrated single-pole double-throw switch is switched on, the required coupling coefficient M and the external quality factor Q can be calculated according to the design theory of a coupled resonator filter_e. If the resonant inductance L is given_iThe initial value can be calculated by the following formula 1 and formula 2_i、C_imAnd C_ie(ii) a The corresponding L can be calculated from equation 3_it. Then, let L be L_i、L_t＝L_it、C＝C_i、C_m＝C_imAnd C_p＝C_iAs an initial value of the filtering integrated single-pole double-throw switch, two ideal third-order band-pass filters are connected to form a form shown in the attached figure 1. At this time, the resonant inductance L-L_tResonant inductor L_tAnd a resonance capacitor C_pA common-stage parallel LC resonator is formed, and the port is connected with the resonant inductor L-L_tResonant inductor L_tA common input/output port is formed; resonant inductor L and resonant capacitor C_mTwo middle-stage parallel LC resonators are formed; resonant inductor L-L_tResonant inductor L_tTwo final-stage parallel LC resonators are formed with the resonance capacitor C, and the second input/output port and the third input/output port are connected to the resonance inductor L-L_tAnd a resonant inductor L_tConstituting a common input/output port. Semiconductor diode D_SW11、D_SW12、D_SW21And D_SW22DC blocking capacitor C_bA choke resistor R_SWAnd a DC bias voltage V_SW1And V_SW2The four switching circuits are jointly formed and respectively loaded on the two middle-stage parallel LC resonators and the two last-stage parallel LC resonators for controlling the working frequency of the two middle-stage parallel LC resonators and the two last-stage parallel LC resonators. Blocking capacitor C_bThe functions of isolating direct current and communicating alternating current are realized; large-resistance choke resistor R_SWFor throttling ac, being semiconductor diodes D_SW11、D_SW12、D_SW21And D_SW22A dc bias current is provided. When the DC bias voltage V_SW1And V_SW2When positively charged, the semiconductor diode D_SW11、D_SW12、D_SW21And D_SW22on, it is equivalent to a small value of on-resistance R_onThe larger the DC bias current is, the larger the on-resistance R_onThe smaller; when the DC bias voltage V_SW1And V_SW2On negative charge, the semiconductor diode D_SW11、D_SW12、D_SW21And D_SW22Cut-off, which can be equivalent to a small value of reverse bias capacitance C_off. Coupling capacitor C_eThe middle-stage parallel LC resonator and the final-stage parallel LC resonator which are used as admittance inverters and connected with the common-stage parallel LC resonator and the left and right loading switch circuits form two signal circulation paths. Considering the parasitic parameter effect and the residual susceptance of the cut-off path of the semiconductor diode, the resonant capacitor C and the resonant capacitor C in fig. 1 can be considered_mAnd a resonance capacitor C_pThe calculation formula of (a) is modified as follows:

C≈C_i-C_off 4a

C_m≈C_im-C_off 4b

C_p≈C_i-C_e 4b

When V is_SW1Negative voltage, V_SW2When connected to a positive voltage, the semiconductor diode D_SW11And D_SW12Cut-off, semiconductor diode D_SW21And D_SW22Conducting, detuning the loading switch element middle-stage parallel LC resonator, the loading switch element final-stage parallel LC resonator and the sharing-stage parallel LC resonator in the path of the third input/output port to form a full-resistance characteristic with high suppression degree, and stopping the third input/output port; the loading switch element middle stage parallel LC resonator, the loading switch element final stage parallel LC resonator and the sharing stage parallel LC resonator in the second input/output port path form a band-pass filter characteristic, and signals can flow in or out between the port and the second input/output port. When V is_SW1Is connected with a positive voltage V_SW2When receiving negative voltage, the semiconductor diode D_SW11And D_SW12Conducting, semiconductor diode D_SW21And D_SW22Off, loaded switching element in second input/output port pathThe middle-stage parallel LC resonator, the final-stage parallel LC resonator loaded with the switching element and the common-stage parallel LC resonator are detuned and have the full-resistance characteristic of high suppression degree, and the second input/output port is cut off; the loading switch element middle-stage parallel LC resonator, the loading switch element final-stage parallel LC resonator and the sharing-stage parallel LC resonator in the path of the third input/output port form a band-pass filter characteristic, and signals can flow in or out between the port and the third input/output port.

The filtering integrated single-pole double-throw switch shown in figure 1 comprises a resonant inductor L-L_tA resonant inductor L_tAnd a resonant capacitor C_pA common-stage parallel LC resonance circuit consisting of two LC resonance circuits including a resonance inductor L and a resonance capacitor C_mThe middle-stage parallel LC resonance circuit consists of two resonance inductors L-L_tA resonant inductor L_tA final parallel LC resonance circuit consisting of a resonance capacitor C, and four coupling capacitors C_eFour semiconductor diodes D_SW11、D_SW12、D_SW21And D_SW22Four choke resistors R_SWFour DC blocking capacitors C_bAnd two DC bias voltages V_SW1And V_SW2Four switch circuits are formed. Three 50 omega feed lines are connected to the resonant inductor L-L_tAnd a resonant inductor L_tA first input/output port, a second input/output port and a third input/output port. The four switching circuits are loaded on the two middle-stage parallel LC resonant circuits and the two final-stage parallel LC resonant circuits and are used for controlling the working frequency of the two middle-stage parallel LC resonant circuits and the two final-stage parallel LC resonant circuits. A common-stage parallel LC resonance circuit without loading switch circuit via coupling capacitor C_eThe middle-stage parallel LC resonance circuit and the final-stage parallel LC resonance circuit of the loading switch circuit which are connected with two groups of different direct-current bias voltages form two signal circulation paths; under the control of direct current bias voltages with the same absolute value and opposite polarities, one signal circulation path has low loss and high selectivity band-pass filtering characteristics, and the other signal circulation path has high rejection stop band characteristics in a wider frequency range, so that the filtering integrated single-pole double-throw switch function is formed. The bandpass filter characteristic at turn-on can be usedThe typical coupled resonator filter design theory is comprehensively designed, and the order of the band-pass filtering characteristic can be controlled by reducing and increasing the middle-stage parallel LC resonant circuit of the loading switch circuit. The number of signal circulation paths can be reduced or increased by reducing or increasing the number of signal circulation paths through the coupling capacitor C_eThe structure is expanded into a filtering integrated single-pole single-throw switch or a filtering integrated single-pole multi-throw switch by only connecting one or more groups of middle-stage parallel LC resonant circuits and final-stage parallel LC resonant circuits of the loading switch circuit. The filtering integrated single-pole double-throw switch has flexible circuit implementation modes, such as discrete lumped elements, quasi-lumped elements, a lumped circuit and the like.

Resonance inductor L, resonance capacitor C in figure 1_mAnd a resonant capacitor C_pThe implementation can be realized by adopting discrete lumped elements, quasi lumped elements or integrated circuit technology and the like. Semiconductor diode D_SW11、D_SW12、D_SW21And D_SW22Should choose a low on-resistance R_onSmall reverse bias capacitance C_offIs implemented in commercial products or high performance p-i-n transistors, field effect transistors or bipolar transistors in active integrated circuit processes. Choke resistor R_SWDC blocking capacitor C_bCan be realized by using commercial discrete component products or integrated circuit related processes under the condition of meeting the required electrical performance. Fig. 2 is a structural diagram of a filtering integrated single-pole double-throw switch shown in fig. 1 implemented by using microstrip lines to implement quasi-lumped capacitance and inductance elements. The probe on the SMA connector 2 is in direct contact with the 50 Ω feeder 4. And the signal is transmitted in a quasi-TEM mode in the circuit layer on the upper surface of the dielectric substrate. Three connection points of three 50-omega input and output feeder lines 4 and three bent grounding high-resistance lines 6-1-1, 6-1-2 and 6-3 are A1, A2 and A3, and the high-resistance lines from the connection points A1, A2 and A3 to the grounding via hole 8 are used for realizing three resonant inductors L in the figure 1_t(ii) a The narrower the line width and the longer the distance of the bent grounding high-resistance lines 6-1-1, 6-1-2 and 6-3 are, the resonant inductor L_tThe larger. Four interdigitated lines 5 are used to implement the four coupling capacitors C of fig. 1_eThe longer the length of the interdigital line 5, the narrower the pitch, and the more the exponent, the coupling capacitance C_eThe larger the(ii) a The practical design length should be as narrow as possible to reduce parasitic inductance. The two bent grounding high-resistance lines 6-1-1 and 6-1-2 are used for realizing the resonance inductance L-L in the attached figure 1_tAnd a resonant inductor L_tTwo bent high-resistance grounding lines 6-2-1 and 6-2-2 are used for realizing the resonant inductor L in the attached drawing 1, and one bent high-resistance grounding line 6-3 is used for realizing the resonant inductor L-L in the attached drawing 1_tAnd a resonant inductor L_t(ii) a The five bending grounding high-resistance lines 6-1-1, 6-1-2, 6-2-1, 6-2-2 and 6-3 can be different in bending shape but set to be equal in line width and length, and the narrower the line width and the longer the length of the bending grounding high-resistance lines 6-1-1, 6-1-2, 6-2-1, 6-2-2 and 6-3 are, the larger the equivalent inductance is; in practical use, the line width should be as narrow as possible to reduce the parasitic capacitance. The two fan-shaped branch lines 7-1-1, 7-1-2 are used for realizing the resonance capacitor C in the attached figure 1, and the two fan-shaped branch lines 7-2-1, 7-2-2 are used for realizing the resonance capacitor C in the attached figure 1_ma fan-shaped branch 7-3 for implementing the resonant capacitor C of fig. 1_p(ii) a The longer the radius of the fan-shaped branch lines 7-1-1, 7-1-2, 7-2-1, 7-2-2 and 7-3 and the larger the radian, the larger the equivalent capacitance, and the radius of the fan-shaped branch lines should be as small as possible to reduce parasitic resonance in practical use. The cross finger line 5, the bent grounding high-resistance lines 6-1-1, 6-1-2, 6-2-1, 6-2-2 and 6-3 and the fan-shaped branch lines 7-1-1, 7-1-2, 7-2-1, 7-2-2 and 7-3 can be used for firstly calculating an initial value according to an empirical formula according to the required size, and then optimizing in full-wave electromagnetic simulation software to obtain the final size.

The above is a specific embodiment of the present invention, and those skilled in the art can manufacture a filtering integrated single-pole double-throw switch by applying the method disclosed in the present invention. The invention integrates the functions of two components of the switch and the filter, can reduce impedance mismatch loss, has low requirement on processing precision, simple realization, low manufacturing cost and convenient production, and can be conveniently used for radio frequency front ends of time division multiplexing, switch beam forming arrays, multiple input and output systems and the like.

Example 1

The implementation of the filtering integrated single-pole transceiver switch using microstrip lines to implement quasi lumped capacitance and inductance elements as shown in fig. 2 is specifically implemented. Arlon Di with the thickness of 0.508mm and the relative dielectric constant of 2.2 is adoptedThe center frequency, ripple bandwidth and return loss of the bandpass filter response of the clad 880 dielectric substrate were selected to be 1000MHz, 195MHz and 20dB, respectively. According to the coupled resonator filter design theory, the external quality factor 4.3767 and the coupling coefficient 0.2009 can be calculated, and if the initial value of the resonant inductor L in the attached drawing 1 is set as 11nH, the corresponding L is calculated_t＝4.79nH、C＝1.93pF、C_m＝1.3pF、C_p1.6pF and C_e0.471 pF. The width of the 50 Ω feeder 4 is fixed to 1.55mm, and the diameter of the ground via 8 is fixed to 0.5 mm. The line width of the bent grounding high-resistance line 6-1-1, 6-1-2, 6-2-1, 6-2-2 and 6-3 is selected to be 0.2mm, and the length is optimized to be 19.1 mm. The distances from the A1, A2 and A3 to the ground via 8 are optimized to be 9.08 mm. The radian of the fan-shaped branch lines 7-1-1, 7-1-2, 7-2-1, 7-2-2 and 7-3 is selected to be 90 degrees, the radius of the fan-shaped branch lines 7-1-1 and 7-1-2 is optimized to be 5.8mm, the radius of the fan-shaped branch lines 7-2-1 and 7-2-2 is optimized to be 2.8mm, and the radius of the fan-shaped branch lines 7-3 is optimized to be 3.7 mm. The line width of the cross finger lines 5 is selected to be 0.2mm, the indexes are selected to be 12, and the final distance and the final length are respectively 0.2mm and 3.0mm after optimization. Semiconductor diode D_SW11、D_SW12、D_SW21And D_SW22The DC blocking capacitance C is realized by using SMP1345-079LF, a product of Skyworks corporation, and by using 100pF lumped capacitance from Murata corporation_bChoke resistor R_SWthe selection was 5k omega. The size of the entire circuit layer including the feed circuit but not including the 50 Ω feed line 4 is only 0.12 λ_g×0.15λ_gHere λ_gShowing the guided wavelength of the 50 omega feed 4 on the dielectric substrate used at a frequency of 1000 MHz. Taking the second input/output port as on and the third input/output port as off as an example, fig. 4 shows a typical frequency response of the microwave filtering integrated single-pole double-throw switch designed by the structure of the present invention, and vice versa. When V is_SW1Is connected with-10V, V_SW2When +10V is connected, D_SW11And D_SW12Cut-off, D_SW21And D_SW22And the second input/output port is conducted, and the third input/output port is cut off. At this time, the total power consumption of the microwave filtering integrated single-pole double-throw switch is 0.2W. The port 2 in the conducting state has a band-pass filtering characteristic | S₂₁L, corresponding3dB relative bandwidth of 30.22%, return loss | S₂₂And the inhibition degree is better than 20dB in the stop band range of 1370MHz to 7010 MHz. Common port echo loss S₁₁The | consumption is better than 20 dB. The third input/output port in the cut-off state presents the total resistance characteristic | S₃₁The inhibition degree is better than 52.8dB around 1000MHz, and the inhibition degree is better than 14dB in the frequency range from DC to 8000 MHz. At 2500MHz, a significantly deteriorated suppression level of the parasitic frequency response is present, which is mainly due to the non-ideal properties of the semiconductor diode 9 used, with the higher-performance semiconductor diode D_SW11、D_SW12、D_SW21And D_SW22This result can be improved.

Claims

1. the utility model provides an integrated single-pole double-throw switch of filtering which characterized in that: comprises three resonant inductors L-L_tThree resonant inductors L_tTwo resonant inductors L, two resonant capacitors C_mA resonant capacitor C_pFour coupling capacitors C_eFour DC blocking capacitors C_bFour choke resistors R_SWFour semiconductor diodes D_SW11、D_SW12、D_SW21And D_SW22Two DC bias voltages V_SW1、V_SW2(ii) a The resonant inductor L-L_tAnd a resonant inductor L_tHave a series relationship; four coupling capacitors C_eForming a series circuit with a center node formed by a resonant capacitor C_pWith a resonant inductor L-L_tA resonant inductor L_tThe common-stage parallel LC resonance circuit is grounded, wherein the resonance inductance L-L_tAnd a resonant inductor L_tThe middle nodes form a shared first input/output port; one end of the series circuit is connected with the resonant capacitor C and the resonant inductor L-L_tA resonant inductor L_tFormed final parallel LC resonator ground and semiconductor diode D_SW12The negative polarity end is connected with a DC blocking capacitor C_bThe other end of the back earth is connected with the ground through a resonance capacitor C and a resonance inductor L-L_tA resonant inductor L_tFormed final stage parallel LC resonanceDevice ground and semiconductor diode D_SW22The negative polarity end is connected with a DC blocking capacitor C_bBack ground of which the semiconductor diode D_SW12Negative terminal and blocking capacitor C_bThe node between the two is connected with a choke resistor R_SWConnecting a DC offset V_SW1Semiconductor diode D_SW22Negative terminal and blocking capacitor C_bThe node between the two is connected with a choke resistor R_SWConnecting a DC offset V_SW2(ii) a And a semiconductor diode D_SW12Adjacent resonant inductances L-L_tAnd a resonant inductor L_tThe middle node forms a second input/output port; and a semiconductor diode D_SW22Adjacent resonant inductances L-L_tAnd a resonant inductor L_tThe middle node forms a third input/output port; and a semiconductor diode D_SW12Two adjacent coupling capacitors C_eThe node between them is formed by a resonant capacitor C_mAn intermediate-stage parallel LC resonance circuit composed of a resonance inductor L, a semiconductor diode D and a grounding_SW11The negative polarity end is connected with a DC blocking capacitor C_bback ground of which the semiconductor diode D_SW11Negative terminal and blocking capacitor C_bThe node between the two is connected with a choke resistor R_SWConnecting a DC bias voltage V_SW1(ii) a And a semiconductor diode D_SW22Two adjacent coupling capacitors C_eThe node between them is formed by a resonant capacitor C_mAn intermediate-stage parallel LC resonance circuit composed of a resonance inductor L, a semiconductor diode D and a grounding_SW21the negative polarity end is connected with a DC blocking capacitor C_bBack ground of which the semiconductor diode D_SW21Negative terminal and blocking capacitor C_bThe node between the two is connected with a choke resistor R_SWConnecting a DC offset V_SW2(ii) a The DC bias voltage V_SW1And V_SW2Voltages with equal absolute values and opposite polarities; when V is_SW1Is negative, V_SW2To be positive, the semiconductor diode D_SW11、D_SW12Cut-off, semiconductor diode D_SW21、D_SW22On, the second input/output port is on, the third input/output port is off, and the signal is output at the first input/output portThe port and the second input/output port flow in or out; when V is_SW1Is positive and negative_SW2When negative, the semiconductor diode D_SW11、D_SW12Conducting, semiconductor diode D_SW21、D_SW22When the first input/output port is turned off, the second input/output port is turned off, the third input/output port is turned on, and a signal flows in or out between the first input/output port and the third input/output port.

2. A structure for realizing the filtering integrated single-pole double-throw switch of claim 1 by adopting microstrip lines to realize quasi lumped capacitance and inductance elements, which is characterized in that: comprises a metal cavity (1), a medium substrate (3) arranged on the metal cavity (1), three SMA connectors (2) and four semiconductor diodes D_SW11、D_SW12、D_SW21And D_SW22Four choke resistors R_SWFour DC blocking capacitors C_bEtching the circuit layer on the upper surface of the dielectric substrate and the grounding metal layer on the lower surface of the dielectric substrate; the circuit layer etched on the upper surface of the dielectric substrate comprises three 50-omega input and output feeders (4), four interdigital lines (5), a first bent high-resistance grounding line (6-1-1), a second bent high-resistance grounding line (6-1-2), a third bent high-resistance grounding line (6-2-1), a fourth bent high-resistance grounding line (6-2-2), a fifth bent high-resistance grounding line (6-3), a first fan-shaped branch line (7-1-1), a second fan-shaped branch line (7-1-2), a third fan-shaped branch line (7-2-1), a fourth fan-shaped branch line (7-2-2), a fifth fan-shaped branch line (7-3) and a grounding via hole (8); the three SMA connectors (2) are arranged on three sides of the medium substrate (3); four interdigital lines (5) are four coupling capacitors C_eForming a series circuit; the middle position is connected with a fifth fan-shaped branch line (7-3) as a resonant capacitor C_pThe fifth bending grounding high-resistance wire (6-3) is a resonance inductor L-L_tAnd a resonant inductor L_tA point A1 in the middle of the fold line of the fifth bent high-resistance grounding wire (6-3) is connected with an SMA connector through a 50 omega input/output feeder line to serve as a first input/output port, wherein the bent high-resistance grounding wire between the point A1 and the grounding via hole (8) serves as a resonant inductor L_t(ii) a One end of the series circuit is connected with the first fan-shaped branch line (7-1-1) and the first bent groundingA high resistance line (6-1-1), a first fan-shaped branch line (7-1-1) as a resonance capacitor C passing through a semiconductor diode D_SW12The negative polarity end is connected with a DC blocking capacitor C_bBack ground of which the semiconductor diode D_SW12Negative terminal and blocking capacitor C_bThe node between the two is connected with a choke resistor R_SWConnecting a DC offset V_SW1(ii) a The first bending grounding high-resistance wire (6-1-1) is a resonance inductor L-L_tAnd a resonant inductor L_tThe point A2 at the middle position is connected with an SMA connector through a 50 omega input/output feeder line to serve as a second input/output port, wherein the bent grounding high-resistance line between the point A2 and the grounding via hole serves as a resonant inductor L_t(ii) a The other end of the series circuit is connected with a second fan-shaped branch line (7-1-2) and a second bent grounding high-resistance line (6-1-2), the second fan-shaped branch line (7-1-2) is a resonant capacitor C, and the resonant capacitor C is connected with a semiconductor diode D_SW22The negative polarity end is connected with a DC blocking capacitor C_bBack ground of which the semiconductor diode D_SW22Negative terminal and blocking capacitor C_bThe node between the two is connected with a choke resistor R_SWConnecting a DC offset V_SW2(ii) a The second bending grounding high-resistance wire (6-1-2) is a resonance inductor L-L_tAnd a resonant inductor L_tThe middle position A3 point is connected with an SMA connector through a 50 omega input/output feeder line to serve as a third input/output port, wherein the bent grounding high-resistance line between the A3 point and the grounding via hole serves as a resonant inductor L_t(ii) a And a semiconductor diode D_SW12The middle position of two adjacent interdigital wires is connected with a third fan-shaped branch line (7-2-1) and a third bending grounding high-resistance line (6-2-1), and the third bending grounding high-resistance line passes through a semiconductor diode D_SW11The negative polarity end is connected with a DC blocking capacitor C_bRear grounded, semiconductor diode D_SW11Negative terminal and blocking capacitor C_bThe node between the two is connected with a choke resistor R_SWConnecting a DC offset V_SW1(ii) a Wherein: the third fan-shaped branch line (7-2-1) is a resonance capacitor C_mThe third bending grounding high-resistance wire (6-2-1) is a resonance inductor L; and a semiconductor diode D_SW22The middle position of two adjacent interdigital wires (5) is connected with a fourth fan-shaped branch line (7-2-2) and a fourth bent grounding high-resistance line (6-2-2) and passes through a semiconductor diodePipe D_SW21The negative polarity end is connected with a DC blocking capacitor C_bRear grounded, semiconductor diode D_SW21Negative terminal and blocking capacitor C_bThe node between the two is connected with a choke resistor R_SWConnecting a DC offset V_SW2(ii) a Wherein: the fourth fan-shaped branch line (7-2-2) is a resonance capacitor C_mThe fourth bending grounding high-resistance wire (6-2-2) is a resonance inductor L; the DC bias voltage V_SW1And V_SW2Voltages with equal absolute values and opposite polarities; when V is_SW1Is negative, V_SW2To be positive, the semiconductor diode D_SW11、D_SW12Cut-off, semiconductor diode D_SW21、D_SW22The second input/output port is turned on, the third input/output port is turned off, and signals flow in or out between the first input/output port and the second input/output port; when V is_SW1Is positive and negative_SW2When negative, the semiconductor diode D_SW11、D_SW12Conducting, semiconductor diode D_SW21、D_SW22When the first input/output port is turned off, the second input/output port is turned off, the third input/output port is turned on, and a signal flows in or out between the first input/output port and the third input/output port.

3. The structure of the integrated single-pole double-throw switch for realizing the quasi-lumped capacitance and the filtering by adopting the microstrip line as claimed in claim 2 is characterized in that: the five bent high grounding resistance lines (6-1-1), (6-1-2), (6-2-1), (6-2-2) and (6-3) are equal in width and length.