CN107422993B - Processing device and system of embedded memory - Google Patents

Processing device and system of embedded memory Download PDF

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Publication number
CN107422993B
CN107422993B CN201710643370.0A CN201710643370A CN107422993B CN 107422993 B CN107422993 B CN 107422993B CN 201710643370 A CN201710643370 A CN 201710643370A CN 107422993 B CN107422993 B CN 107422993B
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emmc
processed
cpu
embedded memory
contacts
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CN107422993A (en
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黄彪
吕双
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Beijing Xiaomi Mobile Software Co Ltd
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Beijing Xiaomi Mobile Software Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0646Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
    • G06F3/0652Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0658Controller construction arrangements
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/60Software deployment
    • G06F8/61Installation
    • G06F8/62Uninstallation

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Software Systems (AREA)
  • Storage Device Security (AREA)

Abstract

The disclosure relates to a processing device and a processing system of an embedded memory, and belongs to the field of electronic technology application. The method comprises the following steps: the embedded memory EMMC comprises a placing area and a Central Processing Unit (CPU), wherein the placing area is used for placing an embedded memory EMMC to be processed; the placement area is provided with a plurality of second contacts which are used for being in one-to-one corresponding electrical contact with the first contacts on the EMMC to be processed, the CPU is provided with a plurality of third contacts, and the second contacts and the third contacts are connected in one-to-one correspondence through conductive pins; and the CPU is used for writing the obtained erasing program into the EMMC to be processed through the conductive pin after the EMMC to be processed is placed on the placing area so as to erase the content in the EMMC to be processed. The present disclosure enables recycling of EMMC. The present disclosure is used in processing embedded memory.

Description

Processing device and system of embedded memory
Technical Field
The present disclosure relates to electronic technology application, and more particularly, to a processing apparatus and system for an embedded memory.
Background
With the development of science and technology, for example, terminals such as mobile phones, computers, tablet computers and the like have become necessities of life of people, and users can store some information in the terminals.
In the prior art, a terminal includes an Embedded memory (EMMC) and a Central Processing Unit (CPU), contacts of the Embedded memory and the Central Processing Unit are welded in a one-to-one correspondence manner, the EMMC is bound with the CPU in software, and the CPU stores corresponding data into the EMMC after receiving a data storage operation triggered by a user.
However, when the CPU of the terminal has a problem, the user needs to replace the CPU and the corresponding EMMC together, and even if the CPU and the corresponding EMMC are detached from each other in hardware, the EMMC cannot be reused because of the binding relationship between the CPU and the EMMC in software. Therefore, the current EMMC processing method lacks flexibility and cannot realize the recycling of the EMMC.
Disclosure of Invention
In order to improve the flexibility of EMMC processing and realize the recycling of EMMC, the embodiment of the disclosure provides a processing device of an embedded memory. The technical scheme is as follows:
according to a first aspect of the embodiments of the present disclosure, there is provided a processing apparatus of an embedded memory, including:
the embedded memory EMMC comprises a placing area and a Central Processing Unit (CPU), wherein the placing area is used for placing an embedded memory EMMC to be processed;
the placement area is provided with a plurality of second contacts which are used for being in one-to-one corresponding electrical contact with the first contacts on the EMMC to be processed, the CPU is provided with a plurality of third contacts, and the second contacts and the third contacts are connected in one-to-one correspondence through conductive pins;
and the CPU is used for writing the obtained erasing program into the EMMC to be processed through the conductive pin after the EMMC to be processed is placed on the placing area so as to erase the content in the EMMC to be processed.
Optionally, the processing apparatus further comprises:
and the CPU is used for receiving the erasing program input by the computer equipment through the data line interface.
Optionally, the data line interface is a universal serial bus USB interface.
Optionally, the processing apparatus further comprises:
a memory connected to the CPU, the memory storing the erase program;
the CPU is used for acquiring the erasing program from the memory.
Optionally, the processing apparatus further comprises:
the main board, place the district with CPU sets up on the main board.
Optionally, all components in the motherboard on the terminal from which the to-be-processed EMMC comes are disposed on the motherboard.
Optionally, the processing device further includes a first display screen, where the first display screen is connected to the motherboard and is used to display information related to each component in the motherboard.
Optionally, the processing device includes:
and the power supply module is connected with the CPU and used for supplying power to the CPU.
Optionally, the processing apparatus further includes a power supply protection circuit, and the power supply module is connected to the power supply protection circuit.
Optionally, the processing apparatus further includes a second display screen, the second display screen is disposed between the power supply module and the CPU, and the second display screen is configured to display the magnitude of the current and/or the voltage input by the power supply module.
Optionally, the power supply module includes a rechargeable battery and/or a power input port connected to an external power source.
According to a second aspect of the embodiments of the present disclosure, there is provided a processing system of an embedded memory, including:
a processing device of a computer apparatus and an embedded memory;
an embedded memory placing area and a Central Processing Unit (CPU);
the placement area is provided with a plurality of second contacts which are used for being in one-to-one corresponding electrical contact with the first contacts on the EMMC to be processed, the CPU is provided with a plurality of third contacts, and the second contacts and the third contacts are connected in one-to-one correspondence through conductive pins;
the CPU is used for writing the obtained erasing program into the EMMC to be processed through the conductive pin after the EMMC to be processed is placed on the placing area so as to erase the content in the EMMC to be processed;
the computer equipment is connected with the processing device of the embedded memory through a data line interface.
The technical scheme provided by the embodiment of the disclosure can have the following beneficial effects:
according to the processing device of the embedded memory, the CPU in the processing device is used for writing the acquired erasing program into the EMMC to be processed through the conductive needle after the EMMC to be processed is placed on the placing area, so that the content in the EMMC to be processed is erased, software unbinding of the EMMC and the CPU is achieved, the flexibility of EMMC processing is improved, and recycling of the EMMC is achieved.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.
Drawings
In order to more clearly illustrate the embodiments of the present disclosure, the drawings that are needed to be used in the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present disclosure, and that other drawings can be obtained by those skilled in the art without inventive effort.
Fig. 1 is a schematic diagram illustrating an implementation environment related to an information recommendation method provided in some embodiments of the present invention according to the related art.
Fig. 2 is a schematic structural diagram of a processing apparatus of an embedded memory according to an exemplary embodiment.
Fig. 3 is a schematic diagram of another processing apparatus for embedded memory according to an example embodiment.
FIG. 4 is a schematic diagram illustrating a pending EMMC, according to an example embodiment.
FIG. 5 is a schematic diagram of a CPU shown in accordance with an exemplary embodiment.
Fig. 6 is a block diagram illustrating a processing device of an embedded memory according to an example embodiment.
Fig. 7 is a block diagram illustrating a processing device of an embedded memory according to another exemplary embodiment.
Fig. 8 is a schematic diagram illustrating a structure of another processing apparatus for an embedded memory according to an exemplary embodiment.
Fig. 9 is a block diagram illustrating a processing device of an embedded memory according to an example embodiment.
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and together with the description, serve to explain the principles of the disclosure.
Detailed Description
To make the objects, technical solutions and advantages of the present disclosure more clear, the present disclosure will be described in further detail with reference to the accompanying drawings, and it is apparent that the described embodiments are only a part of the embodiments of the present disclosure, not all of the embodiments. All other embodiments, which can be derived by one of ordinary skill in the art from the embodiments disclosed herein without making any creative effort, shall fall within the scope of protection of the present disclosure.
With the development of science and technology, for example, terminals such as mobile phones, computers, tablet computers and the like have become necessities of life of people, and users can store some information in the terminals. In the prior art, a terminal comprises an EMMC and a CPU, contacts of the EMMC and the CPU are welded in a one-to-one correspondence mode, the EMMC is bound with the CPU on software, and the CPU stores corresponding data into the EMMC after receiving data storage operation triggered by a user.
However, when the CPU of the terminal has a problem, the user must replace the CPU and the corresponding EMMC together, and even if the CPU and the corresponding EMMC are separated from each other in hardware, the EMMC cannot be reused because of the binding relationship between the CPU and the EMMC in software.
To solve the problem, an embodiment of the present disclosure provides a processing apparatus for an embedded memory, and please refer to fig. 1, which is a schematic diagram illustrating an implementation environment related to an information recommendation method provided in some embodiments of the present invention. The implementation environment may include: a computer device 110 and a processing means 120 of embedded memory.
The computer device 110 may be a computer or other device with processing function, and the processing means 120 of the embedded memory may include a placement area and a CPU of the EMMC. The computer device 110 and the processing device 120 of the embedded memory can be connected through a wired network or a wireless network.
Fig. 2 and 3 are schematic structural diagrams illustrating a processing apparatus of an embedded memory according to an exemplary embodiment, and as shown in fig. 2 and 3, the apparatus includes:
a placement area 201 and a CPU202 (not shown in fig. 2 and 3). The placement area 201 is used for placing an EMMC203 to be processed.
Fig. 2 is a schematic diagram illustrating a processing apparatus of the embedded memory when the to-be-processed EMMC203 is not placed in the placement area 201, and fig. 3 is a schematic diagram illustrating a processing apparatus of the embedded memory when the to-be-processed EMMC203 is placed in the placement area 201.
The CPU202 and the EMMC203 to be processed have the same model and the same contact setting (for example, the number of contacts and the positions of the contacts are the same), so that the contacts of the CPU202 and the EMMC203 to be processed are correspondingly set. As shown in fig. 4, a plurality of first contacts a are disposed on the EMMC203 to be processed, correspondingly, as shown in fig. 2, a plurality of second contacts B for making one-to-one electrical contact with the plurality of first contacts a are disposed on the placement region 201, as shown in fig. 5, a plurality of third contacts C are disposed on the CPU202, each third contact C is connected with a conductive pin D, the plurality of second contacts B and the plurality of third contacts C are connected in one-to-one correspondence through the conductive pins D, where the conductive pins are also referred to as pin pins, and the conductive pins and the contacts are used for electrical signal communication between the CPU and the EMMC.
It should be noted that, in practical applications, since the placement area 201 is disposed above the CPU202 and the CPU202 is directly connected through the conductive pin D, the third contact C is not shown in fig. 2, and since the placement area 201 where the EMMC203 to be processed is placed is shielded by the EMMC203, the second contact B and the third contact C are not shown in fig. 3.
In the embodiment of the present disclosure, the CPU202 is configured to write the acquired erasing program into the to-be-processed EMMC203 through the conductive pin D after placing the to-be-processed EMMC203 on the placing area 201, so as to erase the content in the to-be-processed EMMC 203.
The erasing procedure is used to erase the content in the EMMC203 to be processed, and erasing the content in the EMMC203 to be processed means that the CPU202 erases the information in the CPU previously stored in the EMMC203 to be processed according to the erasing procedure and restores the factory settings of the EMMC203, instead of formatting the EMMC203 to be processed (formatting means that all files in the EMMC203 to be processed are cleared).
In practical application, the staff can collect the CPU and the EMMC that the hardware in the terminal that the CPU broke down and binds (namely one-to-one correspondence welding), then through the welding point on the CPU and the EMMC that bind to the hardware heat treatment, make the welding point melting, the EMMC breaks away from the CPU, thereby realize separating CPU and the EMMC that corresponds on the hardware, if after the welding point melting, the damage appears in the contact on the EMMC, can repair the contact through the mode of planting the ball again, the EMMC after repairing is the EMMC that treats processing promptly, of course, if after the welding point melting, the contact on the EMMC does not appear the damage, can be directly regard this EMMC as the EMMC that treats processing. Then, the EMMC to be processed may be placed in the placing area of the processing apparatus of the above-described in-cell memory, and since a worker may affect the performance of the EMMC by directly holding the EMMC to be processed by hand when placing the EMMC to be processed in the placing area, the worker may suck the EMMC to be processed up and place the EMMC in the placing area by the electrostatic prevention vacuum pen. And finally, writing an erasing program into the EMMC to be processed by the CPU of the processing device of the embedded memory, so that the content in the EMMC can be erased.
It should be noted that, the to-be-processed EMMC and the placement area may be provided with alignment marks, and the alignment marks may be protrusions or grooves of a specific shape, for example, the to-be-processed EMMC is provided with a circular groove, and the placement area is provided with a circular protrusion.
It should be noted that, the staff may collect a plurality of EMMCs to be processed in the above manner, and then sequentially perform unbinding on software through the processing device of the embedded memory, so as to implement batch unbinding, thereby improving the unbinding efficiency.
In practical applications, the processing apparatus of the embedded memory may further include a bearing component, where the bearing component is used for bearing various components in the processing apparatus of the embedded memory, such as a motherboard, a first display screen, a second display screen, a power supply module, a power supply protection circuit, and the like. The carrier may be a carrier table or a carrier housing.
Because when the processing apparatus at this embedded memory during operation, can appear because external collision leads to pending EMMC to break away from the condition of placing the district, and then breaks off the course of work of the processing apparatus of this embedded memory, arouses to unbundle the condition of failing, therefore this embedded memory can also include seat apron, this seat apron can be dismantled with the carrier and be connected or swing joint, when not placing pending EMMC on placing the district, seat apron lock is placed and is being placed the district top, plays dustproof effect. When should place the district and need place pending EMMC, lift the seat apron, then set up pending EMMC on placing the district, detain the seat apron again and put on placing the district of placing pending EMMC, can avoid external collision and lead to pending EMMC to break away from the condition of placing the district like this.
To sum up, according to the processing apparatus of an embedded memory provided in the embodiment of the present disclosure, after the CPU in the processing apparatus is used to place the to-be-processed EMMC on the placement area, the acquired erase program is written into the to-be-processed EMMC through the conductive pin to erase the content in the to-be-processed EMMC, so that software unbinding between the EMMC and the CPU is achieved, and thus the flexibility of EMMC processing is improved, and cyclic utilization of the EMMC is achieved.
In practical applications, the erase program may be written in the computer in advance and then obtained by the CPU in the processing apparatus of the embedded memory, and the way of obtaining the erase program by the CPU may be various, and the structure of the processing apparatus of the embedded memory may be changed accordingly. The embodiments of the present disclosure are illustrated by taking the following two implementation manners as examples:
in a first implementation manner, a processing apparatus of an embedded memory obtains an erase program provided by a computer device through a data line interface, as shown in fig. 6, the processing apparatus 200 of the embedded memory includes: a data line interface 204 and a CPU 202. Of course, the processing device 200 may include other structures as described above with reference to fig. 2 and 3, and is not shown in fig. 6.
As shown in fig. 6, a data line is connected between the computer device 110 and the data line interface 204, and the data line interface 204 is connected with the CPU202, further, the computer device 110 transmits the erase program to the data line interface 204 through the data line, and further transmits the erase program to the CPU202 to implement the unbinding of the CPU202 and the EMMC203 software to be processed, wherein the computer device 110 is connected with the data line through the data line interface, and the data line interface may be a Universal Serial Bus (USB) interface connection, wherein the USB interface is also called a Serial interface, and the USB interface has multiple types, in the embodiment of the disclosure, the USB interface of the computer device 110 may be a USB male interface (also called an a-type plug), the data line interface 204 may be a mini USB male interface (such as an a-type plug or a B-type plug) or a Micro USB, wherein the mini USB is also called a Micro USB, is a portable version of the USB 2.0 standard.
In practical applications, since the data line only connects the USB interface of the computer device 110 with the data line interface 204, the erasing program needs to be first introduced into the USB interface of the computer device 110, an operator may download a terminal emulator operating program on the computer device 110, where the terminal emulator operating program may be a secureecrt.exe operating program, which is a terminal emulation program, and simply, software of a host such as a UNIX (chinese: you nis) server is logged in under a Windows system, and the erasing program is stored in the UNIX server.
Further, it is assumed that the computer device 110 performs data transmission with the processing device 200 of the embedded memory through its own USB interface and the Micro USB interface of the processing device 200 of the embedded memory, the computer device 110 may transmit the erasing program to the USB interface of the computer device 110 through the terminal emulator running program, and the USB interface transmits the erasing program to the Micro USB interface of the processing device 200 of the embedded memory through the data line and transmits the erasing program to the CPU202 through the Micro USB interface, so that the CPU202 unbundles the to-be-processed EMMC203 from the original CPU in software.
Correspondingly, in the software unbinding process, the following operation modes need to be executed by the staff: first, the on/off key of the processing device of the embedded memory is turned on and the computer device 110 is connected to the data line interface 204 through the data line; secondly, the terminal emulator running program is opened in the computer device 110 and corresponding parameters are set, which may be: protocol: serial, port: COM4, baud rate: 115200, data bits: 8. parity checking: none, stop bit: 1; the processing means operating the inline memory then enters a FASTBOOT (chinese: fast boot) mode in which the erase program may be flushed from the computer device 110 to the processing means of the inline memory. There are various triggering modes for entering the fastroom mode, for example, the button 212 and the button 214 shown in the lower right corner of fig. 8 are pressed at the same time to trigger entering the fastroom mode, and the button 212 is a volume-down switch for controlling the volume to be lowered; the button 214 is a power on/off button for controlling the processing device of the embedded memory to be turned on or off. In practical applications, after the erasing procedure is flushed to the processing device of the embedded memory, a ResetEMMC (i.e., reset EMMC) folder appears on the computer device 110, and finally, the operator triggers the restart script to run by a triggering manner such as double-clicking the restart script (e.g., rsest. After determining that the software unbinding is successful, the computer device displays an unbinding success indication, for example, pops up "success reset", which indicates that the unbinding of the to-be-processed EMMC203 from the original CPU software is achieved. The restart script is an erasing program.
In a second implementation manner, a processing apparatus of an embedded memory acquires an erase program from a memory, such as another processing apparatus 200 of an embedded memory shown in fig. 7, the processing apparatus includes: memory 205 and CPU 202. Of course, the processing device 200 may include other structures as described above with reference to fig. 2 and 3, and is not shown in fig. 7.
As shown in fig. 7, the CPU202 is connected to the memory 205, wherein the memory 205 stores an erase program, and the CPU202 is configured to obtain the erase program from the memory 205.
It should be noted that there are two methods for storing the erase program in the memory, the first method is: when the memory is produced, directly writing an erasing program into the memory through computer equipment; and the second method comprises the following steps: the data line interface shown in fig. 6 is provided on the processing apparatus 200 of the embedded memory, the CPU202 obtains the erase program provided by the computer device through the data line interface, and stores the erase program in the memory 205, the erase program only needs to be obtained once, and the erase program can be repeatedly used subsequently for different to-be-processed EMMCs.
It should be noted that the processing apparatus of the embedded memory may further be provided with a Wireless transmission module, for example, a bluetooth module or a wifi (Wireless Fidelity, wifi) module, and correspondingly, the computer device may also be provided with a Wireless transmission module, and the processing apparatus of the embedded memory may obtain the erasing program provided by the computer device through the Wireless transmission module, which is not described in detail in this disclosure.
Fig. 8 is a schematic diagram illustrating another processing apparatus of an embedded memory according to an exemplary embodiment, and an EMMC203 to be processed is placed on the placement area 201 shown in fig. 8, which can be specifically seen from fig. 3.
Further, as shown in fig. 8, the processing apparatus of an embedded memory provided in the embodiment of the present disclosure may further include: mainboard 206, first display screen 207, power module 208, power supply protection circuit 209, second display screen 210, power module 208 is connected with power supply protection circuit 209.
The components arranged on the motherboard 206 and all the components in the motherboard on the terminal from which the to-be-processed EMMC203 comes are identical in structure and function, so that the operating environment of the terminal from which the to-be-processed EMMC203 comes can be simulated, the all the components include the CPU202, but the placing region 201 is arranged above the CPU202 and is directly connected through the conductive pin D, and the CPU202 is shielded by the placing region 201, so the CPU202 is not shown in fig. 8, and the structure of the CPU202 can refer to fig. 5.
The first display screen 207 is connected to the main board 206, and the first display screen 207 is configured to display information related to each component in the main board 206. The function of the first display 207 can refer to the function of the terminal simulated by the processing device of the embedded memory, for example, if the main board 206 is provided with a temperature sensor, the first display 207 can display the temperature detected by the temperature sensor.
The power supply module 208 may include a power input port 2081 connected to an external power source and/or a rechargeable battery 2082, wherein the power input port may be a USB port, and the rechargeable battery may be a lithium battery. Fig. 8 illustrates that the power supply module 208 may include a power input port 2081 connected to an external power source and a rechargeable battery 2082.
On the first hand, when the power supply module 208 includes only the power input port 2081, the power input port 2081 is connected with the CPU202, an external power source can supply power to the CPU202 through the power input port 2081, correspondingly, the power supply protection circuit 209 can be disposed between the power input port 2081 and the CPU202, the power supply protection circuit 209 can provide overload protection for the CPU202, when the current input from the power input port is greater than the preset current threshold, the power supply protection circuit 209 disconnects the connection between the power input port 2081 and the CPU202, prevent the CPU202 from being damaged due to the excessive current, at this time, the function of the power supply protection circuit 209 is equivalent to a fuse.
In the second aspect, when the power supply module 208 only includes the rechargeable battery 2082, the rechargeable battery 2082 is connected to the CPU202, the rechargeable battery 2082 supplies power to the CPU202, and correspondingly, the power supply protection circuit 209 may be disposed between the rechargeable battery 2082 and the CPU202, the power supply protection circuit 209 may provide over-discharge protection for the rechargeable battery 2082, and when the current output by the rechargeable battery 2082 is smaller than the preset current threshold or the output voltage is smaller than the preset voltage threshold, the power supply protection circuit 209 disconnects the rechargeable battery 2082 from the CPU202, thereby preventing the rechargeable battery 2082 from being damaged due to over-discharge. In this application scenario, the rechargeable battery 2082 may be detached, and when charging is required, it may be detached for charging and then installed on the processing device of the embedded memory after charging is completed.
In the third aspect, when the power supply module 208 includes the power input port 2081 and the rechargeable battery 2082, the rechargeable battery 2082 is connected to the power input port 2081 and the CPU202, respectively, an external power source can charge the rechargeable battery 2082 through the power input port 2081, the rechargeable battery 2082 can supply power to the CPU202, of course, the power input port 2081 can also be connected to the CPU202, and when the rechargeable battery 2082 stops supplying power to the CPU202, the external power source can supply power to the CPU202 through the power input port 2081. Correspondingly, the power supply protection circuit 209 may include an overcharge protection circuit and an overdischarge protection circuit, where the overcharge protection circuit is disposed between the power input port 2081 and the rechargeable battery 2082 to provide overcharge protection for the rechargeable battery 2082, and when the current input to the rechargeable battery 2082 is greater than the preset current threshold or the input voltage is greater than the preset voltage threshold, the overcharge protection circuit may disconnect the connection between the rechargeable battery 2082 and the power input port 2081, so as to prevent the rechargeable battery 2082 from being damaged due to overcharge; the over-discharge protection circuit may be disposed between the rechargeable battery 2082 and the CPU202, and when the current output by the rechargeable battery 2082 is less than a preset current threshold or the voltage output by the rechargeable battery 2082 is less than a preset voltage threshold, the power supply protection circuit 209 disconnects the rechargeable battery 2082 from the CPU202, thereby preventing the rechargeable battery 2082 from being damaged due to over-discharge. Of course, the power supply protection circuit 209 also includes a fuse that provides overload protection to the CPU202 as shown in the first aspect, and the fuse is provided between the CPU202 and the rechargeable battery 2082.
It should be noted that, when the processing device of the embedded memory is powered by the external power source, the external power source may be a regulated power source, wherein the regulated voltage provided by the regulated power source to the processing device of the embedded memory may be 3.8-4.2 volts, and the current limit is 3 amperes, that is, the voltage passed by the processing device of the embedded memory is between 3.8-4.2 volts, and the maximum current that can be passed by the processing device of the embedded memory is 3 amperes.
Further, a second display screen 210 is disposed between the power supply module 208 and the CPU202, and the second display screen 210 is used for displaying the magnitude of the current and/or the voltage input by the power supply module 208 when the power supply module 208 supplies power to the CPU 202. In this way, the staff can determine whether the current or voltage has a problem according to the displayed content of the second display screen 210, so as to remedy the problem in time.
In addition, the processing device of the embedded memory may further include a sound generating module, such as a microphone, a sound receiving module, such as a microphone, and further, it may include a plurality of control buttons for controlling the functions of the processing device of the embedded memory, as shown in fig. 8, where fig. 8 assumes that the processing device of the embedded memory includes five buttons, and the five buttons are respectively: keys 211 to 215, wherein the key 211 is a volume up switch for controlling the volume up; the key 212 is a volume-down switch for controlling the volume down; the key 213 is a power supply switch for controlling on or off of power supply to the CPU; the button 214 is a power on/off button for controlling the on/off of the processing device of the embedded memory; the button 215 is a deep-brush switch for controlling a flush operation of the processing device of the embedded memory.
It should be noted that the processing apparatus of the embedded memory provided by the present invention can be regarded as an analog terminal, and the analog terminal is mainly used for restoring the normal operation of the EMMC, and the CPU202 writes the obtained erasing program into the EMMC to be processed through the conductive pin to erase the content in the EMMC to be processed, thereby implementing software unbinding between the EMMC and the CPU, improving the flexibility of EMMC processing, and implementing cyclic utilization of the EMMC.
To sum up, according to the processing apparatus of an embedded memory provided in the embodiment of the present disclosure, after the CPU in the processing apparatus is used to place the to-be-processed EMMC on the placement area, the acquired erase program is written into the to-be-processed EMMC through the conductive pin to erase the content in the to-be-processed EMMC, so that software unbinding between the EMMC and the CPU is achieved, and thus the flexibility of EMMC processing is improved, and cyclic utilization of the EMMC is achieved.
Fig. 9 is a block diagram illustrating a processing device 300 of an embedded memory according to an example embodiment.
Referring to fig. 9, the apparatus 300 may include one or more of the following components: processing component 302, memory 304, power component 306, multimedia component 308, audio component 310, input/output (I/O) interface 312, sensor component 314, and communication component 316.
The processing component 302 generally controls overall operation of the device 300, such as operations associated with display, telephone calls, data communications, camera operations, and recording operations. The processing components 302 may include one or more processors 320 to execute instructions to perform all or a portion of the steps of the methods described above. Further, the processing component 302 can include one or more modules that facilitate interaction between the processing component 302 and other components. For example, the processing component 302 may include a multimedia module to facilitate interaction between the multimedia component 308 and the processing component 302. The processor 320 may be the CPU202 in the above-described embodiments.
The memory 304 is configured to store various types of data to support operations at the apparatus 300. Examples of such data include instructions for any application or method operating on device 300, contact data, phonebook data, messages, pictures, videos, and so forth. The memory 304 may be implemented by any type or combination of volatile or non-volatile memory devices, such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic or optical disks. The memory 304 may be the memory 205 in the above-described embodiments.
The power supply component 306 provides power to the various components of the device 300. The power components 306 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power for the apparatus 300.
The multimedia component 308 includes a screen that provides an output interface between the device 300 and the staff member. In some embodiments, the screen may include a Liquid Crystal Display (LCD) and a Touch Panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive an input signal from a worker. The touch panel includes one or more touch sensors to sense touch, slide, and gestures on the touch panel. The touch sensor may not only sense the boundary of a touch or slide action, but also detect the duration and pressure associated with the touch or slide operation. In some embodiments, the multimedia component 308 includes a front facing camera and/or a rear facing camera. The front camera and/or the rear camera may receive external multimedia data when the device 300 is in an operating mode, such as a shooting mode or a video mode. Each front camera and rear camera may be a fixed optical lens system or have a focal length and optical zoom capability.
The audio component 310 is configured to output and/or input audio signals. For example, audio component 310 includes a Microphone (MIC) configured to receive external audio signals when apparatus 300 is in an operating mode, such as a call mode, a recording mode, and a voice recognition mode. The received audio signals may further be stored in the memory 304 or transmitted via the communication component 316. In some embodiments, audio component 310 also includes a speaker for outputting audio signals.
The I/O interface 312 provides an interface between the processing component 302 and peripheral interface modules, which may be keyboards, click wheels, buttons, etc. These buttons may include, but are not limited to: a home button, a volume button, a start button, and a lock button.
The sensor assembly 314 includes one or more sensors for providing various aspects of status assessment for the device 300. For example, the sensor assembly 314 may detect an open/closed state of the device 300, the relative positioning of the components, such as a display and keypad of the device 300, the sensor assembly 314 may also detect a change in the position of the device 300 or a component of the device 300, the presence or absence of a worker's contact with the device 300, the orientation or acceleration/deceleration of the device 300, and a change in the temperature of the device 300. Sensor assembly 314 may include a proximity sensor configured to detect the presence of a nearby object without any physical contact. The sensor assembly 314 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 314 may also include an acceleration sensor, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.
The communication component 316 is configured to facilitate wired or wireless communication between the apparatus 300 and other devices. The device 300 may access a wireless network based on a communication standard, such as WiFi, 2G or 3G, or a combination thereof. In an exemplary embodiment, the communication component 316 receives a broadcast signal or broadcast related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 316 further includes a Near Field Communication (NFC) module to facilitate short-range communications. For example, the NFC module may be implemented based on Radio Frequency Identification (RFID) technology, infrared data association (IrDA) technology, Ultra Wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.
In an example embodiment, the apparatus 300 may include one or more Application Specific Integrated Circuits (ASICs), Digital Signal Processors (DSPs), Digital Signal Processing Devices (DSPDs), Programmable Logic Devices (PLDs), Field Programmable Gate Arrays (FPGAs), controllers, micro-controllers, microprocessors, or other electronic components.
The disclosed embodiment provides a processing system of an embedded memory, which can refer to the system shown in fig. 1. The system comprises: the computer equipment and the processing device of the embedded memory, and the structure of the processing device of the embedded memory can refer to the above device embodiments.
The computer device may be a computer or other device with processing function, and the processing device of the embedded memory may be the processing device of the embedded memory shown in fig. 7.
A processing device of a computer apparatus and an embedded memory;
an embedded memory placing area and a Central Processing Unit (CPU);
the placement area is provided with a plurality of second contacts which are used for being in one-to-one corresponding electrical contact with the first contacts on the EMMC to be processed, the CPU is provided with a plurality of third contacts, and the second contacts and the third contacts are connected in one-to-one correspondence through conductive pins;
the CPU is used for writing the obtained erasing program into the EMMC to be processed through the conductive pin after the EMMC to be processed is placed on the placing area so as to erase the content in the EMMC to be processed;
the computer equipment is connected with the processing device of the embedded memory through a data line interface.
To sum up, the embodiment of the present disclosure provides a processing apparatus for an embedded memory, where the apparatus includes a placement area and a CPU, and the CPU is configured to place an EMMC to be processed on the EMMC placement area, and then write an obtained erasing program into the EMMC to be processed through a conductive pin to erase contents in the EMMC to be processed, so as to implement software unbinding between the EMMC and the CPU, thereby improving flexibility of an EMMC processing method and implementing cyclic utilization of the EMMC.
With regard to the system in the above-described embodiment, the specific manner in which the respective modules perform operations has been described in detail in the embodiment related to the apparatus, and will not be elaborated upon here.
Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any variations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.
It will be understood that the present disclosure is not limited to the precise arrangements described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims (12)

1. A processing device of an embedded memory is characterized by comprising:
the embedded memory EMMC comprises a placing area and a Central Processing Unit (CPU), wherein the placing area is used for placing an embedded memory EMMC to be processed;
the placement area is provided with a plurality of second contacts which are used for being in one-to-one corresponding electrical contact with the first contacts on the EMMC to be processed, the CPU is provided with a plurality of third contacts, and the second contacts and the third contacts are connected in one-to-one correspondence through conductive pins;
the CPU is used for writing an obtained erasing program into the EMMC to be processed through the conductive needle after the EMMC to be processed is placed on the placing area so as to erase the content in the EMMC to be processed, wherein erasing the content in the EMMC to be processed means erasing information in the CPU previously stored in the EMMC to be processed and recovering factory settings of the EMMC instead of formatting the EMMC to be processed.
2. The apparatus of claim 1, wherein the processing means further comprises:
and the CPU is used for receiving the erasing program input by the computer equipment through the data line interface.
3. The apparatus of claim 2, wherein the data line interface is a Universal Serial Bus (USB) interface.
4. The apparatus of claim 1, wherein the processing means further comprises:
a memory connected to the CPU, the memory storing the erase program;
the CPU is used for acquiring the erasing program from the memory.
5. The apparatus of claim 1, wherein the processing means further comprises: a main board, a plurality of first and second connection terminals,
the placement area and the CPU are arranged on the mainboard.
6. The device of claim 5, wherein all components in the motherboard on the terminal from which the EMMC to be processed is located are located on the motherboard.
7. The apparatus of claim 6,
the processing device further comprises a first display screen, wherein the first display screen is connected with the mainboard and used for displaying relevant information of each component in the mainboard.
8. The apparatus of any one of claims 1 to 7, wherein the processing means comprises: and the power supply module is connected with the CPU and used for supplying power to the CPU.
9. The apparatus of claim 8, wherein the processing apparatus further comprises a power protection circuit, and the power module is connected to the power protection circuit.
10. The device according to claim 8, wherein the processing device further comprises a second display screen, the second display screen is arranged between the power supply module and the CPU, and the second display screen is used for displaying the current and/or voltage input by the power supply module.
11. The device of claim 8, wherein the power module comprises a rechargeable battery and/or a power input port connected to an external power source.
12. A processing system for embedded memory, comprising:
a processing device of a computer apparatus and an embedded memory;
an embedded memory placing area and a Central Processing Unit (CPU);
the placement area is provided with a plurality of second contacts which are used for being in one-to-one corresponding electrical contact with the first contacts on the EMMC to be processed, the CPU is provided with a plurality of third contacts, and the second contacts and the third contacts are connected in one-to-one correspondence through conductive pins;
the CPU is used for writing an obtained erasing program into the EMMC to be processed through the conductive needle after the EMMC to be processed is placed on the placing area so as to erase the content in the EMMC to be processed, wherein the erasing of the content in the EMMC to be processed means that information in the CPU stored in the EMMC to be processed before is erased and factory settings of the EMMC are restored, and the EMMC to be processed is not formatted;
the computer equipment is connected with the processing device of the embedded memory through a data line interface.
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