CN107408759A - Scanning antenna - Google Patents

Scanning antenna Download PDF

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Publication number
CN107408759A
CN107408759A CN201680012918.5A CN201680012918A CN107408759A CN 107408759 A CN107408759 A CN 107408759A CN 201680012918 A CN201680012918 A CN 201680012918A CN 107408759 A CN107408759 A CN 107408759A
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China
Prior art keywords
mentioned
electrode
spacer structures
gap
base plate
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Granted
Application number
CN201680012918.5A
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Chinese (zh)
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CN107408759B (en
Inventor
中泽淳
大类贵俊
中村涉
大竹忠
中野文树
箕浦洁
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Sharp Corp
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Sharp Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01Q—ANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00—Details of, or arrangements associated with, antennas
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    • H01Q1/22—Supports; Mounting means by structural association with other equipment or articles
    • H01Q1/24—Supports; Mounting means by structural association with other equipment or articles with receiving set
    • H01Q1/241—Supports; Mounting means by structural association with other equipment or articles with receiving set used in mobile communications, e.g. GSM
    • H01Q1/242—Supports; Mounting means by structural association with other equipment or articles with receiving set used in mobile communications, e.g. GSM specially adapted for hand-held use
    • H01Q1/243—Supports; Mounting means by structural association with other equipment or articles with receiving set used in mobile communications, e.g. GSM specially adapted for hand-held use with built-in antennas
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
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    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1339—Gaskets; Spacers; Sealing of cells
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Abstract

Scanning antenna (1000) is arranged with antenna unit (U), has：TFT substrate (101), it has the 1st dielectric base plate (1), TFT, grid bus, source bus line and patch electrode (15)；Gap substrate (201), it has the 2nd dielectric base plate (51) and gap electrode (55)；Liquid crystal layer (LC), it is arranged between TFT substrate and gap substrate；And reflection conductive plate (65).Gap electrode has the gap (57) with patch electrode corresponding configuration respectively.In the normal direction viewing from the 1st dielectric base plate, if the distance at the edge of gap gap is sentenced into interior region for 0.3mm is set to the 1st region (Rp1), interior region will be sentenced for 0.3mm with a distance from edge from patch electrode and be set to the 2nd region (Rp2), then the multiple spacer structures bodies (75) being arranged between TFT substrate and gap substrate are configured to not overlapping with the 1st region and/or the 2nd region.

Description

Scanning antenna
Technical field
The present invention relates to scanning antenna, (is otherwise referred to as " element antenna " more particularly to antenna unit.) there is liquid crystal The scanning antenna of electric capacity is (otherwise referred to as " liquid crystal array antenna ".).
Background technology
Mobile communicating or satellite broadcasting antenna need to change wave beam direction (be referred to as " beam scanning " or " beam-forming (beam steering) ".) function.As the antenna (hereinafter referred to as " scanning antenna with this function (scanned antenna)”.), it is known that possess the phased-array antenna of antenna unit.But existing phased-array antenna Price is high, and this turns into the obstacle popularized to the consumer goods.Particularly, when the quantity increase of antenna unit, cost can significantly rise.
Therefore, it has been suggested that make use of liquid crystal material (comprising nematic liquid crystal, high polymer dispersed liquid crystal) big dielectric respectively to The scanning antenna (patent document 1~4 and non-patent literature 1) of different in nature (birefringence).The dielectric constant of liquid crystal material has frequency Rate dispersiveness, therefore in this manual by the dielectric constant in the frequency band of microwave (otherwise referred to as " relative to the dielectric of microwave Constant ".) signalment is " dielectric constant M (εM)”。
In patent document 3 and non-patent literature 1, describe by using liquid crystal display device (hereinafter referred to as " LCD ".) Technology can obtain low-cost scanning antenna.
Prior art literature
Patent document
Patent document 1：JP 2007-116573 publications
Patent document 2：JP 2007-295044 publications
Patent document 3：Special table 2009-538565 publications
Patent document 4：Special table 2013-539949 publications
Non-patent literature
Non-patent literature 1：R.A.Stevenson et al., " Rethinking Wireless Communications： Advanced Antenna Design using LCD Technology ", SID 2015DIGEST, pp.827-830.
Non-patent literature 2：M.ANDO et al., " A Radial Line Slot Antenna for 12GHz Satellite TV Reception ", IEEE Transactions of Antennas and Propagation, Vol.AP- 33, No.12, pp.1347-1353 (1985)
The content of the invention
Problems to be solved by the invention
As described above, although known realize idea as low-cost scanning antenna by application LCD technology, The document of the structure of the scanning antenna using LCD technology, its manufacture method and its driving method is not described specifically.
Therefore, it is an object of the invention to provide the scanning antenna that can be produced in batches using existing LCD manufacturing technology.
The solution used to solve the problem
The scanning antenna of embodiments of the present invention is arranged with multiple antenna units, possesses：TFT substrate, it has the 1st electricity Medium substrate, multiple TFT, multiple grid bus, multiple source bus lines and the multiple patches for being supported in above-mentioned 1st dielectric base plate Plate electrode；Gap substrate, it has the 2nd dielectric base plate and the gap being formed on the 1st interarea of above-mentioned 2nd dielectric base plate Electrode；Liquid crystal layer, it is arranged between above-mentioned TFT substrate and above-mentioned gap substrate；Multiple spacer structures bodies, it includes regulation Multiple 1st spacer structures bodies of the distance between above-mentioned TFT substrate and above-mentioned gap substrate；And reflection conductive plate, its with Match somebody with somebody across the dielectric layer mode relative with the 2nd interarea of the side opposite with above-mentioned 1st interarea of above-mentioned 2nd dielectric base plate Put, above-mentioned gap electrode has multiple gaps of configuration corresponding with above-mentioned multiple patch electrodes, from above-mentioned 1st dielectric base plate Normal direction viewing when, if by from a distance from above-mentioned multiple respective edges in gap be 0.3mm sentence in region be set to the 1st Region, by from a distance from above-mentioned multiple respective edges of patch electrode be 0.3mm sentence in region be set to the 2nd region, then on It is not overlapping with above-mentioned 1st region and/or above-mentioned 2nd region to state multiple spacer structures bodies.
Another scanning antenna of embodiments of the present invention is arranged with multiple antenna units, possesses：TFT substrate, it has 1st dielectric base plate, the multiple TFT for being supported in above-mentioned 1st dielectric base plate, multiple grid bus, multiple source bus lines and Multiple patch electrodes；Gap substrate, it has the 2nd dielectric base plate and is formed on the 1st interarea of above-mentioned 2nd dielectric base plate Gap electrode；Liquid crystal layer, it is arranged between above-mentioned TFT substrate and above-mentioned gap substrate；Multiple spacer structures bodies, it is wrapped Include the multiple 1st spacer structures bodies for providing the distance between above-mentioned TFT substrate and above-mentioned gap substrate；And reflection is conductive Plate, it is with relative with the 2nd interarea of the side opposite with above-mentioned 1st interarea of above-mentioned 2nd dielectric base plate across dielectric layer Mode configure, above-mentioned gap electrode has multiple gaps of configuration corresponding with above-mentioned multiple patch electrodes, above-mentioned gap substrate Or above-mentioned TFT substrate has multiple spacers, above-mentioned multiple spacers are included in above-mentioned 1st dielectric base plate Spacer with less than more than 2 μm 5 μm of height in normal direction, above-mentioned multiple 1st spacer structures bodies include bag Spacer structures body containing any one spacer in above-mentioned multiple spacers.
In certain embodiment, above-mentioned multiple 1st spacer structures bodies include the 1st of the part comprising the 1st metal level Spacer structures body, above-mentioned 1st metal level include above-mentioned multiple patch electrodes.
In certain embodiment, above-mentioned multiple 1st spacer structures bodies include the 1st of the part comprising the 2nd metal level Spacer structures body, above-mentioned 2nd metal level include above-mentioned multiple TFT gate electrode and above-mentioned multiple grid bus.
In certain embodiment, above-mentioned multiple 1st spacer structures bodies include the 1st of the part comprising the 3rd metal level Spacer structures body, above-mentioned 3rd metal level include above-mentioned multiple TFT source electrode and above-mentioned multiple source bus lines.
In certain embodiment, possess the transmission receiving area delimited by above-mentioned multiple antenna units and above-mentioned transmission receives The non-sent receiving area on the periphery in region, above-mentioned multiple 1st spacer structures bodies are included positioned at above-mentioned transmission receiving area 1st spacer structures body and the 1st spacer structures body positioned at above-mentioned non-sent receiving area, in above-mentioned transmission receiving area , above-mentioned multiple 1st spacer structures bodies from the per unit area during viewing of the normal direction of above-mentioned 1st dielectric base plate The ratio of area is less than more than 0.05% 0.6%.
In certain embodiment, normal direction sight in above-mentioned non-sent receiving area, from above-mentioned 1st dielectric base plate The ratio of the area of above-mentioned multiple 1st spacer structures bodies of per unit area when seeing is less than more than 0.05% 0.6%.
In certain embodiment, above-mentioned multiple spacer structures bodies also include lower than above-mentioned multiple 1st spacer structures bodies Multiple 2nd spacer structures bodies.
In certain embodiment, above-mentioned multiple 2nd spacer structures bodies include having than above-mentioned multiple 1st spacer structures 2nd spacer structures body of the height of small less than more than 0.2 μm 0.5 μm of the height of body.
In certain embodiment, possess the transmission receiving area delimited by above-mentioned multiple antenna units and above-mentioned transmission receives The non-sent receiving area on the periphery in region, above-mentioned multiple 1st spacer structures bodies are included positioned at above-mentioned transmission receiving area 1st spacer structures body and the 1st spacer structures body positioned at above-mentioned non-sent receiving area, in above-mentioned transmission receiving area , above-mentioned multiple 1st spacer structures bodies from the per unit area during viewing of the normal direction of above-mentioned 1st dielectric base plate The ratio of area is less than more than 0.05% 0.5%.
In certain embodiment, normal direction sight in above-mentioned non-sent receiving area, from above-mentioned 1st dielectric base plate The ratio of the area of above-mentioned multiple 1st spacer structures bodies of per unit area when seeing is less than more than 0.05% 0.5%.
In certain embodiment, if by normal direction in above-mentioned transmission receiving area, from above-mentioned 1st dielectric base plate The ratio of the area of above-mentioned multiple 1st spacer structures bodies of per unit area during viewing is set to 1, then above-mentioned transmission reception area Above-mentioned multiple 2nd spacer structures in domain, from the per unit area during normal direction viewing of above-mentioned 1st dielectric base plate The ratio of the area of body is less than more than 1 10.
In certain embodiment, if by it is in above-mentioned non-sent receiving area, from the normal side of above-mentioned 1st dielectric base plate Be set to 1 to the ratio of area of above-mentioned multiple 1st spacer structures bodies of per unit area during viewing, then it is above-mentioned non-sent to connect Receive above-mentioned multiple 2nd septs in region, from the per unit area during normal direction viewing of above-mentioned 1st dielectric base plate The ratio of the area of structure is less than more than 1 10.
The TFT substrate of one embodiment of the present invention has dielectric base plate and arranged on above-mentioned dielectric base plate more Individual antenna unit area, above-mentioned TFT substrate, which includes, sends receiving area and non-sent receiving area, above-mentioned transmission receiving area bag Containing above-mentioned multiple antenna unit areas, above-mentioned non-sent receiving area is located at the region beyond above-mentioned transmission receiving area, above-mentioned Multiple antenna unit areas are each provided with：Thin film transistor (TFT), it is supported in above-mentioned dielectric base plate, comprising gate electrode, partly leads Body layer, the gate insulator between above-mentioned gate electrode and above-mentioned semiconductor layer and it is electrically connected to above-mentioned semiconductor layer Source electrode and drain electrode；1st insulating barrier, it covers above-mentioned thin film transistor (TFT), and has above-mentioned thin film transistor (TFT) The 1st opening portion that above-mentioned drain electrode exposes；And patch electrode, it is formed on above-mentioned 1st insulating barrier and the above-mentioned 1st opening In portion, the above-mentioned drain electrode of above-mentioned thin film transistor (TFT) is electrically connected to, above-mentioned patch electrode includes metal level, above-mentioned metal level Thickness is more than the above-mentioned source electrode of above-mentioned thin film transistor (TFT) and the thickness of above-mentioned drain electrode.
In certain embodiment, above-mentioned TFT substrate can be also equipped with covering the 2nd insulating barrier of above-mentioned patch electrode.It is above-mentioned The thickness of metal level can be less than more than 1 μm 30 μm.
In certain embodiment, above-mentioned TFT substrate can also have in above-mentioned transmission receiving area is formed at above-mentioned electricity Resistive film on medium substrate and the heater terminal for being connected to above-mentioned resistive film.
In certain embodiment, above-mentioned TFT substrate is also equipped with being configured at the transmission end sub-portion of above-mentioned non-sent receiving area, Above-mentioned transmission end sub-portion has：Paster connecting portion, it with above-mentioned patch electrode identical conducting film by forming；Above-mentioned 2nd insulation Layer, it is extended on above-mentioned paster connecting portion, has the 2nd opening portion for exposing a part for above-mentioned paster connecting portion； And upper transparent electrode, its be formed on above-mentioned 2nd insulating barrier and above-mentioned 2nd opening portion in, with above-mentioned paster connecting portion electricity Connection.
In certain embodiment, above-mentioned TFT substrate is also equipped with gate terminal sub-portion, and above-mentioned gate terminal sub-portion has：Grid is total Line, it with above-mentioned gate electrode identical conducting film by forming；Above-mentioned gate insulator, above-mentioned 1st insulating barrier and above-mentioned 2nd exhausted Edge layer, it is extended on above-mentioned grid bus；And gate terminal top connecting portion, it is by electric with above-mentioned upper transparent Pole identical nesa coating is formed, in above-mentioned gate insulator, above-mentioned 1st insulating barrier and above-mentioned 2nd insulating barrier formed with The gate terminal contact hole that a part for above-mentioned grid bus is exposed, above-mentioned gate terminal are configured at above-mentioned with top connecting portion On 2nd insulating barrier and above-mentioned gate terminal contact hole in, in above-mentioned gate terminal contact hole with above-mentioned gate bus contact.
In certain embodiment, above-mentioned TFT substrate is also equipped with being configured at the transmission end sub-portion of above-mentioned non-sent receiving area, Above-mentioned transmission end sub-portion has：Source electrode connection wiring, it with above-mentioned source electrode identical conducting film by forming；Above-mentioned 1st is exhausted Edge layer, it is extended in above-mentioned source electrode connection wiring, has the expose a part for above-mentioned source electrode connection wiring the 3rd to open Oral area and the 4th opening portion for exposing another part of above-mentioned source electrode connection wiring；Paster connecting portion, it is formed at the above-mentioned 1st In on insulating barrier and above-mentioned 3rd opening portion；And upper transparent electrode, it is formed on above-mentioned 1st insulating barrier and the above-mentioned 4th opens In oral area, above-mentioned paster connecting portion electrically connects via above-mentioned source electrode connection wiring with above-mentioned upper transparent electrode, and above-mentioned paster connects By being formed with above-mentioned patch electrode identical conducting film, above-mentioned 2nd insulating barrier is extended in above-mentioned transmission end sub-portion socket part, Above-mentioned paster connecting portion is covered, and with the opening for exposing at least a portion of above-mentioned upper transparent electrode.
In certain embodiment, above-mentioned TFT substrate is also equipped with being configured at the transmission end sub-portion of above-mentioned non-sent receiving area, Above-mentioned transmission end sub-portion has：Paster connecting portion, it with above-mentioned patch electrode identical conducting film by forming in the above-mentioned 1st insulation On layer；And protection conductive layer, it covers above-mentioned paster connecting portion, and it is conductive that above-mentioned 2nd insulating barrier is extended on above-mentioned protection On layer, there is the opening for exposing a part for above-mentioned protection conductive layer.
In certain embodiment, above-mentioned TFT substrate is also equipped with gate terminal sub-portion, and above-mentioned gate terminal sub-portion has：Grid is total Line, it with above-mentioned gate electrode identical conducting film by forming；Above-mentioned gate insulator and above-mentioned 1st insulating barrier, its extension are set Put on above-mentioned grid bus；And gate terminal top connecting portion, it is formed by nesa coating, in above-mentioned gate insulator It is above-mentioned formed with the gate terminal contact hole for exposing above-mentioned gate terminal top connecting portion in layer and above-mentioned 1st insulating barrier Gate terminal with top connecting portion be configured on above-mentioned 1st insulating barrier and above-mentioned gate terminal contact hole in, in above-mentioned gate terminal In sub- contact hole above-mentioned gate terminal top connecting portion is extended on above-mentioned gate bus contact, above-mentioned 2nd insulating barrier On, there is the opening for exposing a part for above-mentioned gate terminal top connecting portion.
The scanning antenna of one embodiment of the present invention possesses：TFT substrate described in above-mentioned either type；Gap base Plate, it is configured in a manner of relative with above-mentioned TFT substrate；Liquid crystal layer, its be arranged on above-mentioned TFT substrate and above-mentioned gap substrate it Between；And reflection conductive plate, it is with across the table of dielectric layer with the side opposite with above-mentioned liquid crystal layer of above-mentioned gap substrate The relative mode in face configures, and above-mentioned gap substrate has other dielectric base plates and is formed at the upper of above-mentioned other dielectric base plates The gap electrode on the surface of liquid crystal layer side is stated, above-mentioned gap electrode has multiple gaps, above-mentioned multiple gaps and above-mentioned TFT substrate Above-mentioned multiple antenna unit areas in above-mentioned patch electrode corresponding configure.
The scanning antenna of another embodiment of the present invention possesses：TFT substrate described in above-mentioned either type；Gap base Plate, it is configured in a manner of relative with above-mentioned TFT substrate；Liquid crystal layer, its be arranged on above-mentioned TFT substrate and above-mentioned gap substrate it Between；And reflection conductive plate, it is with across the table of dielectric layer with the side opposite with above-mentioned liquid crystal layer of above-mentioned gap substrate The relative mode in face configures, and above-mentioned gap substrate has other dielectric base plates and is formed at the upper of above-mentioned other dielectric base plates The gap electrode on the surface of liquid crystal layer side is stated, above-mentioned gap electrode has multiple gaps, above-mentioned multiple gaps and above-mentioned TFT substrate Above-mentioned multiple antenna unit areas in above-mentioned patch electrode it is corresponding configure, above-mentioned gap electrode is connected to above-mentioned TFT substrate Above-mentioned transmission end sub-portion.
In the manufacture method of the TFT substrate of one embodiment of the present invention, above-mentioned TFT substrate, which has, includes multiple antennas The non-sent receiving area sent beyond receiving area and above-mentioned transmission receiving area of unit area, above-mentioned multiple antenna units Region is each provided with thin film transistor (TFT) and patch electrode, and the manufacture method of above-mentioned TFT substrate includes following process：(a) it is situated between in electricity Thin film transistor (TFT) is formed on matter substrate；(b) the 1st insulating barrier is formed in a manner of covering above-mentioned thin film transistor (TFT), it is exhausted the above-mentioned 1st The 1st opening portion for exposing a part for the drain electrode of above-mentioned thin film transistor (TFT) is formed in edge layer；(c) in the above-mentioned 1st insulation Patch electrode conducting film is formed on layer and above-mentioned 1st opening portion, passes through the patterning of above-mentioned patch electrode conducting film, shape Into the patch electrode contacted in above-mentioned 1st opening portion with above-mentioned drain electrode；And (d) is formed and is covered above-mentioned patch electrode 2nd insulating barrier, above-mentioned patch electrode include metal level, and the thickness of above-mentioned metal level is more than the source electrode of above-mentioned thin film transistor (TFT) With the thickness of drain electrode.
In certain embodiment, above-mentioned operation (a) includes：Process (a1), it forms grid with leading on the dielectric substrate Electrolemma, by the patterning of above-mentioned grid conducting film, form the gate electrode of multiple grid bus and above-mentioned thin film transistor (TFT)； Process (a2), it forms the gate insulator for covering above-mentioned multiple grid bus and above-mentioned gate electrode；Process (a3), it is upper State the semiconductor layer that above-mentioned thin film transistor (TFT) is formed on gate insulator；And process (a4), its on above-mentioned semiconductor layer and Source electrode conducting film is formed on above-mentioned gate insulator, multiple source bus lines are formed with the patterning of conducting film by above-mentioned source electrode And the source electrode and drain electrode of above-mentioned semiconductor layer are connected to, obtain thin film transistor (TFT).
In certain embodiment, above-mentioned TFT substrate is also equipped with gate terminal sub-portion and biography in above-mentioned non-sent receiving area Output terminals portion, above-mentioned operation (c) are included by above-mentioned patch electrode with the patterning of conducting film and in above-mentioned non-sent reception area The process that paster connecting portion is formed in domain, after above-mentioned operation (d), includes following process：To above-mentioned gate insulator, above-mentioned 1st insulating barrier and above-mentioned 2nd insulating barrier are etched in the lump, thus, are formed in above-mentioned 2nd insulating barrier and are connected above-mentioned paster The 2nd opening portion that socket part is exposed, and formed in above-mentioned gate insulator, above-mentioned 1st insulating barrier and above-mentioned 2nd insulating barrier The gate terminal contact hole that a part for above-mentioned grid bus is exposed；And on above-mentioned 2nd insulating barrier, above-mentioned 2nd opening Nesa coating is formed in portion and in above-mentioned gate terminal contact hole, by the patterning of above-mentioned nesa coating, is formed In above-mentioned 2nd opening portion with upper transparent electrode that above-mentioned paster connecting portion contacts and obtain transmission end sub-portion, and formed and existed In above-mentioned gate terminal contact hole with the gate terminal top connecting portion of above-mentioned gate bus contact and obtain gate terminal sub-portion.
In certain embodiment, above-mentioned TFT substrate is also equipped with gate terminal sub-portion and biography in above-mentioned non-sent receiving area Output terminals portion, above-mentioned operation (a4) are included by above-mentioned source electrode with the patterning of conducting film and in above-mentioned non-sent receiving area The process for forming source electrode connection wiring, above-mentioned operation (b) are included in above-mentioned 1st insulating barrier and form above-mentioned 1st opening portion, and Form the 3rd opening portion for exposing a part for above-mentioned source electrode connection wiring, another part dew by above-mentioned source electrode connection wiring The 4th opening portion gone out and the process for the gate terminal contact hole for exposing a part for above-mentioned grid bus, in above-mentioned operation (b) following process is also included between above-mentioned operation (c)：Nesa coating is formed, by the patterning of above-mentioned nesa coating, The upper transparent electrode contacted in above-mentioned 3rd opening portion with above-mentioned source electrode connection wiring is formed, and is formed in above-mentioned grid In termination contact hole with the gate terminal top connecting portion of above-mentioned gate bus contact and obtain gate terminal sub-portion, above-mentioned operation (c) patterning by above-mentioned patch electrode conducting film is also included, is formed and is connected in above-mentioned 4th opening portion with above-mentioned source electrode The paster connecting portion of wiring contacts and obtain the process of transmission end sub-portion, in above-mentioned transmission end sub-portion, above-mentioned paster connecting portion Electrically connected with above-mentioned upper transparent electrode via above-mentioned source electrode connection wiring, the above-mentioned 2nd is also included in after above-mentioned operation (d) The part difference by a part for above-mentioned upper transparent electrode and above-mentioned gate terminal top connecting portion is formed in insulating barrier The process for the opening exposed.
In certain embodiment, above-mentioned TFT substrate is also equipped with gate terminal sub-portion and biography in above-mentioned non-sent receiving area Output terminals portion, above-mentioned operation (b), which is included in above-mentioned 1st insulating barrier, forms above-mentioned 1st opening portion, and is formed above-mentioned grid The process for the gate terminal contact hole that a part for bus is exposed, also comprising such as between above-mentioned operation (b) and above-mentioned operation (c) Lower process：Form nesa coating, by the patterning of above-mentioned nesa coating, formed in above-mentioned gate terminal contact hole with The gate terminal top connecting portion of above-mentioned gate bus contact and obtain gate terminal sub-portion, above-mentioned operation (c) is included by upper The process stated the patterning of patch electrode conducting film and paster connecting portion is formed in above-mentioned non-sent receiving area, above-mentioned Also comprising the process for forming the protection conductive layer for covering above-mentioned paster connecting portion between process (c) and above-mentioned operation (d), above-mentioned After process (d), formed also included in above-mentioned 2nd insulating barrier by a part for above-mentioned protection conductive layer and above-mentioned gate terminal The process for the opening exposed respectively with a part for top connecting portion.
The scanning antenna of certain embodiment of the present invention is arranged with multiple antenna units, has：TFT substrate, it has the 1st Dielectric base plate, the multiple TFT for being supported in above-mentioned 1st dielectric base plate, multiple grid bus, multiple source bus lines and multiple Patch electrode；Gap substrate, it has the 2nd dielectric base plate and the seam being formed on the 1st interarea of above-mentioned 2nd dielectric base plate Gap electrode；Liquid crystal layer, it is arranged between above-mentioned TFT substrate and above-mentioned gap substrate；And reflection conductive plate, it is with across electricity The dielectric layer mode relative with the 2nd interarea of the side opposite with above-mentioned 1st interarea of above-mentioned 2nd dielectric base plate configures, above-mentioned Gap electrode has multiple gaps of configuration corresponding with above-mentioned multiple patch electrodes, and above-mentioned multiple patch electrodes are connected respectively to pair The TFT answered drain electrode, during the scanning signal selection supplied from corresponding TFT grid bus, by corresponding source electrode Bus supplies data-signal, and the frequency of the polarity inversion of the voltage each applied to above-mentioned multiple patch electrodes is more than 300Hz.
In certain embodiment, in arbitrary frame, the polarity of the voltage applied to above-mentioned multiple patch electrodes is all identical.
In certain embodiment, in arbitrary frame, the polarity of the voltage applied to above-mentioned multiple patch electrodes is connecting To being mutually opposite between the patch electrode of adjacent grid bus.
In certain embodiment, the frequency of the polarity inversion of the voltage each applied to above-mentioned multiple patch electrodes is 5kHz Below.
In certain embodiment, the voltage applied to above-mentioned gap electrode is the electricity with applying to above-mentioned multiple patch electrodes The vibration voltage of pressure 180 ° of phases of difference.
In the driving method of the scanning antenna of embodiments of the present invention, scanning antenna is arranged with multiple antenna units, Have：TFT substrate, it has the 1st dielectric base plate, the multiple TFT, the multiple grids that are supported in above-mentioned 1st dielectric base plate are total Line, multiple source bus lines and multiple patch electrodes；Gap substrate, it has the 2nd dielectric base plate and is formed at above-mentioned 2nd electricity Gap electrode on 1st interarea of medium substrate；Liquid crystal layer, it is arranged between above-mentioned TFT substrate and above-mentioned gap substrate；With And reflection conductive plate, it is with across the of dielectric layer and the side opposite with above-mentioned 1st interarea of above-mentioned 2nd dielectric base plate The relative mode of 2 interareas configures, and above-mentioned gap electrode has multiple gaps of configuration corresponding with above-mentioned multiple patch electrodes, upper In the driving method for stating scanning antenna, the polarity for the voltage for making each to apply above-mentioned multiple patch electrodes is by more than 300Hz's Frequency inverts.
In certain embodiment, the polarity for the voltage for making to apply above-mentioned gap electrode to above-mentioned multiple patch electrodes with applying 180 ° of phases of polarity spectrum of the voltage added and invert.
Invention effect
According to certain embodiment of the present invention, it is possible to provide the scanning that can be produced in batches using existing LCD manufacturing technology Antenna.
Brief description of the drawings
Fig. 1 is the sectional view of a part for the scanning antenna 1000 for schematically showing the 1st embodiment.
Fig. 2 (a) and Fig. 2 (b) is the signal for representing TFT substrate 101 and gap substrate 201 in scanning antenna 1000 respectively Property top view.
Fig. 3 (a) and Fig. 3 (b) is the sectional view for the antenna unit area U for schematically showing TFT substrate 101 respectively and bowed View.
Fig. 4 (a)~Fig. 4 (c) is gate terminal sub-portion GT, the source terminal sub-portion ST for schematically showing TFT substrate 101 respectively And transmission end sub-portion PT sectional view.
Fig. 5 is the figure of one of the manufacturing process for representing TFT substrate 101.
Fig. 6 is the antenna unit area U and portion of terminal IT that schematically show gap substrate 201 sectional view.
Fig. 7 is the schematic sectional view for illustrating the transport part of TFT substrate 101 and gap substrate 201.
Fig. 8 (a)~Fig. 8 (c) is the gate terminal sub-portion GT for the TFT substrate 102 for representing the 2nd embodiment, source terminal respectively Sub-portion ST and transmission end sub-portion PT sectional view.
Fig. 9 is the figure of one of the manufacturing process for representing TFT substrate 102.
Figure 10 (a)~Figure 10 (c) is gate terminal sub-portion GT, the source electrode for the TFT substrate 103 for representing the 3rd embodiment respectively Portion of terminal ST and transmission end sub-portion PT sectional view.
Figure 11 is the figure of one of the manufacturing process for representing TFT substrate 103.
Figure 12 is the schematic sectional view for illustrating the transport part of TFT substrate 103 and gap substrate 203.
Figure 13 (a) is the schematic plan of the TFT substrate 104 with heater resistive film 68, and Figure 13 (b) is to be used for Illustrate the schematic plan of the size of gap 57 and patch electrode 15.
Figure 14 (a) and Figure 14 (b) is the figure of the distribution for the schematic structure and electric current for representing resistive heating configuration 80a and 80b.
Figure 15 (a)~Figure 15 (c) is the figure of the distribution for the schematic structure and electric current for representing resistive heating configuration 80c~80e.
Figure 16 is the figure of the equivalent circuit of 1 antenna unit of the scanning antenna for representing embodiments of the present invention.
Figure 17 (a)~Figure 17 (c), Figure 17 (e)~Figure 17 (g) are to represent to make in the driving of the scanning antenna of embodiment The figure of the example of the waveform of each signal, Figure 17 (d) are the ripples for representing to carry out the display signal of the LCD of dot inversion driving The figure of shape.
Figure 18 (a)~Figure 18 (e) is the waveform of each signal for representing to use in the driving of the scanning antenna of embodiment The figure of another.
Figure 19 (a)~Figure 19 (e) is the waveform of each signal for representing to use in the driving of the scanning antenna of embodiment Another example figure.
Figure 20 is the sectional view of the example for the structure for schematically showing the scanning antenna with spacer structures body 75, is Schematically show the figure positioned at the spacer structures body 75 for sending receiving area R1.
Figure 21 is the schematic plan for having TFT substrate 105 possessed by the scanning antenna of spacer structures body 75.
Figure 22 is for illustrating the place and gap 57 and the pass of the position of patch electrode 15 that set spacer structures body 75 The schematic plan of system.
Figure 23 is represented for the transmission receiving area R1 of scanning antenna to be divided into wherein 1 part behind 4 parts Determine the thickness d LC of the liquid crystal layer LC between patch electrode 15 and gap electrode 55 result (unit：μm) figure.
Figure 24 is schematically bowing for the TFT substrate 105 of another of the configuration for representing pedestal 75B (spacer structures body 75) View.
Figure 25 is schematically bowing for the TFT substrate 105 of the another example for the configuration for representing pedestal 75B (spacer structures body 75) View.
Figure 26 (a) is the schematic diagram for the structure for representing existing LCD900, and Figure 26 (b) is the schematic of LCD 900a Sectional view.
Embodiment
Hereinafter, with reference to the accompanying drawings of the scanning antenna and its manufacture method of embodiments of the present invention.In the following description In, first, TFT types LCD (hereinafter referred to as " TFT-LCD " known to explanation.) structure and manufacture method.But, in LCD Technical field in known item, omit the description sometimes.On TFT-LCD basic fundamental, such as Liquid refer to Crystals, Applications and Uses, Vol.1-3 (Editor：Birenda Bahadur, Publisher：World Scientific Pub Co Inc) etc..In order to refer to, the complete disclosure of above-mentioned document is quoted in this manual.
Reference picture 26 (a) and Figure 26 (b) illustrate typical transmission-type TFT-LCD (hereinafter referred to as " LCD ".) 900 knot Structure and action.Alive longitudinal electric field pattern (such as TN patterns or vertical are applied here, being illustrated on the thickness direction of liquid crystal layer Alignment mode) LCD900.Frame rate (typically the 2 of polarity inversion frequency of the voltage applied to LCD liquid crystal capacitance Times) for example under the driving of 4 speeds also it is 240Hz, the permittivity ε as the liquid crystal layer of the dielectric layer of LCD liquid crystal capacitance With relative to microwave (such as satellite broadcasting or Ku frequency bands (12~18GHz), K frequency bands (18~26GHz), Ka frequency bands (26~ Dielectric constant M (ε 40GHz))M) different.
As schematically shown in Figure 26 (a), transmission-type LCD900 possesses liquid crystal display panel 900a, control circuit CNTL, backlight (not shown) and power circuit (not shown) etc..Liquid crystal display panel 900a includes：Liquid crystal display LCC；And the drive circuit comprising gate drivers GD and source electrode driver SD.Drive circuit can for example be installed on liquid crystal Show unit LCC TFT substrate 910, some or all of drive circuit can also be with 910 integrated (monolithic of TFT substrate Change).
Liquid crystal display panel possessed by LCD900 (hereinafter referred to as " LCD " is schematically shown in Figure 26 (b).) 900a sectional view.LCD 900a has TFT substrate 910, opposing substrate 920 and the liquid crystal layer being disposed there between 930.TFT substrate 910 and opposing substrate 920 are respectively provided with the transparency carriers such as glass substrate 911,921.As transparency carrier 911, 921, in addition to glass substrate, plastic base is also used sometimes.Plastic base for example with transparent resin (such as polyester) and Glass fibre (such as non-woven fabrics) formation.
LCD 900a viewing area DR includes being arranged in rectangular pixel P.In viewing area, DR periphery is formed There is the frame region FR for being helpless to display.Liquid crystal material is by the sealing (not shown) that is formed in a manner of surrounding viewing area DR It is sealed in the DR of viewing area.Sealing is for example by making comprising uv curing resin and sept (such as resin bead) Encapsulant is solidified to form, and TFT substrate 910 and opposing substrate 920 are mutually bonded, be fixed.Sept in encapsulant Thickness control by TFT substrate 910 and the gap of opposing substrate 920, i.e. liquid crystal layer 930 is constant.In order to suppress liquid crystal layer 930 Thickness face in it is irregular, the part (such as on distribution) by shading in the DR of viewing area uses uv curing resin Form column spacer.In recent years, as can see in LCD TV or smart phone LCD, it is helpless to show Frame region FR width become very narrow.
It is total formed with TFT912, grid bus (scan line) GL, source electrode on transparency carrier 911 in TFT substrate 910 Line (display signal line) SL, pixel electrode 914, auxiliary capacitance electrode (not shown), CS buses (auxiliary capacitance line) (not shown). CS buses are abreast set with grid bus.Or also use (CS conductings using the grid bus of next stage as CS buses sometimes Grid structure).
Pixel electrode 914 is covered by the alignment films (such as polyimide film) of the orientation of control liquid crystal.Alignment films with liquid The mode that crystal layer 930 contacts is set.The polygamy of TFT substrate 910 is placed in backlight side (side opposite with observer).
The polygamy of opposing substrate 920 is placed in the observer side of liquid crystal layer 930.Opposing substrate 920 has on transparency carrier 921 Color filter layers (not shown), comparative electrode 924 and alignment films (not shown).Comparative electrode 924 is arranged to form display Region DR multiple pixel P are shared, therefore also referred to as common electrode.Color filter layers include what is set by each pixel P Colored filter (such as red optical filter, green optical filter, blue optical filter) and for blocking the unwanted light for display Black matrix (light shield layer).Black matrix for example between the pixel P in the DR of viewing area and frame region FR carry out shading side Formula configures.
The pixel electrode 914 of TFT substrate 910, the comparative electrode 924 of opposing substrate 920 and the liquid crystal layer between them 930 form liquid crystal capacitance Clc.Each liquid crystal capacitance is corresponding with pixel.In order to keep to liquid crystal capacitance Clc apply voltage (for The so-called voltage retention of raising), formed with the auxiliary capacitor CS with the electrically in parallel connections of liquid crystal capacitance Clc.Auxiliary capacitor CS Typically comprise and be set to the electrode of same potential, inorganic insulation layer (such as gate insulator (SiO with pixel electrode 9142Layer)) And it is connected to the auxiliary capacitance electrode of CS buses.Typically supplied from CS buses and share voltage with the identical of comparative electrode 924.
The reason for being reduced as the voltage (effective voltage) applied to liquid crystal capacitance Clc, there is (1) to be based on being used as liquid crystal capacitance Clc capacitance CClcWith the CR time constants of resistance value R product the reason for, (2) it is ionic miscellaneous by what is included in liquid crystal material Interfacial polarization caused by matter and/or the orientation polarization of liquid crystal molecule etc..Wherein, liquid crystal capacitance Clc CR time constants are brought Contribute larger, by setting the electrically in parallel auxiliary capacitor CS for being connected to liquid crystal capacitance Clc, CR time constants can be increased.In addition, liquid The specific insulation of the brilliant electric capacity Clc liquid crystal layer 930 as dielectric layer in the case where being general nematic liquid crystal material, More than 1012Ω cm magnitude.
The display signal supplied pixel electrode 914 is to be fed to sweeping for grid bus GL according to from gate drivers GD The display signal supplied when the TFT912 for retouching signal and selecting turns into conducting state the source bus line SL for being connected to the TFT912. Thus, it is connected to certain grid bus GL TFT912 while turns into conducting state, now, from each of the pixel P for being connected to the row Display signal corresponding to individual TFT912 source bus line SL supplies.From the 1st row (such as display surface is most up) to m row (examples It is most descending such as display surface) untill carry out the action successively, so as to be write in the viewing area DR being made up of the pixel column of m rows Enter, show 1 image (frame).When pixel P is arranged in rectangular by m rows n row, at least one is arranged in correspondence with each pixel column Source bus line SL, and at least n source bus line SL is set altogether.
This scanning is referred to as line sequential scan, is referred to as from selecting time of 1 pixel column untill next line is selected During horizontal sweep (1H), from select certain row to again select the behavior stop time be referred to as vertical scanning during (1V) or Frame.In addition, in general, 1V (or 1 frame), which turns into, will select mH during whole m pixel columns to be obtained plus during blanking During arriving.
Such as in the case where incoming video signal is NTSC signal, the 1V (=1 frame) of existing LCD is 1/ 60sec(16.7msec).NTSC signal is interlace signal, frame rate 30Hz, field frequencies range 60Hz, but is needed in LCD Whole pixels supplied in each field and show signal, therefore (60Hz drivings) is driven with 1V=(1/60) sec.In addition, in recent years Come, in order to improve dynamic image display characteristic, also have with the driving of 2 speeds (120Hz drivings, 1V=(1/120) sec) driving LCD, also for the LCD for carrying out 3D display and being driven with 4 speeds (240Hz drivings, 1V=(1/240) sec).
When applying DC voltage to liquid crystal layer 930, effective voltage reduces, pixel P luminance-reduction.In the effective voltage Reduction in have the contribution of above-mentioned interfacial polarization and/or orientation polarization, therefore even if setting auxiliary capacitor CS to be also difficult to completely Prevent.For example, when display signal corresponding with certain intermediate grey scales is pressed into each frame whole pixels of write-in, brightness can be by each Frame changes, and is observed to flash.In addition, when applying DC voltage for a long time to liquid crystal layer 930, it some times happens that liquid crystal material The electrolysis of material.In addition, also can be the electrode that foreign ion is segregated in one side sometimes, and effective electricity can not be applied to liquid crystal layer Pressure, liquid crystal molecule can not act.In order to prevent these situations, LCD 900a carries out so-called exchange driving.It typically is carried out The frame for making the polarity of display signal be inverted by every 1 frame (during every 1 vertical scanning) is driven reverse.Such as in existing LCD In, carry out polarity inversion by every 1/60sec (cycle of polarity inversion is 30Hz).
In addition, in order to which the pixel for also making the polarity of the voltage of application different in 1 frame is evenly distributed, and carry out dot inversion Driving or line reverse drive etc..Its reason is, when positive polarity is with negative polarity, it is difficult to makes to the effective voltage of liquid crystal layer application Size is completely the same.Such as when the specific insulation of liquid crystal material is more than 1012During Ω cm magnitude, if entering by every 1/60sec Row dot inversion or line are driven reverse, then hardly see flicker.
Gate drivers GD and source electrode driver SD is based on from control circuit CNTL to gate drivers GD and source drive The signal of device SD supplies is by the scanning signal in LCD 900a and display signal is respectively supplied to grid bus GL and source electrode is total Line SL.For example, gate drivers GD and source electrode driver SD are connected respectively to the corresponding terminal for being arranged at TFT substrate 910.Grid Driver GD and source electrode driver SD is for example installed on the frame region FR of TFT substrate 910 as driver IC sometimes, sometimes To be monolithically formed the frame region FR in TFT substrate 910.
The comparative electrode 924 of opposing substrate 920 is electrically connected to via the conductive part (not shown) for being referred to as transmitting (transfer) The terminal (not shown) of TFT substrate 910.Transmission is led for example, by overlapping with sealing or to sealing part imparting Electrically formed.This is for constriction frame region FR.From control circuit CNTL to comparative electrode 924 directly or indirectly Supply shares voltage.Typically, voltage is shared as described above also to supply CS buses.
[basic structure of scanning antenna]
The big dielectric constant M (ε using liquid crystal material are usedM) anisotropy (birefringence) antenna unit Scanning antenna is controlled to the voltage for putting on each liquid crystal layer of antenna unit corresponding with the pixel of LCD, makes each day The effective dielectric constant M (ε of the liquid crystal layer of line unitM) change, so as to form two dimension by the different antenna unit of electrostatic capacitance (display of the image with being carried out by LCD is corresponding for pattern.).The electromagnetic wave (such as microwave) for being emitted from antenna or being received by antenna Phase difference corresponding with the electrostatic capacitance of each antenna unit is endowed, according to two formed by the different antenna unit of electrostatic capacitance Tie up pattern and there is highly directive (beam scanning) in a particular direction.Such as the electromagnetic wave being emitted from antenna is to pass through consideration Obtained by the phase difference that each antenna unit assigns to input electromagnetic wave incident to each antenna unit and after the scattering of each antenna unit To spherical wave integrated obtained from.Also it can think that each antenna unit is used as " phase shifter：Phase shifter " play work( Energy.On the basic structure and operating principle of the scanning antenna using liquid crystal material, patent document 1~4 and non-patent refer to Document 1,2.Non-patent literature 2 discloses the basic structure for the scanning antenna for being arranged with helical form gap.In order to refer to, in this theory The complete disclosure of referenced patents document 1~4 and non-patent literature 1,2 in bright book.
In addition, although the antenna unit of the scanning antenna of embodiments of the present invention is similar with the pixel of LCD, It is different from the structure of the pixel of LCD, and the arrangement of multiple antenna units is also different from the arrangement of the pixel in LCD. Illustrate embodiments of the present invention with reference to Fig. 1 of the scanning antenna 1000 for the 1st embodiment for showing to describe in detail below The basic structure of scanning antenna.Scanning antenna 1000 is the radial line slot antenna that gap is arranged in concentric circles, but the present invention Embodiment scanning antenna not limited to this, such as the arrangement in gap can also be known various arrangements.
Fig. 1 is the sectional view of a part for the scanning antenna 1000 for schematically showing present embodiment, schematic earth's surface Show from the power supply pin 72 (reference picture 2 (b)) near the center for being arranged at the gap for being arranged in concentric circles along radial direction Section a part.
Scanning antenna 1000 possess TFT substrate 101, gap substrate 201, configuration liquid crystal layer LC between them and By the reflection conductive plate 65 configured in a manner of air layer 54 is relative with gap substrate 201.Scanning antenna 1000 is from TFT substrate 101 sides send, receive microwave.
TFT substrate 101 has the dielectric base plates 1 such as glass substrate, the multiple patch electrodes being formed on dielectric base plate 1 15 and multiple TFT10.Each patch electrode 15 is connected to corresponding TFT10.Each TFT10 is connected to grid bus and source electrode is total Line.
Gap substrate 201 has the dielectric base plates 51 such as glass substrate and is formed at the liquid crystal layer LC sides of dielectric base plate 51 Gap electrode 55.Gap electrode 55 has multiple gaps 57.
Reflection conductive plate 65 is configured to relative with gap substrate 201 across air layer 54.It can use by relative to microwave Layer that small dielectric constant M dielectric (such as the fluororesin such as PTFE) is formed replaces air layer 54.Gap electrode 55 and reflection Conductive plate 65 and dielectric base plate 51 and the conduct performance function of waveguide 301 of air layer 54 between them.
Patch electrode 15, the part of gap electrode 55 comprising gap 57 and the liquid crystal layer LC between them form antenna Unit U.In each antenna unit U, 1 patch electrode 15 is across liquid crystal layer LC and the gap electrode 55 comprising 1 gap 57 Part is relative, forms liquid crystal capacitance.Patch electrode 15 and gap electrode 55 are across shown in the relative structures of liquid crystal layer LC and Figure 26 LCD 900a pixel electrode 914 it is similar across the relative structure of liquid crystal layer 930 with comparative electrode 924.That is, day is scanned The antenna unit U of the line 1000 and pixel P in LCD 900a, which has, to be similarly comprised.In addition, antenna unit has and liquid Also have and the pixel P in LCD 900a in terms of the auxiliary capacitor (reference picture 13 (a), Figure 16) of the brilliant electrically in parallel connection of electric capacity Similar composition.But scanning antenna 1000 and LCD 900a has many differences.
First, the performance required by the dielectric base plate 1,51 of scanning antenna 1000 is wanted different from the substrate of LCD The performance asked.
LCD is generally used for substrate transparent in visible ray, such as uses glass substrate or plastic base.Anti- In the LCD of emitting, the substrate of rear side need not have the transparency, therefore also use semiconductor substrate sometimes.And it is used as day The dielectric base plate 1,51 of line, preferably with respect to microwave dielectric loss (by relative to the dielectric loss angle tangent table of microwave It is shown as tan δM.) small.It is preferred that the tan δ of dielectric base plate 1,51MFor below substantially 0.03, more preferably less than 0.01.Tool Body, glass substrate or plastic base can be used.Glass substrate dimensional stability, excellent heat resistance compared with plastic base, It is adapted in use to LCD technology to form the circuit elements such as TFT, distribution, electrode.Such as formed waveguide material be air and glass In the case of glass, the above-mentioned dielectric loss of glass is larger, therefore can more reduce from relatively thin glass waveguide loss this viewpoint and go out Hair, more preferably preferably less than 400 μm, less than 300 μm.There is no special lower limit, as long as in a manufacturing process can be without breakage Ground is handled.
Conductive material used in electrode is also different.It is in pixel electrode, comparative electrode in LCD to use more Ito film is as nesa coating.But ITO is relative to the tan δ of microwaveMGreatly, can not be used as the conductive layer in antenna.Seam Gap electrode 55 plays function with wall of the reflection conductive plate 65 together as waveguide 301.Thus, in order to suppress microwave transmission mistake The thickness of the wall of waveguide 301, the preferably thickness of the wall of waveguide 301, i.e. metal level (Cu layers or Al layers) is big.It is known If 3 times of the thickness skin depth of metal level, then electromagnetic wave attenuation is 1/20 (- 26dB), if 5 times, then decay to 1/150 (- 43dB) left and right.Thus, can be 1% by the decrease in transmission of electromagnetic wave if the thickness of metal level is 5 times of skin depth. , can will for example, when the Cu layers that the microwave for 10GHz is more than 3.3 μm using thickness and Al layers that thickness is more than 4.0 μm Microwave is reduced to 1/150.In addition, it is 2.3 μm to work as the microwave for being directed to 30GHz using the Cu layers and thickness that thickness is more than 1.9 μm During the Al layers of the above, microwave can be reduced to 1/150.So, preferably gap electrode 55 is by thicker Cu layers or Al layer shapes Into.The thickness of Cu layers or Al layers does not have the special upper limit, can consider film formation time or cost and suitably set.When using Cu During layer, it can obtain being formed as the advantages of relatively thin compared with using Al layers.Can not only be thin using being used in LCD manufacturing process Film sedimentation, moreover it is possible to using either Al paper tinsels are attached at other methods such as substrate to form comparison thick Cu layers or Al by Cu paper tinsels Layer.The thickness of metal level is, for example, less than more than 2 μm 30 μm.In the case where being formed using Film forming method, preferred metal layers Thickness be less than 5 μm.In addition, reflection conductive plate 65 can be used such as thickness is counts mm aluminium sheet, copper coin.
Because patch electrode 15 is not that waveguide 301 is formed as gap electrode 55, therefore can use and gap Electrode 55 compares the less Cu layers of thickness or Al layers.But, in order to avoid the freely electricity near the gap 57 of gap electrode 55 The vibration of son induces the loss that heat is converted into during the vibration of the free electron in patch electrode, and it is preferred that resistance is low.It is raw from batch From the viewpoint of production property, compared with Cu layers, preferably using Al layers, the thickness of preferably Al layers is, for example, 0.5 μm~2 μm.
In addition, antenna unit U arrangement spacing varies considerably with pel spacing.For example, when consideration 12GHz's (Ku frequency bands) During the antenna of microwave, wavelength X is, for example, 25mm.So, as described in patent document 4, antenna unit U spacing is λ/4 Below and/or below λ/5, therefore turn into below 6.25mm and/or below 5mm.This is bigger than the spacing of the pixel of LCD 10 times More than.Thus, antenna unit U length and width also can be than about 10 times of the length in pixels and width of LCD.
Certainly, antenna unit U arrangement can be different from the arrangement of the pixel in LCD.Here, arrangement is shown concentrically The example (referring for example to JP 2002-217640 publications) of round shape, but not limited to this, such as can also be such as non-patent literature 2 Curl is arranged as described.Furthermore, it is also possible to it is arranged in as described in patent document 4 rectangular.
Characteristic required by the liquid crystal layer LC of scanning antenna 1000 liquid crystal material and required by the liquid crystal material of LCD Characteristic it is different.The variations in refractive index for the liquid crystal layer that LCD passes through pixel is and to visible ray (wavelength is 380nm~830nm) Polarised light assign phase difference so that polarization state change (such as make rectilinearly polarized light polarization axis direction rotate or make The circular polarization change of circularly polarized light), thus shown.And the scanning antenna 1000 of embodiment is by making antenna unit U The electrostatic capacitance value changes of possessed liquid crystal capacitance and make the phase place change of the microwave from each patch electrode exciting (re-radiation). Thus, it is preferable to the dielectric constant M (ε relative to microwave of liquid crystal layerM) anisotropy (Δ εM) greatly, preferably tan δMIt is small.Such as It can be adapted to use in the Δ ε described in M.Wittek et al., SID 2015DIGESTpp.824-826MFor more than 4 and tan δM For less than 0.02 (being 19Gz value).In addition, can use nine ghost, macromolecule August pp.599-602 of volume 55 (2006) the Δ ε described inMFor more than 0.4, tan δMFor less than 0.04 liquid crystal material.
The dielectric constant of liquid crystal material typically has frequency dispersion, but relative to the dielectric anisotropy Δ ε of microwaveMWith Positive correlation be present relative to the refractive anisotrop Δ n of visible ray.Thus it can be said that antenna list with respect to microwave For the liquid crystal material of position, preferably relative to material big the refractive anisotrop Δ n of visible ray.LCD liquid crystal The refractive anisotrop Δ n of material is evaluated with the refractive anisotrop of the light relative to 550nm.Also will when herein When being used as index relative to the Δ n (birefringence) of 550nm light, in the antenna unit for microwave using Δ n be 0.3 with Nematic liquid crystal that is upper, being preferably more than 0.4.Δ n does not have the special upper limit.But, it is strong to there is polarity in liquid crystal material big Δ n Tendency, it is therefore possible to reliability can be caused to reduce.From the viewpoint of reliability, preferably Δ n is less than 0.4.Liquid crystal layer Thickness is, for example, 1 μm~500 μm.
Hereinafter, the structure and manufacture method of the scanning antenna of embodiments of the present invention is described in more detail.
(the 1st embodiment)
First, referring to Figures 1 and 2.Fig. 1 is that the schematic part of the immediate vicinity of scanning antenna 1000 is cut as being described in detail Face figure, Fig. 2 (a) and Fig. 2 (b) are represent TFT substrate 101 and gap substrate 201 in scanning antenna 1000 schematic respectively Top view.
Scanning antenna 1000 has multiple antenna unit U by two-dimensional arrangements, more in the scanning antenna 1000 illustrated at this Individual antenna unit is arranged in concentric circles.In the following description, by the region of TFT substrate 101 corresponding with antenna unit U and The region of gap substrate 201 is referred to as " antenna unit area ", mark and antenna unit identical reference U.In addition, such as Fig. 2 (a) and shown in Fig. 2 (b), in TFT substrate 101 and gap substrate 201, by by multiple antenna unit areas by two-dimensional arrangements The region of delimitation is referred to as " sending receiving area R1 ", the region sent beyond the R1 of receiving area being referred to as into " non-sent receiving area R2”.Portion of terminal, drive circuit etc. are set in non-sent receiving area R2.
Fig. 2 (a) is the schematic plan for representing the TFT substrate 101 in scanning antenna 1000.
In the example in the figures, from during the normal direction viewing of TFT substrate 101, it is ring-type to send receiving area R1.Non- hair Receiving area R2 is sent to include being located at the 1st non-sent receiving area R2a of the central part for sending receiving area R1 and connect positioned at transmission Receive the 2nd non-sent receiving area R2b of region R1 peripheral part.Send receiving area R1 external diameter be, for example, 200mm~ 1500mm, it is according to settings such as the traffics.
Be provided with the transmission receiving area R1 of TFT substrate 101 multiple grid bus GL for being supported by dielectric base plate 1 and Multiple source bus line SL, using these distributions come regulation antenna unit area U.Antenna unit area U is sending receiving area R1 In be arranged in such as concentric circles.Antenna unit area U each includes TFT and is electrically connected to TFT patch electrode.TFT source The gate electrode that pole electrode is electrically connected to source bus line SL, TFT is electrically connected to grid bus GL.In addition, TFT drain electrode with Patch electrode electrically connects.
In non-sent receiving area R2 (R2a, R2b) sealing area is configured with a manner of surrounding and send receiving area R1 Rs.Encapsulant (not shown) is assigned to sealing area Rs.Encapsulant makes TFT substrate 101 and gap substrate 201 mutually viscous Connect, and liquid crystal is enclosed between these substrates 101,201.
Gate terminal sub-portion GT, gate drivers are provided with the outside of sealing area Rs in non-sent receiving area R2 GD, source terminal sub-portion ST and source electrode driver SD.Grid bus GL is each connected to raster data model via gate terminal sub-portion GT Device GD.Source bus line SL is each connected to source electrode driver SD via source terminal sub-portion ST.In addition, in this embodiment, source drive Device SD and gate drivers GD are formed on dielectric base plate 1, but the one side or both sides in these drivers can also be set In on another dielectric base plate.
Multiple transmission end sub-portion PT are additionally provided with non-sent receiving area R2.Transmission end sub-portion PT and gap substrate 201 gap electrode 55 (Fig. 2 (b)) electrical connection.In this manual, by transmission end sub-portion PT and the connecting portion of gap electrode 55 Referred to as " transport part ".As illustrated, transmission end sub-portion PT (transport part) can be configured in sealing area Rs.In this case, The resin for containing conductive particle can be used as encapsulant.Thus, liquid crystal can be made to enclose TFT substrate 101 and gap base Between plate 201, and it can ensure that transmission end sub-portion PT and the electrical connection of the gap electrode 55 of gap substrate 201.In this embodiment, exist Transmission end sub-portion PT is each equipped with both 1st non-sent non-sent receiving area R2b of receiving area R2a and the 2nd, but can also Only it is configured at any one.
In addition, transmission end sub-portion PT (transport part) can not also be configured in sealing area Rs.Such as it can also be configured at The outside of sealing area Rs in non-sent receiving area R2.
Fig. 2 (b) is the schematic plan for illustrating the gap substrate 201 in scanning antenna 1000, shows gap substrate 201 Liquid crystal layer LC sides surface.
In gap substrate 201, on dielectric base plate 51, across transmission receiving area R1 and non-sent receiving area R2 shapes Into there is gap electrode 55.
In the transmission receiving area R1 of gap substrate 201, multiple gaps 57 are configured at gap electrode 55.Gap 57 with The corresponding configurations of antenna unit area U in TFT substrate 101.In the example in the figures, multiple gaps 57 are in order to form radial direction linear slit Gap antenna, and a pair of slits 57 for making to upwardly extend in the side being mutually substantially orthogonal is arranged in concentric circles.Due to mutual The gap being substantially orthogonal, therefore scanning antenna 1000 can be sent, reception of circular polarized.
The portion of terminal IT of gap electrode 55 is provided with multiple in non-sent receiving area R2.Portion of terminal IT and TFT substrate 101 transmission end sub-portion PT (Fig. 2 (a)) electrical connections.In this embodiment, portion of terminal IT is configured in sealing area Rs, by containing The encapsulant of conductive particle electrically connects with corresponding transmission end sub-portion PT.
In addition, in the 1st non-sent receiving area R2a, power supply pin 72 is configured at the rear side of gap substrate 201.Microwave The waveguide 301 being made up of gap electrode 55, reflection conductive plate 65 and dielectric base plate 51 is entered by power supply pin 72.For Electric pin 72 is connected to electric supply installation 70.It is powered from the center for the concentric circles for being arranged with gap 57.The mode of power supply can be Directly link any one in power supply mode and electromagnetic coupled mode, known electric power-feeding structure can be used.
Hereinafter, each inscape of scanning antenna 1000 is described in more detail with reference to.
The structure ＞ of ＜ TFT substrates 101
Antenna unit area U
Fig. 3 (a) and Fig. 3 (b) is the sectional view for the antenna unit area U for schematically showing TFT substrate 101 respectively and bowed View.
Antenna unit area U is each provided with：Dielectric base plate (not shown)；TFT10, it is supported in dielectric base plate；1st Insulating barrier 11, it covers TFT10；Patch electrode 15, it is formed on the 1st insulating barrier 11, is electrically connected to TFT10；And the 2nd is exhausted Edge layer 17, it covers patch electrode 15.TFT10 is for example configured near grid bus GL and source bus line SL intersection point.
TFT10 possesses gate electrode 3, the semiconductor layer 5 of island, the grid that are configured between gate electrode 3 and semiconductor layer 5 Pole insulating barrier 4, source electrode 7S and drain electrode 7D.TFT10 structure is not particularly limited.In this embodiment, TFT10 is tool There is the channel etch type TFT of bottom grating structure.
Gate electrode 3 is electrically connected to grid bus GL, and scanning signal is supplied by grid bus GL.Source electrode 7S is electrically connected To source bus line SL, data-signal is supplied by source bus line SL.Gate electrode 3 and grid bus GL can be by identical conducting films (grid conducting film) formation.Source electrode 7S, drain electrode 7D and source bus line SL can be by identical conducting film (source electrodes With conducting film) formed.Grid is, for example, metal film with conducting film and source electrode with conducting film.In this manual, will use sometimes The layer that grid is formed with conducting film is referred to as " gate metal layer ", and the layer formed using source electrode with conducting film is referred to as into " source metal Layer ".
Semiconductor layer 5 configures by a manner of gate insulator 4 is overlapping with gate electrode 3.In the example in the figures, exist Formed with Source contact layer 6S and drain contact layer 6D on semiconductor layer 5.Source contact layer 6S and drain contact layer 6D match somebody with somebody respectively The both sides in the region (channel region) for the formation raceway groove being placed in semiconductor layer 5.Semiconductor layer 5 is intrinsic amorphous silicon (i-a-Si) Layer, Source contact layer 6S and drain contact layer 6D can be n+Type non-crystalline silicon (n+- a-Si) layer.
Source electrode 7S is set in a manner of being contacted with Source contact layer 6S, and semiconductor is connected to via Source contact layer 6S Layer 5.Drain electrode 7D is set in a manner of being contacted with drain contact layer 6D, and semiconductor layer 5 is connected to via drain contact layer 6D.
1st insulating barrier 11 has the contact hole CH1 for the drain electrode 7D for reaching TFT10.
Patch electrode 15 be arranged on the 1st insulating barrier 11 and contact hole CH1 in, in contact hole CH1 with drain electrode 7D Contact.Patch electrode 15 includes metal level.Patch electrode 15 can also be the metal electrode only formed by metal level.Patch electrode 15 material can also be identical with source electrode 7S and drain electrode 7D.But, the metal level in patch electrode 15 thickness ( Patch electrode 15 be metal electrode in the case of be patch electrode 15 thickness) be set greater than source electrode 7S and drain electrode 7D thickness.The thickness of metal level in patch electrode 15 is set as such as more than 0.5 μm in the case where being formed by Al layers.
It can use with grid bus GL identicals conducting film to set CS buses CL.CS buses CL can be with across grid The mode overlapping with drain electrode (or prolongation of drain electrode) 7D of insulating barrier 4 configures, and forms and is with gate insulator 4 The auxiliary capacitor CS of dielectric layer.
Formed with alignment mark (such as metal level) 21 and it can also covered by dielectric base plate side than grid bus GL The underlying insulation film 2 of alignment mark 21.On alignment mark 21, the feelings of such as m TFT substrate are being made by 1 glass substrate Under condition, if the number of photomask is n (n ＜ m), need each exposure process being divided into multiple progress.So, in photomask When the number (m) of TFT substrate 101 of the number (n) than being made by 1 glass substrate 1 is few, the alignment for photomask.It is right Fiducial mark note 21 can be omitted.
In the present embodiment, patch electrode 15 is formed in the layer different from source metal.Thus, can obtain as follows Advantage.
Because source metal typically uses metal film formation, so it is also conceivable to being formed in source metal Patch electrode (TFT substrate of reference example).However, it is preferred to patch electrode is the low electricity of the degree of the vibration as little as without prejudice to electronics Resistance, such as formed with the thick Al layers of the comparison that thickness is more than 0.5 μm.Therefore, also can be by this in the TFT substrate of reference example Kind of thick metal film forms source bus line SL etc., the problem of the controlling step-down of patterning when existing to form distribution.And at this In embodiment, patch electrode 15 is separately formed with source metal, therefore can independently control the thickness of source metal With the thickness of patch electrode 15.Thus, the paster of thickness desired by the controlling and formation when can ensure that to form source metal Electrode 15.
In the present embodiment, the thickness of patch electrode 15 can be dividually set with high-freedom degree with the thickness of source metal Degree.In addition, the size of patch electrode 15 need not be tightly controlled as source bus line SL etc., therefore even if due to thickening patch Plate electrode 15 and cause line width to change (and deviation of design load) and become big also not serious.In addition, it is not excluded that patch electrode 15 The thickness situation equal with the thickness of source metal.
Patch electrode 15 can include Cu layers or Al layers as main stor(e)y.The performance of scanning antenna and the electricity of patch electrode 15 There is dependency relation in resistance, the thickness of main stor(e)y is set as that desired resistance can be obtained.From the viewpoint of resistance, Cu layers and Al layer phases Than, more likely reduce patch electrode 15 thickness.
Gate terminal sub-portion GT, source terminal sub-portion ST and transmission end sub-portion PT
Fig. 4 (a)~Fig. 4 (c) is to schematically show gate terminal sub-portion GT, source terminal sub-portion ST and transmission terminal respectively Portion PT sectional view.
Gate terminal sub-portion GT possesses the grid bus GL being formed on dielectric base plate, covering grid bus GL insulating barrier And gate terminal top connecting portion 19g.Gate terminal top connecting portion 19g is being formed at the contact hole CH2 of insulating barrier It is interior to be contacted with grid bus GL.In this embodiment, the insulating barrier for covering grid bus GL is exhausted comprising grid from dielectric base plate side Edge layer 4, the 1st insulating barrier 11 and the 2nd insulating barrier 17.Gate terminal top connecting portion 19g is, for example, by being arranged at the 2nd insulating barrier The transparency electrode that nesa coating on 17 is formed.
Source terminal sub-portion ST possess be formed on dielectric base plate (herein on gate insulator 4) source bus line SL, Cover source bus line SL insulating barrier and source terminal top connecting portion 19s.Source terminal is with top connecting portion 19s in shape Into in being contacted in the contact hole CH3 of insulating barrier with source bus line SL.In this embodiment, the insulating barrier for covering source bus line SL includes the 1 insulating barrier 11 and the 2nd insulating barrier 17.Source terminal top connecting portion 19s is, for example, saturating on the 2nd insulating barrier 17 by being arranged at The transparency electrode that bright conducting film is formed.
Transmission end sub-portion PT has the paster connecting portion 15p being formed on the 1st insulating barrier 11, covering paster connecting portion 15p The 2nd insulating barrier 17 and transmission terminal top connecting portion 19p.Transmission terminal top connecting portion 19p is to be formed at the 2nd exhausted Contacted in the contact hole CH4 of edge layer 17 with paster connecting portion 15p.Paster connecting portion 15p is by conductive with the identical of patch electrode 15 Film is formed.Transmission terminal top connecting portion (also referred to as upper transparent electrode.) 19p be, for example, by being arranged at the 2nd insulating barrier 17 On nesa coating formed transparency electrode.In the present embodiment, top connecting portion 19g, 19s and 19p of each portion of terminal Formed by identical nesa coating.
In the present embodiment, have the following advantages：The etching work procedure after the 2nd insulating barrier 17 is formd while shape can be passed through Into contact hole CH2, CH3, CH4 of each portion of terminal.Aftermentioned detailed manufacturing process.
The manufacture method ＞ of ＜ TFT substrates 101
TFT substrate 101 can for example be manufactured with following method.Fig. 5 is the figure for the manufacturing process for illustrating TFT substrate 101.
First, metal film (such as Ti films) is formed on the dielectric substrate, and is patterned, so as to form alignment Mark 21.As dielectric base plate, such as glass substrate, the plastic base (resin substrate) with heat resistance etc. can be used.Connect , underlying insulation film 2 is formed in a manner of covering alignment mark 21.Such as use SiO2Film is as underlying insulation film 2.
Next, the gate metal layer comprising gate electrode 3 and grid bus GL is formed on underlying insulation film 2.
Gate electrode 3 can be integrally formed with grid bus GL.Here, formed on the dielectric substrate by sputtering method etc. Grid (not shown) conducting film (thickness：For example, more than 50nm below 500nm).Then, by being entered to grid with conducting film Row patterning, obtains gate electrode 3 and grid bus GL.Grid is not particularly limited with the material of conducting film.Can suitably it make With include metal or its alloy such as aluminium (Al), tungsten (W), molybdenum (Mo), tantalum (Ta), chromium (Cr), titanium (Ti), copper (Cu) or its gold Belong to the film of nitride.Here, formed MoN (thickness：For example, 50nm), Al (thickness：For example, 200nm) and MoN (thickness Degree：For example, 50nm) be laminated in that order after stacked film as grid conducting film.
Then, gate insulator 4 is formed in a manner of covering gate metal layer.Gate insulator 4 can pass through the shapes such as CVD Into.Silica (SiO can be suitably used2) layer, silicon nitride (SiNx) layer, oxidized silicon nitride (SiOxNy；X ＞ y) layer, nitridation oxygen SiClx (SiNxOy；X ＞ y) layer etc. is used as gate insulator 4.Gate insulator 4 can also have stepped construction.Here, formed SiNx layer (thickness：For example, 410nm) it is used as gate insulator 4.
Then, semiconductor layer 5 and contact layer are formed on gate insulator 4.Here, by intrinsic amorphous silicon film (thickness：Example Such as it is 125nm) and n+Type amorphous silicon film (thickness：For example, 65nm) formed and be patterned in the order, so as to To the semiconductor layer 5 and contact layer of island.The semiconductor film used in semiconductor layer 5 is not limited to amorphous silicon film.Such as also may be used To form oxide semiconductor layer as semiconductor layer 5.In this case, can between semiconductor layer 5 and source/drain electrodes To be not provided with contact layer.
Then, source electrode conducting film (thickness is formed on gate insulator 4 and on contact layer：For example, more than 50nm Below 500nm) and be patterned, so as to form the source for including source electrode 7S, drain electrode 7D and source bus line SL Pole metal level.Now, contact layer is also etched, and forms the Source contact layer 6S and drain contact layer 6D being separated from each other.
Source electrode is not particularly limited with the material of conducting film.It can be suitably used comprising aluminium (Al), tungsten (W), molybdenum (Mo), tantalum (Ta), metal or the film of its alloy or its metal nitride such as chromium (Cr), titanium (Ti), copper (Cu).Here, formed MoN (thickness：For example, 30nm), Al (thickness：For example, 200nm) and MoN (thickness：For example, 50nm) be laminated in that order after Stacked film is as source electrode conducting film.In addition it is also possible to replace, and formed Ti (thickness：For example, 30nm), MoN it is (thick Degree：For example, 30nm), Al (thickness：For example, 200nm) and MoN (thickness：For example, 50nm) be laminated in that order after stacking Film is as source electrode conducting film.
Here, for example forming source electrode conducting film with sputtering method, the pattern of source electrode conducting film is carried out by Wet-type etching Change (source/drain separation).Afterwards, such as by dry-etching by being located in contact layer the channel region of semiconductor layer 5 is turned into Part on the region in domain removes and forms clearance portion, is separated into Source contact layer 6S and drain contact layer 6D.Now, in gap In portion, the surface of semiconductor layer 5 is nearby also etched (overetch).
In addition, for example using feelings of the stacked film after being laminated in that order Ti films and Al films as source electrode conducting film Under condition, such as after the patterning of Al films can also having been carried out by Wet-type etching using phosphoric acid acetic acid aqueous solution of nitric acid, by dry Formula is etched to Ti films and contact layer (n+Type amorphous silicon layer) 6 simultaneously patterned.Or can also be in the lump to source electrode conducting film It is etched with contact layer.But, in the case of being etched at the same time to source electrode conducting film or its lower floor and contact layer 6, Sometimes it is difficult to control the distribution of the etch quantity (the excavation amount of clearance portion) of the overall semiconductor layer 5 of substrate.And it ought lead to as described above When crossing separated etching work procedure progress source/drain separation and the formation of clearance portion, then the erosion of clearance portion can be more easily controlled Quarter measures.
Then, the 1st insulating barrier 11 is formed in a manner of covering TFT10.In this embodiment, the 1st insulating barrier 11 with semiconductor The mode of the channel region contact of layer 5 configures.In addition, arrival drain electrode electricity is formed in the 1st insulating barrier 11 by known photoetching Pole 7D contact hole CH1.
1st insulating barrier 11 for example can be silica (SiO2) film, silicon nitride (SiNx) film, oxidized silicon nitride (SiOxNy； X ＞ y) film, nitride-monox (SiNxOy；X ＞ y) inorganic insulation layer such as film.Here, thickness is for example formed for example by CVD It is 330nm SiNx layer as the 1st insulating barrier 11.
Then, paster conducting film is formed on the 1st insulating barrier 11 and in contact hole CH1, and is patterned.By This, forms patch electrode 15 in receiving area R1 is sent, and paster connecting portion 15p is formed in non-sent receiving area R2.Patch Plate electrode 15 contacts in contact hole CH1 with drain electrode 7D.In addition, in this manual, sometimes will be by paster conducting film Layer formed, comprising patch electrode 15, paster connecting portion 15p is referred to as " paster metal level ".
It can use and material of the grid by the use of the same material of conducting film or source electrode conducting film as paster conducting film.No Cross, paster is set as than grid conducting film and the conductive thickness of source electrode with conducting film.Thus, by lower suppressing electromagnetic wave Transmissivity, reduce the sheet resistance of patch electrode, the vibration that can reduce the free electron in patch electrode is converted into hot loss. Paster is, for example, less than more than 1 μm 30 μm with the suitable thickness of conducting film.If thinner than its, the transmissivity of electromagnetic wave turns into 30% Left and right, sheet resistance turn into 0.03 Ω/more than sq, it is possible to loss occurs and becomes the problem of big, if thicker than its, it is likely that stitch The problem of patterning of gap deteriorates.
Here, formed MoN (thickness：For example, 50nm), Al (thickness：For example, 1000nm) and MoN (thickness：Such as For 50nm) be laminated in that order after stacked film (MoN/Al/MoN) be used as paster conducting film.In addition it is also possible to take and generation It, and formed Ti (thickness：For example, 50nm), MoN (thickness：For example, 50nm), Al (thickness：For example, 2000nm) and MoN (thickness：For example, 50nm) be laminated in that order after stacked film (MoN/Al/MoN/Ti).Or it can also take and generation It, and formed Ti (thickness：For example, 50nm), MoN (thickness：For example, 50nm), Al (thickness：For example, 500nm) and MoN (thickness：For example, 50nm) be laminated in that order after stacked film (MoN/Al/MoN/Ti).Or can also use by Ti films, Cu films and Ti films be laminated in that order after stacked film (Ti/Cu/Ti) or the layer after being laminated in that order Ti films and Cu films Folded film (Cu/Ti).
Then, the 2nd insulating barrier (thickness is formed on the insulating barrier 11 of patch electrode 15 and the 1st：For example, more than 100nm Below 300nm) 17.As the 2nd insulating barrier 17, it is not particularly limited, such as silica (SiO can be suitably used2) film, nitridation Silicon (SiNx) film, oxidized silicon nitride (SiOxNy；X ＞ y) film, nitride-monox (SiNxOy；X ＞ y) film etc..Here, such as shape Into the SiNx layer that thickness is 200nm as the 2nd insulating barrier 17.
Afterwards, for example, by using fluorine-based gas dry-etching to inorganic insulating membrane (the 2nd insulating barrier the 17, the 1st insulate Layer 11 and gate insulator 4) it is etched in the lump.In etching, patch electrode 15, source bus line SL and grid bus GL conducts Etch obstacle and play function.Thus, formed in the 2nd insulating barrier 17, the 1st insulating barrier 11 and gate insulator 4 and reach grid Bus GL contact hole CH2, the contact hole CH3 for reaching source bus line SL is formed in the 2nd insulating barrier 17 and the 1st insulating barrier 11. In addition, the contact hole CH4 for reaching paster connecting portion 15p is formed in the 2nd insulating barrier 17.
In this embodiment, due to being etched in the lump to inorganic insulating membrane, therefore in resulting contact hole CH2 side wall, The side of 2nd insulating barrier 17, the 1st insulating barrier 11 and gate insulator 4 is integrated, in contact hole CH3 side wall, the 2nd insulating barrier 17 Integrated with the side wall of the 1st insulating barrier 11.In addition, in this manual, " the side of the different layers of more than 2 in contact hole Integrate " not only include the situation that the side being exposed in contact hole in these layers flushes in vertical direction, in addition to it is continuous Ground forms the situation of the inclined planes such as taper.This composition is e.g. etched to these layers by using same mask or will Obtained from one layer is etched etc. as mask to another layer.
Then, on the 2nd insulating barrier 17 and in contact hole CH2, CH3, CH4, such as electrically conducting transparent formed by sputtering method Film (thickness：More than 50nm below 200nm).As nesa coating, for example, can use ITO (indium/tin-oxide) film, IZO films, ZnO film (Zinc oxide film) etc..Here, it is used as nesa coating using the ito film that thickness is, for example, 100nm.
Then, gate terminal top connecting portion 19g, source terminal are formed by being patterned to nesa coating With top connecting portion 19s and transmission terminal top connecting portion 19p.Gate terminal is used with top connecting portion 19g, source terminal Portion connecting portion 19s and transmission terminal top connecting portion 19p is used to protect the electrode or distribution exposed in each portion of terminal.This Sample, obtain gate terminal sub-portion GT, source terminal sub-portion ST and transmission end sub-portion PT.
The structure ＞ of ＜ gaps substrate 201
Then, the structure of gap substrate 201 is further illustrated.
Fig. 6 is the sectional view for schematically showing antenna unit area U and portion of terminal IT in gap substrate 201.
Gap substrate 201 possesses：Dielectric base plate 51 with surface and the back side；It is formed at the surface of dielectric base plate 51 The 3rd insulating barrier 52；The gap electrode 55 being formed on the 3rd insulating barrier 52；And the 4th insulating barrier of covering gap electrode 55 58.Reflection conductive plate 65 configures by a manner of dielectric layer (air layer) 54 is relative with the back side of dielectric base plate 51.Seam Gap electrode 55 and reflection conductive plate 65 play function as the wall of waveguide 301.
In receiving area R1 is sent, multiple gaps 57 are formed at gap electrode 55.Gap 57 is to pass through gap electrode 55 Logical opening.In this embodiment, it is configured with 1 gap 57 in each antenna unit area U.
4th insulating barrier 58 be formed in gap electrode 55 and gap 57 in.The material of 4th insulating barrier 58 can with it is the 3rd exhausted The material of edge layer 52 is identical.Gap electrode 55 is covered by using the 4th insulating barrier 58, gap electrode 55 will not be direct with liquid crystal layer LC Contact, therefore reliability can be improved.If gap electrode 55 is formed by Cu layers, Cu dissolutions sometimes to liquid crystal layer LC.If in addition, Gap electrode 55 is formed in Al layers using film deposition techniques, then includes hole sometimes in Al layers.The energy of 4th insulating barrier 58 Prevent the hole of liquid crystal material intrusion Al layers.If in addition, by by aluminium foil using adhesives be attached at dielectric base plate 51 and Al layers are patterned so as to make gap electrode 55, then the problem of being avoided that hole.
Gap electrode 55 includes the main stor(e)y 55M such as Cu layers, Al layers.Gap electrode 55 can have comprising main stor(e)y 55M and with Clip upper strata 55U that main stor(e)y 55M mode configures and lower floor 55L stepped construction.Main stor(e)y 55M thickness is according to material and examined Consider skin effect and set, such as can be less than more than 2 μm 30 μm.Main stor(e)y 55M thickness be typically greater than upper strata 55U and Lower floor 55L thickness.
In the example in the figures, main stor(e)y 55M is Cu layers, and upper strata 55U and lower floor 55L are Ti layers.By in main stor(e)y 55M and Lower floor 55L is configured between 3 insulating barriers 52, the adhesion of the insulating barrier 52 of gap electrode 55 and the 3rd can be improved.In addition, pass through setting Upper strata 55U, the corrosion of main stor(e)y 55M (such as Cu layers) can be suppressed.
The wall that conductive plate 65 forms waveguide 301 is reflected, therefore more than 3 times preferably with skin depth are preferably 5 Thickness more than times.Reflection conductive plate 65 is such as can be using by cutting the thickness made to count mm aluminium sheet, copper coin.
Portion of terminal IT is provided with non-sent receiving area R2.Portion of terminal IT possesses gap electrode 55, covering gap electricity The 4th insulating barrier 58 and top connecting portion 60 of pole 55.4th insulating barrier 58 has the opening for reaching gap electrode 55.Top connects Socket part 60 contacts in opening with gap electrode 55.In the present embodiment, portion of terminal IT is configured in sealing area Rs, is passed through The transmission end sub-portion connection (transport part) of sealing resin and TFT substrate containing conductive particle.
Transport part
Fig. 7 is for illustrating the transmission end sub-portion PT of TFT substrate 101 being connected with the portion of terminal IT of gap substrate 201 The schematic sectional view of transport part.In the figure 7, pair inscape same with Fig. 1~Fig. 4 mark identical reference.
In transport part, the transmission end of portion of terminal IT top connecting portion 60 and the transmission end sub-portion PT in TFT substrate 101 Son is electrically connected with top connecting portion 19p.In the present embodiment, by top connecting portion 60 and transmission terminal top connecting portion 19p is via (otherwise referred to as " the sealing 73 " of resin (sealing resin) 73 comprising electric conductivity pearl 71.) connection.
Top connecting portion 60,19p are the transparency conducting layers such as ito film, IZO films, form oxide-film on its surface sometimes.When When forming oxide-film, the mutual electrical connection of transparency conducting layer can not be ensured, contact resistance is possible to uprise.And in present embodiment In, it is bonded these transparency conducting layers via the resin comprising electric conductivity pearl (such as Au pearls) 71, therefore even if formed with surface Oxide-film, electric conductivity pearl can also break through (insertion) surface film oxide, so as to suppress the increase of contact resistance.Electric conductivity pearl 71 Surface film oxide can not only be penetrated, also top connecting portion 60,19p of the insertion as transparency conducting layer, and with paster connecting portion 15p and gap electrode 55 directly contact.
Transport part can both be configured at scanning antenna 1000 central part and peripheral part (that is, from the method for scanning antenna 1000 The transmission receiving area R1 of ring-type when line direction is watched inner side and outer side) both, it can also only be configured at any one. Transport part can be both configured in the sealing area Rs for enclosing liquid crystal, can also be configured at sealing area Rs outside (with liquid The opposite side of crystal layer).
The manufacture method ＞ of ＜ gaps substrate 201
Gap substrate 201 can for example be manufactured with following method.
First, the 3rd insulating barrier (thickness is formed on the dielectric substrate：For example, 200nm) 52.Can use glass substrate, Resin substrate etc. relative to electromagnetic wave the high (permittivity ε of transmissivityMWith dielectric loss tan δMIt is small) substrate as dielectric Substrate.In order to suppress the decay of electromagnetic wave, preferably dielectric base plate is relatively thin.Such as can be on the surface of glass substrate with described later After technique forms the inscapes such as gap electrode 55, make glass substrate thin plate from rear side.Thus, can be by the thickness of glass substrate Degree is reduced to such as less than 500 μm.
In the case where using resin substrate as dielectric base plate, the inscapes such as TFT can be both formed directly into On resin substrate, it can also be formed at using transfer printing on resin substrate.According to transfer printing, such as shape on the glass substrate Resin film (such as polyimide film), after forming inscape with technique described later on resin film, making will formed with composition The resin film of element separates with glass substrate.Usually compared with glass, the permittivity ε of resinMWith dielectric loss tan δMIt is smaller. The thickness of resin substrate is, for example, 3 μm~300 μm.As resin material, in addition to polyimides, such as liquid crystal could be used that Macromolecule.
As the 3rd insulating barrier 52, it is not particularly limited, such as silica (SiO can be suitably used2) film, silicon nitride (SiNx) film, oxidized silicon nitride (SiOxNy；X ＞ y) film, nitride-monox (SiNxOy；X ＞ y) film etc..
Then, metal film is formed on the 3rd insulating barrier 52, and is patterned, so as to obtain having multiple gaps 57 gap electrode 55.As metal film, the Cu films (or Al films) that thickness is 2 μm~5 μm can be used.Will here, using Ti films, Cu films and Ti films be laminated in that order after stacked film.In addition it is also possible to replace, and formed Ti (thickness：Example Such as it is 50nm) and Cu (thickness：For example, 5000nm) be laminated in that order after stacked film.
Afterwards, the 4th insulating barrier (thickness is formed in gap electrode 55 and in gap 57：For example, 100nm or 200nm) 58.The material of 4th insulating barrier 58 can be identical with the material of the 3rd insulating barrier.Afterwards, in non-sent receiving area R2, the 4th The opening portion for reaching gap electrode 55 is formed in insulating barrier 58.
Then, nesa coating is formed on the 4th insulating barrier 58 and in the opening portion of the 4th insulating barrier 58, and it is carried out Patterning, so as to form the top connecting portion 60 contacted in opening portion with gap electrode 55.Thus, portion of terminal IT is obtained.
＜ TFT10 material and structure ＞
In the present embodiment, it is used as the switch member for being configured at each pixel using the TFT that semiconductor layer 5 is set to active layer Part.Semiconductor layer 5 is not limited to amorphous silicon layer or polysilicon layer, oxide semiconductor layer.
In the case of using oxide semiconductor layer, the oxide semiconductor that oxide semiconductor layer includes both can be Noncrystalline oxide semiconductor or the crystalline oxide semiconductor with crystalline part.Aoxidized as crystalline Thing semiconductor, the crystallization that polycrystalline oxide semiconductor, oxide crystallite semiconductor, c-axis and aspect are approximately vertically oriented can be enumerated Matter oxide semiconductor etc..
Oxide semiconductor layer can also have more than 2 layers of stepped construction.In oxide semiconductor layer there is stacking to tie In the case of structure, oxide semiconductor layer can include noncrystalline oxide semiconductor layer and crystalline oxide semiconductor layer. Or the different multiple crystalline oxide semiconductor layers of crystalline texture can also be included.Alternatively, it is also possible to include multiple amorphous Matter oxide semiconductor layer.In the case where oxide semiconductor layer has 2 Rotating fields comprising the upper and lower, preferred upper strata Comprising the energy gap of oxide semiconductor be more than the energy gap of oxide semiconductor that lower floor included.But, in these layers In the case that the difference of energy gap is smaller, the energy gap of the oxide semiconductor of lower floor can also be more than the oxide semiconductor on upper strata Energy gap.
Material, structure, film build method, the tool of noncrystalline oxide semiconductor and above-mentioned each crystalline oxide semiconductor There is composition of the oxide semiconductor layer of stepped construction etc. to be for example documented in JP 2014-007399 publications.In order to refer to, The complete disclosure of JP 2014-007399 publications is quoted in this manual.
Oxide semiconductor layer can include at least one kind of metallic element in such as In, Ga and Zn.In present embodiment In, semiconductor (such as indium gallium zinc) of the oxide semiconductor layer for example comprising In-Ga-Zn-O systems.Here, In-Ga-Zn-O The semiconductor of system is In (indium), Ga (gallium), Zn (zinc) ternary system oxide, and In, Ga and Zn ratio (ratio of components) are without spy Do not limit, such as include In：Ga：Zn=2：2：1、In：Ga：Zn=1：1：1、In：Ga：Zn=1：1：2 etc..This oxide half Conductor layer can be formed by the oxide semiconductor film of the semiconductor comprising In-Ga-Zn-O systems.In- is included in addition, will have sometimes The channel etch type TFT of the active layer of the oxide semiconductors such as the semiconductor of Ga-Zn-O systems is referred to as " CE-OS-TFT ".
The semiconductor of In-Ga-Zn-O systems both can be noncrystalline or crystalline.As crystalline In-Ga-Zn- The semiconductor for the crystalline In-Ga-Zn-O systems that the semiconductor of O systems, preferably c-axis are approximately vertically oriented with aspect.
In addition, the crystalline texture of the semiconductor of crystalline In-Ga-Zn-O systems is e.g., as disclosed in above-mentioned JP 2014- In No. 007399 publication, JP 2012-134475 publications, JP 2014-209727 publications etc..In order to refer to, in this theory The complete disclosure of JP 2012-134475 publications and JP 2014-209727 publications is quoted in bright book.With In- The TFT of Ga-Zn-O based semiconductor layers has high mobility (more than 20 times compared with a-SiTFT) and Low dark curient electric current (with a- SiTFT is consequently adapted to be used as driving TFT and (such as is arranged at the drive circuit of non-sent receiving area compared to less than percent one) Comprising TFT) and be arranged at the TFT of each antenna unit area.
Oxide semiconductor layer can also include other oxide semiconductors to replace In-Ga-Zn-O based semiconductors.Such as In-Sn-Zn-O based semiconductors (such as In can be included2O3-SnO2-ZnO；InSnZnO).In-Sn-Zn-O based semiconductors are In The ternary system oxide of (indium), Sn (tin) and Zn (zinc).Or oxide semiconductor layer can also include In-Al-Zn-O systems half Conductor, In-Al-Sn-Zn-O based semiconductors, Zn-O based semiconductors, In-Zn-O based semiconductors, Zn-Ti-O based semiconductors, Cd- Ge-O based semiconductors, Cd-Pb-O based semiconductors, CdO (cadmium oxide), Mg-Zn-O based semiconductors, In-Ga-Sn-O based semiconductors, In-Ga-O based semiconductors, Zr-In-Zn-O based semiconductors, Hf-In-Zn-O based semiconductors, Al-Ga-Zn-O based semiconductors, Ga- Zn-O based semiconductors etc..
In the example shown in Fig. 3, TFT10 is the channel etch type TFT for having bottom grating structure.In " channel etch type In TFT ", do not form etch stop layer on channel region, the end lower surface of the raceway groove side of source electrode and drain electrode with The mode of the upper surface of semiconductor layer configures.Channel etch type TFT for example by forming source/drain on the semiconductor layer The conducting film of electrode, carry out source/drain separation and formed.In source/drain separation circuit, the table of channel region sometimes Facial branch is etched.
In addition, TFT10 can also be the etching barrier type TFT formed with etch stop layer on channel region.Etching In barrier type TFT, the end lower surface of the raceway groove side of source electrode and drain electrode is for example on etch stop layer.Etch barrier type What TFT was e.g. formed in the following way：The etching resistance of the part as channel region in covering semiconductor layer is formed After barrier, the conducting film of source/drain electrodes is formed on semiconductor layer and etch stop layer, carries out source/drain separation.
In addition, TFT10 has the top-contact configuration of the upper surface of source electrode and drain electrode and semiconductor layer, but source Pole and drain electrode can also configure (bottom contact structure) in a manner of the lower surface with semiconductor layer contacts.Moreover, TFT10 Both can be there is the bottom grating structure of gate electrode or in the upper of semiconductor layer in the dielectric base plate side of semiconductor layer Side has the top gate structure of gate electrode.
(the 2nd embodiment)
It is described with reference to the scanning antenna of the 2nd embodiment.TFT substrate and figure in the scanning antenna of present embodiment The difference of TFT substrate 101 shown in 2 is that the transparency conducting layer for turning into the top connecting portion of each portion of terminal is arranged at TFT Between the 1st insulating barrier and the 2nd insulating barrier in substrate.
Fig. 8 (a)~Fig. 8 (c) is gate terminal sub-portion GT, the source terminal for the TFT substrate 102 for representing present embodiment respectively Portion ST and transmission end sub-portion PT sectional view.Pair inscape same with Fig. 4 mark identical reference, omission are said It is bright.In addition, antenna unit area U cross section structure is identical with above-mentioned embodiment (Fig. 3), therefore omit diagram and explanation.
It is total that the gate terminal sub-portion GT of present embodiment possesses the grid bus GL being formed on dielectric base plate, covering grid Line GL insulating barrier and gate terminal top connecting portion 19g.Gate terminal top connecting portion 19g is being formed at insulating barrier Contact hole CH2 in contacted with grid bus GL.In this embodiment, the insulating barrier for covering grid bus GL includes gate insulator 4 With the 1st insulating barrier 11.Gate terminal with top connecting portion 19g and the 1st insulating barrier 11 formed with the 2nd insulating barrier 17.2nd is exhausted Edge layer 17 has the opening portion 18g for exposing a gate terminal top connecting portion 19g part.In this embodiment, the 2nd insulating barrier 17 opening portion 18g can also be configured in a manner of whole contact hole CH2 is exposed.
Source terminal sub-portion ST possess be formed on dielectric base plate (herein on gate insulator 4) source bus line SL, Cover source bus line SL insulating barrier and source terminal top connecting portion 19s.Source terminal is with top connecting portion 19s in shape Into in being contacted in the contact hole CH3 of insulating barrier with source bus line SL.In this embodiment, the insulating barrier for covering source bus line SL only includes 1st insulating barrier 11.2nd insulating barrier 17 is extended on source terminal top connecting portion 19s and the 1st insulating barrier 11.2nd is exhausted Edge layer 17 has the opening portion 18s for exposing a source terminal top connecting portion 19s part.The opening of 2nd insulating barrier 17 Portion 18s can also be configured in a manner of whole contact hole CH3 is exposed.
Transmission end sub-portion PT has：Source electrode connection wiring 7p, it is by (source electrode is with leading with source bus line SL identicals conducting film Electrolemma) formed；1st insulating barrier 11, it is extended on source electrode connection wiring 7p；And transmission terminal top connecting portion 19p and paster connecting portion 15p, it is formed on the 1st insulating barrier 11.
The contact hole CH5 and CH6 for exposing source electrode connection wiring 7p are provided with the 1st insulating barrier 11.Transmission terminal is used Top connecting portion 19p is configured on the 1st insulating barrier 11 with contact hole CH5, is connect in contact hole CH5 with source electrode connection wiring 7p Touch.Paster connecting portion 15p be configured on the 1st insulating barrier 11 and contact hole CH6 in, in contact hole CH6 with source electrode connection wiring 7p is contacted.Transmission terminal is the transparency electrode that is formed by nesa coating with top connecting portion 19p.Paster connecting portion 15p by with The identical conducting film of patch electrode 15 is formed.In addition, top connecting portion 19g, 19s and 19p of each portion of terminal can also be by identical Nesa coating formed.
2nd insulating barrier 17 is extended on transmission terminal top connecting portion 19p, paster connecting portion 15p and the 1st insulation On layer 11.2nd insulating barrier 17 has the opening portion 18p for exposing a transmission terminal top connecting portion 19p part.In the example In, the opening portion 18p of the 2nd insulating barrier 17 is configured in a manner of whole contact hole CH5 is exposed.On the other hand, paster connecting portion 15p is covered by the 2nd insulating barrier 17.
So, in the present embodiment, by being formed at the source electrode connection wiring 7p of source metal by transmission end sub-portion PT transmission terminal is electrically connected with top connecting portion 19p with paster connecting portion 15p.Although not shown, but with above-mentioned embodiment Equally, transmission terminal passes through the gap in the sealing resin containing conductive particle and gap substrate 201 with top connecting portion 19p Electrode connects.
In the above-described embodiment, after the 2nd insulating barrier 17 is formed, formed in the lump the different contact hole CH1 of depth~ CH4.Such as on gate terminal sub-portion GT, (gate insulator 4, the 1st insulating barrier 11 and the 2nd are exhausted for the thicker insulating barrier of etching Edge layer 17), and in transmission end sub-portion PT, only etch the 2nd insulating barrier 17.Therefore, the conduction of the substrate of shallow contact hole is turned into Film (such as patch electrode with conducting film) is possible to by big damage in etching.
And in the present embodiment, contact hole CH1~CH3, CH5, CH6 are formed before the 2nd insulating barrier 17 is formed.These connect Contact hole is only formed at the 1st insulating barrier 11 or is formed at the stacked film of the 1st insulating barrier 11 and gate insulator 4, thus with it is above-mentioned Embodiment compare, the difference of the depth of the contact hole formed in the lump can be reduced.Thus, it can reduce to the substrate as contact hole Conducting film damage.Particularly, in the case where patch electrode uses Al films with conducting film, if making ito film and Al films direct Contact, then can not obtain good contact, so forming the cap rocks such as MoN layers on the upper strata of Al films sometimes.In this case, no Need damage during consideration etching and increase the thickness of cap rock, therefore be favourable.
The manufacture method ＞ of ＜ TFT substrates 102
Such as TFT substrate 102 is manufactured with the following method.Fig. 9 is the figure for the manufacturing process for illustrating TFT substrate 102.In addition, Hereinafter, omitted the description in the case of material, thickness, forming method of each layer etc. with the above-mentioned identical of TFT substrate 101.
First, alignment mark, base insulating layer, grid are formed on the dielectric substrate with the method same with TFT substrate 102 Pole metal level, gate insulator, semiconductor layer, contact layer and source metal, obtain TFT.Forming source metal In process, source electrode and drain electrode, source bus line and source electrode connection wiring 7p are formed with conducting film by source electrode.
Then, the 1st insulating barrier 11 is formed in a manner of covering source metal.Afterwards, the He of the 1st insulating barrier 11 is etched in the lump Gate insulator 4, form contact hole CH1~CH3, CH5, CH6.In etching, source bus line SL and grid bus GL are as erosion Carve obstacle and play function.Thus, in receiving area R1 is sent, the drain electrode for reaching TFT is formed in the 1st insulating barrier 11 Contact hole CH1.In addition, in non-sent receiving area R2, formed in the 1st insulating barrier 11 and gate insulator 4 and reach grid Pole bus GL contact hole CH2, the contact hole CH3 for reaching source bus line SL is formed in the 1st insulating barrier 11 and reaches source electrode company Meet distribution 7p contact hole CH5, CH6.Contact hole CH5 can be configured to sealing area Rs, contact hole CH6 is configured at sealing Region Rs outside.Or both of which can also be configured to sealing area Rs outside.
Then, on the 1st insulating barrier 11 and nesa coating is formed in contact hole CH1~CH3, CH5, CH6, and it is entered Row patterning.Thus, form the gate terminal top connecting portion 19g contacted in contact hole CH2 with grid bus GL, connecing It is connected in contact hole CH3 with the source terminal that source bus line SL is contacted with top connecting portion 19s and in contact hole CH5 with source electrode The transmission terminal top connecting portion 19p of distribution 7p contacts.
Then, on the 1st insulating barrier 11, in gate terminal top connecting portion 19g, source terminal top connecting portion 19s, transmission terminal are carried out with forming patch electrode conducting film on the connecting portion 19p of top and in contact hole CH1, CH6 Patterning.Thus, the patch electrode 15 contacted in contact hole CH1 with drain electrode 7D is formed in receiving area R1 is sent, The paster connecting portion 15p contacted in contact hole CH6 with source electrode connection wiring 7p is formed in non-sent receiving area R2.Can be with The patterning of patch electrode conducting film is carried out by Wet-type etching.Here, use can increase nesa coating (ITO etc.) and patch The etchant of the plate electrode etching selectivity of conducting film (such as Al films).Thus, the figure of patch electrode conducting film is being carried out During case, nesa coating can be made to play function as etching obstacle.Source bus line SL, grid bus GL and source electrode connection The part exposed in contact hole CH2, CH3, CH5 in distribution 7p is etched obstacle (nesa coating) covering, therefore not It is etched.
Next, form the 2nd insulating barrier 17.Afterwards, such as by using the dry-etching of fluorine-based gas the 2nd insulation is carried out The patterning of layer 17.Thus, the opening portion that gate terminal top connecting portion 19g is exposed is set in the 2nd insulating barrier 17 18g, expose by the source terminal top connecting portion 19s opening portion 18s exposed and by transmission terminal top connecting portion 19p Opening portion 18p.So, TFT substrate 102 is obtained.
(the 3rd embodiment)
It is described with reference to the scanning antenna of the 3rd embodiment.TFT substrate and figure in the scanning antenna of present embodiment The difference of TFT substrate 102 shown in 8 is, the top connecting portion including nesa coating is not arranged at into transmission terminal Portion.
Figure 10 (a)~Figure 10 (c) is the gate terminal sub-portion GT for the TFT substrate 103 for representing present embodiment, source terminal respectively Sub-portion ST and transmission end sub-portion PT sectional view.Pair inscape same with Fig. 8 mark identical reference, omission are said It is bright.In addition, antenna unit area U structure is identical with above-mentioned embodiment (Fig. 3), therefore omit diagram and explanation.
The gate terminal sub-portion of TFT substrate 102 shown in gate terminal sub-portion GT and source terminal sub-portion ST structure and Fig. 8 and source The structure of extreme sub-portion is identical.
Transmission end sub-portion PT has the paster connecting portion 15p being formed on the 1st insulating barrier 11 and is laminated in paster connecting portion Protection conductive layer 23 on 15p.2nd insulating barrier 17 is extended on protection conductive layer 23, and conductive layer 23 will be protected by having The opening portion 18p that a part is exposed.On the other hand, patch electrode 15 is covered by the 2nd insulating barrier 17.
The manufacture method ＞ of ＜ TFT substrates 103
TFT substrate 103 for example manufactures with the following method.Figure 11 is the figure for the manufacturing process for illustrating TFT substrate 103.In addition, Hereinafter, omitted the description in the case of material, thickness, forming method of each layer etc. with the above-mentioned identical of TFT substrate 101.
First, alignment mark, base insulating layer, grid are formed on the dielectric substrate with the method same with TFT substrate 101 Pole metal level, gate insulator, semiconductor layer, contact layer and source metal, obtain TFT.
Then, the 1st insulating barrier 11 is formed in a manner of covering source metal.Afterwards, the He of the 1st insulating barrier 11 is etched in the lump Gate insulator 4, form contact hole CH1~CH3.In etching, source bus line SL and grid bus GL are as etching obstacle Play function.Thus, the contact hole CH1 for the drain electrode for reaching TFT is formed in the 1st insulating barrier 11, and in the 1st insulating barrier 11 and gate insulator 4 in form the contact hole CH2 for reaching grid bus GL, form that to reach source electrode total in the 1st insulating barrier 11 Line SL contact hole CH3.Contact hole is not formed in the region for forming transmission end sub-portion.
Then, on the 1st insulating barrier 11 and nesa coating is formed in contact hole CH1, CH2, CH3, and figure is carried out to it Case.Thus, form the gate terminal top connecting portion 19g contacted in contact hole CH2 with grid bus GL and connecing In contact hole CH3 with the source terminal that source bus line SL is contacted top connecting portion 19s.In the region for forming transmission end sub-portion, Nesa coating is removed.
Then, on the 1st insulating barrier 11, gate terminal top connecting portion 19g and source terminal top connecting portion 19s Patch electrode conducting film is formed in upper and contact hole CH1, and is patterned.Thus, in receiving area R1 is sent, The patch electrode 15 contacted in contact hole CH1 with drain electrode 7D is formed, paster is formed in non-sent receiving area R2 and is connected Socket part 15p.It is same with above-mentioned embodiment, using can ensure that nesa coating in the patterning of patch electrode conducting film (ITO etc.) and the etching selectivity of patch electrode conducting film etchant.
Next, protection conductive layer 23 is formed on paster connecting portion 15p.Ti layers, ITO layer and IZO (indium zinc oxygen can be used Compound) (the thickness such as layer：For example, more than 50nm below 100nm) as protection conductive layer 23.Here, use Ti layer (thickness：Example Such as it is 50nm) as protection conductive layer 23.In addition it is also possible to protection conductive layer is formed on patch electrode 15.
Then, the 2nd insulating barrier 17 is formed.Afterwards, such as by using the dry-etching of fluorine-based gas the 2nd insulating barrier is carried out 17 patterning.Thus, in the 2nd insulating barrier 17 set gate terminal top connecting portion 19g is exposed opening portion 18g, By the source terminal top connecting portion 19s opening portion 18s exposed the and opening portion 18p that conductive layer 23 will be protected to expose.This Sample, obtain TFT substrate 103.
The structure ＞ of ＜ gaps substrate 203
Figure 12 is the end for illustrating the transmission end sub-portion PT and gap substrate 203 by TFT substrate 103 of present embodiment The schematic sectional view of the transport part of sub-portion IT connections.In fig. 12, pair inscape mark same with above-mentioned embodiment Note identical reference.
First, the gap substrate 203 of present embodiment is illustrated.Gap substrate 203 possesses dielectric base plate 51, is formed at electricity 3rd insulating barrier 52 on the surface of medium substrate 51, the gap electrode 55 being formed on the 3rd insulating barrier 52 and covering gap electrode 55 the 4th insulating barrier 58.Conductive plate 65 is reflected with relative with the back side of dielectric base plate 51 across dielectric layer (air layer) 54 Mode configure.Gap electrode 55 and reflection conductive plate 65 play function as the wall of waveguide 301.
Gap electrode 55 has the stepped construction using Cu layers or Al layers as main stor(e)y 55M.In receiving area R1 is sent, Multiple gaps 57 are formed at gap electrode 55.Send the structure and the explanation of reference picture 6 of the gap electrode 55 in the R1 of receiving area The structure of above-mentioned gap substrate 201 is identical.
Portion of terminal IT is provided with non-sent receiving area R2.Portion of terminal IT is provided with the 4th insulating barrier 58 and will stitched The opening that the surface of gap electrode 55 is exposed.The region exposed of gap electrode 55 turns into contact surface 55c.So, in this embodiment party In formula, the contact surface 55c of gap electrode 55 is not covered by the 4th insulating barrier 58.
In transport part, via the resin (sealing resin) comprising electric conductivity pearl 71 by the covering paster in TFT substrate 103 Connecting portion 15p protection conductive layer 23 is connected with the contact surface 55c of the gap electrode 55 in gap substrate 203.
The transport part of the present embodiment central part that can be both configured at scanning antenna same with above-mentioned embodiment and Both peripheral parts, it can also only be configured at any one.In addition, can both be configured in sealing area Rs, can also configure In sealing area Rs outside (side opposite with liquid crystal layer).
In the present embodiment, it is not provided with nesa coating in transmission end sub-portion PT and portion of terminal IT contact surface.Cause This, can be such that protection conductive layer 23 is connected with the gap electrode 55 of gap substrate 203 via the sealing resin containing conductive particle.
In addition, in the present embodiment, compared with the 1st embodiment (Fig. 3 and Fig. 4), the depth of the contact hole formed in the lump Degree it is poor small, therefore the damage of the conducting film to the substrate as contact hole can be reduced.
The manufacture method ＞ of ＜ gaps substrate 203
Following manufacture gap substrate 203.Material, thickness and the forming method of each layer are identical with gap substrate 201, therefore save Slightly illustrate.
First, the 3rd insulating barrier 52 and gap electrode are formed on the dielectric substrate with the identical method of gap substrate 201 55, multiple gaps 57 are formed in gap electrode 55.Then, the 4th insulating barrier 58 is formed in gap electrode 55 and in gap.It Afterwards, opening portion 18p is set in the 4th insulating barrier 58 in order to which the region as contact surface of gap electrode 55 is exposed.So, Manufacture gap substrate 203.
＜ interior heater structures ＞
As described above, it is preferred to the dielectric anisotropy Δ ε of the liquid crystal material used in the antenna unit of antennaMGreatly.But It is dielectric anisotropy Δ εMThe viscosity of big liquid crystal material (nematic liquid crystal) is big, the problem of response speed is slow be present.Especially It is that when the temperature decreases, viscosity can rise.The environment temperature for the scanning antenna that moving body (such as ship, aircraft, automobile) is carried Degree can change.Thus, it is preferable to the temperature of liquid crystal material can be adjusted to more than certain degree, such as more than 30 DEG C or 45 DEG C More than.Temperature is preferably set to set in a manner of the viscosity of nematic liquid crystal material turns into substantially 10cP (centipoise) below.
It is preferred that the scanning antenna of embodiments of the present invention is in addition to above-mentioned structure, also with interior heater Structure.It is preferred that it is used as interior heater using by the use of the heater of the resistance heating manner of Joule heat.Resistance as heater The material of film, is not particularly limited, and can use the higher conductive material of the resistivity ratio such as ITO, IZO.In addition, in order to adjust Resistance value, resistive film can also be formed with the fine rule of metal (such as nichrome, titanium, chromium, platinum, nickel, aluminium, copper), silk screen.Also ITO or IZO etc. fine rule, silk screen can be used.As long as resistance value is set according to required heat dissipation capacity.
For example, in order in the area of a diameter of 340mm circle (about 90,000mm2) in (60Hz) is exchanged by resistance with 100V The exothermic temperature of film is set to 30 DEG C, as long as the resistance value of resistive film is set into 139 Ω, electric current is set to 0.7A, by power density It is set to 800W/m2.The exothermic temperature of resistive film is set to 45 DEG C in order to exchange (60Hz) in identical area with 100V, As long as the resistance value of resistive film is set to 82 Ω, electric current is set to 1.2A, power density is set to 1350W/m2.
If the action can that the resistive film of heater does not influence scanning antenna is arranged at arbitrary position, but in order to Liquid crystal material is efficiently heated, is preferably provided near liquid crystal layer.TFT substrate 104 such as shown in Figure 13 (a) As shown, resistive film 68 can be formed in the substantially entire surface of dielectric base plate 1.Figure 13 (a) is with heater use The schematic plan of the TFT substrate 104 of resistive film 68.Resistive film 68 is for example covered by the underlying insulation film 2 shown in Fig. 3.Base Bottom dielectric film 2 is formed as having enough insulation pressure-resistant.
It is preferred that resistive film 68 has opening portion 68a, 68b and 68c.When TFT substrate 104 is bonded with gap substrate, gap 57 are in the position relative with patch electrode 15.Now, in order to from the edge in gap 57 distance for electricity is not present around d Film 68 is hindered, and configures opening portion 68a.D is, for example, 0.5mm.Additionally, it is preferred that also configure opening portion in auxiliary capacitor CS bottom 68b, opening portion 68c is also configured in TFT bottom.
In addition, antenna unit U size is, for example, 4mm × 4mm.In addition, as shown in Figure 13 (b), such as the width in gap 57 It is 0.5mm to spend s2, and the length s1 in gap 57 is 3.3mm, and the width p2 of the patch electrode 15 of the width in gap 57 is 0.7mm, the width p1 of the patch electrode 15 of the length direction in gap is 0.5mm.In addition, antenna unit U, gap 57 and paster The size of electrode 15, shape, configuration relation etc. are not limited to the example shown in Figure 13 (a) and Figure 13 (b).
In order to further reduce the influence of the electric field from heater resistive film 68, screening conductive layer can also be formed. Screening conductive layer is for example formed at the substantially entire surface of dielectric base plate 1 on underlying insulation film 2.Need not in screening conductive layer Opening portion 68a, 68b are set as resistive film 68, but are preferably provided with opening portion 68c.Screening conductive layer is for example formed by aluminium lamination, It is set to earthing potential.
In addition, in order to equably be heated to liquid crystal layer, preferably make the resistance value of resistive film there is distribution.It is preferred that In the Temperature Distribution of liquid crystal layer, maximum temperature-minimum temperature (temperature is irregular) turns into such as less than 15 DEG C.Exceed when temperature is irregular At 15 DEG C, it some times happens that following defect：Phase difference is modulated at irregular in face, can not form good wave beam.In addition, work as liquid crystal When the temperature of layer is close to Tni points (such as 125 DEG C), Δ εMIt can diminish, therefore be undesirable.
Reference picture 14 (a), Figure 14 (b) and Figure 15 (a)~Figure 15 (c) illustrate the distribution of the resistance value of resistive film.In Figure 14 (a), resistive heating configuration 80a~80e schematic structure and point of electric current are shown in Figure 14 (b) and Figure 15 (a)~Figure 15 (c) Cloth.Resistive heating configuration possesses resistive film and heater terminal.
Resistive heating configuration 80a shown in Figure 14 (a) has the 1st terminal 82a and the 2nd terminal 84a and is connected to them Resistive film 86a.1st terminal 82a is configured at round center, and the 2nd terminal 84a configures along whole circumference.Here, circle and transmission Receiving area R1 is corresponding.When to supplying DC voltage between the 1st terminal 82a and the 2nd terminal 84a, such as electric current IA is from the 1st end Sub- 82a is flowed with radial to the 2nd terminal 84a.Thus, also can be equably even the resistance value in resistive film 86a faces is constant Radiating.Certainly, the flow direction of electric current can also be the direction from the 2nd terminal 84a towards the 1st terminal 82a.
Resistive heating configuration 80b has the 1st terminal 82b and the 2nd terminal 84b and is connected to theirs in Figure 14 (b) Resistive film 86b.1st terminal 82b and the 2nd terminal 84b are circumferentially mutually adjacent to.In order that by resistive film 86b The heat dissipation capacity of per unit area caused by the electric current IA flowed between 1st terminal 82b and the 2nd terminal 84b keeps constant, resistive film 86b resistance value, which has in face, to be distributed.Distribution is for example forming resistive film 86 with fine rule in the face of resistive film 86b resistance value In the case of, as long as being adjusted with the thickness of fine rule, the density of fine rule.
Resistive heating configuration 80c shown in Figure 15 (a) has the 1st terminal 82c and the 2nd terminal 84c and is connected to them Resistive film 86c.1st terminal 82c is along half of the circumference configuration in round upside, and the 2nd terminal 84c is along round half of downside circumference Configuration.In the case of the fine rule composition resistive film 86c for being used for example in extension up and down between the 1st terminal 82c and the 2nd terminal 84c, it is The heat dissipation capacity of electric current IA per unit area is set to keep constant in face, such as by the thickness of the fine rule near center, density Heighten.
Resistive heating configuration 80d shown in Figure 15 (b) has the 1st terminal 82d and the 2nd terminal 84d and is connected to them Resistive film 86d.1st terminal 82d and the 2nd terminal 84d respectively along diameter of a circle in above-below direction, right and left to upwardly extend Mode set.Though being simplified in figure, the 1st terminal 82d and the 2nd terminal 84d are mutually insulateds.
In addition, the resistive heating configuration 80e shown in Figure 15 (c) has the 1st terminal 82e and the 2nd terminal 84e and is connected to Their resistive film 86e.Resistive heating configuration 80e is different from resistive heating configuration 80d, and the 1st terminal 82e and the 2nd terminal 84e are equal 4 parts with 4 directions extension from round center vertically and horizontally.Be in 90 degree of the 1st terminal 82e part and 2nd terminal 84e part is configured to electric current IA clockwise flows.
In resistive heating configuration 80d and resistive heating configuration 80e, in order that the heat dissipation capacity of per unit area is protected in face Hold uniformly, with the fine rule from the side that the nearlyer electric current IA of circumference is more, such as overstriking is near from circumference and improve the side of its density Formula is adjusted.
This interior heater structure can for example detect the temperature of scanning antenna and when less than predetermined temperature Auto-action.It is of course also possible to acted in response to the operation of user.
＜ driving methods ＞
The array of antenna unit possessed by the scanning antenna of embodiments of the present invention has the knot similar with LCD Structure, therefore enter line order in the same manner as LCD and drive.But if using existing LCD driving method, have Problems with may occur.The equivalent circuit figure of 1 antenna unit of the scanning antenna shown in reference picture 16 is come illustrate may be The problem of occurring in scanning antenna.
First, as described above, the dielectric anisotropy Δ ε of microwave regionM(big relative to the birefringence n) of visible ray The resistivity of liquid crystal material is low, if therefore directly can not fully keep applying liquid crystal layer using the driving method of LCD The voltage added.So, the effective voltage that liquid crystal layer applies is reduced, the electrostatic capacitance value of liquid crystal capacitance does not reach desired value.
So, when the voltage applied to liquid crystal layer deviates from defined value, the gain of antenna can be from for maximum direction Deviate in desired direction.So, such as just can not tracking communication satellite exactly.In order to prevent the situation, with electric with liquid crystal Hold Clc electrically in parallel modes and auxiliary capacitor CS is set, make auxiliary capacitor CS capacitance C-Ccs sufficiently large.It is preferred that with liquid crystal electricity The voltage retention for holding Clc suitably sets auxiliary capacitor CS capacitance C-Ccs as more than 90% mode.
In addition, when using resistivity low liquid crystal material, it also occur that the electricity caused by interfacial polarization and/or orientation polarization Pressure drop is low.In order to prevent the voltage caused by these polarization from reducing, it may be considered that apply enough including decrease amount av is estimated High voltage.But when applying high voltage to the low liquid crystal layer of resistivity, it is possible to which dynamic scattering effect occurs, and (DS is imitated Should).DS effects are due to the convection current of the ionic impurity in liquid crystal layer, the permittivity ε of liquid crystal layerMClose to average value ((εM∥+ 2εM⊥)/3).Further, since the permittivity ε of liquid crystal layer is controlled with multistage (multi-grey level)M, also can not always apply sufficiently high Voltage.
For the voltage reduction for suppressing above-mentioned DS effects and/or polarizing caused, as long as making the voltage applied to liquid crystal layer The polarity inversion cycle it is short enough.As it is known, when the alive polarity inversion cycle is applied in shortening, DS effects occur The threshold voltage answered can uprise.Thus, as long as so that the maximum of the voltage (absolute value) applied to liquid crystal layer is less than generation DS The mode of the threshold voltage of effect determines polarity inversion frequency.If polarity inversion frequency is more than 300Hz, such as is Make to be 1 × 10 to resistivity10Ω cm, dielectric anisotropy Δ ε (@1kHz) for -0.6 or so liquid crystal layer apply absolute value For 10V voltage, good action is also ensured that.In addition, if polarity inversion frequency (identical typically with 2 times of frame rate) is More than 300Hz, then can also suppress the voltage as caused by above-mentioned polarization reduces.From the viewpoint of power consumption etc., preferably polarity is anti- The upper limit of turn-week phase is about below 5kHz.
As described above, the viscosity of liquid crystal material depends on temperature, therefore preferably properly control the temperature of liquid crystal layer.Herein The physical property and drive condition of the liquid crystal material of description are the values of the operating temperature of liquid crystal layer.On the contrary, preferably can use The mode of above-mentioned condition driving controls the temperature of liquid crystal layer.
Reference picture 17 (a)~Figure 17 (g) illustrates the example of the waveform of the signal used in the driving of scanning antenna.This Outside, the display signal Vs (LCD) of the source bus line supply to LCD waveform is shown to compare in Figure 17 (d).
Figure 17 (a) represents the waveform of the scanning signal Vg to grid bus G-L1 supplies, and Figure 17 (b) is represented to grid bus The scanning signal Vg of G-L2 supplies waveform, Figure 17 (c) represent the waveform of the scanning signal Vg to grid bus G-L3 supplies, figure 17 (e) represents the waveform of the data-signal Vda to source bus line supply, and Figure 17 (f) represents the gap electrode (seam to gap substrate Gap electrode) supply gap voltage Vidc waveform, Figure 17 (g) represents the ripple of the voltage applied to the liquid crystal layer of antenna unit Shape.
As shown in Figure 17 (a)~Figure 17 (c), to the scanning signal Vg of grid bus supply voltage sequence from low level (VgL) high level (VgH) is switched to.VgL and VgH can suitably be set according to TFT characteristic.E.g. VgL=-5V~0V, Vgh=+20V.Alternatively, it is also possible to be set to VgL=-20V, Vgh=+20V.By from the scanning signal Vg of certain grid bus voltage From low level (VgL) switch at the time of high level (VgH) to the voltage of next grid bus from VgL switch to VgH when During untill quarter during referred to as 1 horizontal sweep (1H).In addition, it is the phase of high level (VgH) by the voltage of each grid bus Between be referred to as select during PS.In PS during the selection, being connected to the TFT of each grid bus turns into conducting state, total to source electrode The data-signal Vda of line supply voltage supply now patch electrode corresponding to.Data-signal Vda e.g. -15V~+ 15V (absolute value 15V), such as use the data-signal different from 12 gray levels, absolute value preferably corresponding with 16 gray levels Vda。
Here, illustrate the situation that whole antenna units are applied with certain medium voltage.That is, the voltage of data-signal Vda is relative (it is set to be connected to m grid bus in whole antenna units.) it is constant.This is used as entire surface with being shown in LCD Intermediate grey scales situation it is corresponding.Now, dot inversion driving is carried out in LCD.That is, in each frame with mutually adjacent The mutually opposite mode of polarity of pixel (point) supplies display signal voltage.
Figure 17 (d) represents to carry out the waveform of the display signal of the LCD of dot inversion driving.As shown in Figure 17 (d), Vs (LCD) polarity is pressed to be inverted per 1H.Pair source bus line adjacent with being supplied the source bus line of the Vs (LCD) with the waveform supplies The Vs (LCD) answered polarity is opposite with the polarity of the Vs (LCD) shown in Figure 17 (d).In addition, whole pixel supplies are shown Show that the polarity of signal is inverted by each frame.In LCD, when positive polarity is with negative polarity, it is difficult to make to have liquid crystal layer application The size of effect voltage is completely the same, and the difference of effective voltage turns into the difference of brightness, and is observed to flash.In order to be not easy to observe The flicker, the pixel (point) of the different voltage of application polarity is set spatially to disperse in each frame.Typically, it is a little anti-by carrying out Turn driving, the different pixel of polarity (point) is arranged by tartan.
And in scanning antenna, flicker will not turn into problem in itself.That is, as long as the electrostatic capacitance value of liquid crystal capacitance is wished The value of prestige, the spatial distribution of the polarity in each frame will not turn into problem.Thus, from the viewpoint of low-power consumption etc., preferably Reduce the number of the polarity inversion of the data-signal Vda from source bus line supply, extend the cycle of polarity inversion.Such as scheme Shown in 17 (e), as long as the cycle of polarity inversion is set into 10H (press and polarity inversion is carried out per 5H).Certainly, when will be connected to The quantity of the antenna unit of each source bus line is (typically equal with the number of grid bus.) when being set to m, can also be by data The cycle of signal Vda polarity inversion is set to 2mH (press and polarity inversion is carried out per mH).Data-signal Vda polarity inversion Cycle can also be equal to 2 frames (by every 1 frame carry out polarity inversion).
Alternatively, it is also possible to which the data-signal Vda supplied from whole source bus lines polarity is set into identical.Thus, example Such as can be in certain frame from the data-signal Vda of whole source bus lines supply positive polarity, from whole source electrodes in ensuing frame Bus supplies the data-signal Vda of negative polarity.
Or the polarity for the data-signal Vda that the mutual adjacent source bus line of slave phase is supplied can also be set to mutually opposite Polarity.Such as the data-signal Vda of positive polarity is supplied from the source bus line of odd column in certain frame, it is total from the source electrode of even column Line supplies the data-signal Vda of negative polarity.Then, the number of negative polarity is supplied from the source bus line of odd column in ensuing frame It is believed that number Vda, the data-signal Vda of positive polarity is supplied from the source bus line of even column.This driving method quilt in LCD Referred to as source electrode line is driven reverse.When opposite polarity chron will be set to from the data-signal Vda of adjacent source bus line supply, pass through Adjacent source bus line is connected with each other and (makes its short circuit) before making the data-signal Vda of supply polarity inversion in interframe, and energy The electric charge that will be charged to liquid crystal capacitance eliminates between adjacent row.Thus, can obtain can reduce in each frame from source bus line The advantages of quantity of electric charge of supply.
As shown in Figure 17 (f), the voltage Vidc of gap electrode is, for example, D/C voltage, typically earthing potential.Antenna list Position electric capacity (liquid crystal capacitance and auxiliary capacitor) capacitance be more than LCD pixel capacitance capacitance (such as with 20 English Very little or so LCD compares about 30 times), therefore the influence of the feed-trough voltage as caused by TFT parasitic capacitance is not present, i.e., Make the voltage Vidc of gap electrode being set to earthing potential, data-signal Vda is set to Symmetrical on the basis of earthing potential Voltage, to patch electrode supply voltage also turn into Symmetrical voltage.In LCD, TFT feed-trough voltage is considered And the voltage (shared voltage) of comparative electrode is adjusted, so as to apply the voltage of Symmetrical to pixel electrode, but for scanning day The gap voltage of line then need not so be done, and can be earthing potential.Though in addition, not shown in fig. 17, to the supply of CS buses with Gap voltage Vidc identical voltages.
The voltage applied to the liquid crystal capacitance of antenna unit is the patch relative to the voltage Vidc (Figure 17 (f)) of gap electrode The voltage (voltage of the data-signal Vda i.e. shown in Figure 17 (e)) of plate electrode, therefore be earthing potential in gap voltage Vidc When, it is consistent with the waveform of the data-signal Vda shown in Figure 17 (e) as shown in Figure 17 (g).
The waveform of the signal used in the driving of scanning antenna is not limited to above-mentioned example.Such as reference picture 18 and figure 19 and illustrate below, voltages of the Viac with vibrational waveform as gap electrode can also be used.
Such as the signal as being illustrated in Figure 18 (a)~Figure 18 (e) can be used.In figure 18, eliminate to grid The scanning signal Vg of bus supply waveform, but herein also using the scanning signal illustrated by reference picture 17 (a)~Figure 17 (c) Vg。
As shown in Figure 18 (a), illustrate equally makes data-signal Vda waveform by the 10H cycles with what is shown in Figure 17 (e) The situation of polarity inversion is carried out (per 5H).Here, as data-signal Vda, it is maximum to show amplitude | Vdamax| situation. As described above, data-signal Vda waveform can also be made to carry out polarity inversion by 2 frame periods (every 1 frame).
Here, as shown in Figure 18 (c), the voltage Viac of gap electrode is set to that polarity is opposite with data-signal Vda (ON), shakes Dynamic cycle and data-signal Vda (ON) identical vibration voltage.The voltage Viac of gap electrode amplitude and data-signal Vda Amplitude maximum | Vdamax| it is equal.That is, gap voltage Viac is set to cycle and the data-signal Vda (ON) of polarity inversion Identical, polarity (phase differ 180 °) opposite with data-signal Vda (ON), in-VdamaxWith+VdamaxBetween the voltage that vibrates.
The voltage Vlc applied to the liquid crystal capacitance of antenna unit is the voltage Viac (Figure 18 (c)) relative to gap electrode Patch electrode voltage (that is, the voltage of the data-signal Vda (ON) shown in Figure 18 (a)), therefore shaking in data-signal Vda Width presses ± VdamaxDuring vibration, shown turn into of voltage such as Figure 18 (d) applied to liquid crystal capacitance presses Vdamax2 times of amplitude vibration Waveform.Thus, in order to which the voltage applied to liquid crystal capacitance Vlc peak swing is set into ± VdamaxAnd the data letter needed Number Vda peak swing turns into ± Vdamax/2。
By using this gap voltage Viac, data-signal Vda peak swing can be set to half, thus it is available Such as the advantages of pressure-resistant drive circuit for below 20V general driver IC as outputting data signals Vda can be used.
In addition, as shown in Figure 18 (e), in order to which the voltage Vlc applied to the liquid crystal capacitance of antenna unit (OFF) is set to Zero, as shown in Figure 18 (b), as long as data-signal Vda (OFF) is set to and gap voltage Viac identical waveforms.
Such as the peak swing for the voltage Vlc for considering that liquid crystal capacitance will be applied is set to ± 15V situation.As gap electricity Pressure is using the Vidc shown in Figure 17 (f), if during Vidc=0V, the peak swing of the Vda shown in Figure 17 (e) turns into ± 15V.And make The Viac shown in Figure 18 (c), when Viac peak swing is set into ± 7.5V, the Vda shown in Figure 18 (a) are used for gap voltage (ON) peak swing turns into ± 7.5V.
In the case where the voltage applied to liquid crystal capacitance Vlc is set into 0V, as long as the Vda shown in Figure 17 (e) is set to 0V, Vda (OFF) shown in Figure 18 (b) if peak swing be set to ± 7.5V.
In the case where using the Viac shown in Figure 18 (c), the voltage Vlc applied to liquid crystal capacitance amplitude and Vda's Amplitude is different, it is therefore desirable to suitably changes.
Signal as being illustrated in Figure 19 (a)~Figure 19 (e) can also be used.Signal shown in Figure 19 (a)~Figure 19 (e) with Signal shown in Figure 18 (a)~Figure 18 (e) will similarly be set to the phase of vibration voltage Viac such as Figure 19 (c) of gap electrode Suo Shi Position differs 180 ° of vibration voltage with data-signal Vda (ON).But, such as it is respectively shown in Figure 19 (a)~Figure 19 (c), will Data-signal Vda (ON), Vda (OFF) and gap voltage Viac are set to the voltage vibrated between 0V and positive voltage.Seam The maximum of amplitude of the voltage Viac of the gap electrode amplitude equal to data-signal Vda | Vdamax|。
When using this signal, as long as drive circuit only exports positive voltage, this contributes to cost degradation.This Sample, even with the voltage vibrated between 0V and positive voltage, also as shown in Figure 19 (d), to the electricity of liquid crystal capacitance application Press Vlc (ON) that polarity inversion occurs.In the voltage waveform shown in Figure 19 (d) ,+(just) represents the voltage of patch electrode higher than seam Gap voltage ,-it is (negative) represent patch electrode voltage be less than gap voltage.That is, the direction (polarity) of the electric field applied to liquid crystal layer Inverted in the same manner as other examples.The voltage Vlc (ON) applied to liquid crystal capacitance amplitude is Vdamax。
In addition, as shown in Figure 19 (e), in order to which the voltage Vlc applied to the liquid crystal capacitance of antenna unit (OFF) is set to Zero, as shown in Figure 19 (b), as long as data-signal Vda (OFF) is set to and gap voltage Viac identical waveforms.
Make reference picture 18 and the voltage Viac vibrations (reversion) of gap electrode that Figure 19 illustrates if driving method with LCD faces It is for the driving method of plate, then corresponding with making the driving method of relative voltage reversal (sometimes referred to as " common to be driven reverse ".). In LCD, due to flicker can not be adequately suppressed, so not using common reverse drive.And in scanning antenna, flicker Problem will not be turned into, therefore gap voltage reversal can be made.Such as (reversion) is vibrated (by Figure 18 and Figure 19 by each frame 5H is set to 1V (during vertical scanning or frame)).
In the above description, the voltage Viac for illustrating gap electrode is to apply the example of 1 voltage, i.e. to whole patches Plate electrode is provided with the example of shared gap electrode, but can also be by gap electrode and 1 row of patch electrode or the row of more than 2 Accordingly split.Here, row refers to be connected to the set of the patch electrode of 1 grid bus via TFT.If so will seam Gap electrode is divided into multiple row parts, then the polarity of the voltage of gap electrode each several part can be set into separate.Such as In arbitrary frame, the polarity of the voltage applied to patch electrode can be connected between the patch electrode of adjacent grid bus It is set to mutually opposite.So, it can not only enter to exercise the row reversion (1H reversions) that polarity is inverted by every 1 row of patch electrode, also The m rows that polarity is inverted by the row of every more than 2 can be entered to exercise and invert (mH reversions).Certainly, row reversion can be combined with frame reversion.
From the viewpoint of the simplicity of driving, the polarity of voltage applied to patch electrode is preferably made in arbitrary frame All identical and polarity presses the driving of each frame reversion.
The arrangement of ＜ antenna units, grid bus, the connection example ＞ of source bus line
In the scanning antenna of embodiments of the present invention, antenna unit is for example arranged in concentric circles.
Such as in the case where being arranged in m concentric circles, grid bus is for example each to each circle to set 1, sets m altogether Grid bus.When the external diameter for sending receiving area R1 for example is set into 800mm, m is, for example, 200.When by most inner side grid When bus is set to the 1st, the 1st grid bus is connected to n (such as 30) antenna units, and m-th of grid bus is connected to Nx (such as 620) antenna units.
In this arrangement, the quantity for being connected to the antenna unit of each grid bus is different.In addition, it is connected to composition outermost Nx source bus line of nx antenna unit of the circle of side is connected to m antenna unit, but is connected to the day for the circle for forming inner side The quantity for the antenna unit that the source bus line of line unit is connected is less than m.
So, the arrangement of the antenna unit in scanning antenna is different from the arrangement of the pixel (point) in LCD, passes through grid The quantity of pole bus and/or the antenna unit of source bus line connection is different.Thus, when by the electric capacity (liquid crystal of whole antenna units Electric capacity+auxiliary capacitor) when being set to identical, pass through grid bus and/or electric load that source bus line connects is different.So, exist The problem of irregular, occurs for the write-in to the voltage of antenna unit.
Therefore, in order to prevent the situation, grid is for example preferably connected to by the capacitance or adjustment that adjust auxiliary capacitor The quantity of the antenna unit of bus and/or source bus line and make each grid bus and electric load that each source bus line is connected substantially It is identical.
The scanning antenna of embodiments of the present invention is accommodated in for example plastic casing as needed.It is preferred that casing uses The permittivity ε that the transmission of microwave receives is not influenceedMSmall material.Alternatively, it is also possible in casing and transmission receiving area R1 Corresponding part sets through hole.Moreover, in order that liquid crystal material is not exposed in light, light-shielding structure can also be set.Shading Structure is for example set to exist to the dielectric base plate 1 from TFT substrate 101 and/or the side of the dielectric base plate 51 of gap substrate 201 The light propagated in dielectric base plate 1 and/or 51 and incide liquid crystal layer carries out shading.Dielectric anisotropy Δ εMBig liquid crystal material In material, some is prone to light deterioration, preferably not only also carries out shading to the blue light of visible ray intermediate waves length to ultraviolet.Example Light-shielding structure such as can be readily formed at the position of needs by using the adhesive tape light-proofness adhesive tape of black.
＜ spacer structures ＞
The scanning antenna of the embodiments of the present invention thickness using sept control liquid crystal layer LC same with LCD. As sept, use：It is mixed in the sept of encapsulant (sometimes referred to as " granular sept ".)；And use ultraviolet The column spacer that the photoresists such as curable resin are formed by photoetching process is (sometimes referred to as " spacer ".).
It is patch electrode 15 due to helping to control the phase of microwave in the scanning antenna of embodiments of the present invention Liquid crystal layer LC between gap electrode 55, therefore from the viewpoint of the operation precision for improving scanning antenna, preferably paster is electric The thickness d LC (reference picture 20) of liquid crystal layer LC between pole 15 and gap electrode 55 uniformity is high.Embodiment party described below The uniformity that the scanning antenna of formula has the thickness d LC that can make the liquid crystal layer LC between patch electrode 15 and gap electrode 55 improves Spacer structures.
The degree of the bumps on gap substrate and TFT substrate surface possessed by scanning antenna (difference of height) is more relative than LCD The bumps on substrate and TFT substrate surface are big.One of its reason is, forms metal level (such as the Cu of gap electrode or patch electrode Layer or Al layers) thickness be, for example, 0.5 μm~5 μm and larger.If by the liquid crystal between patch electrode 15 and gap electrode 55 Layer LC thickness d LC is for example set as 5 μm, then liquid crystal layer LC thickness maximum can be more than 10 μm.
In the manufacture method of LCD, spacer is by by photoresist (such as ultraviolet curing tree Fat) precursor solution be applied on substrate (such as using spin coater or gap coating machine) and as needed remove solvent, It is exposed in a prescribed pattern after prebake conditions/develops and formed.The thickness of the liquid crystal layer of LCD be (spacer Highly) it is 2 μm~3 μm or so, therefore spacer can be formed by above-mentioned technique.However, it is very difficult to pass through above-mentioned work Skill forms spacer of the height more than 5 μm.
Therefore, the scanning antenna of reference picture 20 to Figure 22 embodiments of the present invention illustrated uses spacer structures body 75 To control liquid crystal layer LC thickness d LC.In figures in the following, it is real to the inscape with the scanning antenna with illustrating before The inscape of identical function encloses common reference in matter, omits the description sometimes.
Figure 20 is the sectional view of the example for the structure for schematically showing the scanning antenna with spacer structures body 75, is Schematically show the figure positioned at the spacer structures body 75 for sending receiving area R1.Figure 21 has spacer structures body 75 The schematic plan of TFT substrate 105 possessed by scanning antenna, Figure 22 are the fields for illustrating to set spacer structures body 75 Schematic plan with the relation of the position of gap 57 and patch electrode 15.In addition, multiple intervals that scanning antenna has Thing structure 75 can also be included positioned at the multiple spacer structures bodies for sending receiving area R1 and positioned at non-sent receiving area R2 multiple spacer structures bodies.
As shown in figure 20, the thickness of the liquid crystal layer LC between TFT substrate 105 and gap substrate 205 is according to the difference in place It is and different.TFT substrate 105 shown in Figure 20 is, for example, to be made in the same manner as the TFT substrate 101 of the embodiment 1 of the explanation of reference picture 1 Make.If here, the thickness d LC of the liquid crystal layer LC between patch electrode 15 and gap electrode 55 is set into such as 5.00 μm, TFT substrate 105 (with the nonoverlapping part of gate metal layer, source metal and paster metal level) is between gap electrode 55 Liquid crystal layer LC thickness deltat L1 turn into such as 7.73 μm.TFT substrate 105 is (with gate metal layer, source metal and paster gold Belonging to layer nonoverlapping part) the thickness deltat L2 of liquid crystal layer LC gap 57 between is as such as 12.78 μm.Existing In LCD, spacer is arranged at regulation Δ L1 position, but in the scanning antenna shown in Figure 20, Δ L1 is more than 7 μ M, therefore, it is difficult to form the spacer with this height.
Therefore, in the scanning antenna, pedestal 75B is formed in the part in the gap with Δ L1 of TFT substrate 105, will The thickness deltat L3 of liquid crystal layer LC on pedestal 75B is set to less than 5 μm, and spacer 59a is configured with pedestal 75B.Base Seat 75B can use the gate metal layer, source metal and the paster metal level that form TFT substrate 105 to be formed, therefore not necessarily form New layer, the pattern of mask when can be patterned by change to each layer are formed.As already explained, gate metal layer It is the layer for including gate electrode 3 and grid bus GL, source metal is that to include source electrode 7S, drain electrode 7D and source electrode total Line SL layer, paster metal level are the layers for including patch electrode 15 and paster connecting portion 15p.Spacer 59a for example passes through The organic insulator 59 formed in gap electrode 55 is patterned and formed.Organic insulator 59 is for example by photonasty tree Fat (such as acrylic resin) formation.Spacer 59a height is, for example, less than more than 2 μm 5 μm.Spacer 59a Height it is for example roughly equal with liquid crystal layer LC thickness deltat L3.That is, the thickness deltat L3 of the liquid crystal layer LC on pedestal 75B is, for example, Less than more than 2 μm 5 μm.Spacer 59a height refers to the height in the normal direction of the 1st dielectric base plate 1.Liquid crystal Layer LC thickness refers to the thickness in the normal direction of the 1st dielectric base plate 1.The other conductive layers having on scanning antenna Or insulating barrier, it is also just same as long as no specializing.
So, spacer structures body 75 includes spacer 59a and pedestal 75B.It is preferred that pedestal 75B comprises at least paster A part of M3 of metal level.Pedestal 75B can also be also including gate metal layer a part of M1 and/or one of source metal Divide M2.Here, in order to reduce liquid crystal layer LC thickness deltat L3, formation is a part of M1 and the source electrode gold for including gate metal layer Belong to a part of M2 of layer pedestal 75B.
For example, as shown in figure 20, when pedestal 75B have a part of M1 of gate metal layer, source metal a part During a part of M3 of M2 and paster metal level, as long as spacer 59a thickness is set to the thickness deltat L1 from liquid crystal layer LC Subtract the value of the thickness sum of the thickness of gate metal layer, the thickness of source metal and paster metal level.Paster gold The thickness for belonging to layer is, for example, 0.5 μm~2 μm.The thickness of paster metal level is bigger, more can be relative to liquid crystal layer LC thickness deltat L1 Reduce spacer 59a height.For example, if the thickness of paster metal level is 2 μm, by using the height with 5 μm The spacer 59a of degree, liquid crystal layer LC thickness deltat L3 5 μm can be set to when liquid crystal layer LC thickness deltat L1 is 7 μm.
In addition, gate metal layer is not present under patch electrode 15, therefore the thickness of the liquid crystal layer LC on patch electrode 15 Spend the amount of the thickness for the big gate metal layers of thickness deltat L3 that dLC can be than the liquid crystal layer LC on pedestal 75B.Liquid crystal layer LC thickness DLC is roughly the same with the thickness deltat L3 of the liquid crystal layer LC on pedestal 75B.Thus, by that with above-mentioned spacer structures, can incite somebody to action The thickness d LC controls of liquid crystal layer LC between patch electrode 15 and gap electrode 55 arrive such as less than more than 2 μm 5 μm.
Pedestal 75B in addition to a part of M3 including paster metal level also including gate metal layer a part of M1 and/ Or a part of M2 of source metal, so as to reduce spacer 59a height.Thickness and the source electrode gold of gate metal layer The thickness for belonging to layer is for example 200nm~400nm or so respectively, and it is 10%~80% or so of the thickness of paster metal level.With The thickness of gate metal layer is compared with the thickness of source metal, and the thickness of paster metal level is bigger, then pedestal 75B is comprised at least A part of M3 of paster metal level is more effective for the height for reducing spacer 59a.
In the case where liquid crystal layer LC thickness deltat L1 is small, above mentioned problem will not occur sometimes.In this case, pedestal 75B can not also include a part for paster metal level.Or spacer structures body 75 can not also include pedestal 75B.Such as In the case where liquid crystal layer LC thickness deltat L1 is below 5 μm, pedestal 75B can not include a part for paster metal level.Example Such as in the case where liquid crystal layer LC thickness deltat L1 is below 5 μm, spacer structures body 75 can not include pedestal 75B.
In the spacer structures of illustration, gap substrate 205 has spacer 59a, but embodiments of the present invention Scanning antenna possessed by spacer structures not limited to this.TFT substrate 105 can also have spacer.TFT substrate 105 spacers having to the organic insulator formed on the 2nd insulating barrier 17 for example by being patterned to be formed. It is less than the degree of the bumps (difference of height) on the surface of gap substrate 205 in the degree of the bumps (difference of height) on the surface of TFT substrate 105 In the case of, compared with forming spacer on gap substrate 205, spacer is formed sometimes in TFT substrate 105 Easily.The degree of TFT substrate 105 and the bumps (difference of height) on the surface of gap substrate 205 is respectively mainly by paster metal level Thickness and form the thickness of metal level (such as Cu layers or Al layers) of gap electrode and determine.
Around spacer structures body 75, the orientation of liquid crystal molecule is it some times happens that disorder.In LCD, in order to The reduction of display quality caused by the orientation disorder of suppression liquid crystal molecule, is often matched somebody with somebody in a manner of overlapping with black matrix (light shield layer) Sept is put, the part of the orientation disorder of liquid crystal molecule may occur with black matrix covering.
And in scanning antenna, although display quality, which will not occur, reduces this problem, according to spacer structures body The place of the orientation disorder of 75 generation liquid crystal molecule, the control accuracy of the phase of the microwave in each antenna unit area U has can It is able to can reduce.Thus, in order to not influence the action of scanning antenna, preferably by thing structure in the normal from scanning antenna 1000 Direction is not overlapping with gap 57 and its neighboring area when watching, not overlapping with patch electrode 15 and its neighboring area.Such as from During the normal direction viewing of the 1st dielectric base plate 1, by from being that ds sentences interior region with a distance from multiple 57 respective edges of gap Be set to the 1st region Rp1, by from a distance from multiple 15 respective edges of patch electrode be dp sentence in region be set to the 2nd region Rp2.1st region Rp1 and the 2nd region Rp2 are represented by dashed line in fig. 22.It is preferred that multiple septs are from the 1st dielectric base plate 1 Normal direction viewing when it is not overlapping with the 1st region Rp1 and/or the 2nd region Rp2.Distance ds is, for example, 0.3mm, distance dp examples 0.3mm in this way.
It is not overlapping with the 1st region Rp1 and/or the 2nd region Rp2 by the way that spacer structures body 75 is configured to, it can not influence The action of scanning antenna, equably keep the thickness d LC of the liquid crystal layer LC between patch electrode 15 and gap electrode 55.Will measure The thickness d LC of liquid crystal layer LC between patch electrode 15 and gap electrode 55 result is shown (Figure 23) later.Due to energy The thickness d LC of the liquid crystal layer LC between patch electrode 15 and gap electrode 55 is equably controlled, therefore can be in each antenna unit area Precision is advantageously controlled the phase of microwave in the U of domain.It is preferred that the thickness of the liquid crystal layer LC between patch electrode 15 and gap electrode 55 DLC be for example controlled in relative to design load (such as 5 μm) be ± 5% in the range of.
As shown in figure 21, spacer structures body 75 configuration (position and density) if for example not with the 1st region Rp1 and/ Or the 2nd region Rp2 it is overlapping, it is possible to be arbitrary.Preferably by a part for gate metal layer possessed by thing structure 75 M1 is formed separately with gate electrode 3, grid bus GL and CS bus CL.Similarly, had preferably by thing structure 75 A part of M2 and source electrode 7S of some source metals, drain electrode 7D and source bus line SL are formed separately.Pass through So formed, be easy to the height of equably control room parting structure 75.Possessed by further preferred spacer structures body 75 What a part of M1 of gate metal layer was still formed separately with auxiliary capacitor CS.In addition, pasted possessed by spacer structures body 75 A part of M3 of piece metal level is formed separately with patch electrode 15 and paster connecting portion 15p.
In non-sent receiving area R2, on setting the place of spacer structures body 75, due to the field that should do not avoid Institute, as long as therefore for example in certain intervals set sept.
The configuration density of the spacer structures body 75 in the R1 of receiving area is sent (from the normal direction of the 1st dielectric base plate 1 The ratio of the area of the spacer structures body 75 of per unit area during viewing) as long as such as less than more than 0.05% 0.6% .From the viewpoint of the thickness for equably keeping the liquid crystal layer LC between patch electrode 15 and gap electrode 55, preferably will The configuration density for sending the spacer structures body 75 in the R1 of receiving area is set to such as more than 0.35%.In addition, it is close to calculate configuration When spending, using spacer 59a area (area when being watched from the normal direction of the 1st dielectric base plate 1) as sept The area of structure 75.Preferably take into account the easness of spacer 59a configuration and by the pedestal of spacer structures body 75 75B is made to larger, and its reason is that spacer structures body 75 depends on spacer 59a as the function of sept.
In the normal direction viewing from the 1st dielectric base plate 1, spacer 59a is, for example, a diameter of 30 μm of circle Shape.In the case where spacer 59a shape is not circle, as long as its area is suitable with a diameter of 30 μm of circle. Such as described below, by the spacer 59a with this shapes and sizes, scanning day can efficiently and be equably controlled The liquid crystal layer LC of line 1000 thickness d LC.
As described above, in LCD, may due to the orientation disorder of the liquid crystal molecule caused by sept produce it is aobvious Show the problem of quality reduces.It it is, for example, a diameter of 5 μm from the sept during normal direction viewing of real estate in LCD ~10 μm of circle.And in scanning antenna, the problem of display quality reduces will not be produced, therefore spacer structures body 75 can be set The arbitrary place for sending receiving area R1 and non-sent receiving area R2 is placed in, as long as not influenceing the action of scanning antenna i.e. Can.Such as in the normal direction viewing from real estate, sept is not overlapping with the 1st region Rp1 and/or the 2nd region Rp2 i.e. Can, do not limited from the size of the spacer structures body 75 during the normal direction viewing of real estate.Thus, in scanning antenna, Compared with LCD, the size from the spacer structures body 75 during the normal direction viewing of real estate can be increased.Thus, can obtain To the effect for the thickness that can more uniformly keep liquid crystal layer LC.
In the normal direction viewing from the 1st dielectric base plate 1, a part of M3 of paster metal level is, for example, a diameter of 50 μm circle, a part of M2 of source metal is, for example, a diameter of 60 μm of circle, and a part of M1 of gate metal layer is for example It is a diameter of 70 μm of circle.It is preferred that in the normal direction viewing from the 1st dielectric base plate 1, a part for source metal M2 is more than a part of M3 of paster metal level.It is preferred that in the normal direction viewing from the 1st dielectric base plate 1, gate metal layer A part of M1 be more than source metal a part of M2.
The multiple spacer structures bodies 75 being arranged between TFT substrate and gap substrate can also include：Provide TFT substrate Multiple 1st spacer structures bodies of the distance between gap substrate；And multiple lower than multiple 1st spacer structures bodies 2 spacer structures bodies.The height of 2nd spacer structures body is for example smaller more than 0.2 μm 0.5 μ than the height of the 1st spacer structures body Below m (such as 0.3 μm).1st spacer structures body be control liquid crystal layer thickness spacer structures body, above-mentioned sept Structure 75 is the 1st spacer structures body.When being additionally provided with the 2nd spacer structures in addition to setting the 1st spacer structures body During body, then as known in LCD as can obtain following effect.
If improve the configuration density (quantity of the sept of per unit area) of sept to improve load resistance characteristic When, then have the problem of being easy to produce low temperature foaming (bubbles of vacuum).By also being set in addition to setting the 1st spacer structures body The 2nd spacer structures body is put, can less make significant interval thing density increase, low temperature foaming can be suppressed.That is, usual state (room temperature The thickness of liquid crystal layer nearby and without the state of load) is only controlled by the 1st spacer structures body, therefore significant interval thing density Only provided by the 1st spacer structures body.When liquid crystal material shrinks at low temperature, the 1st spacer structures body deforms, the 2 spacer structures, which are known from experience, to work to keep the thickness of liquid crystal layer.So, the thickness of liquid crystal layer is easy to follow the receipts of liquid crystal material Contracting, therefore the generation of low temperature foaming can be suppressed.In addition, be applied in load and when the thickness of liquid crystal layer is thinning, by the 1st sept (significant interval thing density now is by the 1st interval to keep the thickness of liquid crystal layer for both structure and the 2nd spacer structures body Both thing structure and the 2nd spacer structures body provide), therefore can realize high load resistance characteristic.Such as ship, aircraft, The environment temperature for the scanning antenna that the moving bodys such as automobile are carried can change.In addition, the keeping state according to scanning antenna Difference, environment temperature also can be different.Such as preferably the 2nd spacer structures body is arranged to send out at -25 DEG C or -40 DEG C Raw low temperature foaming.
Such as formed spacer 59a process in pass through halftone exposure the methods of formed with the 1st sept knot The spacer 59a that structure body 75 is included compares highly relatively low spacer, so as to obtain the 2nd spacer structures Body.Or the pedestal lower than the pedestal 75B that the 1st spacer structures body 75 is included can also be formed, by the height of spacer Degree is set to identical.It is of course also possible to and use both.
When multiple spacer structures bodies 75 include multiple 1st spacer structures bodies and multiple 2nd spacer structures bodies, hair The configuration density for sending the 1st spacer structures body in the R1 of receiving area is, for example, less than more than 0.05% 0.5%, sends reception area The configuration density of the 2nd spacer structures body in the R1 of domain is, for example, less than more than 0.05% 0.5%.2nd spacer structures body Configuration density both can be identical with the configuration density of the 1st spacer structures body, can also be closeer than the configuration of the 1st spacer structures body Degree is high.If the configuration density of the 1st spacer structures body sent in the R1 of receiving area is set into 1, send in the R1 of receiving area The configuration density of the 2nd spacer structures body be, for example, less than more than 1 10.And do not include in multiple spacer structures bodies 75 multiple During the 2nd spacer structures body, the configuration density for sending the 1st spacer structures body in the R1 of receiving area is, for example, more than 0.2% Less than 0.6%.
From the viewpoint of the thickness d LC for equably controlling the liquid crystal layer LC between patch electrode 15 and gap electrode 55, It is preferred that the 1st spacer structures body 75 is not only set also in non-sent receiving area R2 in transmission receiving area R1.It is non-sent to connect Such as less than more than 0.05% 0.6% can be set to by receiving the configuration density of the 1st spacer structures body 75 in the R2 of region.It is preferred that will be non- The configuration density for sending the 1st spacer structures body 75 in the R2 of receiving area is set to such as more than 0.35%.Non-sent reception area The configuration density of the 1st spacer structures body 75 in the R2 of domain is with sending matching somebody with somebody for the 1st spacer structures body 75 in the R1 of receiving area Density is put to can be the same or different.The position of spacer structures body 75 in non-sent receiving area R2 does not limit especially System, can be arbitrary.Spacer structures body 75 can both be formed at the inner side of sealing 73, can also be covered by sealing 73 Lid, the outside of sealing 73 can also be formed at.
, also can be in the same manner as transmission receiving area R1 except setting the 1st spacer structures in non-sent receiving area R2 The 2nd spacer structures body is also set up beyond body.The configuration density of the 2nd spacer structures body in non-sent receiving area R2 is for example It is less than more than 0.05% 0.5%.If the configuration density of the 1st spacer structures body in non-sent receiving area R2 is set into 1, Then the configuration density of the 2nd spacer structures body in non-sent receiving area R2 is, for example, less than more than 1 10.In non-sent reception When being not provided with multiple 2nd spacer structures bodies in the R2 of region, the 1st spacer structures body in non-sent receiving area R2 is matched somebody with somebody It is, for example, less than more than 0.2% 0.6% to put density.
In fig 23, show to determine in the scanning antenna with TFT substrate 105 patch electrode 15 and gap electrode 55 it Between liquid crystal layer LC thickness result.Figure 23 is to represent to be directed to that the transmission receiving area R1 of scanning antenna is divided into 4 portions The thickness d LC of the liquid crystal layer LC between wherein 1 part measure patch electrode 15 and gap electrode 55 after point result is (single Position：μm) figure.Used scanning antenna has the 1st spacer structures body (configuration density in receiving area R1 is sent： 0.35%), without the 2nd spacer structures body.Each numerical value is by the measure to 9 mutually adjacent antenna unit area U As a result obtained from carrying out averagely.Each numerical value is the transmission receiving area R1 with antenna unit area U scanning antenna part What position correspondence was recorded.
The thickness d LC of the liquid crystal layer LC between patch electrode 15 and gap electrode 55 in each antenna unit area U be as Under obtain.TFT substrate 105 is obtained by determining delay (with gate metal layer, source metal and paster metal level not Overlapping part) liquid crystal layer LC between gap electrode 55 thickness, and by the thickness (measured value) of patch electrode 15 and seam The thickness (measured value) of gap electrode 55 subtracts, so as to obtain liquid crystal layer LC thickness d LC.
It it is 5.12 μm on the minimum value in value obtained from the thickness d LC of the liquid crystal layer LC shown in Figure 23, maximum is 5.33 μm, the average value of all values is 5.24 μm.As a result in the range of 0.24 μm, the ratio of mobility scale and average value (0.24/5.24) is 4.0%.The ratio (0.24/5) of mobility scale and design load (5 μm) is 4.8%.± 5% scope It is interior, it can be said that liquid crystal layer LC thickness d LC is uniformly controlled the degree for making scanning antenna precision work well.Separately Outside, in value obtained from the thickness d LC on liquid crystal layer LC, 3 σ are 0.12 μm.Here, in certain stochastic variable followed normal distribution point During cloth, probability of the variable in the range of the σ of average value ± 3 is 99.7%.It may be said that liquid crystal layer LC thickness d LC fluctuation It is small.
The configuration of spacer structures body 75 is not limited to above-mentioned example.Such as can also TFT substrate 105 as of fig. 24 Like that in certain intervals (spacing) configuration pedestal 75B, forms the spacer structures body for including pedestal 75B.Pedestal 75B spacing E.g. 100 μm.In the example shown in Figure 24, pedestal 75B each has a part of M1, the source metal of gate metal layer A part of M2 and paster metal level a part of M3.That is, a part of M1, the source electrode of gate metal layer are formed in certain intervals A part of M3 of a part of M2 and paster metal level of metal level.By configuring pedestal 75B by certain spacing, can efficiently enter Row determines that pedestal 75B is the design for the position for determining spacer structures body 75.In addition, by by certain spacing configuration space thing Structure 75, it can more uniformly control liquid crystal layer LC thickness d LC.
TFT substrate 105 that can also be as shown in figure 25 is such, and pedestal 75B is formed at into settable spacer structures body 75 Place entire surface.Spacer 59a (not shown in fig. 25) is configured at the defined position on pedestal 75B.It is photosensitive Sept 59a is for example formed as described above on gap substrate 205.So, it can obtain following advantage：By TFT substrate with During the substrate fitting of gap, without considering pedestal 75B and spacer 59a deviation of the alignment.
Industrial utilizability
Satellite communication that embodiments of the present invention are for example carried applied to moving body (such as ship, aircraft, automobile), The scanning antenna of satellite broadcasting and its manufacture.
Description of reference numerals
1：Dielectric base plate
2：Underlying insulation film
3：Gate electrode
4：Gate insulator
5：Semiconductor layer
6D：Drain contact layer
6S：Source contact layer
7D：Drain electrode
7S：Source electrode
7p：Source electrode connection wiring
11：1st insulating barrier
15：Patch electrode
15p：Paster connecting portion
17：2nd insulating barrier
18g、18s、18p：Opening portion
19g：Gate terminal top connecting portion
19p：Transmission terminal top connecting portion
19s：Source terminal top connecting portion
21：Alignment mark
23：Protect conductive layer
51：Dielectric base plate
52：3rd insulating barrier
54：Dielectric layer (air layer)
55：Gap electrode
55L：Lower floor
55M：Main stor(e)y
55U：Upper strata
55c：Contact surface
57：Gap
58：4th insulating barrier
59a：Spacer
60：Top connecting portion
65：Reflect conductive plate
68：Heater resistive film
70：Electric supply installation
71：Electric conductivity pearl
72：Power supply pin
73：Sealing
75：Spacer structures body
75B：The pedestal of spacer structures body
101、102、103、104、105：TFT substrate
201、203、205：Gap substrate
1000：Scanning antenna
CH1、CH2、CH3、CH4、CH5、CH6：Contact hole
GD：Gate drivers
GL：Grid bus
GT：Gate terminal sub-portion
SD：Source electrode driver
SL：Source bus line
ST：Source terminal sub-portion
PT：Transmission end sub-portion
IT：Portion of terminal
LC：Liquid crystal layer
R1：Send receiving area
R2：Non-sent receiving area
Rs：Sealing area
U：Antenna unit, antenna unit area.

Claims (13)

1. a kind of scanning antenna, it is arranged with multiple antenna units, it is characterised in that have：
TFT substrate, it has the 1st dielectric base plate, the multiple TFT, the multiple grids that are supported in above-mentioned 1st dielectric base plate are total Line, multiple source bus lines and multiple patch electrodes；
Gap substrate, it has the 2nd dielectric base plate and the gap being formed on the 1st interarea of above-mentioned 2nd dielectric base plate electricity Pole；
Liquid crystal layer, it is arranged between above-mentioned TFT substrate and above-mentioned gap substrate；
Multiple spacer structures bodies, it is included between multiple the 1 of the distance between the above-mentioned TFT substrate of regulation and above-mentioned gap substrate Spacer configuration body；And
Conductive plate is reflected, it is with across dielectric layer and the side opposite with above-mentioned 1st interarea of above-mentioned 2nd dielectric base plate The relative mode of 2nd interarea configures,
Above-mentioned gap electrode has multiple gaps of configuration corresponding with above-mentioned multiple patch electrodes,
When from the viewing of the normal direction of above-mentioned 1st dielectric base plate, if by with a distance from from above-mentioned multiple respective edges in gap For 0.3mm sentence in region be set to the 1st region, by from a distance from above-mentioned multiple respective edges of patch electrode be 0.3mm at Within region be set to the 2nd region, then above-mentioned multiple spacer structures bodies not with above-mentioned 1st region and/or above-mentioned 2nd region weight It is folded.
2. a kind of scanning antenna, it is arranged with multiple antenna units, it is characterised in that have：
TFT substrate, it has the 1st dielectric base plate, the multiple TFT, the multiple grids that are supported in above-mentioned 1st dielectric base plate are total Line, multiple source bus lines and multiple patch electrodes；
Gap substrate, it has the 2nd dielectric base plate and the gap being formed on the 1st interarea of above-mentioned 2nd dielectric base plate electricity Pole；
Liquid crystal layer, it is arranged between above-mentioned TFT substrate and above-mentioned gap substrate；
Multiple spacer structures bodies, it is included between multiple the 1 of the distance between the above-mentioned TFT substrate of regulation and above-mentioned gap substrate Spacer configuration body；And
Conductive plate is reflected, it is with across dielectric layer and the side opposite with above-mentioned 1st interarea of above-mentioned 2nd dielectric base plate The relative mode of 2nd interarea configures,
Above-mentioned gap electrode has multiple gaps of configuration corresponding with above-mentioned multiple patch electrodes,
Above-mentioned gap substrate or above-mentioned TFT substrate have multiple spacers,
Above-mentioned multiple spacers, which are included in the normal direction of above-mentioned 1st dielectric base plate, has less than more than 2 μm 5 μm The spacer of height,
Above-mentioned multiple 1st spacer structures bodies include including any one spacer in above-mentioned multiple spacers Spacer structures body.
3. scanning antenna according to claim 1 or 2,
Above-mentioned multiple 1st spacer structures bodies include the 1st spacer structures body of the part comprising the 1st metal level, and the above-mentioned 1st Metal level includes above-mentioned multiple patch electrodes.
4. the scanning antenna according to any one of claims 1 to 3,
Above-mentioned multiple 1st spacer structures bodies include the 1st spacer structures body of the part comprising the 2nd metal level, and the above-mentioned 2nd Metal level includes above-mentioned multiple TFT gate electrode and above-mentioned multiple grid bus.
5. the scanning antenna according to any one of Claims 1-4,
Above-mentioned multiple 1st spacer structures bodies include the 1st spacer structures body of the part comprising the 3rd metal level, and the above-mentioned 3rd Metal level includes above-mentioned multiple TFT source electrode and above-mentioned multiple source bus lines.
6. the scanning antenna according to any one of claim 1 to 5,
Possess the non-sent of the periphery of the transmission receiving area delimited by above-mentioned multiple antenna units and above-mentioned transmission receiving area Receiving area,
Above-mentioned multiple 1st spacer structures bodies are included positioned at the 1st spacer structures body of above-mentioned transmission receiving area and positioned at upper The 1st spacer structures body of non-sent receiving area is stated,
It is in above-mentioned transmission receiving area, from the upper of the per unit area during viewing of the normal direction of above-mentioned 1st dielectric base plate The ratio for stating the area of multiple 1st spacer structures bodies is less than more than 0.05% 0.6%.
7. scanning antenna according to claim 6,
It is in above-mentioned non-sent receiving area, from the per unit area during normal direction viewing of above-mentioned 1st dielectric base plate The ratio of the area of above-mentioned multiple 1st spacer structures bodies is less than more than 0.05% 0.6%.
8. the scanning antenna according to any one of claim 1 to 7,
Above-mentioned multiple spacer structures bodies also include multiple 2nd spacer structures lower than above-mentioned multiple 1st spacer structures bodies Body.
9. scanning antenna according to claim 8,
Above-mentioned multiple 2nd spacer structures bodies are included with smaller more than 0.2 μm than the height of above-mentioned multiple 1st spacer structures bodies 2nd spacer structures body of less than 0.5 μm of height.
10. scanning antenna according to claim 8 or claim 9,
Possess the non-sent of the periphery of the transmission receiving area delimited by above-mentioned multiple antenna units and above-mentioned transmission receiving area Receiving area,
Above-mentioned multiple 1st spacer structures bodies are included positioned at the 1st spacer structures body of above-mentioned transmission receiving area and positioned at upper The 1st spacer structures body of non-sent receiving area is stated,
It is in above-mentioned transmission receiving area, from the upper of the per unit area during viewing of the normal direction of above-mentioned 1st dielectric base plate The ratio for stating the area of multiple 1st spacer structures bodies is less than more than 0.05% 0.5%.
11. scanning antenna according to claim 10,
It is in above-mentioned non-sent receiving area, from the per unit area during normal direction viewing of above-mentioned 1st dielectric base plate The ratio of the area of above-mentioned multiple 1st spacer structures bodies is less than more than 0.05% 0.5%.
12. the scanning antenna according to claim 10 or 11,
If by it is in above-mentioned transmission receiving area, from the normal direction of above-mentioned 1st dielectric base plate watch when per unit area The ratios of area of above-mentioned multiple 1st spacer structures bodies be set to 1, then in above-mentioned transmission receiving area, from the above-mentioned 1st electricity The ratio of the area of above-mentioned multiple 2nd spacer structures bodies of per unit area during the normal direction viewing of medium substrate is 1 Below the above 10.
13. the scanning antenna according to any one of claim 10 to 12,
If by it is in above-mentioned non-sent receiving area, from the normal direction of above-mentioned 1st dielectric base plate watch when per unit face The ratio of the area of long-pending above-mentioned multiple 1st spacer structures bodies is set to 1, then in above-mentioned non-sent receiving area, from above-mentioned The ratio of the area of above-mentioned multiple 2nd spacer structures bodies of per unit area during the normal direction viewing of the 1st dielectric base plate Example is less than more than 1 10.
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