CN107403787B - Method for forming metal isolation gate - Google Patents
Method for forming metal isolation gate Download PDFInfo
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- CN107403787B CN107403787B CN201710653163.3A CN201710653163A CN107403787B CN 107403787 B CN107403787 B CN 107403787B CN 201710653163 A CN201710653163 A CN 201710653163A CN 107403787 B CN107403787 B CN 107403787B
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Abstract
The invention provides a method for forming a metal isolation gate, which comprises the steps of sequentially forming a metal layer and a barrier layer on a substrate, etching the barrier layer and part of the metal layer to quickly form an opening, etching the residual metal layer in the opening, etching the metal layer in the opening to form a groove, and forming a polymer on the side wall of the groove, wherein the polymer covers the side wall of the groove to protect the side wall of the groove from being further etched, and after the etching is finished, the side wall of the groove has a vertical profile, so that the filling is convenient, a filling cavity is prevented from being generated when the groove is filled subsequently, and the performance and the yield of devices are improved.
Description
Technical Field
The invention relates to the field of semiconductor manufacturing, in particular to a method for forming a metal isolation gate.
Background
The metal isolation gate is provided with a plurality of metal grids, each metal grid surrounds each pixel and prevents incident light from passing through the incident pixel to irradiate the adjacent pixels, so that efficient optical isolation is generated among the pixels, and electric mutual interference noise between the adjacent pixels is avoided. Since the metal barrier gate structure itself has a small absorption of light, and reflects one polarization of natural light and allows the other polarization to pass through, the reflected light can be recycled again through polarization rotation, so that the metal barrier gate structure has a great potential in liquid crystal display, and an image sensor, an optical lens and the like with high pixel size and high resolution can be manufactured.
The metal isolation gate formed in the prior art has low isolation performance, and light cannot be refracted and reflected well through the metal isolation gate.
Disclosure of Invention
The invention aims to provide a method for forming a metal isolation gate, which aims to solve the problems that the isolation performance of the metal isolation gate is not high, the refraction and reflection of light passing through the metal isolation gate are not good and the like in the prior art.
In order to achieve the above object, the present invention provides a method for forming a metal isolation gate, including:
providing a substrate, and sequentially forming a metal layer and a barrier layer on the substrate;
etching the barrier layer and the metal layer with partial thickness to form an opening;
etching the residual metal layer in the opening to form a groove and a polymer, wherein the polymer is attached to the side wall of the groove;
optionally, the etching gas used for etching the barrier layer and the metal layer with a part of thickness comprises sulfur hexafluoride, oxygen and nitrogen;
optionally, etching gas used for etching the remaining metal layer in the opening includes carbon tetrafluoride;
optionally, the etching gas used for etching the residual metal layer in the opening further includes chlorine, difluoromethane and nitrogen;
optionally, the etching rate of the barrier layer and part of the metal layer is faster than that of the etching rate of the residual metal layer in the opening;
optionally, the material of the metal layer includes tungsten and/or aluminum;
optionally, an oxide layer is further formed between the substrate and the metal layer, and a material of the oxide layer includes one or more of silicon oxide, silicon oxynitride, and silicon oxycarbide;
optionally, the depth of the trench is 2000 angstroms to 3000 angstroms, and the cross-sectional width of the trench is 50nm to 80 nm;
optionally, etching the barrier layer and the metal layer with a partial thickness to form an opening includes:
coating photoresist on the barrier layer and exposing to form a patterned mask layer;
etching the barrier layer by adopting a dry etching method;
and etching the metal layer with partial thickness by adopting isotropic etching to form an opening.
Optionally, after etching the remaining metal layer in the opening to form a trench and a polymer, and attaching the polymer to a sidewall of the trench, the method for forming the metal isolation gate further includes:
and removing the polymer by wet etching.
The inventor finds that the side wall of the trench formed in the prior art is inclined, which is not beneficial to filling materials into the trench subsequently, and filling holes may be generated, which affects the performance of the device.
The method for forming the metal isolation gate comprises the steps of sequentially forming a metal layer and a barrier layer on a substrate, etching the barrier layer and part of the metal layer with the thickness to form an opening rapidly, etching the metal layer with the residual thickness in the opening, etching the metal layer in two steps, the metal layer that can be etched is thicker and the trenches formed are deeper, which weakens the cross-talk between the beams, and etching the metal layer in the opening to form a trench, and forming a polymer on the sidewall of the trench while the polymer covers the sidewall of the trench, the side wall of the groove is protected from being further etched, after etching is completed, the side wall of the groove has a vertical profile, filling is facilitated, a filling cavity is prevented from being generated when the groove is subsequently filled, and performance and yield of devices are improved.
Drawings
Fig. 1 is a flowchart of a method for forming a metal isolation gate according to an embodiment;
2-6 are cross-sectional views of semiconductor structures formed by the method for forming metal isolation gates;
wherein, 1-substrate, 2-oxide layer, 3-metal layer, 4-barrier layer, 5-mask layer, 6-opening, 7-groove and 8-polymer.
Detailed Description
The following describes in more detail embodiments of the present invention with reference to the schematic drawings. Advantages and features of the present invention will become apparent from the following description and claims. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
Referring to fig. 1, which is a flowchart illustrating a method for forming a metal isolation gate according to an embodiment of the present invention, as shown in fig. 1, the method for forming a metal isolation gate includes:
s1: providing a substrate, wherein a metal layer and a barrier layer are sequentially formed on the substrate;
s2: etching the barrier layer and the metal layer with partial thickness to form a groove;
s3: and etching the residual metal layer in the groove to form a polymer, wherein the polymer is attached to the side wall of the groove.
In the prior art, the metal layer is usually etched in one step by using a dry etching method, and because the metal layer is thick, the side wall of the formed trench is usually inclined by one-step etching, which is not favorable for subsequent filling. In this embodiment, the barrier layer and the metal layer with a partial thickness are etched first, an opening is formed quickly, the metal layer with a residual thickness in the opening is etched, the metal layer is etched in two steps, the metal layer which can be etched is thicker, the formed groove is deeper, crosstalk between light beams is weakened, the metal layer in the opening is etched while the metal layer in the opening is etched, the groove is formed, a polymer is formed on the side wall of the groove while the polymer covers the side wall of the groove to protect the side wall of the groove from being further etched, after etching is completed, the side wall of the groove has a vertical profile, so that filling is facilitated, a filling cavity is prevented from being generated when the groove is subsequently filled, and performance and yield of a device are improved.
Specifically, please refer to fig. 2 to 6, which are schematic cross-sectional views of a semiconductor structure formed by the method for forming a metal isolation gate. Next, a method for forming the metal isolation gate will be further described with reference to fig. 2 to 6.
First, referring to fig. 2, a substrate 1, which is an insulating substrate or a semiconductor substrate with a smooth surface, is provided. Specifically, the material of the substrate 1 may be silicon, and may also be germanium, silicon germanium, gallium nitride, gallium arsenide, silicon on insulator, or the like, without being limited thereto. Further, the material of the substrate 1 may also be a doped semiconductor material, such as P-type gallium nitride, N-type gallium nitride, and the like, the size, thickness, and shape of the substrate 1 are not limited, and may be selected according to actual needs, and in this embodiment, the material of the substrate 1 is silicon.
An oxide layer 2, a metal layer 3 and a barrier layer 4 are sequentially formed on the substrate 1, the oxide layer 2 covers the substrate 1, the metal layer 3 covers the oxide layer 2, and the barrier layer 4 covers the metal layer 3. The thickness of the oxide layer 2 is 90 angstroms to 150 angstroms, such as 100 angstroms, 110 angstroms, 120 angstroms, 130 angstroms and 140 angstroms, in this embodiment, the thickness of the oxide layer 2 is 120 angstroms; the thickness of the metal layer 3 is 2000-3000 angstroms, such as 2000 angstroms, 2200 angstroms, 2400 angstroms, 2600 angstroms, 2800 angstroms, 3000 angstroms, and the like, in this embodiment, the thickness of the metal layer 3 is 2000 angstroms; the barrier layer 4 is a hard mask and is consumed in the subsequent etching, the thickness of the barrier layer 4 is 500 angstroms to 3000 angstroms, such as 1000 angstroms, 1500 angstroms, 2000 angstroms, 2500 angstroms, 3000 angstroms, and the like, and in this embodiment, the thickness of the barrier layer 4 is 2000 angstroms.
The oxide layer 2 serves to isolate the substrate 1 from the metal layer 3, the material of the oxide layer 2 includes one or more of silicon oxide, silicon oxynitride and silicon oxycarbide, in this embodiment, the material of the oxide layer 2 is silicon oxide; the metal layer 3 can be made of aluminum and/or tungsten, the isolation performance of the tungsten is better than that of the aluminum by comprehensively comparing the isolation performance of the aluminum and the tungsten, and pixels imaged by a metal isolation gate made of the tungsten material are free of interference and are clearer and higher, and in the embodiment, the metal layer 3 is made of the tungsten; the barrier layer 4 is a layer of hard mask material, and the material of the hard mask material includes silicon nitride and/or amorphous carbon, in this embodiment, the barrier layer 4 is a composite layer structure of silicon nitride and amorphous carbon, and the oxide layer 2, the metal layer 3 and the barrier layer 4 are formed by chemical vapor deposition, physical vapor deposition or atomic layer deposition, although other methods in the prior art may also be used, which is not limited by the present invention.
Referring to fig. 3, a layer of photoresist is coated on the barrier layer 4 and exposed to define a patterned mask layer 5, the mask layer 5 is used as a mask to open the barrier layer 4 by dry etching, and referring to fig. 4, the metal layer 3 with a partial thickness below the opened region is etched by isotropic etching. Preferably, in this etching step, the thickness of the metal layer 3 removed by etching is 20% to 80% of the total thickness of the metal layer 3. The etching gas used in this etching step is mainly a mixed gas containing sulfur hexafluoride, such as oxygen, nitrogen and sulfur tetrafluoride, and rapidly etches a part of the thickness of the metal layer 3 to form an opening 6, and the sidewall of the formed opening 6 is an inclined slope due to the problem of the etching process.
Referring to fig. 5, the remaining metal layer 3 in the opening 6 is etched by a dry etching method to form a trench 7, the etching gas used in this etching step includes carbon tetrafluoride, such as a mixed gas of chlorine, difluoromethane, carbon tetrafluoride, and nitrogen, and the etching rate of the etching gas is twice as fast as that of the step of etching part of the metal layer 3, and a polymer is also generated while etching the remaining metal layer 3 to form a trench 7, where the polymer is a hybrid polymer containing carbon, fluorine, and a metal layer material, and the polymer is attached to the sidewall of the trench 7 to form a polymer 8 on the sidewall of the trench 7, and of course, in an ideal state, the polymer 8 has a structure with a narrow top and a wide bottom, but in an actual production, the polymer 8 may have an irregular or uneven surface.
When the residual metal layer in the opening 6 is etched, the inclined part of the side wall of the opening 6 is etched to be smooth, the polymer 8 covers the side wall of the groove 7 and serves as a protective layer to protect the side wall of the groove 7 from being further etched, after the etching is finished, the side wall of the groove 7 has a vertical profile, so that the filling is convenient, a filling hole is prevented from being generated when the groove 7 is filled subsequently, the performance and the yield of a device are improved, it needs to be noted that the metal layer 3 is usually etched, and after the etching, the oxide layer 2 is partially etched in order to completely remove the metal layer 3 in the groove 7.
The depth of the trench 7 is consistent with the thickness of the metal layer 3, and is 2000-3000 angstroms, for example, 2000 angstroms, 2200 angstroms, 2400 angstroms, 2600 angstroms, 2800 angstroms, 3000 angstroms, and the like, in this embodiment, the thickness of the trench 7 is 2000 angstroms, compared with the prior art, in this embodiment, the metal layer 3 is etched in two steps, so that the metal layer 3 can be better etched and a vertical profile can be generated, and the depth of the trench 7 is deeper, which has the advantage that the distance of light transmission barrier is larger, so that the crosstalk between light beams is weakened. The width of the cross section of the groove 7 is 50nm-80nm, such as 55nm, 60nm, 65nm, 70nm, 75nm, 80nm and the like; in this embodiment, the width of the cross section of the trench 7 is 60nm, and since the side wall of the trench 7 is vertical, the generation of a subsequent filling cavity is avoided.
Finally, referring to fig. 6, the polymer 8 on the sidewall of the trench 7 is removed by wet etching, after the polymer 8 is removed, the sidewall of the trench 7 has an approximately vertical profile, which is convenient for subsequent filling, and the semiconductor structure is cleaned and dried for multiple times to remove impurities or particles generated by etching.
To sum up, in the method for forming a metal isolation gate according to an embodiment of the present invention, a metal layer and a barrier layer are sequentially formed on a substrate, the barrier layer and a portion of the metal layer with a thickness are etched first to form an opening rapidly, then the metal layer with a remaining thickness in the opening is etched, the metal layer is etched in two steps, the metal layer that can be etched is thicker and the trench formed is deeper, so that crosstalk between light beams is weakened, the metal layer in the opening is etched to form a trench, a polymer is formed on the sidewall of the trench, the polymer covers the sidewall of the trench to protect the sidewall of the trench from further etching, after the etching is completed, the sidewall of the trench has a vertical profile, so as to facilitate filling, and avoid a filling cavity generated during subsequent filling of the trench, improved device performance and yield.
The above description is only a preferred embodiment of the present invention, and does not limit the present invention in any way. It will be understood by those skilled in the art that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (7)
1. A method for forming a metal isolation gate is characterized by comprising the following steps:
providing a substrate, and sequentially forming a metal layer and a barrier layer on the substrate;
etching the barrier layer and the metal layer with partial thickness to form an opening, wherein the side wall of the opening is an inclined plane;
etching the residual metal layer in the opening to form a groove and a polymer, wherein the polymer is attached to the side wall of the groove, and the etching speed of the barrier layer and the metal layer with partial thickness is faster than that of the residual metal layer in the opening;
and etching the barrier layer and the metal layer with partial thickness by using etching gas comprising sulfur hexafluoride, oxygen and nitrogen, and etching the residual metal layer in the opening by using etching gas comprising carbon tetrafluoride.
2. The method of claim 1, wherein etching the remaining metal layer in the opening further comprises chlorine, difluoromethane, and nitrogen.
3. The method of claim 1, wherein the metal layer comprises tungsten and/or aluminum.
4. The method of claim 1, wherein an oxide layer is further formed between the substrate and the metal layer, and the oxide layer comprises one or more of silicon oxide, silicon oxynitride, and silicon oxycarbide.
5. The method for forming a metal isolation gate as claimed in claim 1, wherein the depth of the trench is 2000 a to 3000 a, and the cross-sectional width of the trench is 50nm to 80 nm.
6. The method of claim 1, wherein etching the barrier layer and a portion of the thickness of the metal layer to form an opening comprises:
coating photoresist on the barrier layer and exposing to form a patterned mask layer;
etching the barrier layer by adopting a dry etching method;
and etching the metal layer with partial thickness by adopting isotropic etching to form an opening.
7. The method of any of claims 1-6, wherein the metal layer remaining in the opening is etched to form a trench and a polymer, wherein the polymer adheres to sidewalls of the trench, and wherein the method further comprises:
and removing the polymer by wet etching.
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| CN107403787B (en) * | 2017-08-02 | 2020-02-21 | 武汉新芯集成电路制造有限公司 | Method for forming metal isolation gate |
| CN110556359A (en) * | 2019-09-17 | 2019-12-10 | 福建省晋华集成电路有限公司 | Bit line structure and semiconductor memory |
| CN116313783B (en) * | 2023-05-10 | 2023-09-01 | 合肥晶合集成电路股份有限公司 | Method for etching metal and semiconductor device |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1616714A (en) * | 2004-07-19 | 2005-05-18 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Polycrystal silicon etching process with reduced micro channel effect |
| CN1848383A (en) * | 2005-12-02 | 2006-10-18 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Method for removing residual polymer in polysilicon etching technology |
| CN101231968A (en) * | 2007-01-26 | 2008-07-30 | 联华电子股份有限公司 | Inlaying inner connecting line structure and double inlaying process |
| CN101281868A (en) * | 2007-04-06 | 2008-10-08 | 中芯国际集成电路制造(上海)有限公司 | Method for etching soldering pad |
| CN101383322A (en) * | 2007-09-04 | 2009-03-11 | 中芯国际集成电路制造(上海)有限公司 | Side wall vertical etching method for high-voltage electric switch contact hole |
| CN103594555A (en) * | 2013-11-08 | 2014-02-19 | 无锡英普林纳米科技有限公司 | Preparation method for black silicon material with self-cleaning function |
| CN104599962A (en) * | 2014-12-29 | 2015-05-06 | 上海华虹宏力半导体制造有限公司 | Thick aluminum etching polymer removing method |
| CN107403787A (en) * | 2017-08-02 | 2017-11-28 | 武汉新芯集成电路制造有限公司 | The forming method of metal isolated gate |
-
2017
- 2017-08-02 CN CN201710653163.3A patent/CN107403787B/en active Active
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1616714A (en) * | 2004-07-19 | 2005-05-18 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Polycrystal silicon etching process with reduced micro channel effect |
| CN1848383A (en) * | 2005-12-02 | 2006-10-18 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Method for removing residual polymer in polysilicon etching technology |
| CN101231968A (en) * | 2007-01-26 | 2008-07-30 | 联华电子股份有限公司 | Inlaying inner connecting line structure and double inlaying process |
| CN101281868A (en) * | 2007-04-06 | 2008-10-08 | 中芯国际集成电路制造(上海)有限公司 | Method for etching soldering pad |
| CN101383322A (en) * | 2007-09-04 | 2009-03-11 | 中芯国际集成电路制造(上海)有限公司 | Side wall vertical etching method for high-voltage electric switch contact hole |
| CN103594555A (en) * | 2013-11-08 | 2014-02-19 | 无锡英普林纳米科技有限公司 | Preparation method for black silicon material with self-cleaning function |
| CN104599962A (en) * | 2014-12-29 | 2015-05-06 | 上海华虹宏力半导体制造有限公司 | Thick aluminum etching polymer removing method |
| CN107403787A (en) * | 2017-08-02 | 2017-11-28 | 武汉新芯集成电路制造有限公司 | The forming method of metal isolated gate |
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