CN107395200B - Ultra-low noise frequency synthesis and frequency transfer circuit for rubidium frequency standard - Google Patents

Ultra-low noise frequency synthesis and frequency transfer circuit for rubidium frequency standard Download PDF

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CN107395200B
CN107395200B CN201710725150.2A CN201710725150A CN107395200B CN 107395200 B CN107395200 B CN 107395200B CN 201710725150 A CN201710725150 A CN 201710725150A CN 107395200 B CN107395200 B CN 107395200B
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frequency
signal amplifier
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CN107395200A (en
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邱紫敬
祁峰
明刚
钟达
梅刚华
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Institute of Precision Measurement Science and Technology Innovation of CAS
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/26Automatic control of frequency or phase; Synchronisation using energy levels of molecules, atoms, or subatomic particles as a frequency reference
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/20Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a harmonic phase-locked loop, i.e. a loop which can be locked to one of a number of harmonically related frequencies applied to it

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  • Spectroscopy & Molecular Physics (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

The application discloses an ultralow noise frequency synthesis and frequency transmission circuit for a rubidium frequency scale, which comprises a first power divider, a frequency transmission analog phase-locked loop circuit and a radio frequency synthesis circuit, wherein the frequency transmission analog phase-locked loop circuit comprises a second signal amplifier, an analog phase discriminator, a filter amplifier, a 10MHz crystal oscillator, a second power divider, an SBD nine-time frequency multiplier and a third signal amplifier, and the radio frequency synthesis circuit comprises a 90MHz low phase noise crystal oscillator, a modulator and a first signal amplifier.

Description

Ultra-low noise frequency synthesis and frequency transfer circuit for rubidium frequency standard
Technical Field
The application relates to a rubidium atomic frequency standard, in particular to an ultralow noise frequency synthesis and frequency transfer circuit for a rubidium atomic frequency standard, which can further improve the frequency stability index of the rubidium atomic frequency standard by utilizing the ultralow phase noise characteristic of the circuit.
Background
The atomic frequency standard is a precise time signal output system obtained by taking atomic transition spectral lines as references, and is widely applied to various fields of social life, such as navigation positioning, time keeping and timing, precise measurement, communication technology, high-precision synchronization of modern weapons and the like. The rubidium atomic frequency standard is the most widely applied atomic frequency standard because of the characteristics of small volume, light weight, low power consumption and the like. The rubidium atomic frequency standard can be simply divided into a quantum system and a circuit system, wherein the circuit system comprises a frequency synthesis circuit, a light detection circuit, a synchronous detector and an integration filter. The frequency synthesis circuit converts the 10MHz crystal oscillator signal into a modulated 6.834GHz microwave search signal, the modulated 6.834GHz microwave search signal is fed into a physical system to excite an atomic system to generate resonance transition, and the frequency detection signal is processed by utilizing technologies such as light detection, synchronous detection and the like to obtain a deviation rectifying signal for controlling the frequency of the 10MHz crystal oscillator.
The frequency stability is a core index of the rubidium atomic frequency standard. Typically, rubidium frequency scale frequency stability is determined by both physical system signal-to-noise ratio and frequency synthesis system phase noise. The phase noise level of the frequency synthesis system is an important factor for limiting the frequency stability. The phase noise of the frequency synthesis system is converted into white frequency noise superimposed on the frequency discrimination signal by a physical system, and the white frequency noise is called intermodulation noise. The limitation of intermodulation noise on frequency stability can be expressed as the alan deviation:
wherein v is 0 For the frequency of the carrier signal, f M For modulating the frequency, L (2 nf M ) Is v 0 At 2nf M A phase noise spectrum.
In a common implementation scheme, the frequency synthesis system of the rubidium atomic frequency standard consists of a 10MHz crystal oscillator, a modulator, a 9-order frequency multiplier, a Step Recovery Diode (SRD) 76-order frequency multiplier and a synthesizer. The effect of the SRD frequency doubler and synthesizer on the phase noise of the microwave interrogation signal is generally negligible. The traditional radio frequency synthesis scheme is to perform triangular wave phase modulation (square wave frequency modulation) on a 10MHz crystal oscillator signal, and then perform two-stage 3 times frequency multiplication on a tube circuit by utilizing a differential pair consisting of triodes to obtain a modulated 90MHz signal. The scheme circuit output signal is relatively noisy in phase, with the modulator and first stage 3 frequency multiplication being the primary components of phase noise degradation. The modulator is positioned at the rear stage of the 10MHz crystal oscillator, so that the phase noise level of the frequency multiplication input signal can be deteriorated; the first stage 3 frequency multiplication adopts a differential pair tube structure, and if the noise coefficient of the transistor is large, additional phase noise can be introduced. Besides, the scheme has the defects of large harmonic clutter, complex debugging and the like.
The other scheme is that a 10MHz low-phase noise voltage controlled crystal oscillator is selected, signal amplification treatment is firstly carried out on the low-phase noise voltage controlled crystal oscillator, then a Schottky diode (SBD) tripler and a frequency selective amplifier are utilized to obtain a 30MHz signal, a controllable phase shifter consisting of a double-electric modulation capacitance diode and a parallel resonance network is adopted as a modulation circuit, triangular wave modulation (square wave frequency modulation) is carried out on the 30MHz signal, and finally, the modulated 90MHz output signal is obtained through SBD frequency tripler and frequency selective amplification. The scheme utilizes the low noise characteristic of SBD, adopts a carrier wave raising and modulating mode, changes 10MHz modulation into 30MHz modulation, and obviously improves phase noise. Meanwhile, the output signal spectrum of the scheme has excellent harmonic clutter characteristics, the 90MHz output spectrum basically only comprises the subharmonics of 90MHz, and the subharmonics of the 10MHz signal are very small. At this time, the phase noise of the 90MHz output frequency spectrum is not limited by the designed links of frequency multiplication, modulation and amplification circuits, but is limited by the 10MHz low-phase noise-controlled crystal oscillator.
Disclosure of Invention
The application aims to provide an ultralow noise frequency synthesis and frequency transmission scheme for a rubidium frequency scale, which has the advantages of low phase noise, high harmonic noise suppression degree, easiness in debugging and the like.
In order to achieve the above purpose, the present application adopts the following technical scheme:
an ultra-low noise frequency synthesis and frequency transmission circuit for rubidium frequency standard comprises a first power divider, a frequency transmission analog phase-locked loop circuit and a radio frequency synthesis circuit,
the frequency transfer analog phase-locked loop comprises a second signal amplifier, an analog phase discriminator, a filter amplifier, a 10MHz crystal oscillator, a second power divider, an SBD nine-time frequency multiplier and a third signal amplifier,
the output end of the second signal amplifier is connected with the reference input end of the analog phase discriminator, the output end of the third signal amplifier is connected with the radio frequency input end of the analog phase discriminator, the output end of the analog phase discriminator is connected with the input end of the filter amplifier, the output end of the filter amplifier is connected with the voltage-controlled input end of the 10MHz crystal oscillator, the output end of the 10MHz crystal oscillator is connected with the input end of the second power divider, one output end of the second power divider is connected with the input end of the SBD nine-time frequency multiplier, the other output end of the second power divider outputs a 10MHz frequency signal, the output end of the SBD nine-time frequency multiplier is connected with the input end of the third signal amplifier,
the radio frequency synthesis circuit comprises a 90MHz low phase noise crystal oscillator, a modulator and a first signal amplifier,
the 90MHz low-phase noise crystal oscillator is connected with the input end of a first power divider, one path of output end of the first power divider is connected with the first input end of a modulator, the second input end of the modulator is connected with 136Hz triangular wave, the output end of the modulator is connected with the input end of a first signal amplifier, and the other path of output end of the first power divider is connected with the input end of a second signal amplifier.
The output end of the first signal amplifier is connected with the first input end of the SRD frequency multiplier, the second input end of the SRD frequency multiplier is connected with 5.3125MHz signals, the output end of the SRD frequency multiplier is connected with a physical system, and the physical system is connected with the 90MHz low-phase noise crystal oscillator sequentially through the preamplifier, the synchronous detector and the integrating filter.
Compared with the prior art, the circuit scheme has the following advantages:
1. the microwave probe signal has a lower phase noise characteristic. The radio frequency synthesis circuit uses a 90MHz low-phase noise crystal oscillator to lock the crystal oscillator on an atomic transition spectrum line of a physical system. The 90MHz crystal oscillator phase noise is lower than the 90MHz phase noise obtained by frequency multiplication of the 10MHz crystal oscillator, and the lower microwave search signal phase noise can be obtained by raising the frequency of the crystal oscillator in the ring.
2. The frequency transfer characteristics of an analog phase-locked loop are better than those of a digital phase-locked loop. The frequency transfer analog phase-locked loop circuit uses an analog phase-locked loop to lock the 10MHz crystal oscillator on the 90MHz crystal oscillator. The frequency transfer analog phase-locked loop circuit adopts a frequency multiplication and mixing phase discrimination mode, can realize good phase noise level, and can realize lossless transfer of the frequency stability characteristic of the frequency-locked loop. The digital phase-locked loop can only adopt a frequency division mode, and the frequency divider can introduce additional phase noise.
3. The frequency transfer analog phase-locked loop circuit has high reliability. Analog devices can be used entirely, and reliability is high.
Drawings
Fig. 1 is a schematic diagram of the overall circuit principle of the present application.
FIG. 2 is a schematic diagram of the circuit principle of the SBD nine-time frequency multiplier;
FIG. 3 is a schematic circuit diagram of a modulator;
fig. 4 is a schematic circuit diagram of the first signal amplifier/the second signal amplifier/the third signal amplifier;
fig. 5 is a schematic circuit diagram of an analog phase detector.
In the figure: 1-90MHz low phase noise crystal oscillator; a 2-modulator; 3-a first signal amplifier; a 4-SRD frequency multiplier; 5-physical system; a 6-preamplifier; 7-synchronous detectors; an 8-integration filter; 9-a first power divider; 10-a second signal amplifier; 11-an analog phase detector; a 12-filter amplifier; 13-10MHz crystal oscillator; 14-a second power divider; a 15-SBD nine-time frequency multiplier; 16-a third signal amplifier; 17-frequency transfer analog phase-locked loop circuitry; 18-a radio frequency synthesis circuit.
Detailed Description
The application is further described below with reference to the accompanying drawings:
as shown in fig. 1, an ultra-low noise frequency synthesis and frequency transfer circuit for rubidium frequency scale comprises a radio frequency synthesis circuit 18, the radio frequency synthesis circuit 18 comprises a 90MHz low phase noise crystal oscillator 1, a modulator 2 and a first signal amplifier 3,
the output end of the first signal amplifier 3 is connected with the first input end of the SRD frequency multiplier 4, the second input end of the SRD frequency multiplier 4 is connected with a 5.3125MHz signal, the output end of the SRD frequency multiplier 4 is connected with the physical system 5, and the physical system 5 is connected with the 90MHz low phase noise crystal oscillator 1 sequentially through the preamplifier 6, the synchronous detector 7 and the integrating filter 8. The output of the first signal amplifier 3 outputs the 90MHz signal which is required to be modulated by the present application.
As shown in fig. 1, the ultra-low noise frequency synthesis and frequency transfer circuit for rubidium frequency scale further comprises a frequency transfer analog phase-locked loop circuit 17, wherein the frequency transfer analog phase-locked loop circuit 17 comprises a second signal amplifier 10, an analog phase discriminator 11, a filter amplifier 12, a 10MHz crystal oscillator 13, a second power divider 14, an SBD nine-time frequency multiplier 15 and a third signal amplifier 16.
The 90MHz low-phase noise crystal oscillator 1 is connected with the input end of a first power divider 9, one output end of the first power divider 9 is connected with the input end of a second signal amplifier 10, and the output end of the second signal amplifier 10 is connected with the reference input end of an analog phase discriminator 11. The output end of the 10MHz crystal oscillator 13 is connected with the input end of the second power divider 9, one path of output end of the second power divider 9 is connected with the input end of the SBD nine-time frequency multiplier 15, and the other path of output end of the second power divider 9 outputs a standard output 10MHz frequency signal required by a rubidium frequency standard. The output end of the SBD nine-time frequency multiplier 15 is connected with the input end of the third signal amplifier 16, and the output end of the third signal amplifier 16 is connected with the radio frequency input end of the analog phase detector 11. The analog phase detector 11 mixes and compares the reference input signal output by the second signal amplifier 10 with the radio frequency input signal output by the third signal amplifier 16 to obtain a phase error signal, the phase error signal is transmitted to the input end of the filter amplifier 12 through the output end (intermediate frequency) of the analog phase detector 11, the filter amplifier 12 filters and integrates and amplifies the phase error signal to obtain a direct-current voltage signal, and the direct-current voltage signal is transmitted to the voltage-controlled input end of the 10MHz crystal oscillator 13 through the output end of the filter amplifier 12. The output end of the 10MHz crystal oscillator 13 is connected with the input end of the second power divider 9.
The technical scheme aims to reduce the ultra-low noise frequency synthesis of rubidium atomic frequency standard and the phase noise of 90MHz signal modulated in the loop of frequency transfer analog phase-locked loop, and ensure excellent harmonic characteristic of output signal. The traditional frequency synthesis scheme of the rubidium frequency scale adopts 10MHz crystal oscillator as the local oscillator, and the inherent phase noise 20log (9) introduced by frequency multiplication cannot be avoided. The phase noise level of the 90MHz crystal oscillator selected by the application at the concerned 2 times of modulation frequency is superior to the phase noise of the 10MHz crystal oscillator after 9 times of frequency multiplication. In the application, after the noise characteristics of the modulator and the signal amplifier connected at the rear stage of the 90MHz crystal oscillator are carefully considered, the phase noise of the modulated 90MHz signal is not deteriorated relative to the phase noise of the 90MHz crystal oscillator at the 2 times modulation frequency. Since the modulator and the signal amplifier have excellent frequency selecting functions, the harmonic characteristic of the output modulated 90MHz signal is excellent.
As shown in fig. 1, the application adopts a 90MHz low-phase noise crystal oscillator 1 as a local oscillator, generates a modulated 90MHz signal through a first power divider 9, a modulator 2 and a first signal amplifier 9, sends the modulated 90MHz signal into an SRD frequency multiplier 4 for 76 times of frequency multiplication, mixes the modulated 90MHz signal generated by the first signal amplifier 9 with a 5.3125MHz signal generated by a synthesizer to obtain a 6.834GHz microwave signal, sends the microwave signal into a physical system to interact with atoms, outputs an optical detection signal with modulation frequency information to a preamplifier 6, and obtains a voltage-controlled signal through the preamplifier 6, a synchronous detector 7 and an integrating filter 8 to realize the closed loop locking of a rubidium frequency scale.
The 90MHz low-phase noise crystal oscillator 1 outputs a 10MHz signal through the frequency transfer analog phase-locked loop circuit 17, and the specific signal transfer scheme is as follows: the 90MHz low-phase noise crystal oscillator 1 is sent into the reference input end of the analog phase discriminator 11 through the first power divider 9 and the second signal amplifier 10, the 10MHz crystal oscillator 13 is sent into the radio frequency input end of the analog phase discriminator 11 through the second power divider 14, the SBD nine-time frequency multiplier 15 and the third signal amplifier 16 to obtain radio frequency input signals (90 MHz signals), the analog phase discriminator 11 outputs error signals to obtain voltage-controlled signals through the filter amplifier 12, and the 10MHz voltage-controlled crystal oscillator is controlled to realize closed-loop locking of the phase-locked loop.
As shown in FIG. 5, the analog phase detector 11 employs SYPD-2 from Mini-Circuits. The reference input of SYPD-2 is connected to resistor R4 and the RF input is connected to resistor R5.
The filter amplifier 12 comprises a filtering unit, an integrating unit and an output unit,
as shown in fig. 5, the filtering unit includes an inductor L9, a capacitor C11, an inductor L10, and a capacitor C12;
as shown in fig. 5, the integrating unit includes an operational amplifier U1, a resistor R6, a capacitor C13, a resistor R8, a resistor R7, and a capacitor C14;
as shown in fig. 5, the output unit includes an operational amplifier U2, a resistor R9, a resistor R10, a resistor R11, and a resistor R12.
The output end of the analog phase discriminator 11 is respectively connected with one end of an inductor L9 and one end of an inductor L10, the other end of the inductor L9 is connected with one end of a capacitor C11, the other end of the capacitor C11 is electrically grounded, the other end of the inductor L10 is respectively connected with one end of a capacitor C12 and one end of a resistor R6, and the other end of the capacitor C12 is electrically grounded. The other end of the resistor R6 is connected with the inverting input end of the operational amplifier U1, one end of the resistor R7 and one end of the capacitor C14, the other end of the resistor R7 and the other end of the capacitor C14 are connected with the output end of the operational amplifier U1, the output end of the operational amplifier U1 is also connected with one end of the resistor R9, one end of the resistor R8 and one end of the capacitor C13 are connected with the non-inverting input end of the operational amplifier U1, and the other end of the resistor R8 and the other end of the capacitor C13 are electrically grounded. The other end of the resistor R9 is respectively connected with the inverting input end of the operational amplifier U2 and one end of the resistor R11, the other end of the resistor R11 is connected with the output end of the operational amplifier U2, the output end of the operational amplifier U2 is also connected with one end of the resistor R12, one end of the resistor R10 is connected with the non-inverting input end of the operational amplifier U2, the other end of the resistor R10 is electrically grounded, and the other end of the resistor R12 outputs direct current voltage-controlled voltage.
As shown in fig. 2, the SBD nine-time frequency multiplier 15 includes an inductor L1, an inductor L2, an inductor L3, an inductor L4, a full-wave bridge rectifier, a capacitor C1, a capacitor C2, and a capacitor C3, wherein one end of the inductor L1 is used as an input end, the other end is electrically grounded through the capacitor C1 and is also connected to one end of the inductor L2 through the full-wave bridge rectifier, the other end of the inductor L2 is electrically grounded through the inductor L3, two ends of the inductor L2 are connected with the capacitor C2 in parallel, and two ends of the inductor L3 are connected with the capacitor C3 in parallel.
The SBD nine-time frequency multiplier 15 has 5-15 MHz input frequency, 25-30 dB conversion loss, 10-15 dBm input power and 15-20 dB harmonic suppression.
As shown in fig. 3, the modulator 2 includes a dual-electric modulation capacitance diode (VD 1 and VD 2), a capacitor C6, an inductance L5, and an inductance L6. The carrier is input by the C4 end of the capacitor and output by the C5 end of the capacitor.
The modulator 5 adopts a controllable phase-shifting network with the frequency range of 85 MHz-95 MHz, the phase-shifting range of 90 DEG and the insertion loss of 1-2 dB.
As shown in fig. 4, the first signal amplifier 3, the second signal amplifier 10 and the third signal amplifier 16 are all common-base amplifying circuits, the common-base amplifying circuits include a resistor R1, a resistor R2, a resistor R3, a capacitor C7, a capacitor C8, a capacitor C9, a capacitor C10, an inductor L7, an inductor L8 and a triode Q1, one end of the resistor R2 and one end of the inductor L7 are respectively connected with a power supply, the other end of the resistor R2 is connected with a base electrode of the triode Q1, the base electrode of the triode Q1 is grounded through the resistor R3, the other end of the inductor L7 is connected with a collector electrode of the triode Q1, a collector electrode of the triode Q1 is connected with one end of the capacitor C10, the other end of the capacitor C10 is used as an output end, two ends of the inductor L7 are connected with one end of the capacitor C9 in parallel, the other end of the capacitor C9 is used as an input end, the emitter of the triode Q1 is connected with one end of the resistor R1, the other end of the resistor R1 is grounded through the inductor L8, and two ends of the inductor L8 are connected with the capacitor C8 in parallel.
As shown in fig. 4, the first signal amplifier 3, the second signal amplifier 10 and the third signal amplifier 16 all adopt a common-base amplifying circuit, the common-base amplifying circuit selects a bipolar triode Q1 with low noise, the resistor R1, the resistor R2 and the resistor R3 provide bias for the triode Q1, the inductor L8 and the capacitor C8 serve as band-stop filters to reduce the loss of input signals, the inductor L7 and the capacitor C7 serve as a common-base circuit frequency-selecting network to amplify useful signals, the signals are input from the end of the capacitor C9, and the signals are output from the end of the capacitor C10.
The frequency range of the first signal amplifier 3, the second signal amplifier 10 and the third signal amplifier 16 is 80 MHz-110 MHz, the small signal power gain is >15dB, the noise coefficient is <2dB, the linear output power is >20dBm, and the maximum input power is 13dBm.
Example 2
As can be seen from fig. 1, the rf frequency synthesizing circuit 18 is formed by sequentially connecting a 90MHz low phase noise crystal oscillator 1, a modulator 2 and a first signal amplifier 3. Specific parameters are as follows.
The 90MHz low phase noise crystal oscillator 1 generally selects a crystal oscillator with the phase noise lower than-130 dBc/Hz@100Hz, and the output power is more than 10dBm.
As shown in fig. 3, the modulator 2 has an input coupled capacitor C4 of 220pF and a capacitor C5 of 220pF. Tuning inductance L5 was 33nH, inductance L6 was 33nH, and tuning capacitance C6 was 56pF.
As shown in fig. 4, in the first signal amplifier 3 circuit. The resistor R1 is 200Ω, the resistor R2 is 12kΩ, and the resistor R3 is 15kΩ. The input coupling capacitance C9 is 300pF and the output coupling capacitance C10 is 100pF. The inductance L8 in the emitter band reject network is 100nH and the capacitance C8 is 82pF. The inductance L7 of the collector frequency selection network is 100nH, and the capacitance C7 is 56pF.
The 90MHz power obtained by the technical scheme adopting the parameters is 18dBm, and the second harmonic is suppressed to-53 dB.
As shown in fig. 4, in the second signal amplifier 10 circuit. The resistor R1 is 200Ω, the resistor R2 is 12kΩ, and the resistor R3 is 15kΩ. The input coupling capacitance C9 is 300pF and the output coupling capacitance C10 is 100pF. The inductance L8 in the emitter band reject network is 100nH and the capacitance C8 is 82pF. The inductance L7 of the collector frequency selection network is 100nH, and the capacitance C7 is 56pF.
As shown in fig. 4, in the third signal amplifier 16 circuit. The resistor R1 is 200Ω, the resistor R2 is 12kΩ, and the resistor R3 is 15kΩ. The input coupling capacitance C9 is 300pF and the output coupling capacitance C10 is 100pF. The inductance L8 in the emitter band reject network is 100nH and the capacitance C8 is 82pF. The inductance L7 of the collector frequency selection network is 100nH, and the capacitance C7 is 56pF.
As shown in FIG. 5, the analog phase detector 11 adopts SYPD-2 from Mini-Circuits, the reference and radio frequency input frequency is 10 MHz-200 MHz, the optimal input power is 7dBm, the isolation is high, the typical value is 40dB, and the direct current output range is 700 mV-1000 mV. The resistor R4 is 50Ω and the resistor R5 is 50Ω.
As shown in fig. 5, in the filter amplifier 12. The inductance L9 is 100nH, the capacitance C11 is 82pF, the inductance L10 is 560nH, the capacitance C12 is 470pF, the resistance R6 is 150kΩ, the resistance R7 is 510kΩ, the resistance R8 is 150kΩ, the resistance R9 is 15kΩ, the resistance R10 is 15kΩ, the resistance R11 is 51kΩ, the resistance R12 is 51kΩ, the capacitance C13 is 220pF, and the capacitance C14 is 220pF.
Otherwise, the same as in example 1 was used.
The first signal amplifier 3 obtained by the application outputsThe test result of phase noise of 90MHz signal in the range of 272 Hz-100 kHz deviated from carrier wave is shown in table 1, and the test result is substituted into formula (1), and the contribution of intermodulation noise to stability is 8.6X10 -141/2
Table 1, 90MHz signal phase noise test results
@100Hz @272Hz @1kHz @10kHz @100kHz
The application is that -136dBc/Hz -145dBc/Hz -155dBc/Hz -165dBc/Hz -167dBc/Hz
The rubidium atomic frequency standard manufactured by adopting the scheme described by the application has the frequency stability index of 10 -14 Potential of magnitude
The specific embodiments described herein are offered by way of example only. Various modifications or additions or substitutions to the described embodiments may be made by those skilled in the art without departing from the spirit of the application or exceeding the scope of the application as defined in the accompanying claims.

Claims (1)

1. An ultra-low noise frequency synthesis and frequency transfer circuit for rubidium frequency scale comprises a first power divider (9), and is characterized by further comprising a frequency transfer analog phase-locked loop circuit (17) and a radio frequency synthesis circuit (18),
the frequency transfer analog phase-locked loop circuit (17) comprises a second signal amplifier (10), an analog phase discriminator (11), a filter amplifier (12), a 10MHz crystal oscillator (13), a second power divider (14), an SBD nine-time frequency multiplier (15) and a third signal amplifier (16),
the output end of the second signal amplifier (10) is connected with the reference input end of the analog phase discriminator (11), the output end of the third signal amplifier (16) is connected with the radio frequency input end of the analog phase discriminator (11), the output end of the analog phase discriminator (11) is connected with the input end of the filter amplifier (12), the output end of the filter amplifier (12) is connected with the voltage-controlled input end of the 10MHz crystal oscillator (13), the output end of the 10MHz crystal oscillator (13) is connected with the input end of the second power divider (14), one output end of the second power divider (14) is connected with the input end of the SBD nine-time frequency multiplier (15), the other output end of the second power divider (14) outputs a 10MHz frequency signal, the output end of the SBD nine-time frequency multiplier (15) is connected with the input end of the third signal amplifier (16),
the radio frequency synthesis circuit (18) comprises a 90MHz low-phase noise crystal oscillator (1), a modulator (2) and a first signal amplifier (3),
the 90MHz low phase noise crystal oscillator (1) is connected with the input end of a first power divider (9), one path of output end of the first power divider (9) is connected with the first input end of a modulator (2), the second input end of the modulator (2) is connected with 136Hz triangular wave, the output end of the modulator (2) is connected with the input end of a first signal amplifier (3), the other path of output end of the first power divider (9) is connected with the input end of a second signal amplifier (10),
the output end of the first signal amplifier (3) is connected with the first input end of the SRD frequency multiplier (4), the second input end of the SRD frequency multiplier (4) is connected with a 5.3125MHz signal, the output end of the SRD frequency multiplier (4) is connected with the physical system (5), the physical system (5) is connected with the 90MHz low-phase noise crystal oscillator (1) sequentially through the preamplifier (6), the synchronous detector (7) and the integrating filter (8),
the first signal amplifier (3), the second signal amplifier (10) and the third signal amplifier (16) are all common-base amplifying circuits.
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