CN107394998A - Control circuit, control method and switching power supply - Google Patents
Control circuit, control method and switching power supply Download PDFInfo
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- CN107394998A CN107394998A CN201710437719.5A CN201710437719A CN107394998A CN 107394998 A CN107394998 A CN 107394998A CN 201710437719 A CN201710437719 A CN 201710437719A CN 107394998 A CN107394998 A CN 107394998A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
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- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
Abstract
The invention provides a kind of control circuit, control method and Switching Power Supply, the frequency for being used in the Continuity signal of control main switch conducting is predeterminated frequency during the turn-off time required for the main switch is more than the minimum turn-off time, and when the turn-off time required for the main switch being less than the minimum turn-off time for the turn-off time needed for the main switch into positively related frequency, so as to realize that determine frequency mode of operation and frequency conversion turns off taking over seamlessly between mode of operation surely, mode switching signal is provided without special pattern decision circuit, therefore implementation is simple, and the expansion of the dutycycle for the continuous switch controlling signal for realizing main switch that can stablize.Further, since in conversion process, power supply is in constant off-time mode of operation, so as to will not cause because of frequency conversion due to subharmonic compensation deficiency caused by subharmonic oscillation the problem of.
Description
Technical field
Present invention design electric and electronic technical field, more particularly to a kind of control circuit, control method and Switching Power Supply.
Background technology
Widely it is applied in Switching Power Supply in portable electric appts, it is mainly by power stage circuit and control circuit
Form.Control circuit is by controlling the dutycycle of the drive signal of the main switch in power stage circuit will come controlling switch power supply
Input voltage is converted into corresponding output voltage.
Inherent delay is had based on the logic circuit in Switching Power Supply and drive circuit, and in order to prevent main switch
False triggering, it usually needs make the main switch of Switching Power Supply there is a minimum turn-off time.Due to depositing for minimum turn-off time
In the Switching Power Supply of fixed-frequency control, the dutycycle of the drive signal of main switch can be restricted, and main switch is opened
Pass frequency is higher, and this limitation can be more obvious.Such as the Switching Power Supply of voltage-dropping type, when need output voltage with input
Voltage relatively when, it is necessary to the dutycycle of the drive signal of main switch try one's best close to 1, but existing this fixed frequency
Control mode, due to the presence of minimum turn-off time, after the maximum duty cycle of the drive signal of main switch is restricted, it is impossible to enter
One step extends so that Switching Power Supply be difficult to maintain required output voltage.
The content of the invention
In view of this, the invention provides a kind of control circuit, control method and Switching Power Supply, to overcome Switching Power Supply
Main switch make it that the dutycycle extension of the switching signal of the main switch is limited because of the limitation of minimum turn-off time, from
And the problem of causing Switching Power Supply to be difficult to maintain required output voltage.
A kind of control circuit of Switching Power Supply, the Switching Power Supply include the main switch with the minimum turn-off time, its
It is characterised by, including：
Continuity signal generative circuit, for generating the Continuity signal of a control main switch turn-on instant, wherein,
When the turn-off time required for the main switch being more than the minimum turn-off time, make the Continuity signal
Frequency is predeterminated frequency, when the turn-off time required for the main switch being less than the minimum turn-off, makes the conducting letter
Number frequency and the main switch required for turn-off time into positively related frequency.
Preferably, described control circuit also includes：
Cut-off signals generative circuit, for generating the cut-off signals at the control main switch shut-off moment,
The Continuity signal generative circuit generates the Continuity signal according to the cut-off signals, to control the main switch
Pipe is during the turn-off time required for the main switch is less than the minimum turn-off during shut-off in each switch periods
Between be preset value,
First logic circuit, for controlling the main switch to switch shape according to the Continuity signal and cut-off signals generation
The switch controlling signal of state.
Preferably, the Continuity signal generative circuit includes：
Clock oscillation circuit, for generating clock signal according to the Continuity signal
Second logic circuit, the Continuity signal is generated according to the Continuity signal, cut-off signals and the first timing signal,
First timing circuit, first timing signal is generated according to the Continuity signal,
Wherein, it was the first moment at the time of the clock signal transitions to effective status in each switch week, it is described
Cut-off signals saltus step was the second moment at the time of being effective status, the one of later generation in first moment and the second moment
When the individual moment arrives, the Continuity signal saltus step is disarmed state, and during the first preset time of process, first timing signal
Saltus step is effective status, to control the Continuity signal saltus step as effective status,
Clock signal saltus step after the Continuity signal saltus step is disarmed state is disarmed state.
Preferably, the clock oscillation circuit includes charging circuit, charging capacitor, comparison circuit and reset circuit,
The charging circuit is used to provide a charging current, to be charged to the electric capacity,
The voltage and the size of a predeterminated voltage that the comparison circuit is used at the charging end of the charging capacitor, when
When voltage at the charging end rises to the predeterminated voltage, the clock signal transitions are effective status,
The reset circuit starts to reset the electricity at the charging end when the Continuity signal saltus step is disarmed state
Pressure, to control the clock signal transitions as disarmed state.
Preferably, the Continuity signal generative circuit also includes：
Second timing circuit is used to generate the second timing signal, second logic circuit also root according to the clock signal
The Continuity signal is generated according to second timing signal,
After the clock signal transitions are effective status, during by the second preset time, second timing signal is jumped
It is changed into effective status, to control the Continuity signal saltus step to disarmed state.
Preferably, the second logic circuit includes：
First rest-set flip-flop, the set end of first rest-set flip-flop receive the cut-off signals, and reset terminal receives and institute
The opposite non-signal of the state of Continuity signal is stated,
OR gate, input receive the output signal of first rest-set flip-flop and second timing signal respectively,
With door, input receives the clock signal and the output signal of the OR gate respectively,
Second rest-set flip-flop, the set end of second rest-set flip-flop receive the output signal with door, reset termination
First timing signal is received, output end exports the non-signal, to be respectively used to control the clock oscillation circuit and first
Timing circuit,
Phase inverter, the non-signal is received, and export the Continuity signal.
Preferably, the cut-off signals generative circuit is adopted according to error compensating signal and the inductive current of the Switching Power Supply
The magnitude relationship of sample signal generates the cut-off signals,
Error of the error compensating signal between the output voltage feedback signal and reference signal of the Switching Power Supply
Thermal compensation signal.
When the turn-off time required for the main switch being more than the minimum turn-off time, the main switch is controlled
Switching frequency be predeterminated frequency, when the turn-off time required for the main switch being more than the minimum turn-off time, control
The switching frequency of the main switch and the turn-off time required for the main switch are made into positively related frequency.
Preferably, the turn-off time described in the main switch required for main switch is controlled to be less than the minimum turn-off phase
Between each switch periods in turn-off time be preset value.
A kind of Switching Power Supply, it is characterised in that including the control circuit described in above-mentioned any one.
Therefore in the Switching Power Supply that is controlled of control circuit provided by the invention and control method, it is used in control
The frequency of the Continuity signal of main switch conducting is when the turn-off time required for the main switch being more than the minimum turn-off
Between during be predeterminated frequency, and the turn-off time required for the main switch be more than the minimum turn-off time during for
Turn-off time needed for the main switch is into positively related frequency so that the Switching Power Supply is determining frequency mode of operation and frequency conversion
Surely taking over seamlessly between shut-off mode of operation, provides mode switching signal, with instruction without special pattern decision circuit
Above-mentioned switching, therefore implementation is simple, and the duty for the continuous switch controlling signal for realizing main switch that can stablize
The expansion of ratio.Further, since in conversion process, power supply is also set to be in constant off-time mode of operation, so as to will not be because of
Frequency conversion and cause due to subharmonic compensation deficiency caused by subharmonic oscillation the problem of.
Brief description of the drawings
Fig. 1 is the structural representation of the Switching Power Supply 100 according to the embodiment of the present invention；
Fig. 2 is a kind of specific implementation circuit diagram of the Continuity signal generative circuit in Fig. 1；
Fig. 3 is a kind of specific implementation circuit diagram of clock oscillation circuit in Fig. 2；
Working waveform figure of Fig. 4 Switching Power Supplies 100 in the very first time；
Working waveform figure of the powered-down sources 100 of Fig. 5 in the second time；
Fig. 6 is the working waveform figure that Switching Power Supply 100 during saltus step does not occur always for cut-off signals.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation describes, it is clear that described embodiment is only part of the embodiment of the present invention, rather than whole embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art are obtained every other under the premise of creative work is not made
Embodiment, belong to the scope of protection of the invention.In addition it should be noted that in embodiment this content " institute
State ... " it is that the technology only referred in the present invention belongs to or feature.
Fig. 1 is the structural representation of the Switching Power Supply 100 according to the embodiment of the present invention.The major power level of Switching Power Supply 100
Circuit 11 and control circuit 12 are formed.Control circuit 12 is by controlling the on off state of the main switch M1 in power stage circuit 11
Carry out controlling switch power supply 100 to be converted into input voltage VIN to load required output voltage VO UT.
The topological structure of power stage circuit 11 is not specifically limited in the present invention, as its can be voltage-dropping type, booster type,
The types such as buck-boost.In the present embodiment, exemplified by the synchronous buck type topological structure of power stage circuit 11, its except including
Outside main switch M1, can also further comprise the synchronous rectifier M2 being connected with main switch M1, main switch M1 with it is synchronous
Node connected rectifying tube M2 is connected with inductance L first end, and inductance L the second end is grounded by output capacitance Co, and inductance L
Output end of second end as output voltage VO UT.Synchronous rectification switch pipe M2 on off state and main switch M1 switch
State is on the contrary, its also controlled circuit 12 controls.Inherent delay, Yi Jiwei be present based on some circuits in Switching Power Supply 100
The false triggering of main switch is prevented, main switch M1 has a minimum turn-off time Toff_min, i.e. control circuit 12 exists
During the on off state for controlling main switch M1, minimum turn-off that main switch M1 can reach in each switch periods
Time.
As shown in figure 1, control circuit 12 mainly includes Continuity signal generative circuit, the logic of cut-off signals generative circuit first
Circuit.The Continuity signal generative circuit is used for the Continuity signal F_ON for generating a control main switch M1 turn-on instants, described
Cut-off signals generative circuit is used for the cut-off signals F_OFF for generating a control main switch M2 shut-off moment, first logic
Circuit is used for the first switch of the on off state according to Continuity signal F_ON and cut-off signals F_OFF generation control main switches M1
Signal D1, and the second switch signal D2 of generation control synchronous rectifier M2 on off state.First logic circuit exists
Rest-set flip-flop RS3 can be included in the present embodiment, its set end receives Continuity signal F_ON, and reset terminal receives cut-off signals F_
OFF, output end output signal generate after the drive circuit being made up of buffer and phase inverter first switch signal D1 with
Second switch signal D2.
Continuity signal F_ON frequency is predeterminated frequency in the first state, in the second condition for main switch M1 institutes
The turn-off time needed into positively related frequency, wherein, the first state be main switch M1 required for turn-off time it is big
In minimum turn-off time Toff_min state, the turn-off time required for second state is main switch M1 is less than minimum
Turn-off time Toff_min state.Need exist for explaining, the turn-off time required for main switch M1 refers to main switch
During pipe M1 switching frequency is equal to the predeterminated frequency, input voltage VIN is converted into loading required by Switching Power Supply 100
During output voltage VO UT, the turn-off time required for main switch M1.
When main switch M1 switching frequency is fixed as the predeterminated frequency, i.e., Switching Power Supply 100, which is operated in, determines frequency mould
When under formula, main switch M1 turn-off time is smaller, then illustrates that its ON time is bigger, then first switch signal D1 dutycycle
Also it is bigger.Therefore, in the case where determining frequency mode of operation, first can only be increased by constantly reducing main switch M1 turn-off time
Switching signal D1 dutycycle.There is this limitation of minimum turn-off time Toff_min due to main switch M1, therefore fixed
Under frequency mode of operation, first switch signal D1 maximum duty cycle can be limited by minimum turn-off time Toff_min.
However, in the present invention so that Continuity signal F_ON frequency is predeterminated frequency in said first condition so that
Switching Power Supply 100 within the period in determining frequency mode of operation, in the first state, during shut-off needed for main switch M1
Between be more than minimum turn-off time Toff_min, therefore control circuit 12 can be adjusted by adjusting main switch M1 turn-off time
First switch signal D1 dutycycle, so that input voltage VIN is converted into required output voltage by Switching Power Supply 100
VOUT.When needing main switch M1 turn-off time to be less than minimum turn-off time Toff_min, Switching Power Supply can will just input
When voltage conversion is into required output voltage VO UT, i.e., under second state, make Continuity signal F_ON is to be opened with master
Turn-off time required for the pipe M1 of pass, the i.e. turn-off time required for main switch M1 was smaller, makes conducting into positively related frequency
Signal F_ON is also smaller, and vice versa.Therefore in said second condition, control circuit 12 is by adjusting Continuity signal F_ON's
Frequency, to adjust first switch signal D1 dutycycle so that it can not be limited by minimum turn-off time Toff_min, and
Further expand, so that the output voltage VO UT of Switching Power Supply 100 is maintained required value.
In the Switching Power Supply 100 that the present embodiment is provided, the Continuity signal generative circuit is according to cut-off signals F_OFF
Continuity signal F_ON is generated, to control the turn-off time in each switch periods of main switch M1 in said second condition
For preset value.Therefore, Switching Power Supply 100 is in frequency conversion and constant off-time mode of operation in said second condition.
As shown in Fig. 2 it is a kind of specific implementation circuit diagram of the Continuity signal generative circuit in Fig. 1.The conducting letter
Number generative circuit mainly includes：For generating clock signal F_OSC clock oscillation circuit according to Continuity signal F_ON, for root
Continuity signal F_ON the second logic circuit is generated according to Continuity signal F_ON, cut-off signals F_OFF and the first timing signal F_T1,
And for generating the first timing signal F_T1 the first timing circuit according to Continuity signal F_ON.Wherein, switched at each
Zhou Zhong, was the first moment at the time of making clock signal F_OSC saltus steps to effective status, and cut-off signals F_OFF saltus steps are effective shape
It was the second moment at the time of state, when a moment of later generation arrives in first moment and the second moment, conducting letter
Number F_ON saltus steps are disarmed state, and also rapid saltus step is clock signal F_OSC after Continuity signal F_ON saltus steps are disarmed state
Disarmed state, and after Continuity signal F_ON saltus steps are disarmed state, then during by the first preset time, such as by 100~
During 200ns, the first timing signal F_T1 saltus steps are effective status, to control Continuity signal F_ON saltus steps as effective status.Need
Explanation is that in the present invention, the effective status of each signal can be that high level can also be low level, in this real Switching Power Supply
In 100, the effective status of each signal is with high level.
Fig. 3 is a kind of specific implementation circuit diagram of clock oscillation circuit in Fig. 2.The clock oscillation circuit includes charging electricity
Road, charging capacitor C, comparison circuit and reset circuit.As shown in figure 3, the charging circuit includes charging current source I, for carrying
For a charging current, to be charged to charging capacitor C, the comparison circuit specifically may include with comparator CMP, for comparing charging
The size of voltage F-CAP and a predeterminated voltage at electric capacity C charging end, when voltage F-CAP rises to the predeterminated voltage, when
Clock signal F_OSC saltus steps are effective status.The reset circuit specifically may include reset switch K, and it can be by Continuity signal F_
ON non-signal control, to be turned on when Continuity signal F_ON saltus steps is disarmed states so that charging capacitor C discharges, by electricity
Pressure F_CAP is rapidly reset to initial voltage so that clock signal F_OSC saltus steps to disarmed state.
In Switching Power Supply 100, the cut-off signals generative circuit is according to error compensating signal and the Switching Power Supply
The magnitude relationship generation cut-off signals F_OFF of inductive current sampled signal, wherein, the error compensating signal is the switch electricity
Error compensating signal between the output voltage feedback signal and reference signal in source.Therefore, cut-off signals F_OFF be usually by
A narrow pulse signal (effective status duration is very short) for PWM comparators output, in order to prevent this output shut-off
Saltus step does not occur always for the output of signal F_OFF PWM comparators, as shown in Fig. 2 the Continuity signal generative circuit also enters one
Step includes being used to generate second the second timing circuits of timing signal F_T2 according to clock signal F_OSC, then the second logic electricity
Road generates Continuity signal F_ON always according to the second timing signal F_T2.Wherein, it is effective status in clock signal F_OSC saltus steps
Afterwards, during and by the second preset time, the second timing signal F_T2 saltus steps are effective status, to control Continuity signal F_ON saltus steps
To disarmed state.The first timing signal F_T1 and the second timing signal F_T2 is narrow pulse signal in the present embodiment.
With continued reference to shown in Fig. 2, second logic circuit mainly include the first rest-set flip-flop RS1, OR gate, with door, the
Two rest-set flip-flop RS2 and phase inverter.Wherein, the set end of first rest-set flip-flop receives cut-off signals F_OFF, reset terminal
Receive the non-signal F_ONB opposite with Continuity signal F_ON state.Because cut-off signals F_OFF is a narrow pulse signal,
Its effective status duration is very short, therefore keeps its effective status for a period of time by the first rest-set flip-flop.It is described
The input of OR gate receives the output signal and the second timing signal F_T2 of first rest-set flip-flop respectively, described defeated with door
Enter the output signal F_LG2 that end receives clock signal F_OSC and the OR gate respectively, the second rest-set flip-flop set end receives
Described to receive the first timing signal F_T1 with the output signal F_LG1 of door, reset terminal, output end exports the non-signal F_ONB,
Non-signal F_ONB is respectively used to control the clock oscillation circuit and the first timing circuit, and the phase inverter receives non-signal
F_ONB, and export Continuity signal F_ON.
Fig. 4 and Fig. 5 is respectively working waveform figure of the Switching Power Supply 100 in the first time period and second time period, and
Fig. 6 is the working waveform figure that Switching Power Supply 100 during saltus step does not occur always for cut-off signals.Specifically explained below in conjunction with Fig. 1-6
State the control process of Switching Power Supply provided by the invention.
As shown in figure 4, in said first condition, in each switch periods, clock signal F_OSC saltus steps are to effective
During state first when be later than the second moment when cut-off signals F_OFF saltus steps are effective status, therefore, in second state
Under, not the second rest-set flip-flop described in set at once, but protected cut-off signals F_OFF effective status by the first rest-set flip-flop
Handle, to wait the arrival at first moment, now, the output signal F_Q saltus steps of first rest-set flip-flop are effective shape
State.When voltage F_CAP reaches predeterminated voltage (shown in dotted line), clock signal F_OSC saltus steps are effective status, illustrate now institute
The arrival of the first moment is stated, the output signal F_LG1 saltus steps with door in Fig. 2 are effective status, are triggered with the 2nd RS described in set
Device so that the non-signal F_ONB saltus steps are effective status, and Continuity signal F_ON saltus steps are disarmed state, now, described
One rest-set flip-flop is reset, and its output signal F_Q1 saltus steps are disarmed state, and now, first timing circuit proceeds by
Timing, after the preset time of timing and continuous first, the first timing signal F_T1 saltus steps are effective status, are touched with resetting the 2nd RS
Send out device so that the non-signal F_ONB saltus steps are disarmed state, and Continuity signal F_ON saltus steps are effective status, to control master
Switching tube M1 is turned at this moment.
As shown in figure 5, in said second condition, in each switch periods, clock signal F_OSC saltus steps are to effective
During state first when the second moment when earlier than cut-off signals F_OFF saltus steps being effective status, therefore, at first moment
When, the second rest-set flip-flop described in set does not make the first timing circuit start timing at once, and is to wait for second moment
Arrive.During waiting second moment to arrive, the charging circuit in Fig. 3 continues to charge to charging capacitor so that electricity
Pressure F_CAP is more than the predeterminated voltage always in the meantime so that clock signal F_OSC is maintained effective shape always in the meantime
State.When second moment arrives, the output signal F_LG1 saltus steps with door in Fig. 2 are effective status, with described in set
Two rest-set flip-flops so that the non-signal F_ONB saltus steps are effective status, and Continuity signal F_ON saltus steps are disarmed state, this
When, first rest-set flip-flop is reset, and its output signal F_Q1 saltus steps are disarmed state, and now, the first timing electricity
Road proceeds by timing, and after the preset time of timing and continuous first, the first timing signal F_T1 saltus steps are effective status, to reset
State the second rest-set flip-flop so that the non-signal F_ONB saltus steps are disarmed state, and Continuity signal F_ON saltus steps are effective shape
State, to control main switch M1 to turn at this moment.As can be seen here, in said second condition, the pass required for main switch M1
The disconnected time is smaller, then the interval between first moment and the second moment is longer, then illustrates clock signal F_OSC effective shape
State duration is longer, i.e. the ON time of main switch M1 is also longer, and main switch M1 passes through institute after shut-off every time
State the first preset time to be switched on again, i.e. its turn-off time is constant off-time during second time period.Therefore, described
Under second state, the turn-off time required for main switch M1 is smaller, then the interval between first moment and the second moment
Longer, Continuity signal F_ON frequency is also smaller, and vice versa.
With continued reference to shown in Fig. 6, when cut-off signals F_OFF occurs without saltus step always, in clock signal F_OSC saltus steps to have
After effect state, and during lasting second preset time, the second timing signal F_T1 saltus steps are effective status, now, Fig. 2
In the output signal F_LG1 saltus steps with door be effective status, with the second rest-set flip-flop described in set so that the non-signal F_
ONB saltus steps are effective status, and Continuity signal F_ON saltus steps are disarmed state, and now, first rest-set flip-flop is reset, its
Output signal F_Q1 saltus steps are disarmed state, and now, first timing circuit proceeds by timing, and timing and continuous first is pre-
If after the time, the first timing signal F_T1 saltus steps are effective status, to reset second rest-set flip-flop so that the non-signal
F_ONB saltus steps are disarmed state, and Continuity signal F_ON saltus steps are effective status, to control main switch M1 to turn at this moment.
The Switching Power Supply controlled according to control circuit provided by the invention is can be seen that from Fig. 4 and Fig. 5 oscillogram
100 can realize and determine frequency mode of operation and frequency conversion and turn off surely to take over seamlessly (automatic switchover) between mode of operation, without special
Pattern decision circuit mode switching signal is provided, to indicate above-mentioned switching, therefore implementation is simple, and can stablize
The expansion of the dutycycle of the continuous switch controlling signal for realizing main switch.Further, since in conversion process, also make power supply
It is secondary humorous caused by subharmonic compensation deficiency so as to cause because of frequency conversion in constant off-time mode of operation
The problem of ripple vibrates.
In addition, present invention also offers a kind of control method of Switching Power Supply, the Switching Power Supply includes having minimum close
The main switch of disconnected time, the control method mainly include：It is more than in the turn-off time required for the main switch described
During the minimum turn-off time, the switching frequency for controlling the main switch is predeterminated frequency, required for the main switch
During turn-off time is less than the minimum turn-off time, control needed for switching frequency and the main switch of the main switch
The turn-off time wanted is into positively related frequency.
The main switch can also be further controlled in the main switch institute according to control method provided by the invention
The turn-off time needed is preset value less than the turn-off time in each switch periods during the minimum turn-off time.Make
Obtain the Switching Power Supply and be in frequency conversion during the turn-off time required for the main switch is less than the minimum turn-off time
And constant off-time mode of operation.
According to embodiments of the invention as described above, these embodiments do not have all details of detailed descriptionthe, not yet
It is only described specific embodiment to limit the invention.As described above, can make many modifications and variations.This specification is chosen
And these embodiments are specifically described, it is in order to preferably explain the principle and practical application of the present invention, so that affiliated technology is led
Field technique personnel can be used using modification of the invention and on the basis of the present invention well.The present invention is only by claims
And its limitation of four corner and equivalent.
Claims (10)
1. a kind of control circuit of Switching Power Supply, the Switching Power Supply includes the main switch with the minimum turn-off time, and it is special
Sign is, including：
Continuity signal generative circuit, for generating the Continuity signal of a control main switch turn-on instant, wherein,
When the turn-off time required for the main switch being more than the minimum turn-off time, make the frequency of the Continuity signal
For predeterminated frequency, when the turn-off time required for the main switch being less than the minimum turn-off, make the Continuity signal
Turn-off time required for frequency and the main switch is into positively related frequency.
2. control circuit according to claim 1, it is characterised in that also include：
Cut-off signals generative circuit, for generating the cut-off signals at the control main switch shut-off moment,
The Continuity signal generative circuit generates the Continuity signal according to the cut-off signals, to control the main switch to exist
Turn-off time during turn-off time required for the main switch is less than the minimum turn-off in each switch periods is
Preset value,
First logic circuit, for controlling the main switch on off state according to the Continuity signal and cut-off signals generation
Switch controlling signal.
3. control circuit according to claim 2, it is characterised in that the Continuity signal generative circuit includes：
Clock oscillation circuit, for generating clock signal according to the Continuity signal
Second logic circuit, the Continuity signal is generated according to the Continuity signal, cut-off signals and the first timing signal,
First timing circuit, first timing signal is generated according to the Continuity signal,
Wherein, it was the first moment at the time of the clock signal transitions to effective status in each switch week, the shut-off
Signal saltus step was the second moment at the time of being effective status, when one of later generation in first moment and the second moment
When being carved into, the Continuity signal saltus step is disarmed state, and during the first preset time of process, the first timing signal saltus step
For effective status, to control the Continuity signal saltus step as effective status,
Clock signal saltus step after the Continuity signal saltus step is disarmed state is disarmed state.
4. control circuit according to claim 3, it is characterised in that the clock oscillation circuit includes charging circuit, filled
Electric capacity, comparison circuit and reset circuit,
The charging circuit is used to provide a charging current, to be charged to the electric capacity,
The voltage and the size of a predeterminated voltage that the comparison circuit is used at the charging end of the charging capacitor, when described
When voltage at charging end rises to the predeterminated voltage, the clock signal transitions are effective status,
The reset circuit starts to reset the voltage at the charging end when the Continuity signal saltus step is disarmed state, with
It is disarmed state to control the clock signal transitions.
5. control circuit according to claim 3, it is characterised in that the Continuity signal generative circuit also includes：
Second timing circuit is used to generate the second timing signal according to the clock signal, and second logic circuit is always according to institute
State the second timing signal and generate the Continuity signal,
After the clock signal transitions are effective status, during by the second preset time, the second timing signal saltus step is
Effective status, to control the Continuity signal saltus step to disarmed state.
6. control circuit according to claim 3, it is characterised in that the second logic circuit includes：
First rest-set flip-flop, the set end of first rest-set flip-flop receive the cut-off signals, and reset terminal is received and led with described
The opposite non-signal of the state of messenger,
OR gate, input receive the output signal of first rest-set flip-flop and second timing signal respectively,
With door, input receives the clock signal and the output signal of the OR gate respectively,
Second rest-set flip-flop, the set end of second rest-set flip-flop receive the output signal with door, and reset terminal receives institute
The first timing signal is stated, output end exports the non-signal, to be respectively used to control the clock oscillation circuit and the first timing
Circuit,
Phase inverter, the non-signal is received, and export the Continuity signal.
7. control circuit according to claim 2, it is characterised in that the cut-off signals generative circuit is according to error compensation
Signal and the magnitude relationship of the inductive current sampled signal of the Switching Power Supply generate the cut-off signals,
Error compensation of the error compensating signal between the output voltage feedback signal and reference signal of the Switching Power Supply
Signal.
8. a kind of control method of Switching Power Supply, the Switching Power Supply includes the main switch with the minimum turn-off time, and it is special
Sign is, including：
When the turn-off time required for the main switch being more than the minimum turn-off time, opening for the main switch is controlled
Pass frequency is predeterminated frequency, when the turn-off time required for the main switch being more than the minimum turn-off time, controls institute
The switching frequency of main switch and the turn-off time required for the main switch are stated into positively related frequency.
9. control method according to claim 8, it is characterised in that control needed for main switch described in the main switch
The turn-off time wanted is preset value less than the turn-off time in each switch periods during the minimum turn-off.
10. a kind of Switching Power Supply, it is characterised in that including the control circuit described in any one in claim 1-7.
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