CN107357742A - A kind of serial ports analogy method and computer equipment - Google Patents
A kind of serial ports analogy method and computer equipment Download PDFInfo
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- CN107357742A CN107357742A CN201710576024.5A CN201710576024A CN107357742A CN 107357742 A CN107357742 A CN 107357742A CN 201710576024 A CN201710576024 A CN 201710576024A CN 107357742 A CN107357742 A CN 107357742A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/105—Program control for peripheral devices where the programme performs an input/output emulation function
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
- G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
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Abstract
The invention discloses a kind of serial ports analogy method and computer equipment, belong to technical field of serial communication；In method, the transmitting procedure of a byte to be transmitted includes GPIO under original state being set to height；After waiting a default trigger condition to reach, start bit is produced, and GPIO is set to low；After waiting trigger condition to reach, obtain a data and logarithm value is judged, the GPIO level states according to corresponding to being set judged result；Trigger condition is waited to judge whether to complete the data transfer of byte to be transmitted after reaching：If it is not, then remove a data and return；If so, then waiting, trigger condition calculates 1 or 0 number of appearance after reaching and relative set corresponds to the GPIO level states of check bit；After waiting trigger condition to reach, the stop position of byte to be transmitted is set.The beneficial effect of above-mentioned technical proposal is：Serial ports is not enough in the case of effectively solving the problems, such as that external communications equipment is more in the case of the not upgrading hardware, saves cost.
Description
Technical field
The present invention relates to technical field of serial communication, more particularly to a kind of analogy method and computer of GPIO universal serial ports
Equipment.
Background technology
Although microprocessor occur history do not grow, its development is very swift and violent, microprocessor integrated level, function,
Speed, reliability and application field etc. are comprehensive all to be started to develop towards the level higher than conventional processors.
A kind of very general equipment room communications protocol on microprocessor during serial ports, two are included in most microprocessor
The individual serial ports based on RS232.But the serial ports supported in the microprocessor used at present generally only has 1-2, if with micro- place
The external equipment that reason device is communicated is more, then the not enough situation of serial ports occurs.In this case, if merely because string
The reason for disposal ability of the not enough rather than microprocessor of mouth itself does not reach use demand obviously can increase production with regard to upgrading hardware
The cost of product, not upgrading hardware can not solve the problems, such as that serial ports is not enough again.
The content of the invention
According to the above-mentioned problems in the prior art, a kind of serial ports analogy method and the technology of computer equipment are now provided
Scheme, it is intended to pass through universal input/output (General Purpose Input Output, GPIO) of software-controlled processor
The mode of interface pin carrys out simulative serial port communication, effectively solves the more situation of external communications equipment in the case of not upgrading hardware
The problem of lower serial ports is not enough, saves cost.
Above-mentioned technical proposal specifically includes：
A kind of serial ports analogy method, wherein, the mould by way of the pin that microprocessor controls universal input/output interface
Intend serial ports；
In the serial ports analogy method, specifically wrapped for the data transfer mode of a byte to be transmitted in data to be transmitted
Include：
Universal input/the output interface under original state is set to high level by step S1, the microprocessor；
Step S2, after waiting a default trigger condition to reach, the microprocessor produces rising for the byte to be transmitted
Beginning position, and the universal input/output interface is set to low level；
Step S3, after waiting the trigger condition to reach, the microprocessor obtains first of the byte to be transmitted
Data；
Step S4, the microprocessor judged the numerical value of a data of acquisition, and according to the judgement knot of numerical value
Fruit sets the level state of the universal input/output interface corresponding to the data bit of the byte to be transmitted；
Step S5, the trigger condition is waited to judge whether to complete the data transfer of the byte to be transmitted after reaching：
If it is not, then the microprocessor takes out the next bit data of the byte to be transmitted, and return to the step S4；
Step S6, the microprocessor calculate the number of " 1 " or " 0 " that occurs in the byte to be transmitted, and root respectively
The level state of the universal input/output interface of check bit corresponding to the byte to be transmitted is set according to result of calculation；
Step S7, after waiting the trigger condition to reach, the microprocessor sets the stop position of the byte to be transmitted,
To complete the transmission of the byte to be transmitted；
The micro processor loop performs the step S1-S7, with to each word to be transmitted in data to be transmitted
Section is transmitted, so as to simulate the serial communication process of data to be transmitted.
Preferably, the serial ports analogy method, wherein, in the step S4：
If the numerical value of a data obtained is " 1 ", the universal input/output interface is set to by the microprocessor
Low level；
If the numerical value of a data obtained is " 0 ", the universal input/output interface is set to by the microprocessor
High level.
Preferably, the serial ports analogy method, wherein, the check bit is entered using odd mode to the byte to be transmitted
Row verification；
Then in the step S6：
If the number of " 1 " that occurs in the byte to be transmitted is even number, the check bit is " 1 ", described general defeated
Enter/output interface is set to high level；
If the number of " 1 " that occurs in the byte to be transmitted is odd number, the check bit is " 0 ", described general defeated
Enter/output interface is set to low level.
Preferably, the serial ports analogy method, wherein, the check bit is entered using even parity check mode to the byte to be transmitted
Row verification；
Then in the step S6：
If the number of " 1 " that occurs in the byte to be transmitted is even number, the check bit is " 0 ", described general defeated
Enter/output interface is set to low level；
If the number of " 1 " that occurs in the byte to be transmitted is odd number, the check bit is " 1 ", described general defeated
Enter/output interface is set to high level.
Preferably, the serial ports analogy method, wherein, in the step S7, in the stop position, the microprocessor will
Universal input/the output interface is set to high level.
Preferably, the serial ports analogy method, wherein, the default trigger condition is the system clock by predetermined number
Beat.
Preferably, the serial ports analogy method, wherein, the predetermined number is 7488.
Preferably, the serial ports analogy method, wherein, the microprocessor produces an interrupt signal every preset period of time；
Then the default trigger condition is the acquisition interrupt signal.
Preferably, the serial ports analogy method, wherein, the preset period of time is 104 microseconds.
A kind of computer equipment, including a microprocessor；Wherein, realize that above-mentioned serial ports is simulated using the microprocessor
Method.
The beneficial effect of above-mentioned technical proposal is：There is provided a kind of serial ports analogy method, it is intended to pass through software-controlled processor
GPIO interface pin mode come simulative serial port communication, in the case of not upgrading hardware effectively solve external communications equipment compared with
The problem of serial ports is not enough in the case of more, saves cost.
Brief description of the drawings
Fig. 1 is the overall procedure schematic diagram of a kind of serial port communication method in the preferred embodiment of the present invention；
Fig. 2 is the schematic diagram of data transmission format in serial port communicating protocol in the preferred embodiment of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation describes, it is clear that described embodiment is only part of the embodiment of the present invention, rather than whole embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art obtained on the premise of creative work is not made it is all its
His embodiment, belongs to the scope of protection of the invention.
It should be noted that in the case where not conflicting, the feature in embodiment and embodiment in the present invention can phase
Mutually combination.
The invention will be further described with specific embodiment below in conjunction with the accompanying drawings, but not as limiting to the invention.
According to the above-mentioned problems in the prior art, a kind of serial ports analogy method is now provided, in this method, mainly pass through
The mode simulative serial port of the pin of microprocessor control GPIO interface, in the serial ports analogy method, description is for be transmitted first
The data transfer mode of a byte to be transmitted in data, its it is specific as shown in figure 1, including：
GPIO interface under original state is set to high level by step S1, microprocessor；
Step S2, after waiting a default trigger condition to reach, microprocessor produces the start bit of byte to be transmitted, and will
GPIO interface is set to low level；
Step S3, after waiting trigger condition to reach, microprocessor obtains a data of byte to be transmitted；
Step S4, microprocessor are judged the numerical value of a data of acquisition, and are set according to the judged result of numerical value
Put the level state of the GPIO interface corresponding to the data bit of byte to be transmitted；
Step S5, trigger condition is waited to judge whether to complete the data transfer of byte to be transmitted after reaching：
If it is not, then microprocessor takes out the next bit data of byte to be transmitted, and return to step S4；
Step S6, microprocessor calculates the number of " 1 " or " 0 " that occurs in byte to be transmitted respectively, and is tied according to calculating
Fruit sets the level state of universal input/output interface of the check bit corresponding to byte to be transmitted；
Step S7, after waiting trigger condition to reach, microprocessor sets the stop position of byte to be transmitted, to be transmitted to complete
The transmission of byte；
Micro processor loop performs step S1-S7, to be transmitted to each byte to be transmitted in data to be transmitted, from
And simulate the serial communication process of data to be transmitted.
Specifically, in the present embodiment, a general trigger condition is preset first, and the trigger condition is related to serial ports simulation
The different analog forms of method.
After trigger condition is preset, the data transfer mode of one of them byte to be transmitted of data to be transmitted is realized
In, the original state level of GPIO interface is set to height first, then produces the start bit of the byte to be transmitted, while will
GPIO interface level is set to low level.
After waiting above-mentioned default trigger condition to reach, first of data in byte to be transmitted is obtained, and sentence
The numerical value (being also equal to " 1 " equal to " 0 ") of disconnected present bit data, and according to the level of the current GPIO interface of judged result setting
State.
Wait again after next trigger condition reaches, byte is moved to right one and takes out position data waiting for transmission (i.e.
Obtain the next bit of data in byte to be transmitted), and return to above-mentioned steps S4, that is, judge its numerical value and set according to judged result
The level state of current GPIO interface is put, the rear steering step S6 of the data transfer until completing whole byte to be transmitted.
In step S6, calculated after the data transfer of byte to be transmitted is completed " 1 " that occurs in the byte to be transmitted or
The number of " 0 ", and the level state according to result of calculation setting corresponding to the GPIO interface of the check bit of byte to be transmitted.Again
Wait next trigger condition that the stop position of byte to be transmitted is set after reaching, just complete the transmission of the byte to be transmitted.
In the prior art, typical serial ports is used for the transmission of ASCII character character, mainly includes several big groups in its data structure
Into part：
Data bit：This is the parameter for weighing actual data bits in communication.It is actual when microprocessor sends a data frame
Data will not always 8, the numerical value of standard is probably 5,7 or 8.And the digit of data bit is dependent on serial communication
The selection of agreement and the transmission digit of corresponding real data.
Stop position：Last position of single bag is represented, typical numerical value is probably 1,1.5 or 2.Due to data be
Timing on transmission line, and each equipment has the system clock of their own, it is therefore more likely that being set what Liang Tai communicated with one another
There is slight nonsynchronous situation between standby.Then stop position is used not only for representing that transmitting you terminates, moreover it is possible to is supplied to micro- place
Manage the synchronous chance of device correction clock.More suitable for the digit of stop position, the synchronous tolerance of different clocks is higher, but number
Also can be slower according to the speed of transmission.
Check bit：As a kind of simple error detection means in serial communication, do not set in some data transmission formats certainly
It is also feasible to put check bit.Error detection means in check bit generally include even parity check, odd, high verification and low verification etc..
Even-odd check can be checked for data, and the only simply verification of set logic height or logic low of height bit check.
Then in above-mentioned serial communication analogy method, simulate to form byte to be transmitted and start by the way of in step S2 first
The start bit of transmission, then using simulating to form data bit when byte to be transmitted is transmitted by the way of in step S4-S5, then
The check bit to be formed in byte to be transmitted is simulated by the way of in step S6, finally simulates to be formed by the way of in step S7
Stop position in byte to be transmitted, so as to simulate the data transmission format to be formed during serial communication, to support word to be transmitted
Section serial port communicating protocol corresponding to carries out data transmission.
In the preferred embodiment of the present invention, in above-mentioned steps S4：
If the numerical value of a data obtained is " 1 ", universal input/output interface is set to low level by microprocessor；
If the numerical value of a data obtained is " 0 ", universal input/output interface is set to high level by microprocessor.
In aforesaid way, the GPIO interface level state according to corresponding to the numerical value of each data is set respectively, so as to complete
GPIO interface level into data bit is set.Certainly, can be equally " 1 " in a data in other embodiment of the invention
When GPIO interface is set to high level, GPIO interface is set to low level when a data is " 0 ", will not be repeated here.
In the preferred embodiment of the present invention, check bit is verified using odd mode to byte to be transmitted；
Then in step S6：
If the number of " 1 " that occurs in byte to be transmitted is even number, check bit is " 1 ", universal input/output interface quilt
It is set to high level；
If the number of " 1 " that occurs in byte to be transmitted is odd number, check bit is " 0 ", universal input/output interface quilt
It is set to low level.
Or
Check bit is verified using even parity check mode to byte to be transmitted；
Then in step S6：
If the number of " 1 " that occurs in byte to be transmitted is even number, check bit is " 0 ", universal input/output interface quilt
It is set to low level；
If the number of " 1 " that occurs in byte to be transmitted is odd number, check bit is " 1 ", universal input/output interface quilt
It is set to high level.
There is more implementation method in above-mentioned parity check system, will not be repeated here in the prior art.
In the preferred embodiment of the present invention, in above-mentioned steps S7, in stop position, microprocessor is by universal input/defeated
Outgoing interface is set to high level.
In the preferred embodiment of the present invention, mould is carried out to serial communication by the way of the delay of processor beat
Intend.Under this analog form, microprocessor is run with common speed such as 9600BPS, then the transmission time of a data
For 1000ms/9600=104 μ s, the transmission delay of each data is 0.104ms.Then when the dominant frequency of microprocessor is 72M,
Wait delay between each data transfer should be 72000000/ (1/104 μ s)=7488 system clock beats.Change speech
It, under this analog form, above-mentioned default trigger condition is the system clock beat by predetermined number, specifically can be with
To pass through 7488 system clock beats.Or the system clock beat of above-mentioned predetermined number can be according to the operation of microprocessor
Speed and dominant frequency frequency are determined.
Then in this embodiment, byte to be transmitted in data to be transmitted is directed in above-mentioned serial communication analogy method
Transmission means is specially：
First, microprocessor sets the original state level of GPIO interface to be set to height, then produces start bit, GPIO is connect
Mouth level is set to low.
After n system clock beat (such as 7488 system clock beats) is kept, microprocessor obtains word to be transmitted
A data in section, and judge the numerical value of present bit data, it is high level that GPIO interface is then set equal to " 0 ", is equal to
It is low level that " 1 ", which then sets GPIO interface, to realize that the GPIO interface level of data bit is set.
Continue after keeping n system clock beat, byte is moved to right one by microprocessor, takes out the next of transmission byte
Position data, and repeat GPIO interface level corresponding to above-mentioned data bit and set, until all data of the byte to be transmitted
Equal end of transmission.
Subsequent microprocessor calculates the number of " 1 " or " 0 " that occurs in byte to be transmitted, and electricity corresponding to setting
It is flat, with the GPIO interface level state corresponding to the check bit of byte to be transmitted.
Finally, after n system clock beat is kept, microprocessor sets stop position, to complete whole byte to be transmitted
Serial communication transmission.
In another preferred embodiment of the present invention, mould is carried out to serial communication by the way of processor counter
Intend.Specifically, due to easily being disturbed by the way of the delay of processor beat come simulative serial port communication by software, applying
Communication speed in the case of more complicated easily produces error, thus can transfer by the way of processor counter come pair
Serial communication is simulated, and can preferably ensure the precision of communication in the case where application is complex.
The difference of this analog form and a kind of upper analog form essentially consists in the stage of initiating communications.As completion GPIO
, it is necessary to detect the trailing edge of GPIO interface level after the setting of interface original state, timing is opened after initial signal is detected
Device, after the timing for reaching 104 μ s, microprocessor can produce an interrupt signal, the process of simulative serial port by interrupt mode come
Complete the transmission of data.In other words, under this analog form, microprocessor produces an interrupt signal every preset period of time,
Then above-mentioned default trigger condition is acquisition interrupt signal.
Then in this embodiment, byte to be transmitted in data to be transmitted is directed in above-mentioned serial communication analogy method
Transmission means is specially：
First, microprocessor sets the original state level of GPIO interface to be set to height, then produces start bit, GPIO is connect
Mouth level is set to low.
After waiting an interrupt signal, microprocessor obtains a data in byte to be transmitted, and judges current
The numerical value of position data, it is high level that GPIO interface is then set equal to " 0 ", and it is low level that GPIO interface is then set equal to " 1 ", with reality
The GPIO interface level of existing data bit is set.
After continuing waiting for an interrupt signal, byte is moved to right one by microprocessor, takes out next digit of transmission byte
According to, and repeat GPIO interface level corresponding to above-mentioned data bit and set, until all data of the byte to be transmitted pass
It is totally lost complete.
Then, microprocessor calculates the number of " 1 " or " 0 " that occurs in byte to be transmitted, and electricity corresponding to setting
It is flat, with the GPIO interface level state corresponding to the check bit of byte to be transmitted.
Finally, after an interrupt signal is waited, microprocessor sets stop position, to complete the string of whole byte to be transmitted
Mouth communication transfer.
In the preferred embodiment of the present invention, come with the process that a specific byte to be transmitted carries out Serial Port Transmission
Above-mentioned serial ports analogy method is described.
As shown in Figure 2, after data transfer starts, start bit is sent first.When start bit must keep a transmission
Between logic level 0, with identify a byte to be transmitted transmission start.This time started can be used for simultaneously recipient and
Sender enters row clock and synchronously used, and now GPIO interface level is set to low.
Data bit is arranged on after start bit, is the valid data information in a frame data, the ASCII character of standard is 0-
127 (7), the ASCII character after extension is 0-255 (8), typically uses mode of extension when literary in the transmission, is first passed during transmission
Low level, it is rear to pass high-order (i.e. LSB transmission modes).Therefore, the number of significant digit of data bit can voluntarily be arranged by communication two party, typically
It is arranged to 5,7 or 8.In fig. 2, data bit occupies 7, i.e., between start bit and check bit
1010001, the level state of GPIO interface is correspondingly set.
Check bit typically occupies one, for odd or even parity check.The algorithm of wherein odd is：Work as real data
In the number of " 1 " when being even number, check bit is " 1 ", and when the number of " 1 " in real data is odd number, check bit is " 0 ".It is even
The algorithm of verification is：When the number of " 1 " in real data is even number, check bit is " 0 ", when the number of " 1 " in real data
For odd number when, check bit is " 1 ".Above-mentioned teaching and research method is added during data transfer, when recipient receives data
Can finds mistake that may be present in transmitting procedure by calculating 1 number, while checking algorithm is very simple, can keep away
Exempt from the transmission delay that algorithm complicated band is come.The verification mode used in Fig. 2 is odd mode, the number of " 1 " in real data
For odd number, therefore check bit is 0, at the same GPIO level be set to it is low.
Stop position equally occupies one, for representing the end of a frame data.Stop position is 1, while GPIO interface level
It is set to height.
After one frame data are transmitted, if also follow-up data need to transmit, institute can be steps be repeated alternatively until
There is data transfer completion.
In the preferred embodiment of the present invention, a kind of computer equipment is also provided, the computer equipment includes a micro- place
Manage device, the microprocessor using the above serial ports analogy method come the serial communication process of analogue data, so as to
Solve the problems, such as external equipment it is more in the case of serial ports it is not enough.
Preferred embodiments of the present invention are the foregoing is only, not thereby limit embodiments of the present invention and protection model
Enclose, to those skilled in the art, should can appreciate that all with made by description of the invention and diagramatic content
Scheme obtained by equivalent substitution and obvious change, should be included in protection scope of the present invention.
Claims (10)
1. a kind of serial ports analogy method, it is characterised in that the side of the pin of universal input/output interface is controlled by microprocessor
Formula simulative serial port；
In the serial ports analogy method, specifically included for the data transfer mode of a byte to be transmitted in data to be transmitted：
Universal input/the output interface under original state is set to high level by step S1, the microprocessor；
Step S2, after waiting a default trigger condition to reach, the microprocessor produces the start bit of the byte to be transmitted,
And universal input/the output interface is set to low level；
Step S3, after waiting the trigger condition to reach, the microprocessor obtains a data of the byte to be transmitted；
Step S4, the microprocessor are judged the numerical value of a data of acquisition, and are set according to the judged result of numerical value
Put the level state of the universal input/output interface corresponding to the data bit of the byte to be transmitted；
Step S5, the trigger condition is waited to judge whether to complete the data transfer of the byte to be transmitted after reaching：
If it is not, then the microprocessor takes out the next bit data of the byte to be transmitted, and return to the step S4；
Step S6, the microprocessor calculate the number of " 1 " or " 0 " that occurs in the byte to be transmitted respectively, and according to meter
Calculate the level state that result sets the universal input/output interface for the check bit for corresponding to the byte to be transmitted；
Step S7, after waiting the trigger condition to reach, the microprocessor sets the stop position of the byte to be transmitted, with complete
Into the transmission of the byte to be transmitted；
The micro processor loop performs the step S1-S7, with to each word to be transmitted in the data to be transmitted
Section is transmitted, so as to simulate the serial communication process of the data to be transmitted.
2. serial ports analogy method as claimed in claim 1, it is characterised in that in the step S4：
If the numerical value of a data obtained is " 1 ", the universal input/output interface is set to low electricity by the microprocessor
It is flat；
If the numerical value of a data obtained is " 0 ", the universal input/output interface is set to high electricity by the microprocessor
It is flat.
3. serial ports analogy method as claimed in claim 1, it is characterised in that the check bit is using odd mode to described
Byte to be transmitted is verified；
Then in the step S6：
If the number of " 1 " that occurs in the byte to be transmitted is even number, the check bit is " 1 ", the universal input/defeated
Outgoing interface is set to high level；
If the number of " 1 " that occurs in the byte to be transmitted is odd number, the check bit is " 0 ", the universal input/defeated
Outgoing interface is set to low level.
4. serial ports analogy method as claimed in claim 1, it is characterised in that the check bit is using even parity check mode to described
Byte to be transmitted is verified；
Then in the step S6：
If the number of " 1 " that occurs in the byte to be transmitted is even number, the check bit is " 0 ", the universal input/defeated
Outgoing interface is set to low level；
If the number of " 1 " that occurs in the byte to be transmitted is odd number, the check bit is " 1 ", the universal input/defeated
Outgoing interface is set to high level.
5. serial ports analogy method as claimed in claim 1, it is characterised in that in the step S7, in the stop position, institute
State microprocessor and the universal input/output interface is set to high level.
6. serial ports analogy method as claimed in claim 1, it is characterised in that the default trigger condition is by default
Several system clock beats.
7. serial ports analogy method as claimed in claim 6, it is characterised in that the predetermined number is 7488.
8. serial ports analogy method as claimed in claim 1, it is characterised in that the microprocessor produces one every preset period of time
Individual interrupt signal；
Then the default trigger condition is the acquisition interrupt signal.
9. serial ports analogy method as claimed in claim 8, it is characterised in that the preset period of time is 104 microseconds.
10. a kind of computer equipment, including a microprocessor；Characterized in that, realize that right such as will using the microprocessor
Seek the serial ports analogy method described in 1-9.
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| CN108701112A (en) * | 2017-11-29 | 2018-10-23 | 深圳和而泰智能控制股份有限公司 | A kind of method and apparatus based on the communication of inquiry mode simulative serial port |
| CN109856485A (en) * | 2019-02-27 | 2019-06-07 | 四川爱联科技有限公司 | Low-power consumption bracelet device, bracelet debugging system and adjustment method |
| CN110879791A (en) * | 2019-09-30 | 2020-03-13 | 湖南格兰博智能科技有限责任公司 | Non-blocking two-wire serial port communication simulation method |
| CN111611186A (en) * | 2020-05-26 | 2020-09-01 | 大唐微电子技术有限公司 | Transmission control method and device in embedded chip |
| CN113806259A (en) * | 2021-08-23 | 2021-12-17 | 珠海拓芯科技有限公司 | Method and device for simulating special communication port and microcontroller |
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