CN107340500A - A kind of Radar Signal Processing platform dynamic power consumption control method and system - Google Patents
A kind of Radar Signal Processing platform dynamic power consumption control method and system Download PDFInfo
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- CN107340500A CN107340500A CN201710525280.1A CN201710525280A CN107340500A CN 107340500 A CN107340500 A CN 107340500A CN 201710525280 A CN201710525280 A CN 201710525280A CN 107340500 A CN107340500 A CN 107340500A
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- dsp
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0428—Safety, monitoring
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/24—Pc safety
- G05B2219/24215—Scada supervisory control and data acquisition
Abstract
The invention provides a kind of Radar Signal Processing platform dynamic power consumption control method and system,It is related to Radar Signal Processing Technology field,The system includes monitoring the DSP array voltages in real time,The monitoring modular of the information such as clock frequency,Information according to monitoring carries out power switch frequency,Magnitude of voltage and the control module of clock frequency adjustment and the configuration module of execution control module instruction,Methods described includes the operating temperature according to DSP arrays,Power consumption,Situations such as storing addressing space and resource occupation is to power switch frequency,The adjustment process of operating voltage and clock frequency,Pass through this method and system,DSP is set to always work at the most ratio of greater inequality state of performance and power consumption,It can not only be adjusted for different application backgrounds,Also can be according to occupation condition come regulating system working platform state in the different phase of same application,With very high flexibility and real-time.
Description
Technical field
The present invention relates to Radar Signal Processing Technology field, and in particular to the power consumption control side of Radar Signal Processing platform
Method.
Background technology
Radar Signal Processing platform is mainly combined by some block signals processing board and formed, and Signal transacting board analysis is mostly FPGA
The isomery SOC platform of+multi-disc multi-core DSP, as Radar Signal Processing demand is constantly lifted, to data bandwidth, data processing energy
The requirement of power and data processing speed also more and more higher.Although signal transacting parallel system has higher peak value efficiency,
The absolute power consumption of system is still very high, and too high power consumption can greatly be challenged to the chip package in system, power supply and heat-radiation belt,
Therefore, power consumption is not only the important goal of system optimization, is increasingly becoming one of the important restrictions condition of decision systems design.Letter
Number processing board power consumption can quickly increase, the high power consumption that more speed DSP is brought with the lifting of DSP performance and speed
Negative effect exceed its benefit for being brought in aspect of performance, therefore DSP power consumptions increasingly become DSP developer's concern
Major issue.
In the prior art, single supply voltage and clock frequency typically are provided to DSP arrays, and DSP arrays are working
Period, power consumption are continually changing, there is provided single power supply power supply and clock frequency can have the following disadvantages：
If the maximum speed that can be worked according to DSP to DSP provides single supply voltage and clock frequency, occur
Power consumption peaks are excessive, the situation of chip overheating, and the negative effect that high power consumption is brought exceedes the benefit that its performance is brought；
If power consumption peaks when being worked according to the DSP of estimation to DSP provide single supply voltage and clock frequency,
Its maximum speed that can currently work can not be played when DSP power consumptions are not up to peak value, extends the time for performing the task-set.
The content of the invention
In order to solve the above problems, the invention provides a kind of Radar Signal Processing platform dynamic power consumption control method and it is
System, its core concept is that dynamically the clock to each DSP, power supply etc. are adjusted under the configuration of software by power managed module
It is whole, it is intended to meet the advantage that signal transacting parallel processing is excavated under given system power consumption constraint, optimize system execution performance.
Accurate power consumption control not only contributes to improve system availability, and can avoid producing too high power consumption.The present invention proposes
Power consumption control method can be on the premise of no more than power constraints threshold values, according to hardware detecting module to Signal transacting board analysis
The feedback of interior each resource (such as temperature of DSP works at present, supply voltage and clock frequency) service condition, according to initial configuration
Power consumption strategies, judge whether DSP is in optimum Working, adjust each module working condition of on-chip system, and pass through dynamic
Regulation and control supply voltage and clock frequency carry out dynamic control power consumption, DSP is always worked at the most ratio of greater inequality state of performance and power consumption, most
Power constraints are approached to big degree, the granularity of DSP power manageds are significantly improved, so as to optimize system platform parallel processing efficiency.
Present invention firstly provides a kind of Radar Signal Processing platform dynamic power consumption control method, mainly include：
Step 1: obtain the operating temperature of DSP arrays in the Radar Signal Processing platform, operating voltage, clock frequency,
Store access information and resource occupation information；
Step 2: judging whether the DSP arrays operating temperature exceedes temperature upper limit threshold values, the DSP arrays are judged
Store whether addressing space or resource occupation exceed the 80% of maximum, if the DSP arrays exceed temperature upper limit threshold values or
The storage addressing space or resource occupation of the DSP arrays exceed the 80% of its maximum, then improve power switch frequency and drop
Low clock frequency, until the DSP arrays operating temperature is less than temperature upper limit threshold values and the storage addressing space of the DSP arrays
Or resource occupation is less than the 80% of maximum；
Step 3: the DSP array power consumptions are judged whether in setting range, if DSP array power consumptions are higher than in power consumption
Threshold values is limited, then improves power switch frequency, reduce operating voltage and reduce clock frequency, if DSP array power consumptions are less than power consumption
Lower limit threshold values, then power switch frequency is reduced, improve operating voltage and improves clock frequency, until the DSP array power consumptions
In setting range.
Preferably, the temperature upper limit threshold values is selected from 50 DEG C~60 DEG C.
Preferably, the DSP array power consumptions are selected from the 65%~75% of power consumption maximum higher than power consumption upper limit threshold values.
Preferably, the DSP array power consumptions are selected from the 25%~35% of power consumption maximum less than power consumption lower limit threshold values.
Another aspect of the present invention provides a kind of Radar Signal Processing platform dynamic power consumption control system, including：
DSP arrays, it is one of resource of the Radar Signal Processing platform；
Monitoring modular, monitor in real time the DSP arrays operating temperature, operating voltage, clock frequency, storage access information and
Resource occupation information, and send it to control module；
Control module, according to the monitoring module monitors to information provide power switch frequency, magnitude of voltage and clock frequency
Rate adjust instruction；
Configuration module, the adjust instruction of the control module is performed, power switch frequency, voltage to the DSP arrays
Value and clock frequency are adjusted.
The present invention handles temperature, supply voltage and the clock frequency of DSP work in board by real-time monitoring signals, judges
Whether DSP temperature and power consumption be too high, and whether DSP is operated in the most ratio of greater inequality state of performance and power consumption, passes through dynamic control DSP electricity
Source voltage and the configuration parameter of clock frequency carry out the dynamic power consumption for controlling DSP, DSP is always worked at performance and power consumption most
Ratio of greater inequality state, it so will not both make DSP power consumption is too high to influence its performance, again will not be in order to control power consumption DSP is not played
Its maximum performance advantage.This dynamic power consumption control method can be automatically performed and system put down independently of concrete application by hardware
The adjustment of platform working condition, it can not only be adjusted for different application backgrounds, also may be used in the different phase of same application
According to occupation condition come regulating system working platform state, there is very high flexibility and real-time.
Brief description of the drawings
Fig. 1 is the system architecture frame of a preferred embodiment of Radar Signal Processing platform dynamic power consumption control system of the present invention
Figure.
Fig. 2 is the control flow of a preferred embodiment of Radar Signal Processing platform dynamic power consumption control method of the present invention
Figure.
Specific embodiment
To make the purpose, technical scheme and advantage that the present invention is implemented clearer, below in conjunction with the embodiment of the present invention
Accompanying drawing, the technical scheme in the embodiment of the present invention is further described in more detail.In the accompanying drawings, identical from beginning to end or class
As label represent same or similar element or the element with same or like function.Described embodiment is the present invention
Part of the embodiment, rather than whole embodiments.The embodiments described below with reference to the accompanying drawings are exemplary, it is intended to uses
It is of the invention in explaining, and be not considered as limiting the invention.Based on the embodiment in the present invention, ordinary skill people
The every other embodiment that member is obtained under the premise of creative work is not made, belongs to the scope of protection of the invention.Under
Embodiments of the invention are described in detail with reference to accompanying drawing for face.
Fig. 1 is the system architecture frame of a preferred embodiment of Radar Signal Processing platform dynamic power consumption control system of the present invention
Figure, the system include：
Monitoring modular, for monitoring the operating temperature, operating voltage and clock frequency of DSP arrays；
The information such as power supply, clock control module, the temperature monitored for basis, voltage, clock is to supply voltage, clock
Frequency carries out dynamic control, assigns rise voltage and clock to configuration module, or reduce the control information of voltage and clock.
Power supply, clock configuration module, (the preferable CDCE62005 using TI can configure power clock and be realized) are used for
The control information assigned according to control module configures to supply voltage and clock frequency, and by the voltage and clock after adjustment
Export and give DSP arrays, complete the dynamic control to DSP array power consumptions.
In the present embodiment, above-mentioned monitoring modular and control module logic realization in programmable gate array FPGA at the scene,
FPGA models：Match SEL XC7K410T-2FFG900I；
Clock configuration module model：Texas Instrument CDCE62005
Power configuration module model：LINEAR LTM4630、LTM4644.
In the present embodiment, power supply, clock configuration module include two units, a PMU, when another is
Clock converter unit.The major function of PMU is to control the electric power thus supplied of each power module, and it is by a limited shape
State machine and a counter composition, state machine ensure sequential relationship during each power module up/down electricity, supervised according to monitoring modular
The DSP temperature that measures, storage access, the loading condition of resource occupation, dynamically adjust the switching frequency of each power module, ensure
Each power module is operated in suitable working condition；Clock converter unit is the configuration parameter for changing clock chip PLL, is changed
PLL output frequency (clock chip can configure power clock using TI CDCE62005), so as to complete to DSP array power consumptions
Dynamic control.
Fig. 2 gives Radar Signal Processing platform dynamic power consumption control method of the present invention, mainly includes：
S1, obtain the operating temperature of DSP arrays, operating voltage, clock frequency, storage in the Radar Signal Processing platform
Access information and resource occupation information；
S2, judge whether the DSP arrays operating temperature exceedes temperature upper limit threshold values, if the DSP arrays exceed temperature
Upper limit threshold values, then go to step S3, otherwise goes to step S4；
S3, power switch frequency is improved, while reduce clock frequency；
S4, judge that the DSP array power consumptions whether in setting range, that is, judge whether DSP array power consumptions are normal, if
Power consumption is higher than upper limit threshold values, then goes to step S501, and power consumption is less than lower limit threshold values, goes to step S503, in the case of normal power consumption
Go to step S502；
S501, power switch frequency is improved, reduce operating voltage and reduces clock frequency；
S502, maintain current power, clock status；
S503, power switch frequency is reduced, improve operating voltage and improves clock frequency.
Whether S6, the storage addressing space for judging the DSP arrays or resource occupation exceed the 80% of maximum, if described
DSP arrays exceed temperature upper limit threshold values or the storage addressing space or resource occupation of the DSP arrays exceed its maximum
80%, then go to step S7；
S7, improve power switch frequency and reduce clock frequency.
It should be noted that step S2 and step S6 is in juxtaposition, no time order and function order, step S3, step
Adjustment in S501, step S503 and step S7 to power switch frequency, clock, operating voltage is to meet temperature, power consumption, deposit
For the purpose of the requirement for storing up addressing space and resource occupation, for example, in step S7, until the DSP arrays operating temperature is less than temperature
The storage addressing space or resource occupation for spending upper limit threshold values and the DSP arrays are less than the 80% of maximum, for another example, if DSP battle arrays
Row power consumption is less than power consumption lower limit threshold values, then reduces power switch frequency, improves operating voltage and improve clock frequency, until institute
DSP array power consumptions are stated to be in setting range.
It is understood that the DSP array power consumptions can be reduced by reducing clock frequency, so that the DSP battle arrays
Row operating temperature reduces, meanwhile, reducing clock frequency reduces transmission bandwidth, so that the storage addressing space of the DSP arrays
Or resource occupation reduces, until meeting storage addressing space and resource occupation requirement.
In the present embodiment, DSP array power consumptions are provided by the operating voltage and clock frequency of DSP arrays, by reducing work
Voltage and reduce clock frequency and reduce power consumption, meanwhile, power switch frequency is improved to improve power supply power supply capacity.
In the present invention, the temperature upper limit threshold values is selected from 50 DEG C~60 DEG C.Such as chosen in the present embodiment in step S2
55 DEG C of temperature upper limit threshold values.
In the present invention, the DSP array power consumptions are selected from the 65%~75% of power consumption maximum higher than power consumption upper limit threshold values.
Such as in the present embodiment when DSP array power consumptions are selected from the 70% of power consumption maximum higher than power consumption upper limit threshold values, improve power supply and open
Frequency is closed, reduce operating voltage and reduces clock frequency.
In the present invention, the DSP array power consumptions are selected from the 45%~55% of power consumption maximum less than power consumption lower limit threshold values.
Such as in the present embodiment when DSP array power consumptions are selected from the 50% of power consumption maximum less than power consumption lower limit threshold values, reduce power supply
Switching frequency, improve operating voltage and improve clock frequency.
It is understood that power consumption lower limit threshold values is selected from into the 45%~55% of power consumption maximum, DSP can be made always
The most ratio of greater inequality state of performance and power consumption is operated in, power constraints is farthest approached, significantly improves the grain of DSP power manageds
Degree, so as to optimize system platform parallel processing efficiency.It is such as relatively low to efficacy requirements in other alternate embodiments, Ke Yishi
When reduction lower limit threshold values.
It is last it is to be noted that：The above embodiments are merely illustrative of the technical solutions of the present invention, rather than its limitations.To the greatest extent
The present invention is described in detail with reference to the foregoing embodiments for pipe, it will be understood by those within the art that：It is still
Technical scheme described in foregoing embodiments can be modified, or which part technical characteristic is equally replaced
Change；And these modifications or replacement, the essence of appropriate technical solution is departed from the essence of various embodiments of the present invention technical scheme
God and scope.
Claims (5)
- A kind of 1. Radar Signal Processing platform dynamic power consumption control method, it is characterised in that including：Step 1: obtain the operating temperature of DSP arrays, operating voltage, clock frequency, storage in the Radar Signal Processing platform Access information and resource occupation information；Step 2: judging whether the DSP arrays operating temperature exceedes temperature upper limit threshold values, the storage of the DSP arrays is judged Whether addressing space or resource occupation exceed the 80% of maximum, if the DSP arrays exceed temperature upper limit threshold values or described The storage addressing space or resource occupation of DSP arrays exceed the 80% of its maximum, then when improving power switch frequency and reducing Clock frequency, until the DSP arrays operating temperature is less than temperature upper limit threshold values and the storage addressing space or money of the DSP arrays Source takes 80% less than maximum；Step 3: the DSP array power consumptions are judged whether in setting range, if DSP array power consumptions are higher than power consumption upper limit valve Value, then power switch frequency is improved, operating voltage is reduced and reduces clock frequency, if DSP array power consumptions are less than power consumption lower limit Threshold values, then power switch frequency is reduced, improve operating voltage and improves clock frequency, until the DSP array power consumptions are in In setting range.
- 2. Radar Signal Processing platform dynamic power consumption control method as claimed in claim 1, it is characterised in that in the temperature Limit threshold values is selected from 50 DEG C~60 DEG C.
- 3. Radar Signal Processing platform dynamic power consumption control method as claimed in claim 1, it is characterised in that the DSP battle arrays Row power consumption is selected from the 65%~75% of power consumption maximum higher than power consumption upper limit threshold values.
- 4. Radar Signal Processing platform dynamic power consumption control method as claimed in claim 1, it is characterised in that the DSP battle arrays Row power consumption is selected from the 45%~55% of power consumption maximum less than power consumption lower limit threshold values.
- A kind of 5. Radar Signal Processing platform dynamic power consumption control system, it is characterised in that including：DSP arrays, it is one of resource of the Radar Signal Processing platform；Monitoring modular, the DSP arrays operating temperature, operating voltage, clock frequency, storage access information and resource are monitored in real time Occupied information, and send it to control module；Control module, according to the monitoring module monitors to information provide power switch frequency, magnitude of voltage and clock frequency are adjusted Whole instruction；Configuration module, perform the adjust instruction of the control module, to the power switch frequency of the DSP arrays, magnitude of voltage and Clock frequency is adjusted.
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| CN109254549A (en) * | 2018-08-31 | 2019-01-22 | 上海集成电路研发中心有限公司 | A kind of FPGA network and its working method |
| CN110068801A (en) * | 2019-04-16 | 2019-07-30 | 武汉大学 | A kind of HF digital receiver based on FPGA |
| CN112015259A (en) * | 2019-05-29 | 2020-12-01 | 芯原微电子(上海)股份有限公司 | Method and system for controlling peak power consumption |
| CN112083752A (en) * | 2020-09-03 | 2020-12-15 | 索尔思光电（成都）有限公司 | Optical transceiving system, module and method based on self-adaptive voltage regulation |
| CN112100120A (en) * | 2020-09-14 | 2020-12-18 | 上海艾为电子技术股份有限公司 | SOC chip and power-on control method thereof |
| CN112130658A (en) * | 2020-09-29 | 2020-12-25 | 华东计算技术研究所（中国电子科技集团公司第三十二研究所） | Program-controlled intelligent power supply and clock control method and system |
| WO2021109534A1 (en) * | 2019-12-03 | 2021-06-10 | 深圳开立生物医疗科技股份有限公司 | Clock configuration method and system for controller, and ultrasonic equipment |
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| JP7335839B2 (en) | 2020-02-28 | 2023-08-30 | 古河電気工業株式会社 | Radar device and method of operation of the radar device |
| CN117215394A (en) * | 2023-11-07 | 2023-12-12 | 北京数渡信息科技有限公司 | On-chip temperature and energy consumption control device for multi-core processor |
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| WO2021109534A1 (en) * | 2019-12-03 | 2021-06-10 | 深圳开立生物医疗科技股份有限公司 | Clock configuration method and system for controller, and ultrasonic equipment |
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| CN112083752A (en) * | 2020-09-03 | 2020-12-15 | 索尔思光电（成都）有限公司 | Optical transceiving system, module and method based on self-adaptive voltage regulation |
| CN112100120A (en) * | 2020-09-14 | 2020-12-18 | 上海艾为电子技术股份有限公司 | SOC chip and power-on control method thereof |
| CN112130658A (en) * | 2020-09-29 | 2020-12-25 | 华东计算技术研究所（中国电子科技集团公司第三十二研究所） | Program-controlled intelligent power supply and clock control method and system |
| CN114721908A (en) * | 2022-04-11 | 2022-07-08 | 摩尔线程智能科技(北京)有限责任公司 | On-chip power consumption control circuit, chip and power consumption control method |
| CN114721908B (en) * | 2022-04-11 | 2022-12-06 | 摩尔线程智能科技(北京)有限责任公司 | On-chip power consumption control circuit, chip and power consumption control method |
| CN117215394A (en) * | 2023-11-07 | 2023-12-12 | 北京数渡信息科技有限公司 | On-chip temperature and energy consumption control device for multi-core processor |
| CN117215394B (en) * | 2023-11-07 | 2024-01-23 | 北京数渡信息科技有限公司 | On-chip temperature and energy consumption control device for multi-core processor |
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Application publication date: 20171110 |