CN107330106B - Data filtering method and device based on FPGA - Google Patents
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Abstract
The invention discloses a data filtering method and a device based on FPGA, the method comprises: receiving a specified amount of original data, numbering according to the relative position relationship among the original data, and filtering the original data through a filtering algorithm to obtain filtered data; determining the relative position relationship between the filtered data according to the serial numbers corresponding to the filtered data; and creating an output array, and writing the filter data into the output array according to the relative position relation between the filter data. Therefore, the method avoids the situation that the corresponding relation between each filtering data and the storage unit cannot be determined after the filtering data is obtained, ensures that the whole sequence of the filtering data conforms to the relative position in the original data, simultaneously ensures that the data cannot be covered or lost when the filtering data is written into the output array, and improves the safety and the usability of the data. In addition, the invention also provides a data filtering device based on the FPGA, and the beneficial effects are as described above.
Description
Technical Field
The invention relates to the field of FPGA development, in particular to a data filtering method and device based on an FPGA.
Background
With the development of big data, deep learning related to the big data becomes the current trend, and the deep learning often needs to use a filtering algorithm to filter the big data to obtain qualified data. In order to accelerate the development of deep learning, the deep learning can be realized through an FPGA (field programmable gate array), and the FPGA processes data in a hardware circuit execution mode, so that the execution speed is higher than that of a traditional CPU, and the data processing efficiency can be improved by using the FPGA.
When the filtering algorithm is executed, the data which does not meet the requirement needs to be abandoned, and the data which meets the requirement needs to be written into the storage units of the array according to the sequence of the relative positions before filtering.
However, because the FPGA employs an asynchronous computing mechanism, when the FPGA executes a filtering algorithm, it is often impossible to know whether the rest of the parallel filtered data passes through filtering because of parallel processing of multiple data, and therefore it is impossible to determine that each filtered data should be written into a specific storage unit of the array according to the relative position of the data before filtering, and further, it may be caused that output data is written into the same storage unit of the array at the same time, and the data is lost or an error occurs due to being overwritten, thereby reducing the security and the availability of the data.
Therefore, it is an urgent problem to be solved by those skilled in the art to provide a data filtering method based on an FPGA to improve the security and availability of data when data filtering is performed under the FPGA.
Disclosure of Invention
The invention aims to provide a data filtering method and device based on an FPGA (field programmable gate array), which improve the safety and the usability of data.
In order to solve the technical problem, the invention provides a data filtering method based on an FPGA, which comprises the following steps:
receiving a specified amount of original data, numbering according to the relative position relationship among the original data, and filtering the original data through a filtering algorithm to obtain filtered data;
determining the relative position relationship between the filtered data according to the serial numbers corresponding to the filtered data;
and creating an output array, and writing the filter data into the output array according to the relative position relation between the filter data.
Preferably, after determining the relative position relationship between the filtered data according to the corresponding numbers of the filtered data, the method further includes:
recording the quantity of the filtered data;
then correspondingly, the number of memory cells in the output array is the same as the number of filter data.
Preferably, before determining the relative positional relationship between the filtered data according to the corresponding numbers of the filtered data, the method further comprises:
creating a two-dimensional array;
correspondingly, the relative position relation between the filtering data is recorded through the first dimension of the two-dimensional array, and the quantity of the filtering data is recorded through the second dimension of the two-dimensional array.
Preferably, receiving the specified amount of raw data specifically includes:
a specified amount of raw data incoming by the DDR cache is received.
Preferably, the raw data is embodied as raw data of the floating-point number type.
Preferably, the predetermined number is specifically 8.
In addition, the invention also provides a data filtering device based on the FPGA, which comprises:
the filtering module is used for receiving a specified amount of original data, numbering the original data according to the relative position relationship among the original data, and filtering the original data through a filtering algorithm to obtain filtered data;
the relative position recording module is used for determining the relative position relationship among the filtering data according to the serial numbers corresponding to the filtering data;
and the output module is used for creating an output array and writing the filtered data into the output array according to the relative position relation between the filtered data.
Preferably, the apparatus further comprises:
the quantity recording module is used for recording the quantity of the filtering data;
then correspondingly, the number of memory cells in the output array is the same as the number of filter data.
Preferably, the apparatus further comprises:
the two-dimensional array creating module is used for creating a two-dimensional array;
correspondingly, the relative position relation between the filtering data is recorded through the first dimension of the two-dimensional array, and the quantity of the filtering data is recorded through the second dimension of the two-dimensional array.
Preferably, the raw data is embodied as raw data of the floating-point number type.
According to the data filtering method based on the FPGA, the original data are numbered, and the relative position of each target original data in all the original data is determined. And after the original data are subjected to parallel execution of a filtering algorithm to obtain filtered data, determining the relative position between the filtered data according to the serial number of the original data corresponding to the filtered data. In the method, the relative position between the filtered data is determined according to the serial number of the original data corresponding to the filtered data, which is equivalent to determining the relative position in a data queue when each filtered data is used as the original data, and the position of all the filtered data is determined integrally, so that the position relation between each filtered data and other filtered data is not changed compared with the original data when each filtered data is output. Therefore, the method avoids the problem that the corresponding relation between each filtering data and the storage unit cannot be determined after the filtering data is obtained, and a plurality of filtering data are stored in the same storage unit, and ensures that the overall sequence of the filtering data conforms to the relative position in the original data. In addition, the coverage or loss among the data can not occur when the filtering data is written into the output array, and the safety and the usability of the data are improved. In addition, the invention also provides a data filtering device based on the FPGA, which corresponds to the method and has the beneficial effects as described above.
Drawings
In order to illustrate the embodiments of the present invention more clearly, the drawings that are needed in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings can be obtained by those skilled in the art without inventive effort.
Fig. 1 is a flowchart of a data filtering method based on an FPGA according to an embodiment of the present invention;
FIG. 2 is a flow chart of another FPGA-based data filtering method according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of filtered data recorded in a two-dimensional array;
fig. 4 is a structural diagram of a data filtering apparatus based on an FPGA according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments of the present invention without any creative work belong to the protection scope of the present invention.
The core of the invention is to provide a data filtering method and device based on FPGA, which improves the safety and usability of data when data is filtered under FPGA.
In order that those skilled in the art will better understand the disclosure, the invention will be described in further detail with reference to the accompanying drawings and specific embodiments.
Example one
Fig. 1 is a flowchart of a data filtering method based on an FPGA according to an embodiment of the present invention. Referring to fig. 1, the specific steps of the FPGA-based data filtering method include:
step S10: and receiving a specified amount of original data, numbering according to the relative position relationship among the original data, and filtering the original data through a filtering algorithm to obtain filtered data.
It can be understood that the purpose of filtering the raw data is to remove the data that is not qualified in the raw data, the other filtered data should maintain the same relative position relationship with the data before filtering, and the numbering of the position of the raw data is the basis for determining the relative position subsequently. It should be noted that the numbering may preferably be done by using sequential numbers or letters, because the numbers and letters are arranged in sequence, so that the sequence between the numbered original data can be reflected more directly.
Step S11: and determining the relative position relationship between the filtered data according to the number corresponding to the filtered data.
In the step, the position relation among the filtered data can be determined through the serial numbers of the positions of the filtered data in the original data. Each filtering data corresponds to the number of the original data, and although the filtering results in that the filtering data only corresponds to part of the numbers, the numbers can still represent the position relationship, so that the position relationship among the filtering data can still be determined according to the numbers
Step S12: and creating an output array, and writing the filter data into the output array according to the relative position relation between the filter data.
It is understood that after the data is filtered, the data meeting the requirement is written into the memory cells of the array according to the relative position sequence before the filtering. Thus, an output array is created as a data container for output, and the filtered data is output in the previously determined output order for subsequent use by the user.
According to the data filtering method based on the FPGA, the original data are numbered, and the relative position of each target original data in all the original data is determined. And after the original data are subjected to parallel execution of a filtering algorithm to obtain filtered data, determining the relative position between the filtered data according to the serial number of the original data corresponding to the filtered data. In the method, the relative position between the filtered data is determined according to the serial number of the original data corresponding to the filtered data, which is equivalent to determining the relative position in a data queue when each filtered data is used as the original data, and the position of all the filtered data is determined integrally, so that the position relation between each filtered data and other filtered data is not changed compared with the original data when each filtered data is output. Therefore, the method avoids the problem that the corresponding relation between each filtering data and the storage unit cannot be determined after the filtering data is obtained, and a plurality of filtering data are stored in the same storage unit, and ensures that the overall sequence of the filtering data conforms to the relative position in the original data. In addition, the coverage or loss among the data can not occur when the filtering data is written into the output array, and the safety and the usability of the data are improved.
Example two
Fig. 2 is a flowchart of another FPGA-based data filtering method according to an embodiment of the present invention. Steps S10-S12 in FIG. 2 are the same as those in FIG. 1, and are not repeated herein.
As shown in fig. 2, as a preferred embodiment, after determining the relative position relationship between the filtered data according to the corresponding numbers of the filtered data, the method further includes:
step S20: the amount of filtered data is recorded.
Then correspondingly, the number of memory cells in the output array is the same as the number of filter data.
It is understood that the amount of the recorded filtered data is, on one hand, for the purpose of statistical data filtering, and is used as a reference for subsequent data usage or processing. On the other hand, the number of the storage units of the output array, namely the size of the output array, is determined according to the number of the filtering data, so that the extra resource overhead brought to the system by creating redundant storage lists can be correspondingly reduced while all the filtering data have the storage units in the output array.
As shown in fig. 2, as a preferred embodiment, before determining the relative positional relationship between the filtered data according to the corresponding numbers of the filtered data, the method further includes:
step S21: a two-dimensional array is created.
Correspondingly, the relative position relation between the filtering data is recorded through the first dimension of the two-dimensional array, and the quantity of the filtering data is recorded through the second dimension of the two-dimensional array.
In this step, the two-dimensional array is equivalent to a container for caching, and the filtering data obtained by the distributed execution filtering algorithm is integrated in the two-dimensional array. After the filtering data is obtained, the filtering data is recorded in the first dimension at a position corresponding to the number according to the number of each filtering data. In addition, since the order of acquiring the filter data is uncertain, the number of the filter data when the filter data is acquired is recorded in the second dimension of the two-dimensional array, and is used for performing subsequent operations such as counting the number of the filter data. Therefore, the two-dimensional array is adopted to record the filtering data, so that the data can be conveniently and integrally and accurately written into the output array. The execution order of this step and step S10 is not fixed, and it is needless to say that the steps may be executed simultaneously, and the present invention is not limited thereto.
To facilitate an understanding of the above steps, please refer to fig. 3. As shown in fig. 3, a schematic diagram of filtered data recorded in a two-dimensional array is shown. In the figure, the first dimension (horizontal axis) in the two-dimensional array corresponds to 8 original data numbered 1-8 which are subjected to filtering processing, and it can be understood that the data numbered 2, 6 and 8 are removed after the filtering processing, and the rest of the filtered data are still arranged in the two-dimensional array according to the position relation of the original data. The second dimension (vertical axis) in the two-dimensional array corresponds to the number of the filtered data, and it is understood that five data remain after the filtering process is completed, so that each point in the two-dimensional array corresponds to the 1 st to 5 th data, and each point represents the filtered data. Therefore, the position of the filter data written into the output array can be accurately determined according to the record of the two-dimensional array.
In addition, as a preferred embodiment, receiving a predetermined amount of raw data is specifically:
a specified amount of raw data incoming by the DDR cache is received.
Because the DDR can perform two read/write operations in one clock cycle, when the FPGA acquires data from the DDR, the execution speed of the DDR is higher, the efficiency is higher, and the overhead in time is saved.
Furthermore, as a preferred embodiment, the raw data is embodied as raw data of the floating-point number type.
It is understood that the filtering is to remove data beyond the specified range, and in practical cases, the specified range is very small, so that the raw data to be filtered are generally distributed in the specified range or close to the specified range, and thus the difference between the raw data is small. The floating point type can more accurately represent the value of the original data, so that the method can be suitable for more accurate filtering processing in actual situations.
In a preferred embodiment, the predetermined number is specifically 8.
The amount of raw data processed at a time may depend on the specific performance of the current FPGA, and 8 are specified to be compatible with the prevailing FPGA performance. It is to be understood that the specified number is not strictly required, and in other embodiments, other numbers may be used.
EXAMPLE III
In the foregoing, the embodiment of the data filtering method based on the FPGA is described in detail, and the present invention further provides a data filtering apparatus based on the FPGA, because the embodiment of the apparatus portion and the embodiment of the method portion correspond to each other, for the embodiment of the apparatus portion, reference is made to the description of the embodiment of the method portion, and details are not repeated here.
Fig. 4 is a structural diagram of a data filtering apparatus based on an FPGA according to an embodiment of the present invention. The embodiment of the invention provides a data filtering device based on an FPGA, which comprises:
the filtering module 10 is configured to receive a predetermined amount of raw data, number the raw data according to a relative position relationship between the raw data, and filter the raw data through a filtering algorithm to obtain filtered data.
And the relative position recording module 11 is configured to determine a relative position relationship between the filter data according to the number corresponding to the filter data.
And the output module 12 is used for creating an output array and writing the filtered data into the output array according to the relative position relationship among the filtered data.
According to the FPGA-based data filtering device provided by the invention, the relative position of each target original data in all original data is determined by numbering the original data. And after the original data are subjected to parallel execution of a filtering algorithm to obtain filtered data, determining the relative position between the filtered data according to the serial number of the original data corresponding to the filtered data. In the device, the relative position between the filtered data is determined according to the number of the original data corresponding to the filtered data, which is equivalent to determining the relative position in the data queue when each filtered data is taken as the original data, and the position of all the filtered data is determined integrally, so that the position relation between each filtered data and other filtered data is not changed compared with the original data when each filtered data is output. Therefore, the device avoids the problem that the corresponding relation between each piece of filtering data and the storage unit cannot be determined after the filtering data is obtained, and a plurality of pieces of filtering data are stored in the same storage unit, and ensures that the whole sequence of the filtering data accords with the relative position in the original data. In addition, the coverage or loss among the data can not occur when the filtering data is written into the output array, and the safety and the usability of the data are improved.
On the basis of the third embodiment, the apparatus further comprises:
the quantity recording module is used for recording the quantity of the filtering data;
then correspondingly, the number of memory cells in the output array is the same as the number of filter data.
On the basis of the third embodiment, the apparatus further comprises:
the two-dimensional array creating module is used for creating a two-dimensional array;
correspondingly, the relative position relation between the filtering data is recorded through the first dimension of the two-dimensional array, and the quantity of the filtering data is recorded through the second dimension of the two-dimensional array.
On the basis of the third embodiment, as a preferred implementation, the raw data is specifically raw data of a floating point number type.
The data filtering method and device based on the FPGA provided by the present invention are described in detail above. The embodiments are described in a progressive manner in the specification, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description. It should be noted that, for those skilled in the art, it is possible to make various improvements and modifications to the present invention without departing from the principle of the present invention, and those improvements and modifications also fall within the scope of the claims of the present invention.
It is further noted that, in the present specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
Claims (6)
1. A data filtering method based on FPGA is characterized by comprising the following steps:
receiving a specified amount of original data, numbering according to the relative position relationship among the original data, and filtering the original data through a filtering algorithm to obtain filtered data;
determining a relative position relationship between the filtering data according to the serial numbers corresponding to the filtering data;
creating an output array, and writing the filtered data into the output array according to the relative position relationship between the filtered data;
after determining the relative position relationship between the filtered data according to the number corresponding to the filtered data, the method further includes:
recording the quantity of the filtering data;
correspondingly, the number of the storage units in the output array is the same as that of the filtering data;
before determining the relative position relationship between the filtering data according to the number corresponding to the filtering data, the method further comprises:
creating a two-dimensional array;
correspondingly, recording the relative position relation between the filtering data through the first dimension of the two-dimensional array, and recording the quantity of the filtering data through the second dimension of the two-dimensional array.
2. The method according to claim 1, wherein the receiving a specified amount of raw data is specifically:
a specified amount of raw data incoming by the DDR cache is received.
3. Method according to claim 1, characterized in that said raw data is in particular raw data of the floating-point number type.
4. Method according to claim 1, characterized in that the defined number is in particular 8.
5. An FPGA-based data filtering device, comprising:
the filtering module is used for receiving a specified amount of original data, numbering the original data according to the relative position relationship between the original data, and filtering the original data through a filtering algorithm to obtain filtered data;
the relative position recording module is used for determining the relative position relationship among the filtering data according to the serial numbers corresponding to the filtering data;
the output module is used for creating an output array and writing the filtered data into the output array according to the relative position relation among the filtered data;
the apparatus further comprises:
the quantity recording module is used for recording the quantity of the filtering data;
correspondingly, the number of the storage units in the output array is the same as that of the filtering data;
the apparatus further comprises:
the two-dimensional array creating module is used for creating a two-dimensional array;
correspondingly, recording the relative position relation between the filtering data through the first dimension of the two-dimensional array, and recording the quantity of the filtering data through the second dimension of the two-dimensional array.
6. The apparatus of claim 5, wherein the raw data is embodied as raw data of a floating point number type.
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