CN107305592B - Numerical simulation method applied to electromagnetic transient analysis of switch circuit - Google Patents

Numerical simulation method applied to electromagnetic transient analysis of switch circuit Download PDF

Info

Publication number
CN107305592B
CN107305592B CN201610245120.7A CN201610245120A CN107305592B CN 107305592 B CN107305592 B CN 107305592B CN 201610245120 A CN201610245120 A CN 201610245120A CN 107305592 B CN107305592 B CN 107305592B
Authority
CN
China
Prior art keywords
time
matrix
equation
node
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201610245120.7A
Other languages
Chinese (zh)
Other versions
CN107305592A (en
Inventor
纪锋
高冲
魏晓光
肖彩霞
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
State Grid Corp of China SGCC
Global Energy Interconnection Research Institute
State Grid Beijing Electric Power Co Ltd
Original Assignee
State Grid Corp of China SGCC
Global Energy Interconnection Research Institute
State Grid Beijing Electric Power Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by State Grid Corp of China SGCC, Global Energy Interconnection Research Institute, State Grid Beijing Electric Power Co Ltd filed Critical State Grid Corp of China SGCC
Priority to CN201610245120.7A priority Critical patent/CN107305592B/en
Publication of CN107305592A publication Critical patent/CN107305592A/en
Application granted granted Critical
Publication of CN107305592B publication Critical patent/CN107305592B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/20Design optimisation, verification or simulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)

Abstract

The invention relates to a numerical simulation method applied to electromagnetic transient analysis of a switching circuit, which comprises the following steps: writing a system state equation of the circuit in a column, and converting the system state equation into a state equation in a first order form through variable substitution; modifying a system state equation of the circuit at the moment of switching action; performing iterative solution on the first-order state equation by using a direct integration method; reinitializing the potential of the circuit node at the moment of switching action; eliminating numerical oscillation by using minimum step length backward Euler operation at the switching time of the switch state; and (4) proving the equivalence of the switching action time. The technical scheme provided by the invention can eliminate the numerical value oscillation at the switching moment, and has the characteristics of good numerical value stability and high numerical value precision (second-order precision).

Description

Numerical simulation method applied to electromagnetic transient analysis of switch circuit
Technical Field
The invention relates to a numerical simulation method, in particular to a numerical simulation method applied to electromagnetic transient analysis of a switching circuit.
Background
Electromagnetic transient analysis is an important component of power system simulation and is a necessary tool for understanding transient complex behaviors of a power system. Most of the currently used electromagnetic transient simulation software adopts a node voltage method as a bottom-layer algorithm. The node voltage method is characterized in that a numerical integration method is adopted to differentiate a characteristic equation of a dynamic element in the system to obtain an equivalent Noton equivalent circuit in the form that an equivalent calculated conductance is connected with a historical current source in parallel, a node conductance matrix of the whole circuit system is further obtained, and the instantaneous value of each node voltage in the system is obtained through solving. When a switching circuit is analyzed by using a node analysis method, there is a major problem that strong numerical oscillation occurs at the time of switching operation. Although each node analysis software adopts a certain numerical technique to eliminate oscillation, the numerical oscillation eliminating techniques are often first-order linear interpolation techniques, which may cause a decrease in numerical accuracy. It is still required to use a very small step size to ensure sufficient calculation accuracy.
Disclosure of Invention
The invention aims to provide a numerical simulation method applied to electromagnetic transient analysis of a switching circuit, which does not generate numerical oscillation at the moment of switching action and has the characteristics of good numerical stability and high numerical precision (second-order precision).
The purpose of the invention is realized by adopting the following technical scheme:
the invention provides a numerical simulation method applied to electromagnetic transient analysis of a switching circuit, which is improved in that the method comprises the following steps:
(1) writing a system state equation of the circuit in a column, and converting the system state equation into a state equation in a first order form through variable substitution;
(2) modifying a system state equation of the circuit at the moment of switching action;
(3) performing iterative solution on the first-order state equation by using a direct integration method;
(4) reinitializing the potential of the circuit node at the moment of switching action;
(5) eliminating numerical oscillation by using minimum step length backward Euler operation at the switching time of the switch state;
(6) and (4) proving the equivalence of the switching action time.
Further, in the step (1), the system state equation expression of the circuit is as follows:
Figure BDA0000969183070000021
wherein:
Figure BDA0000969183070000022
is a column vector of order n, each element value representing the potential of the corresponding node; kCIs a capacitance coefficient matrix; kRIs a resistivity matrix; kLIs an inductance matrix; i is an input vector in the circuit and represents a power supply in the circuit; the three coefficient matrixes are square matrixes of n rows and n columns, and all the three coefficient matrixes meet the requirements of positive nature, symmetry and sparsity;
through variable substitution, the system state equation (r) is transformed into a first order state equation as follows:
Figure BDA0000969183070000023
wherein:
Figure BDA0000969183070000024
K1、K2all represent a coefficient matrix; x is a state variable; e is the unit diagonal matrix.
Further, in the step (2), if the ideal switch connected between the two nodes is operated at the switching operation time, the ideal switch is operated at the switching operation time tdResistance coefficient matrix K in modified equationR(ii) a And modifying the system state equation of the circuit by using an expression (R), wherein the expression (R) is as follows:
Figure BDA0000969183070000025
where Turn On indicates that the ideal switch is at tdOpening at any moment; turn Off indicates that the ideal switch is at tdDisconnection at any moment; except for Kr(i,i)=Rs -1,Kr(i,j)=-Rs -1,Kr(j,i)=-Rs -1And Kr(j,j)=Rs -1Other than, KrAll other elements in the material are zero, 0V ideal electricityInternal resistance of voltage source RsTends to zero; kR,+Is a matrix of resistivity before switching action, KR,-Is a resistance coefficient matrix after switching action; krIs an N-th order matrix, Kr(i, i) represents the element in the ith row and ith column in the matrix; kr(i, j) represents the element in the ith row and jth column of the matrix; kr(j, i) represents the element in the jth row and ith column in the matrix; kr(j, j) represents the element in the jth row and jth column in the matrix;
Figure BDA0000969183070000026
further, in the step (3), for the first-order dynamic equation of the standard form, iterative solution is performed by using a direct integration method, and an iterative format of the direct integration method is represented by the following formula (c):
Figure BDA0000969183070000027
wherein: Δ t is the time step between the nth time instant and the time instant n + 1; beta is an optional coefficient, when the value of beta is 0, the method is called a forward difference method, the stability is stable, and the numerical precision is first-order precision; when the value of beta is 0.5, the method is called a Crank-Nicolson method, the stability is unconditionally stable, and the numerical precision is second-order precision; when the value of beta is 1, the method is called a posterior difference method, the stability is unconditionally stable, and the numerical precision is first-order precision; x is the number ofnRepresents the system state variable at the nth step, namely, the time t is n delta t; x is the number ofn+1Represents the system state variable at the n +1 th step, i.e. at the time t ═ n +1) Δ t; rnAnd Rn+1The system input vectors of the nth step, i.e., time t ═ n Δ t and the nth +1 th step, i.e., time t ═ n +1) Δ t, are represented, respectively.
Further, the step (4) includes:
at the time t of switching actiondThe capacitor is equivalent to a voltage source, the inductor is equivalent to a current source, and the current source is based on td-Capacitance voltage and inductance current calculation t at timed+Potential distribution at a time; t is td-Represents tdBefore the momentAt a certain time, and td-td-Tends to zero; t is td+Represents tdA certain time after the time, and td+-tdTends to zero;
if the capacitance and inductance dynamic elements in the circuit are treated equivalently, only a resistance branch and a current source branch exist in the circuit to obtain a static circuit equation, and the equation in the equation (c) is solved
Figure BDA0000969183070000031
Completing the initialization of the circuit after the switching action;
Figure BDA0000969183070000032
wherein:
Figure BDA0000969183070000033
represents td+A node potential at a time; k is a coefficient matrix; i is an input vector in the circuit and represents a power supply in the circuit; the coefficient matrix K contains information K of resistance branches and voltage source resistance branchesR,d+Internal resistance information K of equivalent voltage source of sum capacitorRC
K=KR,d++KRCWherein
Figure BDA0000969183070000034
For a certain branch circuit which is connected between the node I and the node j and has the capacitance C, the coefficient matrix KrcIncluding its equivalent to an ideal voltage source, with respect to its internal resistance RsBranch information that tends to zero; matrix KrcMiddle removing Krc(i,i)=Rs -1,Krc(i,j)=-Rs -1,Krc(j,i)=-Rs -1,Krc(j,j)=Rs -1Except that, other elements are zero; krcIs an n-th order matrix, Krc(i, i) represents a matrix KrcRow i and column i; krc(i, j) represents momentMatrix KrcRow i and column j; krc(j, i) represents a matrix KrcThe element in the jth row and ith column; krc(j, j) represents a matrix KrcRow j and column j;
Figure BDA0000969183070000035
vector I includes all current sources in the original circuit and the Nonton equivalent current source information I of the ideal voltage sourceS,d+Besides, the current source also comprises information I of an inductance equivalent current sourceL,d-And information I of the equivalent ideal voltage source of the capacitorSC,d-As shown in formula xi:
I=IS,d++IL,d-+ISC,d-
wherein:
Figure BDA0000969183070000041
for a certain branch circuit which is connected between the node I and the node j and has inductance L, IlIncluding information of its equivalent current source; except that Il,d-(i)=IL,d-And Il,d-(j)=-IL,d-Outer, Il,d-All other elements in (A) are zero; meanwhile, for a certain branch which is connected between the node I and the node j and has the capacitance of C, IscIncluding its equivalent norton current source information; i issc,d-In, except for Isc,d-(i)=ISC,d-and Isc,d-(j)=-ISC,d-In addition, the other elements are all zero, wherein ISC,d-Represents td-The current value of the time capacitor equivalent Norton current source;
substituting the formula (c) and the formula (b) into the formula (c), and arranging the formula (c) into a format of the formula (c):
Figure BDA0000969183070000042
wherein:
Figure BDA0000969183070000043
represents td+The potential of each node at a time; kR,d+Represents td+A resistance coefficient matrix which constantly contains information of the resistance branch and the voltage source internal resistance branch; i isS,d+Represents td+Current source information vectors at time; i isSC,d-Represents td-Time capacitance equivalent Norton current source information vector; l _ relative represents the inductance-related term; c _ relative represents a capacitive element-related term.
Further, the step (5) includes:
at the time t of switching actiondUsing a backward euler operation:
if at the moment t of switching actiondAt a very small time step Δ t0Applying a backward Euler operation to the system state equation (r), where at0=td+-td-Using td-State quantity x of timed-To find td+State quantity x of timed+The calculation expression is as follows:
Figure BDA0000969183070000044
wherein the content of the first and second substances,
Figure BDA0000969183070000045
Ψ is a time integral quantity of voltage at each node, defined as
Figure BDA0000969183070000046
And
Figure BDA0000969183070000047
Rd+an input vector matrix representing the time after the switching action; k2,d+Is a coefficient matrix; further expand formula (R) to
Figure BDA00009691830700000413
And formula
Figure BDA00009691830700000414
Figure BDA0000969183070000048
Figure BDA0000969183070000049
Taking into account Δ t0Tends to 0, formula
Figure BDA00009691830700000410
Become formula
Figure BDA00009691830700000411
The integral quantity of the node potential along with the time is not changed before and after the switching action;
Figure BDA00009691830700000412
wherein: Ψd+And Ψd-Respectively representing the voltage time integral quantity of each node after the switching action and the voltage time integral quantity of each node before the switching action;
general formula
Figure BDA0000969183070000051
Substituted type
Figure BDA0000969183070000052
And arranged into
Figure BDA0000969183070000053
In the form of:
Figure BDA0000969183070000054
if formula
Figure BDA0000969183070000055
And formula ninthly is equivalent, stating: at the time t of switching actiondAnd one node potential reinitialization operation based on the classical theory is completed by one small-step backward Euler operation.
Further, the step (6) comprises the steps of:
<1> proof of equivalence of inductance-related terms:
for inductive branches, there are
Figure BDA0000969183070000056
The following holds true:
Figure BDA0000969183070000057
or written in a matrix format, e.g. formula
Figure BDA0000969183070000058
Shown in the figure:
Figure BDA0000969183070000059
continuing to expand to
Figure BDA00009691830700000510
Formula (II):
Figure BDA0000969183070000061
because each inductance branch has a formula
Figure BDA0000969183070000062
An inductance related term in the formula (ninx)
Figure BDA0000969183070000063
And formula
Figure BDA0000969183070000064
Inductance related term in
Figure BDA0000969183070000065
Are equivalent; i isl,d-Represents td-The current value on the inductance branch at the moment; l is-1To represent
Figure BDA0000969183070000066
L is the inductance value of the inductance branch; Ψd-(i) And Ψd-(j) Represents td-Voltage time integral quantity of the node i and the node j at the moment;
<2> proof of equivalence of capacitance-related terms:
considering the Nonton equivalent current source of the capacitance branch, the capacitance related term in the formula ninu is developed into the formula
Figure BDA0000969183070000067
And formula
Figure BDA0000969183070000068
Figure BDA0000969183070000069
Figure BDA00009691830700000610
General formula
Figure BDA00009691830700000611
The capacitance related term in
Figure BDA00009691830700000612
Writing each capacitor branch into an expansion format as shown in the formula
Figure BDA00009691830700000613
And
Figure BDA00009691830700000614
shown in the figure:
Figure BDA0000969183070000071
Figure BDA0000969183070000072
general formula
Figure BDA0000969183070000073
The capacitance related term in
Figure BDA0000969183070000074
Writing each capacitor branch into an expansion format as shown in the formula
Figure BDA0000969183070000075
And
Figure BDA0000969183070000076
shown in the figure:
Figure BDA0000969183070000077
Figure BDA0000969183070000078
due to the fact that
Figure BDA0000969183070000079
Represents td-The voltage value on the capacitor at the moment, while taking into account RSAnd Δ t0The fact that all tend to zero, the capacitance related term in the formula ninthly
Figure BDA00009691830700000710
And formula
Figure BDA00009691830700000711
The capacitance related term in
Figure BDA00009691830700000712
Equivalence; u shapec,d-Represents td-At the moment, the voltage value on the capacitor branch circuit;
Figure BDA00009691830700000713
and
Figure BDA00009691830700000714
respectively representing potential values of the node i and the node j;
the switching operation uses a minimum step length backward Euler operation at the moment, and is equivalent to the operation of reinitializing the node potential according to the capacitor voltage and the inductance current in the circuit.
Compared with the closest prior art, the technical scheme provided by the invention has the following excellent effects:
because the current direction on the inductance element is always positive, when the output current of the current source passes through zero, the change rate of the inductance current jumps from negative to positive once, thereby causing the voltage at two ends of the inductance
Figure BDA00009691830700000715
A transition occurs every 10ms (as in fig. 4). For nodal analysis using the trapezoidal integration algorithm, numerical oscillations of the inductor voltage will inevitably occur. The PSCAD software uses an interpolation technique to eliminate numerical oscillation, and the interpolation technique is a linear interpolation technique with only first-order precision, which loses the numerical precision of calculation. In other words, although PSCAD uses a second-order precision trapezoidal method to construct equations for discrete dynamic elements, its interpolation technique at the time of switching operation reduces numerical precision to the first order. Therefore, if it is desired to maintain good numerical accuracy when the PSCAD software simulates the switching circuit, a smaller time step needs to be selected.
In the state equation method, because the post-difference operation with extremely small step length is used for carrying out reinitialization operation on the node potential at the moment of switching action, the second-order numerical accuracy can still be kept when the trapezoidal method is reused in a linear section. Therefore, compared with a node analysis method for establishing an equation based on a trapezoidal integral method, the method has the advantage of high numerical precision.
Drawings
FIG. 1 is an equivalent circuit diagram of a capacitor at the moment of switching operation provided by the present invention;
FIG. 2 is an equivalent circuit diagram of the inductor at the moment of switching operation provided by the present invention;
FIG. 3 is a circuit diagram of a bridge current source with a power frequency of 50Hz provided by the present invention;
fig. 4 is a schematic diagram showing a comparison between a simulation result of the PSCAD software provided by the present invention and a simulation result of the method of the present invention.
Detailed Description
The following describes embodiments of the present invention in further detail with reference to the accompanying drawings.
The following description and the drawings sufficiently illustrate specific embodiments of the invention to enable those skilled in the art to practice them. Other embodiments may incorporate structural, logical, electrical, process, and other changes. The examples merely typify possible variations. Individual components and functions are optional unless explicitly required, and the sequence of operations may vary. Portions and features of some embodiments may be included in or substituted for those of others. The scope of embodiments of the invention encompasses the full ambit of the claims, as well as all available equivalents of the claims. Embodiments of the invention may be referred to herein, individually or collectively, by the term "invention" merely for convenience and without intending to voluntarily limit the scope of this application to any single invention or inventive concept if more than one is in fact disclosed.
The invention relates to a numerical simulation method applied to electromagnetic transient analysis of a switching circuit, which comprises the following steps:
(1) writing a system state equation of the circuit in a column, and converting the system state equation into a state equation in a first order form through variable substitution;
the system state equation expression of a general linear circuit (a circuit having n +1 nodes, in which node 0 is defined as a reference ground node, and composed of basic elements such as a resistor, a capacitor, an inductor, and a power supply) is as follows:
Figure BDA0000969183070000081
wherein:
Figure BDA0000969183070000082
is a column vector of order n, each element value representing the potential of the corresponding node; kCIs a capacitance coefficient matrix; kRIs a resistivity matrix; kLIs an inductance matrix; i is an input vector in the circuit and represents a power supply in the circuit; the three coefficient matrixes are square matrixes of n rows and n columns, and all the three coefficient matrixes meet the requirements of positive nature, symmetry and sparsity;
through variable substitution, the system state equation (r) is transformed into a first order state equation as follows:
Figure BDA0000969183070000091
wherein:
Figure BDA0000969183070000092
K1、K2all represent a coefficient matrix; x is a state variable; e is the unit diagonal matrix.
(2) Modifying a system state equation of the circuit at the moment of switching action;
method for rapidly modifying the matrix of state equation coefficients at the moment of a switching action when an ideal switching element in a circuit network is actuated (switched on or switched off):
if an ideal switch connected between two nodes is operated at the time of switching operation, the ideal switch is operated at the time of switching operation t0Resistance coefficient matrix K in modified equationR(ii) a And modifying the system state equation of the circuit by using an expression (R), wherein the expression (R) is as follows:
Figure BDA0000969183070000093
where Turn On indicates that the ideal switch is at tdOpening at any moment; turn Off indicates that the ideal switch is at tdDisconnection at any moment; except for Kr(i,i)=Rs -1,Kr(i,j)=-Rs -1,Kr(j,i)=-Rs -1And Kr(j,j)=Rs -1Other than, KrThe other elements in the voltage source are zero, and the internal resistance R of the 0V ideal voltage sourcesTends to zero; kR,+Is a matrix of resistivity before switching action, KR,-Is a resistance coefficient matrix after switching action; krIs an N-th order matrix, Kr(i, i) represents the element in the ith row and ith column in the matrix; kr(i, j) represents the element in the ith row and jth column of the matrix; kr(j, i) represents the element in the jth row and ith column in the matrix; kr(j, j) represents the element in the jth row and jth column in the matrix;
Figure BDA0000969183070000094
(3) performing iterative solution on the first-order state equation by using a direct integration method;
for the first-order dynamic equation of the standard form II, iterative solution is carried out by using a direct integration method, and the iterative format of the direct integration method is represented by the formula V:
Figure BDA0000969183070000095
wherein: Δ t is the time step between the nth time instant and the time instant n + 1;xnrepresents the system state variable at the nth step, namely, the time t is n delta t; x is the number ofn+1Represents the system state variable at the n +1 th step, i.e. at the time t ═ n +1) Δ t; rnAnd Rn+1The system input vectors of the nth step, namely, the time t ═ n Δ t and the n +1 th step, namely, the time t ═ n +1) Δ t are respectively represented; β is an alternative coefficient, and when β takes different values, the associated names are as described in table 1 below:
TABLE 1 selection and numerical stability of beta
Figure BDA0000969183070000101
Among them, the trapezoidal method has a numerical accuracy of the second order and is unconditionally stable, and therefore is widely used in linear problem analysis. However, in the switching circuit analysis, the trapezoidal method generates strong numerical oscillation at the time of switching operation.
(4) Reinitializing the potential of the circuit node at the moment of switching action;
when the switching action causes the circuit topology to be at tdWhen the time is changed, the node potential in the time is possibly at tdJump occurs before and after the moment (as in fig. 3, the potential of the node No. 3 jumps at the moment when the diode is turned on or off), and when the trapezoidal method is used for calculation, numerical oscillation of the potential of the relevant node is caused. This requires reinitializing the potentials of the nodes of the circuit at the switching time.
According to the circuit theory, before and after the switching action, the capacitor branch has the characteristic of keeping the potential difference of two ends unchanged, and the inductor branch has the characteristic of keeping the current of the branch unchanged. Thus can be at tdAt the moment, the capacitance is equivalent to a voltage source (as shown in FIG. 1), the inductance is equivalent to a current source (as shown in FIG. 2), and the t is the basisd-Capacitance voltage and inductance current calculation t at timed+The potential distribution at the moment. At the time t of switching actiondThe capacitor is equivalent to a voltage source, the inductor is equivalent to a current source, and the current source is based on td-Potential distribution at a time; t is td-Represents tdA certain time before the time, and td-td-Tends to zero; t is td+Represents tdA certain time after the time, and td+-tdTends to zero;
if all the dynamic elements such as capacitance, inductance and the like in the circuit are subjected to equivalent processing, only a resistance branch and a current source branch exist in the circuit, and a static circuit equation is obtained. To solve the formula
Figure BDA0000969183070000102
The initialization of the circuit after the switching action can be completed.
Figure BDA0000969183070000103
Wherein:
Figure BDA0000969183070000111
represents td+A node potential at a time; k is a coefficient matrix; i is an input vector in the circuit and represents a power supply in the circuit; the coefficient matrix K contains information K of resistance branches and voltage source resistance branchesR,d+Internal resistance information K of equivalent voltage source of sum capacitorRC
(5) Eliminating numerical oscillation by using minimum step length backward Euler operation at the switching time of the switch state;
the coefficient matrix K contains information K of resistance branches and voltage source resistance branchesR,d+Internal resistance information K of equivalent voltage source of sum capacitorRC
Figure BDA0000969183070000112
For a certain branch circuit which is connected between the node I and the node j and has the capacitance C, the coefficient matrix KrcIncluding its equivalent to an ideal voltage source, with respect to its internal resistance RsBranch information that tends to zero; matrix KrcMiddle removing Krc(i,i)=Rs -1,Krc(i,j)=-Rs -1,Krc(j,i)=-Rs -1,Krc(j,j)=Rs -1Except that, other elements are zero; krcIs an n-th order matrix, Krc(i, i) represents a matrix KrcRow i and column i; krc(i, j) represents a matrix KrcRow i and column j; krc(j, i) represents a matrix KrcThe element in the jth row and ith column; krc(j, j) represents a matrix KrcRow j and column j;
Figure BDA0000969183070000113
vector I includes all current sources in the original circuit and the Nonton equivalent current source information I of the ideal voltage sourceS,d+Besides, the current source also comprises information I of an inductance equivalent current sourceL,d-And information I of the equivalent ideal voltage source of the capacitorSC,d-As shown in formula xi:
I=IS,d++IL,d-+ISC,d-
wherein:
Figure BDA0000969183070000114
for a certain branch circuit which is connected between the node I and the node j and has inductance L, IlIncluding information of its equivalent current source; except that Il,d-(i)=IL,d-And Il,d-(j)=-IL,d-Outer, vector Il,d-While for a branch with a capacitance of C connected between node I and node j, I is zeroscIncluding its equivalent norton current source information; i isSC,d-In, except for Isc,d-(i)=ISC,d-And Isc,d-(j)=-ISC,d-Besides, other elements are zero;
substituting the formula (c) and the formula (b) into the formula (c), and arranging the formula (c) into a format of the formula (c):
Figure BDA0000969183070000115
wherein:
Figure BDA0000969183070000116
represents td+The potential of each node at a time; kR,d+Represents td+A resistance coefficient matrix which constantly contains information of the resistance branch and the voltage source internal resistance branch; i isS,d+Represents td+Current source information vectors at time; i isSC,d-Represents td-Time capacitance equivalent Norton current source information vector; l _ relative represents the inductance-related term; c _ relative represents a capacitive element-related term.
At the time t of switching actiondUsing a backward euler operation:
if at the moment t of switching actiondAt a very small time step Δ t0Applying a backward Euler operation to the system state equation (r), where at0=td+-td-Using td-State quantity x of timed-To find td+State quantity x of timed+The calculation expression is as follows:
Figure BDA0000969183070000121
wherein the content of the first and second substances,
Figure BDA0000969183070000122
Ψ is a time integral quantity of voltage at each node, defined as
Figure BDA0000969183070000123
And
Figure BDA0000969183070000124
Rd+an input vector matrix representing the time after the switching action; kR,d+Is a resistivity matrix after switching.
Further expand formula (R) to
Figure BDA0000969183070000125
And formula
Figure BDA0000969183070000126
Figure BDA0000969183070000127
Figure BDA0000969183070000128
Taking into account Δ t0Tends to 0, formula
Figure BDA0000969183070000129
Become formula
Figure BDA00009691830700001210
The integral quantity of the node potential along with the time is not changed before and after the switching action;
Figure BDA00009691830700001211
wherein: Ψd+And Ψd+Respectively representing the voltage time integral quantity of each node after the switching action and the voltage time integral quantity of each node before the switching action;
general formula
Figure BDA00009691830700001212
Substituted type
Figure BDA00009691830700001213
And arranged into
Figure BDA00009691830700001214
In the form of:
Figure BDA00009691830700001215
if formula
Figure BDA00009691830700001216
And formula ninthly is equivalent, stating: at the time t of switching actiondAnd one node potential reinitialization operation based on the classical theory is completed by one small-step backward Euler operation.
(6) The equivalence of the switching action time proves that:
<1> proof of equivalence of inductance-related terms:
for inductive branches, there are
Figure BDA00009691830700001217
The following holds true:
Figure BDA0000969183070000131
or written in a matrix format, e.g. formula
Figure BDA0000969183070000132
Shown in the figure:
Figure BDA0000969183070000133
continuing to expand to
Figure BDA0000969183070000134
Formula (II):
Figure BDA0000969183070000135
because each inductance branch has a formula
Figure BDA0000969183070000136
An inductance related term in the formula (ninx)
Figure BDA0000969183070000137
And formula
Figure BDA0000969183070000138
Inductance related term in
Figure BDA0000969183070000139
Are equivalent; i isl,d-Represents td-The current value on the inductance branch at the moment; l is-1To represent
Figure BDA00009691830700001310
L is the inductance value of the inductance branch. Ψd-(i) And Ψd-(j) Represents td-And voltage time integral quantities of the node i and the node j at the moment.
<2> proof of equivalence of capacitance-related terms:
considering the Nonton equivalent current source of the capacitance branch, the capacitance related term in the formula ninu is developed into the formula
Figure BDA00009691830700001311
And formula
Figure BDA00009691830700001312
Figure BDA0000969183070000141
Figure BDA0000969183070000142
General formula
Figure BDA0000969183070000143
The capacitance related term in
Figure BDA0000969183070000144
Writing each capacitor branch into an expansion format as shown in the formula
Figure BDA0000969183070000145
And
Figure BDA0000969183070000146
shown in the figure:
Figure BDA0000969183070000147
Figure BDA0000969183070000148
general formula
Figure BDA0000969183070000149
The capacitance related term in
Figure BDA00009691830700001410
Writing each capacitor branch into an expansion format as shown in the formula
Figure BDA00009691830700001411
And
Figure BDA00009691830700001412
shown in the figure:
Figure BDA00009691830700001413
Figure BDA00009691830700001414
due to the fact that
Figure BDA00009691830700001415
Represents td-The voltage value on the capacitor at the moment, while taking into account RSAnd Δ t0The fact that all tend to zero, the capacitance related term in the formula ninthly
Figure BDA00009691830700001416
And formula
Figure BDA00009691830700001417
The capacitance related term in
Figure BDA00009691830700001418
Equivalence; u shapec,d-Represents td-At the moment, the voltage value on the capacitor branch circuit;
Figure BDA0000969183070000151
and
Figure BDA0000969183070000152
respectively representing the potential values of the node i and the node j.
This proves that at the moment of switching action: the use of the minimum step-length back-difference method is equivalent to the operation of reinitializing the node potential according to the capacitor voltage and the inductive current in the circuit.
Examples
Fig. 3 shows a bridge current source rectifier circuit, and table 2 is a form in which the circuit topology is stored in a computer. The simulation analysis was performed using the patented method with the basic step size set to 2 ms.
Table 2 example leg information
Figure BDA0000969183070000153
Firstly, codes of a column writing method for executing a circuit network state equation on the No. 1 to No. 5 branches in the table 3 are written to obtain a coefficient matrix shown in the formula
Figure BDA0000969183070000154
Figure BDA0000969183070000155
Figure BDA0000969183070000156
Figure BDA0000969183070000161
Figure BDA0000969183070000162
Thereby obtaining a system equation of the circuit
Figure BDA0000969183070000163
And equation of state
Figure BDA0000969183070000164
Figure BDA0000969183070000165
Figure BDA0000969183070000166
Wherein:
Figure BDA0000969183070000167
e is the unit diagonal matrix.
Defining the state quantity at zero time as x0=(0,0,0,0,900,0,0,0,0,0)T
5.1 first half cycle
At time 0+, D2 and D3 will turn on while D1 and D4 remain off due to the unidirectional turn-on characteristics of the ideal diode. Referring to the rule described in the formula, the initial state resistivity matrix KRModified to KR1Of formula
Figure BDA0000969183070000168
Figure BDA0000969183070000169
Wherein:
Figure BDA00009691830700001610
5.1.1 Single step post Difference calculation
Since D2 and D3 are turned on at time zero, it is necessary to apply a backward difference method once to obtain the state quantity at time 0+ in order to avoid numerical oscillation. The time step of this backward difference operation takes Δ t0=10-7s, and will be Δ t0And β ═ 1 substitution, giving t ═ 10-7system state quantity at s moment
Figure BDA00009691830700001611
As shown in
Figure BDA00009691830700001612
Figure BDA0000969183070000171
Wherein
Figure BDA0000969183070000172
5.1.2 trapezoidal iterative computation
Then adjusting the time step to be 0.002-10 ^ t-7s, according to t 10-7system state quantity at s moment
Figure BDA0000969183070000173
Obtaining the state quantity x when t is 2ms by using the formula0.002. The step length was adjusted to Δ t of 0.002s, using the formula
Figure BDA0000969183070000174
Sequentially meterAnd calculating the system state quantity at 4ms, 6ms, 8ms and 10 ms.
Figure BDA0000969183070000175
5.2 half period
When t is 10ms, D2 and D3 are turned off, D1 and D4 are turned on, and the coefficient matrix K of the first half period is determined according to the rule described in the formula21Modified to K for the second half cycle22Of formula
Figure BDA0000969183070000176
And
Figure BDA0000969183070000177
Figure BDA0000969183070000178
Figure BDA0000969183070000179
wherein
Figure BDA00009691830700001710
As in the first half cycle, at the time t of circuit topology switching is 10ms, Δ t is taken0=10-7s, yielding t ═ 0.01+10-7system state quantity at s moment
Figure BDA00009691830700001711
And then, after one step is adjusted, fixing the step to 2ms, and sequentially calculating to obtain the system state quantities at 12ms, 14ms, 16ms, 18ms and 20 ms.
And (4) analyzing results:
the inductor voltages obtained by the simulation are shown in table 3 and fig. 4. Meanwhile, simulation results of the PSCAD software are given for comparison, wherein the accurate solution is obtained by using the PSCAD software at the step size of 1 mu s.
TABLE 3 inductive Voltage
Figure BDA00009691830700001712
Figure BDA0000969183070000181
Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art can make modifications and equivalents to the embodiments of the present invention without departing from the spirit and scope of the present invention, which is set forth in the claims of the present application.

Claims (5)

1. A numerical simulation method applied to electromagnetic transient analysis of a switching circuit is characterized by comprising the following steps:
writing a system state equation of a circuit in a row, and converting the system state equation into a state equation in a first-order form through variable substitution;
step (2) modifying a system state equation of the circuit at the moment of switching action;
step (3) iterative solution is carried out on the first-order state equation by using a direct integral method;
step (4) reinitializing the potential of the circuit node at the moment of switching action;
step (5) eliminating numerical oscillation by using minimum step length backward Euler operation at the switching time of the switch state;
step (6) carrying out equivalence certification at the moment of switching action;
in the step (1), a system state equation expression of the circuit is as follows:
Figure FDA0002779427750000011
wherein:
Figure FDA0002779427750000012
is a column vector of order N, each element value representing the potential of the corresponding node; kCIs a capacitance coefficient matrix; kRIs a resistivity matrix; kLIs an inductance matrix; i is an input vector in the circuit and represents a power supply in the circuit; the three coefficient matrixes are square matrixes of N rows and N columns, and all the three coefficient matrixes meet the requirements of positive nature, symmetry and sparsity;
system state equation 1 is transformed into a first order state equation by variable substitution as follows:
Figure FDA0002779427750000013
wherein:
Figure FDA0002779427750000014
K1、K2all represent a coefficient matrix; x is a state variable; e is the unity diagonal matrix;
the step (6) comprises the following steps:
<1> proof of equivalence of inductance-related terms:
for the inductive branch, the existence equation (15) holds:
Il,d-=L-1d-(i)-Ψd-(j)] (15)
or written in a matrix format as shown in equation (16):
Figure FDA0002779427750000021
continuing to expand to the following equation (17):
Figure FDA0002779427750000022
since equation (17) holds for each inductive branch, the inductance-related term in equation (9)
Figure FDA0002779427750000023
Term related to inductance in equation (14)
Figure FDA0002779427750000024
Are equivalent; i isl,d-Represents td-The current value on the inductance branch at the moment; l is-1To represent
Figure FDA0002779427750000025
L is the inductance value of the inductance branch; Ψd-(i) And Ψd-(j) Represents td-Voltage time integral quantity of the node i and the node j at the moment;
<2> proof of equivalence of capacitance-related terms:
considering the norton equivalent current source of the capacitive branch, the capacitance-related term in equation (9) is expanded into equation (18) and equation (19):
Figure FDA0002779427750000026
Figure FDA0002779427750000027
the capacitance in equation (14) is related to
Figure FDA0002779427750000028
The developed format is written according to each capacitive branch as shown in equations (20) and (21):
Figure FDA0002779427750000029
Figure FDA00027794277500000210
the capacitance in equation (14) is related to
Figure FDA0002779427750000031
The developed format is written according to each capacitive branch as shown in equations (22) and (23):
Figure FDA0002779427750000032
Figure FDA0002779427750000033
due to the fact that
Figure FDA0002779427750000036
Represents td-The voltage value on the capacitor at the moment, while taking into account RSAnd Δ t0The fact that all tend to zero, the capacitance-related term in equation (9)
Figure FDA0002779427750000037
Term related to capacitance in equation (14)
Figure FDA0002779427750000034
Equivalence; u shapec,d-Represents td-At the moment, the voltage value on the capacitor branch circuit;
Figure FDA0002779427750000038
and
Figure FDA0002779427750000039
respectively representing potential values of the node i and the node j;
the switching operation uses a minimum step length backward Euler operation at the moment, and is equivalent to the operation of reinitializing the node potential according to the capacitor voltage and the inductance current in the circuit.
2. The numerical simulation method according to claim 1, wherein in the step (2), if an ideal switch connected between two nodes is operated at a switching operation time, t is at a switching operation timedModifying the resistivity matrix K in equation (1)R(ii) a The system state equation for the circuit is modified using equation (4), which is as follows:
Figure FDA0002779427750000035
where Turn On indicates that the ideal switch is at tdOpening at any moment; turn Off indicates that the ideal switch is at tdDisconnection at any moment; except for Kr(i,i)=Rs -1,Kr(i,j)=-Rs -1,Kr(j,i)=-Rs -1And Kr(j,j)=Rs -1Other than, KrThe other elements in the voltage source are zero, and the internal resistance R of the 0V ideal voltage sourcesTends to zero; kR,+Is a matrix of resistivity before switching action, KR,-Is a resistance coefficient matrix after switching action; krIs an N-th order matrix, Kr(i, i) represents the element in the ith row and ith column in the matrix; kr(i, j) represents the element in the ith row and jth column of the matrix; kr(j, i) represents the element in the jth row and ith column in the matrix; kr(j, j) represents the element in the jth row and jth column in the matrix;
Figure FDA0002779427750000041
Rsis the internal resistance.
3. The numerical simulation method according to claim 1, wherein in the step (3), the iterative solution is performed by using a direct integration method for the first-order equation 2 in the standard form, and an iteration format of the direct integration method is as follows:
Figure FDA0002779427750000042
wherein: Δ t is the time step between the nth time instant and the time instant n + 1; beta is a coefficient, when the value of beta is 0, the method is called a forward difference method, the stability is stable, and the numerical precision is first-order precision; when the value of beta is 0.5, the method is called a Crank-Nicolson method, the stability is unconditionally stable, and the numerical precision is second-order precision; when the value of beta is 1, the method is called a posterior difference method, the stability is unconditionally stable, and the numerical precision is first-order precision; x is the number ofnRepresents the system state variable at the nth step, namely, the time t is n delta t; x is the number ofn+1Represents the system state variable at the n +1 th step, i.e. at the time t ═ n +1) Δ t; rnAnd Rn+1The system input vectors of the nth step, i.e., time t ═ n Δ t and the nth +1 th step, i.e., time t ═ n +1) Δ t, are represented, respectively.
4. The numerical simulation method according to claim 2, wherein the step (4) includes:
at the time t of switching actiondThe capacitor is equivalent to a voltage source, the inductor is equivalent to a current source, and the current source is based on td-Capacitance voltage and inductance current calculation t at timed+Potential distribution at a time; t is td-Represents tdA certain time before the time, and td-td-Tends to zero; t is td+Represents tdA certain time after the time, and td+-tdTends to zero;
if the capacitance and inductance dynamic elements in the circuit are treated equivalently, only a resistance branch and a current source branch exist in the circuit, a static circuit equation is obtained, and the equation in the formula (6) is solved
Figure FDA0002779427750000043
Completing the initialization of the circuit after the switching action;
Figure FDA0002779427750000044
wherein:
Figure FDA0002779427750000055
represents td+A node potential at a time; k is a coefficient matrix; i is an input vector in the circuit and represents a power supply in the circuit; the coefficient matrix K contains information K of resistance branches and voltage source resistance branchesR,d+Internal resistance information K of equivalent voltage source of sum capacitorRC
Figure FDA0002779427750000051
For a certain branch circuit which is connected between the node I and the node j and has the capacitance C, the coefficient matrix KrcIncluding its equivalent to an ideal voltage source, with respect to its internal resistance RsBranch information that tends to zero; matrix KrcMiddle removing Krc(i,i)=Rs -1,Krc(i,j)=-Rs -1,Krc(j,i)=-Rs -1,Krc(j,j)=Rs -1Except that, other elements are zero; krcIs an n-th order matrix, Krc(i, i) represents a matrix KrcRow i and column i; krc(i, j) represents a matrix KrcRow i and column j; krc(j, i) represents a matrix KrcThe element in the jth row and ith column; krc(j, j) represents a matrix KrcRow j and column j;
Figure FDA0002779427750000052
the vector I includes all current sources and the ideal of the original circuitNorton equivalent current source information I of voltage sourceS,d+Besides, the current source also comprises information I of an inductance equivalent current sourceL,d-And information I of the equivalent ideal voltage source of the capacitorSC,d-As shown in formula (8):
I=IS,d++IL,d-+ISC,d- (8)
wherein:
Figure FDA0002779427750000053
for a certain branch circuit which is connected between the node I and the node j and has inductance L, IlIncluding information of its equivalent current source; except that Il,d-(i)=IL,d-And Il,d-(j)=-IL,d-Outer, Il,d-All other elements in (A) are zero; meanwhile, for a certain branch which is connected between the node I and the node j and has the capacitance of C, IscIncluding its equivalent norton current source information; i issc,d-In, except for Isc,d-(i)=ISC,d-And Isc,d-(j)=-ISC,d-In addition, the other elements are all zero, wherein ISC,d-Represents td-The current value of the time capacitor equivalent Norton current source;
substituting formula (7) and formula (8) into formula (6), and arranging into a format of the following formula:
Figure FDA0002779427750000054
wherein:
Figure FDA0002779427750000056
represents td+The potential of each node at a time; kR,d+Represents td+A resistance coefficient matrix which constantly contains information of the resistance branch and the voltage source internal resistance branch; i isS,d+Represents td+Current source information vectors at time; i isSC,d-Represents td-Time capacitance equivalent Norton current source information vector; l _ relative represents the inductance-related term; c _ relative represents a capacitive element-related term.
5. The numerical simulation method according to claim 2, wherein the step (5) includes:
at the time t of switching actiondUsing a backward euler operation:
if at the moment t of switching actiondAt a very small time step Δ t0Applying a backward Euler operation to System State equation 1, where Δ t0=td+-td-Using td-State quantity x of timed-To find td+State quantity x of timed+The calculation expression is as follows:
Figure FDA0002779427750000061
wherein the content of the first and second substances,
Figure FDA0002779427750000062
Ψ is a time integral quantity of voltage at each node, defined as
Figure FDA0002779427750000067
And
Figure FDA0002779427750000063
Rd+an input vector matrix representing the time after the switching action; k2,d+Is a coefficient matrix;
further expanding formula (10) into formula (11) and formula (12):
Figure FDA0002779427750000064
Figure FDA0002779427750000065
taking into account Δ t0The value tends to 0, and the expression (12) is changed to the expression (13), which shows that the integral value of the node potential with time does not change before and after the switching action;
Ψd+=Ψd- (13)
wherein: Ψd+And Ψd-Respectively representing the voltage time integral quantity of each node after the switching action and the voltage time integral quantity of each node before the switching action;
substituting formula (13) for formula (11) and arranging into the form of formula (14):
Figure FDA0002779427750000066
if equations (14) and (9) are equivalent, it is stated that: at the time t of switching actiondAnd one node potential reinitialization operation based on the classical theory is completed by one small-step backward Euler operation.
CN201610245120.7A 2016-04-19 2016-04-19 Numerical simulation method applied to electromagnetic transient analysis of switch circuit Active CN107305592B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201610245120.7A CN107305592B (en) 2016-04-19 2016-04-19 Numerical simulation method applied to electromagnetic transient analysis of switch circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201610245120.7A CN107305592B (en) 2016-04-19 2016-04-19 Numerical simulation method applied to electromagnetic transient analysis of switch circuit

Publications (2)

Publication Number Publication Date
CN107305592A CN107305592A (en) 2017-10-31
CN107305592B true CN107305592B (en) 2021-04-06

Family

ID=60151572

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201610245120.7A Active CN107305592B (en) 2016-04-19 2016-04-19 Numerical simulation method applied to electromagnetic transient analysis of switch circuit

Country Status (1)

Country Link
CN (1) CN107305592B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113268948A (en) * 2021-04-08 2021-08-17 华北电力大学 Electromagnetic transient equivalent modeling method for double-active-bridge converter

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102750416A (en) * 2012-06-19 2012-10-24 中国电力科学研究院 Topological subnetting method of electromagnetic transient simulation containing switching characteristic circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102750416A (en) * 2012-06-19 2012-10-24 中国电力科学研究院 Topological subnetting method of electromagnetic transient simulation containing switching characteristic circuit

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
基于电路等效变换的二极管箝位式模块化多电平换流器电磁暂态并行仿真模型;龚文明等;《南方电网技术》;20150920;第9卷(第9期);第30页至第37页 *
开关电弧放电电磁暂态干扰研究综述;闫格等;《高压电器》;20140216;第50卷(第2期);第119页至130页 *

Also Published As

Publication number Publication date
CN107305592A (en) 2017-10-31

Similar Documents

Publication Publication Date Title
WO2018058869A1 (en) Electromagnetic transient analysis method and device for switching circuit
Ben-Yaakov Behavioral average modeling and equivalent circuit simulation of switched capacitors converters
Holters et al. Physical modelling of a wah-wah effect pedal as a case study for application of the nodal DK method to circuits with variable parts
De Jonghe et al. Characterization of analog circuits using transfer function trajectories
CN107305592B (en) Numerical simulation method applied to electromagnetic transient analysis of switch circuit
KR20220048941A (en) Systems, methods, and computer program products for transistor compact modeling using artificial neural networks
Vazquez-Leal et al. Biparameter homotopy-based direct current simulation of multistable circuits
Vlach et al. Modern CAD methods for analysis of switched networks
Pouncey et al. A spark gap model for LTspice and similar circuit simulation software
Wu et al. A PTA method using numerical integration algorithms with artificial damping for solving nonlinear DC circuits
CN110472338B (en) Improved electromagnetic transient simulation method suitable for field programmable logic array
Mrcarica et al. Time-domain analysis of nonlinear switched networks with internally controlled switches
Valsa et al. Swann‐a programme for analysis of switched analogue non‐linear networks
CN108257628B (en) Lattice scale fractional order memristor for arbitrary order high-pass filtering
Yao et al. An efficient time step control method in transient simulation for DAE system
Iordache et al. ACAP-Analog Circuit Analysis Program
Yu et al. A new modified nodal analysis for nano-scale memristor circuit simulation
Zhou et al. An adaptive dynamic-element PTA method for solving nonlinear DC operating point of transistor circuits
Olsen et al. Network variable preserving step-size control in wave digital filters
Balik et al. Calculation of first-and second-order symbolic sensitivities in sequential form via the transimpedance method
JP4810387B2 (en) Circuit operation analysis apparatus, circuit operation analysis method, and program
CN107305535B (en) Method for accelerating iterative solution of state equation of circuit network
Tse et al. Quadratic state-space modeling technique for analysis and simulation of power electronic converters
Lee et al. InTraSim: Incremental transient simulation of power grids
Djordjević et al. A new topology oriented method for symbolic analysis of electronic circuits

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant