CN107301840B - Pixel compensation circuit and method, display driving device and display device - Google Patents
Pixel compensation circuit and method, display driving device and display device Download PDFInfo
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- CN107301840B CN107301840B CN201710687511.9A CN201710687511A CN107301840B CN 107301840 B CN107301840 B CN 107301840B CN 201710687511 A CN201710687511 A CN 201710687511A CN 107301840 B CN107301840 B CN 107301840B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
Abstract
The invention discloses a pixel compensation circuit and method, a display driving device and a display device, relates to the technical field of display and aims to solve the problems of screen flashing and purple staining of the display device caused by threshold voltage offset. The pixel compensation circuit comprises a first transistor, wherein the control end of the first transistor is connected with the control signal modulation unit, the input end of the first transistor is connected with the data signal modulation unit, the output end of the first transistor is connected with the control end of the driving transistor, the output end of the first transistor is also connected with the output end of the driving transistor through a storage capacitor, the input end of the driving transistor is connected with the power signal wire, and the output end of the driving transistor is connected with the light-emitting device; the control signal modulation unit and the data signal modulation unit modulate corresponding signals after the light-emitting stage is finished, so that the direction of the grid-source voltage of the first transistor at the moment is opposite to the direction of the grid-source voltage of the first transistor at the light-emitting stage. The display driving device comprises the pixel compensation circuit. The pixel compensation circuit provided by the invention is used in an OLED display device.
Description
Technical Field
The present invention relates to the field of display technologies, and in particular, to a pixel compensation circuit and method, a display driving device, and a display device.
Background
An Organic Light-Emitting Diode (OLED) display device is a self-luminous display device, in which OLED devices are arranged in an array, and the thin film transistors control the corresponding OLED devices to emit Light, thereby displaying images.
In the prior art, due to instability of a film forming process, a threshold voltage of a thin film transistor deviates from a target threshold voltage to a certain extent, and therefore, a pixel compensation circuit is provided in an OLED display device to compensate for the threshold voltage of the corresponding thin film transistor. FIG. 1 shows a 2T1C pixel compensation circuit diagram, which includes a TFT and a driving transistor D, wherein the control terminal of the TFT is connected with a control signal line, the input terminal of the TFT is connected with a DATA line DATA, the output terminal of the TFT is connected with the control terminal of the driving transistor D, and the input terminal of the driving transistor D is connected with an electric circuitThe source signal line is connected, and the output end of the thin film transistor TFT is connected via a storage capacitor CstConnected with the output end of the driving transistor D, and the output end of the driving transistor D is also connected with the light emitting device LoledOf the anode electrode of the light-emitting device LoledIs connected to the signal common terminal ELVSS.
The operation of the 2T1C pixel compensation circuit in one frame of display screen will be described below by taking the thin film transistor TFT and the driving transistor D as N-type transistors as an example. As shown in fig. 2, the pixel compensation circuit includes a data writing period T1 and a lighting period T2 in one frame of display, and immediately after the lighting period T2, the power is cut off. Specifically, in the data writing period T1, the first transistor TFT is controlled to be turned on by the high level and to be directed to the storage capacitor CstCharging to write the display data signal to the driving transistor; in the light emitting stage, the first transistor TFT is controlled to be turned off by using a low level, and the storage capacitor CstDischarging to turn on the driving transistor D, and driving the light emitting device L with the power signal via the driving transistor DoledEmitting light; driving light emitting device L through 2T1C pixel compensation circuitoledThe process of luminescence can be seen as: in most of time, the thin film transistor TFT is in a turn-off state, and the grid-source voltage is at a negative potential, so that the grid-source voltage of the thin film transistor TFT is at the negative potential for a long time, the threshold voltage of the thin film transistor TFT is subjected to negative deviation, and the thin film transistor TFT can not be turned off frequently in a light-emitting stage; if the problem occurs in the light-emitting stage, a low-level data signal is written into the driving transistor in the light-emitting stage, so that the corresponding light-emitting device is flashed, and the problems of screen flashing, purple emission and the like of the OLED display device occur.
Disclosure of Invention
The invention aims to provide a pixel compensation circuit and method, a display driving device and a display device, so as to reduce the problems of screen flickering and purple emission of the display device caused by threshold voltage shift.
In order to achieve the above object, the present invention provides a pixel compensation circuit, which includes a first transistor and a storage capacitor, wherein a control terminal of the first transistor is connected to a control signal modulation unit, an input terminal of the first transistor is connected to a data signal line, an output terminal of the first transistor is connected to a control terminal of a driving transistor, an input terminal of the driving transistor is connected to a power signal line, an output terminal of the first transistor is further connected to an output terminal of the driving transistor through the storage capacitor, and an output terminal of the driving transistor is further connected to a light emitting device;
the control signal modulation unit is used for modulating a control signal after the light-emitting stage is finished, so that the modulated control signal controls the first transistor to be conducted, and the direction of the grid-source voltage of the first transistor is opposite to the direction of the grid-source voltage of the first transistor in the light-emitting stage after the light-emitting stage is finished.
Compared with the prior art, in the pixel compensation circuit provided by the invention, the control end of the first transistor is connected with the control signal modulation unit, the input end of the first transistor is connected with the data signal line, the output end of the first transistor is connected with the control end of the driving transistor, the input end of the driving transistor is connected with the power signal line, the output end of the first transistor is also connected with the output end of the driving transistor through the storage capacitor, and the output end of the driving transistor is also connected with the light-emitting device, so that the first transistor is in an on state in a data writing stage and is in an off state in a light-emitting stage, and the threshold voltage of the first transistor shifts towards the gate-source voltage direction of the first transistor in the off state due to the fact that the first transistor is in the off state for a long time; that is, the first transistor maintains the gate-source voltage direction in the off state for a long time, resulting in a shift of the threshold voltage of the first transistor toward the gate-source voltage direction in which the first transistor is in the off state; therefore, after the light-emitting stage is finished, the control signal can be modulated by the control signal modulation unit, so that the first transistor is in a conducting state after the light-emitting stage is finished, and the direction of the gate-source voltage of the first transistor is opposite to the direction of the gate-source voltage when the first transistor is in a turn-off state after the light-emitting stage is finished, so that the time of the first thin film transistor in the turn-off state can be shortened, the holding time of the first transistor in the direction of the gate-source voltage in the turn-off state can be reduced, the holding time of the first transistor in the direction of the gate-source voltage in the turn-off state and the holding time of the first transistor in the direction of the gate-source voltage in the turn-on state can be balanced, and; therefore, the pixel compensation circuit provided by the invention can modulate the control signal and the data signal after the end of the light-emitting stage regardless of the type of the first transistor, so as to reduce the shift probability of the threshold voltage of the first transistor, and reduce the probability of the display device of screen flash and purple emission.
The invention also provides a pixel compensation method, which applies the pixel compensation circuit provided by the technical scheme; the pixel compensation method comprises the following steps:
the control signal modulation unit modulates a control signal after the light-emitting stage is finished, so that the modulated control signal controls the first transistor to be conducted; and after the light-emitting stage is finished, the direction of the grid-source voltage of the first transistor is opposite to the direction of the grid-source voltage of the first transistor in the light-emitting stage.
Compared with the prior art, the pixel compensation method provided by the invention has the same beneficial effects as the pixel compensation circuit provided by the technical scheme, and the details are not repeated herein.
The invention also provides a display driving device which comprises the pixel compensation circuit provided by the technical scheme.
Compared with the prior art, the beneficial effects of the display driving device provided by the invention are the same as those of the pixel compensation circuit provided by the technical scheme, and are not repeated herein.
The invention also provides a display device which comprises the display driving device provided by the technical scheme.
Compared with the prior art, the display device provided by the invention has the same beneficial effects as the display driving device provided by the technical scheme, and the description is omitted here.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the invention and not to limit the invention. In the drawings:
FIG. 1 is a prior art 2T1C pixel compensation circuit diagram;
FIG. 2 is a timing diagram of the 2T1C pixel compensation circuit;
fig. 3 is a schematic structural diagram of a first pixel compensation circuit according to an embodiment of the present invention;
FIG. 4 is a first timing diagram of a first pixel compensation circuit according to an embodiment of the present invention;
FIG. 5 is a second timing diagram of a first pixel compensation circuit according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a second pixel compensation circuit according to an embodiment of the present invention;
FIG. 7 is a first timing diagram of a second pixel compensation circuit according to an embodiment of the present invention;
FIG. 8 is a second timing diagram of a second pixel compensation circuit according to an embodiment of the present invention;
FIG. 9 is a block diagram of a modulation time control unit according to an embodiment of the present invention;
FIG. 10 is a first flowchart illustrating a modulation time control unit according to an embodiment of the present invention;
fig. 11 is a block diagram illustrating a specific flow of a modulation time control unit according to an embodiment of the present invention;
fig. 12 is a block diagram illustrating a detailed flow of a modulation time control unit according to an embodiment of the present invention;
reference numerals:
100-control signal modulation unit, 200-data signal modulation unit;
300-induction signal modulation unit, 400-modulation time control unit;
401-voltage detection unit, 402-offset value calculation unit;
403-duration control unit, DATA-DATA signal terminal;
ELVDD-power signal terminal, ELVSS-signal common terminal;
SENSE-SENSE signal terminal, G1-first control signal terminal;
g2-second control signal terminal, TFT 1-first transistor;
TFT 2-second transistor, D-drive transistor;
Cst-a storage capacitance.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 3, a pixel compensation circuit according to an embodiment of the present invention includes: first transistor TFT1, drive transistor D and storage capacitor Cst(ii) a A control terminal of the first transistor TFT1 is connected to the control signal modulating unit 100, an input terminal of the first transistor TFT1 is connected to the data signal line, an output terminal of the first transistor TFT1 is connected to a control terminal of the driving transistor D, an input terminal of the driving transistor D is connected to the power signal line, and an output terminal of the first transistor TFT1 is further connected to the power signal line through the storage capacitor CstConnected with the output end of the driving transistor D, and the output end of the driving transistor D is also connected with the light emitting device LoledAnd (4) connecting.
It is understood that the control terminal of the first transistor TFT1 is connected to the control signal modulation unit 100 through the first control signal terminal G1, the input terminal of the first transistor is connected to the DATA signal line through the DATA signal terminal DATA, the input terminal of the driving transistor D is connected to the power signal line through the power signal terminal ELVDD, and the output terminal of the driving transistor D is connected to the light emitting device LoledOf the anode electrode of the light-emitting device LoledIs connected to the signal common terminal ELVSS.
The pixel compensation circuit specifically comprises a data writing phase T1, a light emitting phase T2 and a modulation phase T3 in one frame of display picture.
During the DATA writing period T1, the first transistor TFT1 is controlled to be turned on by the control signal provided from the first control signal terminal G1, and the DATA signal provided from the DATA signal terminal DATA is provided to the storage capacitor C through the first transistor TFT1stIn the charging process, the control signal provided by the first control signal terminal G1 may be provided by another signal control unit or generated by the control signal modulation unit 100.
During the light-emitting period T2, the control signal provided by the first control signal terminal G1 controls the first transistor TFT1 to turn off, and the driving transistor D writes into the storage capacitor CstIs turned on under the control of the data signal voltage, and the light emitting device L is controlled by the power signal supplied from the power signal terminal ELVDD through the driving transistor DoledThe control signal provided by the first control signal terminal G1 at this stage may be provided by another signal control unit or may be generated by the control signal modulation unit 100.
In the modulation phase T3, the control signal modulating unit 100 is configured to modulate the control signal after the lighting phase T2 is finished, so that the modulated control signal controls the first transistor TFT1 to be turned on through the first control signal terminal G1, and the gate-source voltage direction of the first transistor TFT1 after the lighting phase D is finished is opposite to the gate-source voltage direction of the first transistor TFT1 in the lighting phase; for example: the gate-source voltage of the first transistor TFT1 is a negative voltage in the lighting period T1, and the gate-source voltage direction of the first transistor TFT1 is a negative voltage in the lighting period T1, at this time, the gate-source voltage of the first transistor TFT1 is a positive voltage after the lighting period D is finished, so that the gate-source voltage direction of the first transistor TFT1 is a positive voltage after the lighting period D is finished.
Based on the pixel compensation circuit provided in the above embodiment, the control terminal of the first transistor TFT1 is connected to the control signal modulation unit 100, the input terminal of the first transistor TFT1 is connected to the data signal line, the output terminal of the first transistor TFT1 is connected to the control terminal of the driving transistor D, the input terminal of the driving transistor D is connected to the power signal line, and the output terminal of the first transistor TFT1 is further connected to the power signal line through the storage capacitor CstAnd a driving crystalThe output end of the transistor D is connected with the light-emitting device LoledConnected such that the first transistor TFT1 is in an on state during the data writing period T1, the first transistor TFT1 is in an off state during the lighting period T2, and the threshold voltage of the first transistor TFT1 is shifted toward the gate-source voltage of the first transistor TFT1 in the off state since the first transistor TFT1 is in the off state for a long time; that is, the first transistor TFT1 remains in the gate-source voltage direction in the off state for a long time, causing the threshold voltage of the first transistor TFT1 to shift toward the gate-source voltage direction in which the first transistor is in the off state; therefore, after the light-emitting phase T2 is finished, the control signal can be modulated by the control signal modulation unit 100, so that the first transistor TFT1 is in an on state after the light-emitting phase T2 is finished, and the direction of the gate-source voltage of the first transistor TFT1 is opposite to the direction of the gate-source voltage when the first transistor is in an off state after the light-emitting phase T2 is finished, which not only can shorten the time that the first thin film transistor TFT1 is in an off state, but also can reduce the holding time of the first transistor TFT1 in the gate-source voltage direction of the off state, so as to balance the holding time of the first transistor TFT1 in the gate-source voltage direction of the off state and the holding time of the first transistor TFT1 in the gate-source voltage direction of the on state, thereby dynamically adjusting the threshold voltage of the first transistor TFT 1; therefore, the pixel compensation circuit provided by the embodiment of the invention can modulate the control signal and the data signal after the end of the light emitting period regardless of the type of the first transistor TFT1, so as to reduce the shift probability of the threshold voltage of the first transistor, and reduce the probability of the display device of screen flash and purple emission.
It should be noted that, in the prior art, there is no modulation phase in the pixel compensation process, and the pixel compensation circuit proceeds to the reset phase after the light-emitting phase T2 (prior art, description is omitted), whereas in the above embodiment, the pixel compensation circuit reduces the shift probability of the threshold voltage of the first transistor by modulating various signals without changing the main structure of the prior pixel compensation circuit, so that the modulation phase T3 is inserted between the light-emitting phase T2 and the reset phase (prior art, description is omitted).
Considering that the storage capacitor C is used in the light emitting stage when the type of the thin film transistor and the type of the driving transistor are both N-type transistors in the prior artstData signal voltage V for data writing stageDATA,T1The holding function is provided, so that the gate voltage of the driving transistor D is higher than the source voltage for a long time, that is, in the prior art, the gate-source voltage of the driving transistor D is at a positive potential for a long time, and the gate-source voltage of the driving transistor D is at the positive potential for a long time, which causes the threshold voltage of the driving transistor D to generate a positive shift, that is, the shift direction of the threshold voltage of the driving transistor D is the same as the gate-source voltage of the driving transistor in the light emitting stage; for this reason, as shown in fig. 3, a data signal line is limited to be connected to the data signal modulation unit 200, and the data signal modulation unit 200 is configured to modulate the data signal after the light-emitting phase is finished, so that the modulated data signal controls the driving transistor D to turn off, and the direction of the gate-source voltage of the driving transistor after the light-emitting phase is finished is opposite to the direction of the gate-source voltage of the driving transistor during the light-emitting phase, so that the retention time of the gate-source voltage of the driving transistor D during the light-emitting phase can be reduced, and the probability of the threshold voltage of the driving transistor shifting is greatly reduced.
In addition, in the pixel compensation circuit provided in the above embodiment, in the data writing period T1 and the light emitting period T2, the data signal may be provided by another signal control unit, or may be generated by the data signal modulation unit 200.
It will be appreciated that the magnitude and direction of the signal voltage controlling the transistor will vary if the transistor type is different. The following illustrates the voltage effect of the various signals during compensation of the pixel compensation circuit, depending on the transistor type.
As shown in fig. 3 and 4, in the pixel compensation circuit provided in the above embodiment, the first transistor TFT1 and the driving transistor D are both N-type transistors, and at this time:
the control signal voltage V for the data write phase provided from the first control signal terminal G1 during the data write phase T1G1,T1DATA writing stages provided for high level, DATA signal terminals DATAData signal voltage V of a segmentdata,T1Is high level, and the gate-source voltage V of the first transistor TFT1 in the data writing phasegs1,T1> 0 and keeps the first transistor conductive. In addition, the power supply signal voltage V of the data write stage provided by the power supply signal terminal ELVDDELVDDAt high level, the driving transistor D is turned off, and the gate-source voltage V of the driving transistor D in the data writing stagegs3,T1＜0。
The control signal voltage V of the light emitting stage provided by the first control signal terminal G1 during the light emitting stage T2G1,T2A DATA signal voltage V of a light-emitting stage supplied from a DATA signal terminal DATA at a low levelDATA,T2Is low level, and the gate-source voltage V of the first transistor TFT1 in the light emitting stagegs1,T2< 0 and keeps the first transistor off. Meanwhile, the power signal terminal provides the power signal voltage V in the light-emitting stageELVDD,T2Is still high, and VELVDD,T2＝VELVDD,T1(ii) a At this time, in the storage capacitor CstThe voltage at the control terminal of the driving transistor D is high and equal to VDATA,T1Gate-source voltage V of the drive transistorgs3,T2When the voltage is more than 0, the driving transistor D is conducted, and the power supply signal in the light-emitting stage controls the light-emitting device L through the driving transistor DoledAnd (4) emitting light.
Without the modulation phase T3, the gate-source voltage V of the first transistor TFT1gs1A negative potential for a long time, resulting in a negative shift of the threshold voltage of the first transistor TFT 1; based on this, in the modulation stage T3, the control signal and the data signal are modulated so that the modulated control signal voltage VG1,T3Is high to control the first transistor TFT1 to be turned on to define VG1,T3Greater than the modulated data signal voltage VDATA,T3So that the gate-source voltage V of the first transistor TFT1 of the modulation phasegs1,T3＝VG1,T3-VDATA,T3Is greater than 0; that is, by modulating the control signal and the data signal such that the gate-source voltage of the first transistor TFT1 is at a positive potential during the modulation phase, the time during which the gate-source voltage of the first transistor TFT1 is at a negative potential can be reduced, thereby reducing the time during which the gate-source voltage of the first transistor TFT1 is at a negative potentialThe probability of a negative shift in the threshold voltage of the first transistor TFT1 is low.
When the first transistor TFT1 is turned on, the modulated data signal is transferred to the storage capacitor C through the first transistor TFT1stCharging by limiting the modulated data signal voltage VDATA,T3＜VDATA,T1So that the driving transistor D is turned off; furthermore, if there is no modulation phase, the gate-source voltage V of the driving transistor Dgs3The long-time positive potential causes the threshold voltage of the driving transistor D to generate positive shift; thus, during the modulation period T3, the modulated data signal voltage V is definedDATA,T3As small as possible so that the gate-source voltage V of the drive transistorgs3,T3< 0, thus reducing the time when the gate-source voltage of the driving transistor D is at a positive potential, thereby reducing the probability of the threshold voltage of the driving transistor D shifting forward. In addition, in the modulation stage T3, the power supply signal voltage VELVDD,T3Jumps directly to 0, or low, as in the prior art.
It should be noted that, in the above embodiment, in the modulation stage, the modulated data signal voltage V isDATA,T3Not only satisfies the modulated control signal voltage VG1,T3Relationship (V)G1,T3＞VDATA,T3) For the purpose of adjusting the threshold voltage of the first transistor TFT1, and it is also required to be as small as possible for the purpose of adjusting the threshold voltage of the driving transistor D, therefore, the modulated data signal voltage V in the embodiment of the present inventionDATA,T3Is not arbitrarily set. In addition, VDATA,T3Only the ratio V is requireddata,T1The lower limit of the small voltage is not less than 0, and the driving transistor D can be kept to be turned off, or can be a negative voltage.
As shown in fig. 3 and 5, the pixel compensation circuit provided in the above embodiment has the first transistor TFT1 and the driving transistor D both being P-type transistors, and at this time:
the control signal voltage V for the data write phase provided from the first control signal terminal G1 during the data write phase T1G1,T1At a low level, the DATA signal voltage V being supplied from the DATA signal terminal DATAdata,T1At low powerFlat and the gate-source voltage V of the first transistor TFT1 in the data writing phasegs1,T1< 0 and keeps the first transistor conductive. In addition, the power supply signal voltage V of the data write stage provided by the power supply signal terminal ELVDDELVDDAt high level, the driving transistor D is turned off, and the gate-source voltage V of the driving transistor D in the data writing stagegs3,T1＞0。
The control signal voltage V of the light emitting stage provided by the first control signal terminal G1 during the light emitting stage T2G1,T2At a high level, the DATA signal voltage V of the light-emitting stage being supplied from the DATA signal terminal DATADATA,T2Is high level, and the gate-source voltage V of the first transistor TFT1 in the light emitting stagegs1,T2> 0 and keeps the first transistor off. Meanwhile, the power signal terminal provides the power signal voltage V in the light-emitting stageELVDD,T2Remains unchanged (V)ELVDD,T2＝VELVDD,T1) I.e. still high; in the storage capacitor CstThe voltage at the control terminal of the driving transistor is at a low level and is equal to VDATA,T1Gate-source voltage V of the drive transistorgs3,T2< 0, at this time, the driving transistor D is turned on, and the power signal at the light emitting stage controls the light emitting device L through the driving transistor DoledAnd (4) emitting light.
Without the modulation phase T3, the gate-source voltage V of the first transistor TFT1gs1A positive potential for a long time, causing a positive shift in the threshold voltage of the first transistor TFT 1; therefore, a modulation period T3 may be added to modulate the control signal and the data signal such that the modulated control signal voltage VG1,T3Low to control the first transistor TFT1 to be turned on to define VG1,T3< modulated data signal VDATA,T3So that the gate-source voltage V of the first transistor TFT1 of the modulation phasegs1,T3＝VG1,T3-VDATA,T3Less than 0; that is, by modulating the control signal and the data signal to make the gate-source voltage of the first transistor TFT1 in the modulation phase be a negative potential, the time that the gate-source voltage of the first transistor TFT1 is at a positive potential can be reduced, thereby reducing the forward shift of the threshold voltage of the first transistor TFT1Probability.
When the first transistor TFT1 is turned on, the modulated data signal is transferred to the storage capacitor C through the first transistor TFT1stCharging by limiting the modulated data signal voltage VDATA,T3＞VDATA,T1So that the driving transistor D is turned off; furthermore, if there is no modulation phase, the gate-source voltage V of the driving transistor Dgs3The long-time negative potential causes the threshold voltage of the driving transistor D to generate negative deviation; thus, during the modulation phase T3, the modulated data signal V is definedDATA,T3As large as possible, so that the gate-source voltage V of the drive transistorgs3,T3The time that the grid source voltage of the driving transistor D is at the negative potential can be reduced, and the probability of negative deviation of the threshold voltage of the driving transistor D is reduced. In addition, in the modulation stage T3, the power supply signal voltage VELVDD,T3Jumps directly to 0, or low, as in the prior art. In addition, VDATA,T3Only the ratio V is requireddata,T1Large, i.e. its upper limit may even be equal to VDATA,T2。
It should be noted that, in the above embodiment, in the modulation stage, the modulated data signal voltage V isDATA,T3Not only satisfies the modulated control signal voltage VG1,T3Relationship (V)G1,T3＜VDATA,T3) For the purpose of adjusting the threshold voltage of the first transistor TFT1, and it is also required to be as large as possible for the purpose of adjusting the threshold voltage of the driving transistor D, therefore, the modulated data signal voltage V in the embodiment of the present inventionDATA,T3Is not arbitrarily set.
Optionally, as shown in fig. 6, the pixel compensation circuit provided in the foregoing embodiment may further include a second transistor TFT2, a control terminal of the second transistor TFT2 is connected to the control signal modulation unit 100, an input terminal of the second transistor TFT2 is connected to the sensing signal modulation unit 300, and an output terminal of the second transistor TFT2 is connected to the output terminal of the driving transistor D; wherein the content of the first and second substances,
the control terminal of the second transistor TFT2 can be connected to the control signal modulation unit 100 via a second control signal terminal G2, and the second transistor TThe control terminal of the FT2 is connected to the sensing signal modulation unit 300 through the sensing signal terminal SENSE, and the output terminal of the second transistor TFT2 is connected to the output terminal of the driving transistor D (or the light emitting device L)oledAnode of) is connected such that the second transistor TFT2 is turned on in a data writing phase to sense a current of the output terminal of the driving transistor D through the second transistor TFT 2; in the light emitting stage, the second transistor is turned off.
It can be understood that after the lighting period T2, the signal modulated by the control signal modulating unit 100 needs to control the first transistor TFT1 to be turned on, and the control terminal of the second transistor TFT2 can be connected to the control signal modulating unit 100 through the second control signal terminal G2, which turns off the second transistor TFT 2; as can be seen from this description, the first transistor TFT1 and the second transistor TFT2 are in the same on state at the same stage (data writing stage or light emitting stage), and therefore, the threshold voltage of the second transistor TFT2 is shifted in the same principle as the threshold voltage shift of the first transistor TFT1, and the direction of the shift of the threshold voltage of the second transistor TFT2 is the same as the potential direction of the gate-source voltage of the second transistor TFT2 at the light emitting stage. Based on this, the second transistor TFT2 can be controlled to be turned on by the control signal modulated by the control signal modulation unit 100, and coordinates the sensing signal modulation unit 300 to modulate the sensing signal after the light emitting period is finished, and the gate-source voltage direction of the second transistor TFT2 is opposite to the gate-source voltage direction of the second transistor TFT2 during the light emitting period after the light emitting period ends, to reduce the hold time of the gate-source voltage direction of the second transistor TFT2 in the off-state, to balance the hold time of the gate-source voltage direction of the second transistor in the off-state, and the gate-source voltage direction of the second transistor TFT2 in an on state, to dynamically adjust the threshold voltage of the second transistor TFT2, in this way, regardless of the type of the second transistor TFT2, the control signal and the data signal can be modulated after the light emission phase is completed, so as to reduce the probability of the shift of the threshold voltage of the second transistor TFT 2.
Furthermore, since the modulated sensing signal is provided to the output terminal of the driving transistor D through the second transistor TFT2 in the modulation stage T3 of the pixel compensation circuit shown in fig. 6, which causes a certain change in the gate-source voltage of the driving transistor in the modulation stage, the modulated sensing signal also needs to cause the gate-source voltage direction of the driving transistor after the end of the light-emitting stage to be opposite to the gate-source voltage direction of the driving transistor in the light-emitting stage.
In addition, in a state where the second transistor TFT2 is turned on, the modulated sensing signal is inputted to the output terminal of the driving transistor D through the second transistor TFT2, that is, the light emitting device LoledWhich makes the light emitting device LoledIt may be lighted up during the regulation phase, which is not allowed, so that the voltage of the modulated sensing signal needs to be limited to Vsence,T3< turn-on voltage V of light emitting deviceoledSo that the modulated induction signal maintains the light emitting device LoledIn an off state, thereby preventing the light emitting device from being lit when it is not needed; wherein the light emitting device LoledTypically an organic electroluminescent diode, although other light emitting devices are possible.
Since the data writing stage, the light emitting stage and the modulating stage are performed, the first transistor TFT1 and the second transistor TFT2 have the same conducting state, that is, the first transistor TFT1 and the second transistor TFT2 need to be the same type of transistor, so as to satisfy the requirement that the same control signal controls the first transistor TFT1 and the second transistor TFT2 to be in the same conducting state at the same stage.
It is understood that the control terminal of the second transistor TFT2 in the above embodiments may also be connected to other control signal modulation units through the second control signal terminal, in which case, the types of the first transistor TFT1 and the second transistor TFT2 are not limited by each other, that is, the first transistor TFT1 may be turned on at a high level, and the second transistor TFT2 may be turned on at a low level, but this increases the complexity of signal modulation.
As shown in fig. 6 and 7, when the types of the first transistor TFT1, the second transistor TFT2, and the driving transistor D are all N-type transistors.
Number ofThe control signal voltage V for the data writing phase provided by the second control signal terminal G2 during the reading phase T1G2,T1At a high level, VG2,T1＝VG1,T1So that the second transistor TFT2 is turned on, the sensing signal voltage V of the data writing stage provided by the sensing signal terminal SENSEsense,T1Is low level, and the gate-source voltage V of the second transistor TFT2 in the data writing phasegs2,T1＞0。
For the data reading period T1, the voltage states of the first transistor TFT1 and the driving transistor D, and the gate-source voltage can be referred to the above description.
The control signal voltage V of the light-emitting stage provided by the second control signal terminal G2 during the light-emitting stage T2G2,T2At a low level, VG2,T2＝VG1,T2So that the second transistor TFT2 is turned off and the sensing signal voltage V of the light-emitting stage provided by the sensing signal terminal SENSEsense,T2Is low level, and the gate-source voltage V of the second transistor TFT2 in the light emitting stagegs2,T2＜0。
As for the light-emitting period T2, the voltage states of the first transistor TFT1 and the driving transistor D, and the gate-source voltage can be referred to the above description.
If there is no modulation phase, the gate-source voltage V of the second transistor TFT2gs2A negative potential for a long time, resulting in a negative shift of the threshold voltage of the second transistor TFT 2; based on this, in the modulation phase T3, the control signal modulation unit 100 provides the modulated control signal voltage V through the second control signal terminal G2G1,T3At a high level to control the second transistor TFT2 to be turned on, and the modulated sensing signal voltage V provided by the second transistor TFT2 is provided to the output terminal of the driving transistorsense,T3Is at a high level; and define VG1,T3＞Vsense,T3So that the gate-source voltage V of the second transistor TFT2 of the modulation phasegs2,T3＝VG1,T3-Vsense,T3Is greater than 0; that is, by modulating the control signal and the sense signal to make the gate-source voltage of the second transistor TFT2 in the modulation phase be a positive potential, the gate-source voltage of the second transistor TFT2 can be reduced to be a negative potentialThereby reducing the probability of a negative shift in the threshold voltage of the second transistor TFT 2.
In addition, in the modulation stage T3 of the pixel compensation circuit shown in fig. 6, the modulated sensing signal is provided to the output terminal of the driving transistor D through the second transistor TFT2, which causes the gate-source voltage of the driving transistor in the modulation stage to change to a certain value, and at this time, VDATA,T3Should have an upper limit, i.e., VDATA,T3＜Vsense,T3So that the gate-source voltage V of the drive transistor in the modulation phasegs3,T3＝VDATA,T3-Vsense,T3< 0 to enable adjustment of the drive transistor threshold voltage.
For the modulation phase T3, the voltage state of the first transistor TFT1, and the gate-source voltage can be referred to the above description.
As shown in fig. 6 and 8, when the types of the first transistor TFT1, the second transistor TFT2, and the driving transistor D are all P-type transistors.
The control signal voltage V for the data writing phase provided by the second control signal terminal G2 during the data reading phase T1G2,T1At a low level, VG2,T1＝VG1,T1So that the second transistor TFT2 is turned on, the sensing signal voltage V of the data writing stage provided by the sensing signal terminal SENSEsense,T1Is low level, and the gate-source voltage V of the second transistor TFT2 in the data writing phasegs2,T1＜0。
For the data reading period T1, the voltage states of the first transistor TFT1 and the driving transistor D, and the gate-source voltage can be referred to the above description.
The control signal voltage V of the light-emitting stage provided by the second control signal terminal G2 during the light-emitting stage T2G2,T2At a high level, VG2,T2＝VG1,T2So that the second transistor TFT2 is turned off and the sensing signal voltage V of the light-emitting stage provided by the sensing signal terminal SENSEsense,T2Is low level, and the gate-source voltage V of the second transistor TFT2 in the light emitting stagegs2,T2＞0。
As for the light-emitting period T2, the voltage states of the first transistor TFT1 and the driving transistor D, and the gate-source voltage can be referred to the above description.
If there is no modulation phase, the gate-source voltage V of the second transistor TFT2gs2A positive potential is left for a long time, causing a positive shift in the threshold voltage of the second transistor TFT 2; based on this, in the modulation phase T3, the control signal modulation unit 100 provides the modulated control signal voltage V through the second control signal terminal G2G1,T3At low level to control the second transistor TFT2 to be turned on, and the modulated sensing signal voltage V provided by the second transistor TFT2 is provided to the output terminal of the driving transistor Dsense,T3Is high level and defines VG1,T3＜Vsense,T3I.e. the gate-source voltage V of the second transistor TFT2 during the modulation phasegs2,T3＝VG1,T3-Vsense,T3< 0, that is, the gate-source voltage of the second transistor TFT2 in the modulation stage is made to be a negative potential by modulating the control signal and the sensing signal, so that the time that the gate-source voltage of the second transistor TFT2 is at a positive potential can be reduced, thereby reducing the probability of the threshold voltage of the second transistor TFT2 shifting forward.
In addition, in the modulation stage T3 of the pixel compensation circuit shown in fig. 6, the modulated sensing signal is provided to the output terminal of the driving transistor D through the second transistor TFT2, which causes the gate-source voltage of the driving transistor in the modulation stage to change to a certain value, and at this time, VDATA,T3Should have the lower limit, i.e. VDATA,T3＞Vsense,T3So that the gate-source voltage V of the drive transistor in the modulation phasegs3,T3＝VDATA,T3-Vsense,T3And > 0 to enable adjustment of the drive transistor threshold voltage.
For the modulation phase T3, the voltage state of the first transistor TFT1, and the gate-source voltage can be referred to the above description.
In the above embodiments, the first transistor, the second transistor, and the driving transistor are all thin film transistors, and may be other types of transistors. The connection structure of the transistor, the capacitor, and the light emitting device of the pixel compensation circuit shown in fig. 3 is the same as that of the conventional 2T1C pixel compensation circuit. Meanwhile, the connection structure of the transistor, the capacitor and the light emitting device of the pixel compensation circuit shown in fig. 6 is the same as that of the conventional 3T1C pixel compensation circuit; for the pixel compensation circuit of the prior OLED display device, the data signal, the sensing signal, the control signal and the power signal are sent by one power supply, in the modulation stage, except for the data signal, the sensing signal and the control signal, the embodiment of the invention needs to be remodulated, the power supply signal jumps to 0 potential, namely, an off state as in the prior art, and does not need to be modulated, therefore, assuming that the signals generated by the data signal modulation unit 200, the sensing signal modulation unit 300 and the control signal modulation unit 100 corresponding to the data signal, the sensing signal and the control signal are digital signals, the data signal modulation unit 200, the sensing signal modulation unit 300, and the control signal modulation unit 100 may be connected to different Digital Analog Converters (DACs), so that the Digital to analog converter (DAC) converts the Digital signal into an analog signal and sends the analog signal to the corresponding control port.
It can be understood that the data signal modulation unit 200, the sensing signal modulation unit 300, and the control signal modulation unit 100 may be separately disposed, or may be integrated in a control chip and connected to the corresponding control port through different pins.
In order to enable the adjustment of the threshold voltage of the transistor in the pixel compensation circuit to be controllable, the pixel compensation circuit provided in the embodiment of the present invention may further control the threshold voltage of the transistor to be adjustable to the theoretical threshold voltage after how many frames of the display screen are displayed by setting the time length of the modulation stage T3.
For example, as shown in fig. 9, when the pixel compensation circuit is shown in fig. 3, the first transistor TFT1, the second transistor TFT2, and the driving transistor D are the same transistor; the pixel compensation circuit further includes a modulation time control unit 400, and the modulation time control unit 400 includes a voltage detection unit 401, an offset value calculation unit 402, and a duration control unit 403; the output end of the voltage detection unit 401 is connected with the input end of the offset value calculation unit 402, and the output end of the offset value calculation unit 402 is connected with the output end of the duration control unit 403; the output end of the duration control unit 403 is connected to the control end of the control signal modulation unit 100, the control end of the data signal modulation unit 200, and the control end of the sensing signal modulation unit 300, respectively.
Since the first transistor TFT1, the second transistor TFT2 and the driving transistor D are the same transistor, the offset values generated by the two transistors are almost the same, and thus the time length of the image setting modulation phase T3 can be controlled by the following three methods.
In the first method, as shown in fig. 10, a specific process of the modulation time control unit 400 includes the following steps:
step S411: the voltage detection unit 401 detects the actual threshold voltage of the first transistor TFT 1;
step S412: the offset value calculating unit 402 obtains a voltage offset value of the first transistor TFT1 according to the actual threshold voltage of the first transistor TFT1 and the theoretical threshold voltage of the first transistor;
step S413: the time period control unit 403 controls the light emitting device L according to the voltage offset value of the first transistor TFT1 and the time periodoledLength t of light emission time2Obtaining the time length t of the modulation stage3Controlling the control signal modulation unit to modulate a control signal in a modulation stage, controlling the data signal modulation unit to modulate a data signal in the modulation stage, and controlling the induction signal modulation unit to modulate an induction signal in the modulation stage; wherein, t3＝kt2(ii) a k is a time compensation coefficient.
In a second method, as shown in fig. 11, a specific process of the modulation time control unit 400 includes the following steps:
step S421: the voltage detection unit 401 detects the actual threshold voltage of the driving transistor D;
step S422: the offset value calculating unit 402 obtains a voltage offset value of the driving transistor D according to the actual threshold voltage of the driving transistor D and the theoretical threshold voltage of the driving transistor D;
step S423: duration control sheetThe cell 403 is based on the voltage offset value of the driving transistor D and the light emitting device LoledLength t of light emission time2Obtaining the time length t of the modulation stage3Controlling the control signal modulation unit to modulate the control signal in the modulation stage, controlling the data signal modulation unit to modulate the data signal in the modulation stage and controlling the induction signal modulation unit to modulate the induction signal in the modulation stage; wherein, t3＝kt2(ii) a k is a time compensation coefficient.
In a third method, as shown in fig. 12, a specific process of the modulation time control unit 400 includes the following steps:
step S431: the voltage detection unit 401 detects the actual threshold voltage of the second transistor TFT 2;
step S432: the offset value calculating unit 402 obtains a voltage offset value of the second transistor TFT2 according to the actual threshold voltage of the second transistor TFT2 and the theoretical threshold voltage of the second transistor;
step S433: the time period control unit 403 controls the light emitting device L according to the voltage offset value of the second transistor TFT2 and the time periodoledLength t of light emission time2Obtaining the time length t of the modulation stage3Controlling the control signal modulation unit to modulate the control signal in the modulation stage, controlling the data signal modulation unit to modulate the data signal in the modulation stage and controlling the induction signal modulation unit to modulate the induction signal in the modulation stage; wherein, t3＝kt2(ii) a k is a time compensation coefficient.
In addition, in order to avoid the difference of the theoretical threshold voltage of the first transistor TFT1, the theoretical threshold voltage of the second transistor TFT2, and the theoretical threshold voltage of the driving transistor D due to process errors, and the difference of the actual threshold voltages due to the difference of the voltage environments of the first transistor TFT1, the second transistor TFT2, and the driving transistor D, the time length t of the first transistor in the modulation phase can be obtained at the same time3Based on the time length t of the second transistor in the modulation stage3And based on the time length t of the drive transistor D in the modulation phase3And then, by comparison,selecting the time length t of the modulation phase3The largest one as the length of time of the final modulation stage.
It should be noted that the time compensation coefficient k in the above embodiment is related to the gate-source voltages of the light emitting period T2, the first transistor TFT1, the second transistor TFT2 and the driving transistor D, and is also related to the time length T2 of the light emitting period.
For example: when the first transistor and the driving transistor are both N-type thin film transistors, the time length T of the light-emitting period T2210 mus, the gate-source voltage V of the first transistor TFT1gs1,T2The gate-source voltage V of the first transistor TFT1 in the modulation phase is set to-10Vgs1,T3At 5V, the time length T of the modulation phase T3 is then set3＝-Vgs1*t2/Vgs1,T320 μ s, so k is 2.
Of course, the gate-source voltage V of the first transistor TFT1 in the modulation phase may also be set according to practical situationsgs1,T3Is adjusted so that the time length T of the modulation phase T3 is equal to the time compensation factor k3Adjustable, not limited to only by way of example.
As shown in fig. 3-8, an embodiment of the present invention further provides a pixel compensation method, which applies the pixel compensation circuit provided in the foregoing technical solution; the pixel compensation method comprises the following steps in a frame display picture period: a data writing phase T1, a light emitting phase T2, a modulation phase T3, and a reset phase;
the data writing phase T1, the light-emitting phase T2 and the reset phase are the same as those in the prior art, except that the modulation phase T3 is inserted between the light-emitting phase T2 and the reset phase;
in the modulation stage T3, the control signal modulation unit 100 modulates the control signal after the light-emitting stage is ended, so that the modulated control signal controls the first transistor TFT1 to be turned on; the gate-source voltage direction of the first transistor TFT1 after the light emitting period ends is opposite to the gate-source voltage direction of the first transistor TFT1 during the light emitting period.
Compared with the prior art, the pixel compensation method provided by the embodiment of the invention has the same beneficial effects as the pixel compensation circuit provided by the technical scheme, and the details are not repeated herein.
As shown in fig. 3 to 5, the pixel compensation circuit provided in the foregoing embodiment further includes: a data signal modulation unit connected to the data signal line; the pixel compensation method further comprises, in a modulation phase of one frame display picture period:
the data signal modulation unit 200 modulates the data signal after the light-emitting phase is finished, so that the modulated data signal controls the driving transistor to be turned off, and the direction of the gate-source voltage of the driving transistor D is opposite to the direction of the gate-source voltage of the driving transistor in the light-emitting phase after the light-emitting phase is finished;
as shown in fig. 6-8, when the pixel compensation circuit includes the second transistor TFT2 and the sensing signal modulation unit 300, and the control signal modulation unit modulates the control signal after the end of the light-emitting period, the pixel compensation method further includes, in the modulation period of the one-frame display picture period:
the control signal modulation unit 100 controls the second transistor to turn on the TFT2 by using the modulated control signal, and after the lighting phase is finished, the direction of the gate-source voltage of the second transistor TFT2 is opposite to the direction of the gate-source voltage of the second transistor TFT2 in the lighting phase;
the sensing signal modulation unit 300 modulates the sensing signal after the light emitting stage is finished, so that the modulated sensing signal keeps the light emitting device in an off state, and the modulated sensing signal needs to make the direction of the gate-source voltage of the driving transistor after the light emitting stage is finished be opposite to the direction of the gate-source voltage of the driving transistor during the light emitting stage.
The embodiment of the invention also provides a display driving device which comprises the pixel compensation circuit provided by the technical scheme.
Compared with the prior art, the beneficial effects of the display driving device provided by the embodiment of the invention are the same as those of the pixel compensation method provided by the technical scheme, and are not repeated herein.
The embodiment of the invention also provides a display device which comprises the display driving device provided by the technical scheme.
Compared with the prior art, the beneficial effects of the display device provided by the embodiment of the invention are the same as those of the pixel compensation method provided by the technical scheme, and are not repeated herein.
The display device provided in the above embodiments may be any product or component having a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, or a navigator.
In the foregoing description of embodiments, the particular features, structures, materials, or characteristics may be combined in any suitable manner in any one or more embodiments or examples.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.
Claims (10)
1. A pixel compensation circuit is characterized by comprising a first transistor and a storage capacitor, wherein the control end of the first transistor is connected with a control signal modulation unit, the input end of the first transistor is connected with a data signal line, the output end of the first transistor is connected with the control end of a driving transistor, the input end of the driving transistor is connected with a power signal line, the output end of the first transistor is further connected with the output end of the driving transistor through the storage capacitor, and the output end of the driving transistor is further connected with a light-emitting device;
in the modulation stage, the control signal modulation unit is used for modulating a control signal after the light-emitting stage is finished, so that the modulated control signal controls the first transistor to be conducted, and the direction of the gate-source voltage of the first transistor is opposite to the direction of the gate-source voltage of the first transistor in the light-emitting stage after the light-emitting stage is finished;
the pixel compensation circuit also comprises a voltage detection unit, an offset value calculation unit and a time length control unit; the output end of the voltage detection unit is connected with the input end of the offset value calculation unit, and the output end of the offset value calculation unit is connected with the input end of the duration control unit; the output end of the time length control unit is connected with the control end of the control signal modulation unit;
the voltage detection unit is used for detecting the actual threshold voltage of the driving transistor; the offset value calculation unit is used for obtaining a voltage offset value of the driving transistor according to the actual threshold voltage of the driving transistor and the theoretical threshold voltage of the driving transistor; the time length control unit is used for controlling the time length t according to the voltage deviation value of the driving transistor and the light-emitting time length t of the light-emitting device2Obtaining the time length t of the modulation stage3And controlling the control signal modulation unit to modulate a control signal in the modulation stage; wherein, t3＝kt2(ii) a k is a time compensation coefficient;
the time compensation factor k depends on the light emission phase, the gate-source voltage of the driving transistor and the time length of the light emission phase.
2. The pixel compensation circuit according to claim 1, wherein the data signal line is connected to a data signal modulation unit;
the data signal modulation unit is used for modulating a data signal after the light-emitting stage is finished, so that the modulated data signal controls the driving transistor to be turned off, and the direction of the gate-source voltage of the driving transistor is opposite to the direction of the gate-source voltage of the driving transistor in the light-emitting stage after the light-emitting stage is finished.
3. The pixel compensation circuit of claim 2, wherein the data signal voltage during the data signal writing phase is VDATA,T1The modulated control signal has a voltage VG1,T3The voltage of the modulated data signal is VDATA,T3；
The first transistor and the driving transistor are both N-type transistors, VG1,T3＞VDATA,T3，VDATA,T3＜VDATA,T1；
The first transistor and the driving transistor are both P-type transistors, VG1,T3＜VDATA,T3And V isDATA,T3＞VDATA,T1。
4. The pixel compensation circuit according to claim 2, further comprising a second transistor, wherein an input terminal of the second transistor is connected to the sensing signal modulation unit, and an output terminal of the second transistor is connected to the output terminal of the driving transistor;
the control signal modulation unit is further configured to control the second transistor to be turned on by using the modulated control signal, and after the light emitting stage is ended, a gate-source voltage direction of the second transistor is opposite to a gate-source voltage direction of the second transistor in the light emitting stage;
the sensing signal modulation unit is used for modulating a sensing signal after the light-emitting stage is finished, so that the modulated sensing signal keeps the light-emitting device in an off state, and the direction of the grid-source voltage of the driving transistor is opposite to the direction of the grid-source voltage of the driving transistor in the light-emitting stage after the light-emitting stage is finished.
5. The pixel compensation circuit of claim 4, wherein the voltage of the modulated sensing signal is Vsence,T3The turn-on voltage of the light emitting device is Voled，Vsence,T3＜Voled；
The types of the first transistor, the second transistor and the driving transistor are N-type transistors and VG1,T3＞Vsence,T3，Vdata,T3＜Vsence,T3；
The first transistor, the second transistor and the driving transistor are all P-type transistors, VG1,T3＜Vsence,T3，Vdata,T3＞Vsence,T3。
6. The pixel compensation circuit according to claim 4, wherein the first transistor, the second transistor, and the driving transistor are the same transistor; the output end of the time length control unit is respectively connected with the control end of the data signal modulation unit and the control end of the induction signal modulation unit; wherein the content of the first and second substances,
the voltage detection unit is used for detecting the actual threshold voltage of the first transistor; the offset value calculation unit is used for obtaining a voltage offset value of the first transistor according to the actual threshold voltage of the first transistor and the theoretical threshold voltage of the first transistor;
the time length control unit is used for controlling the time length t according to the voltage deviation value of the first transistor and the light-emitting time length t of the light-emitting device2Obtaining the time length t of the modulation stage3Controlling the control signal modulation unit to modulate a control signal in the modulation stage, controlling the data signal modulation unit to modulate a data signal in the modulation stage, and controlling the induction signal modulation unit to modulate a power supply signal in the modulation stage; wherein, t3＝kt2(ii) a k is a time compensation coefficient; or the like, or, alternatively,
the voltage detection unit is also used for detecting the actual threshold voltage of the second transistor; the offset value calculation unit is used for obtaining a voltage offset value of the second transistor according to the actual threshold voltage of the second transistor and the theoretical threshold voltage of the first transistor;
the time length control unit is also used for controlling the time length t according to the voltage deviation value of the second transistor and the light-emitting time length t of the light-emitting device2Obtaining the time length t of the modulation stage3The control signal modulation unit is controlled to modulate a control signal in the modulation stage, the data signal modulation unit is controlled to modulate a data signal in the modulation stage, and the induction signal modulation unit is controlled to modulate a power supply signal in the modulation stage; wherein, t3＝kt2(ii) a k is a time compensation coefficient;
the time length control unit is also used for controlling the data signal modulation unit to modulate the data signal in the modulation stage and controlling the induction signal modulation unit to modulate the power supply signal in the modulation stage.
7. A pixel compensation method, which is characterized by applying the pixel compensation circuit of any one of claims 1 to 6; the pixel compensation method comprises the following steps:
the voltage detection unit detects an actual threshold voltage of the driving transistor;
the offset value calculation unit obtains a voltage offset value of the driving transistor according to the actual threshold voltage of the driving transistor and the theoretical threshold voltage of the driving transistor;
the time length control unit is used for controlling the time length according to the voltage deviation value of the driving transistor and the light-emitting time length t of the light-emitting device2Obtaining the time length t of the modulation stage3Wherein, t3＝kt2(ii) a k is a time compensation coefficient;
the time length control unit controls the control signal modulation unit to modulate a control signal in the modulation stage;
in the modulation stage, the control signal modulation unit modulates a control signal after the light-emitting stage is finished, so that the modulated control signal controls the first transistor to be conducted; after the light-emitting stage is finished, the direction of the grid-source voltage of the first transistor is opposite to the direction of the grid-source voltage of the first transistor in the light-emitting stage;
the time compensation factor k depends on the light emission phase, the gate-source voltage of the driving transistor and the time length of the light emission phase.
8. The pixel compensation method according to claim 7, wherein the pixel compensation circuit includes a data signal modulation unit connected to a data signal line; the pixel compensation method further includes:
the data signal modulation unit modulates a data signal after the light-emitting stage is finished, so that the modulated data signal controls the driving transistor to be turned off, and the direction of the gate-source voltage of the driving transistor is opposite to the direction of the gate-source voltage of the driving transistor in the light-emitting stage after the light-emitting stage is finished; and/or the presence of a gas in the gas,
when the pixel compensation circuit comprises the second transistor and the sensing signal modulation unit, and the control signal modulation unit modulates the control signal after the light-emitting stage is finished, the pixel compensation method further comprises the following steps:
the control signal modulation unit controls the second transistor to be conducted by using the modulated control signal, and the direction of the grid-source voltage of the second transistor is opposite to the direction of the grid-source voltage of the second transistor in the light-emitting stage after the light-emitting stage is finished;
the sensing signal modulation unit modulates the sensing signal after the light-emitting stage is finished, so that the modulated sensing signal keeps the light-emitting device in an off state, and the direction of the grid-source voltage of the driving transistor is opposite to the direction of the grid-source voltage of the driving transistor in the light-emitting stage after the light-emitting stage is finished.
9. A display driving device comprising the pixel compensation circuit according to any one of claims 1 to 6.
10. A display device characterized by comprising the display drive device according to claim 9.
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| US11205382B2 (en) * | 2018-11-22 | 2021-12-21 | Novatek Microelectronics Corp. | Sensing circuit for OLED driver and OLED driver using the same |
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| CN101236724A (en) * | 2008-02-29 | 2008-08-06 | 上海广电光电子有限公司 | Method for accomplishing negative impulse annealing by data writing, its device and driver circuit |
| CN201266474Y (en) * | 2008-09-27 | 2009-07-01 | 上海广电光电子有限公司 | Active drive organic light-emitting display device |
| CN104464618B (en) * | 2014-11-04 | 2017-02-15 | 深圳市华星光电技术有限公司 | AMOLED drive device and drive method |
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| CN101131804A (en) * | 2006-08-01 | 2008-02-27 | 索尼株式会社 | Display device, method of driving same, and electonic device |
| CN101393721A (en) * | 2007-09-20 | 2009-03-25 | 乐金显示有限公司 | Pixel driving method and apparatus for organic light emitting device |
| CN101986378A (en) * | 2010-11-09 | 2011-03-16 | 华南理工大学 | Pixel driving circuit for active organic light-emitting diode (OLED) display and driving method thereof |
| CN105957474A (en) * | 2016-07-13 | 2016-09-21 | 京东方科技集团股份有限公司 | Pixel driving circuit and driving method thereof, array substrate and display device |
| CN106023892A (en) * | 2016-08-03 | 2016-10-12 | 京东方科技集团股份有限公司 | Method for driving organic light-emitting display device |
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