CN107290912A - Liquid crystal display panel and its driving method - Google Patents
Liquid crystal display panel and its driving method Download PDFInfo
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- CN107290912A CN107290912A CN201710608995.3A CN201710608995A CN107290912A CN 107290912 A CN107290912 A CN 107290912A CN 201710608995 A CN201710608995 A CN 201710608995A CN 107290912 A CN107290912 A CN 107290912A
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- Prior art keywords
- film transistor
- line
- tft
- thin film
- liquid crystal
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/13306—Circuit arrangements or driving methods for the control of single liquid crystal cells
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
Abstract
A kind of liquid crystal display panel that the present invention is provided, by increasing by one second thin film transistor (TFT), and the pixel electrode electrical connection that the thin film transistor (TFT) that the source electrode of one of line n second thin film transistor (TFT) and drain electrode are electrically connected into the (n+1)th row and the n-th+2 row is electrically connected between the scan line or adjacent two first film transistors in the scan line of each even number line of each odd-numbered line.Before pair pixel electrode electrically connected with the thin film transistor (TFT) of the electrical connection of second thin film transistor (TFT) charging, the pixel electrode that the thin film transistor (TFT) electrically connected by second thin film transistor (TFT) to second thin film transistor (TFT) is electrically connected carries out charge neutrality, the voltage being filled with required for pixel electrode so as to reduce the thin film transistor (TFT) electrically connected with second thin film transistor (TFT) electrical connection, and then the charging of liquid crystal panel is completed in a relatively short time, improve picture taste and the liquid crystal panel reliability of liquid crystal panel.
Description
Technical field
The present invention relates to display technology field, more particularly to a kind of liquid crystal display panel and its driving method.
Background technology
More much bigger with the size of liquid crystal panel, resolution ratio is done higher and higher, and the opening time of each horizontal scanning line can quilt
Further compression.For example, FHD the pixel of (Full High Definition, full HD) panel for 1920 × 1080), drawing
In the case that face refreshing frequency is 60Hz, the opening time of each horizontal scanning line is about 1/ (60*1080) ≈ 15.4ms；And UHD
The resolution ratio of (Ultra High Definition, ultra high-definition) panel is generally 3840 × 2160, is in picture refreshing frequency
In the case of 60Hz, the opening time of each horizontal scanning line is about 1/ (60*2160) ≈ 7.7ms.Due to surface sweeping line unlatching when
Between due to resolution ratio improve and compress, consequently, it is possible to trigger liquid crystal panel undercharge the occurrence of so that picture show
Show effect reduction.In the prior art, common solution is to increase scan line and the line width or increase scan line of data wire
With the thickness of data wire.But increase scan line and the line width of data wire can lose the aperture opening ratio of picture element, reduce liquid crystal panel
Penetrance；And the thickness for increasing scan line and data wire can improve production cost and the yield to back-end process causes one to be fixed
Ring.
The content of the invention
It is an object of the invention to provide a kind of liquid crystal display panel and its driving method, opening for picture element can not lost
Improve the charging of the liquid crystal panel while mouth rate, the penetrance for ensureing liquid crystal panel and the guarantee liquid crystal panel yield
Can so that ensure that liquid crystal panel charging is sufficient within the shorter scan line opening time.
A kind of liquid crystal display panel, it is characterised in that multiple first film transistors and array row including array arrangement
Multiple second thin film transistor (TFT)s of cloth；Each first film transistor correspondence is electrically connected with a pixel electrode, multiple described
Second thin film transistor (TFT) is respectively positioned in the odd-numbered line of the matrix of multiple first film transistor formation or is respectively positioned on described
The even number line of matrix, and each second thin film transistor (TFT) is located at the first film crystalline substance adjacent with two of a line with it
Between body pipe；The picture that second thin film transistor (TFT) in line n is electrically connected with the first film transistor on the (n+1)th row
The pixel electrode of first film transistor electrical connection on plain electrode and the n-th+2 row is electrically connected, when using dot inversion
Type of drive drive the liquid crystal display panel, open second thin film transistor (TFT) in line n, make the institute of the (n+1)th row
The electric charge for stating the pixel electrode of first film transistor electrical connection is electrically connected with the first film transistor on the n-th+2 row
The charging neutrality of pixel electrode, wherein, n is the natural number more than zero.
Wherein, the liquid crystal display panel also includes interval and parallel a plurality of data lines, interval and parallel a plurality of swept
Retouch line；The scan line is vertical with the data wire and insulate each other；The first film transistor includes grid, source
Pole, drain electrode and pixel electrode, second thin film transistor (TFT) include grid, source electrode and drain electrode；The leakage of the first film transistor
Pole is electrically connected with pixel electrode described in one, to realize the electrical connection of the thin film transistor (TFT) and the pixel electrode；Multiple first
Swept described in the grid and nth bar of the first film transistor of line n m row in the matrix of thin film transistor (TFT) array formation
Line electrical connection is retouched, its drain electrode is electrically connected with m data lines；The grid and nth bar of second thin film transistor (TFT) in line n
Scan line is electrically connected, the first film on the drain/source and the (n+1)th row of second thin film transistor (TFT) in line n
The corresponding pixel electrode of transistor is electrically connected, and the source/drain of second thin film transistor (TFT) in line n and n-th+
The corresponding pixel electrode of the first film transistor on 2 rows is electrically connected, wherein, n, m are the natural number more than zero
Wherein, the scan line includes a pseudo- scan line, and the pseudo- scan line is located at first scan line and deviates from described second
The side of bar scan line.
Wherein, it is thin provided with described second between the pseudo- scan line and first scan line and two data wires
Film transistor, the grid of second thin film transistor (TFT) is electrically connected with the pseudo- scan line.
Wherein, the liquid crystal display panel also includes multiple pixels of array arrangement, the pixel and the first film
Transistor is corresponded simultaneously to be driven by the corresponding first film transistor, the polarities of potentials of each pixel with
The polarities of potentials of the pixel adjacent with its is contrary.
Wherein, the polarities of potentials of the pixel includes positive polarity potential and opposite with the positive polarity potential polarities of potentials
Negative polarity potential, the positive polarity potential includes maximum potential value, and the negative polarity potential includes minimum level value, the maximum
Potential value neutralizes with the minimum level value and obtains common electrode potential value.
Wherein, second thin film transistor (TFT) of m row is located between m+1 data lines and m data lines.This hair
It is bright that a kind of driving method for liquid crystal display panel is also provided, including：
Above-mentioned liquid crystal display panel is provided；Open any strange in the matrix of multiple first film transistor array formation
Second thin film transistor (TFT) on several rows, the source electrode and the drain electrode for making second thin film transistor (TFT) on the row is led
Lead to, so that the electric charge of the pixel electrode of the first film transistor in the even number line adjacent with the row and the even number line phase
The charging neutrality of the pixel electrode of the first film transistor in adjacent another odd-numbered line；
The first film transistor in the even number line is driven, and it is brilliant to the first film in the even number line
Positive polarity voltage/reverse voltage is filled with body pipe；
Drive the first film transistor in another odd-numbered line, and to described in another odd-numbered line
Reverse voltage/positive polarity voltage is filled with one thin film transistor (TFT).
Wherein, the current potential of the pixel electrode of the first film transistor in the even number line and another odd-numbered line
On the first film transistor pixel electrode charging neutrality after, the first film transistor in the even number line
Pixel electrode electric charge it is identical with the electric charge of the pixel electrode of the first film transistor in another odd-numbered line.
The present invention also provides a kind of liquid crystal display device, including liquid crystal display device body and above-mentioned LCD
Plate, the liquid crystal display device body is electrically connected with described liquid crystal display panel.
The liquid crystal display panel that the present invention is provided, by the scan line in each odd-numbered line or in each even number line
Scan line on the second thin film transistor (TFT) described in increase by one between adjacent two first film transistors, and by line n
Source electrode and the drain electrode of second thin film transistor (TFT) be electrically connected a film crystal of the (n+1)th row and the n-th+2 row
The pixel electrode electrical connection of pipe.In pair thin film transistor (TFT) electrically connected with the source electrode of second thin film transistor (TFT) with draining
Pixel electrode charging before, the source electrode of second thin film transistor (TFT) is electrically connected with draining by second thin film transistor (TFT)
The thin film transistor (TFT) pixel electrode carry out charge neutrality, so as to reduce the source electrode with second thin film transistor (TFT) and drain electrode
The pixel electrode and the thin film transistor (TFT) of the thin film transistor (TFT) of electrical connection need the potential difference being filled between current potential, so that
Reduce and filled with the source electrode of second thin film transistor (TFT) with required for the pixel electrode of the thin film transistor (TFT) electrically connected that drains
The voltage entered, and then the charging of liquid crystal panel is completed in a relatively short time, improve picture taste and the liquid crystal surface of liquid crystal panel
Plate reliability.
Brief description of the drawings
More clearly to illustrate the construction feature and effect of the present invention, it is entered with specific embodiment below in conjunction with the accompanying drawings
Row is described in detail.
Fig. 1 is the schematic diagram of the liquid crystal display panel of one embodiment of the invention；
Fig. 2 is the structural representation of the liquid crystal panel of the liquid crystal display panel described in Fig. 1；
Fig. 3 is the schematic diagram of the liquid crystal display panel of another embodiment of the present invention；
Fig. 4 is the liquid crystal display panel type of drive flow chart of the embodiment of the present invention.
Specific embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation is described.Wherein, being given for example only property of accompanying drawing illustrates that expression is only schematic diagram, it is impossible to be interpreted as the limitation to this patent.
Also referring to Fig. 1 and Fig. 2, the present invention provides a kind of liquid crystal display panel 100.The liquid crystal display panel 100
Including array base palte, color membrane substrates and liquid crystal layer.The array base palte is relative with the color membrane substrates and parallel interval is set, institute
Liquid crystal layer is stated to be located between the array base palte and the color membrane substrates.A surface layer of the color membrane substrates towards the liquid crystal layer
A common electrode layer is laminated with, the common electrode layer includes the public electrode region of multiple array arrangements, while multiple public affairs
Common electrode region is connected with each other.The array base palte include it is a plurality of interval and parallel data wire 10, it is a plurality of interval and it is parallel
Second thin film transistor (TFT) 40 of scan line 20, the first film transistor 30 of multiple array arrangements and multiple array arrangements.It is described
Scan line 10 is vertical with the data wire 20 and insulate each other.
The data wire 10 and the scan line 20 are located at different layers, and the data wire 10 and the scan line 20 it
Between insulated by insulating barrier.In the embodiment of the present invention, a plurality of scan line 20 is horizontally disposed and vertically
It is spaced, a plurality of data wire 10 is vertically arranged and horizontally spaced arrangement.
Describe for convenience, the scan line (Gate Line, GL) 20 is numbered, wherein, according to from top to bottom
The scan line 20 is named as first scan line GL (1), Article 2 scan line GL (2) ..., nth bar scanning by order respectively
Line GL (n), (n+1) article scan line GL (n+1), (n+2) article scan line GL (n+2) ..., pth bar scan line GL (p), its
In, n is positive integer, and p is positive integer, and p is more than n, wherein, p is the number of a plurality of scan line 20.Similarly, to described
Data wire (Data Line, DL) 10 is numbered, wherein, the data wire 10 is named respectively according to order from left to right
For the first data line DL (1), the second data line DL (2) ..., m data line DL (m), (m+1) data line DL (m
+ 1) ..., q data line DL (q), wherein, m is positive integer, and q is positive integer, and q is more than m, and wherein q is a plurality of data
The number of line 10.
Two adjacent scan lines 20 and two adjacent data wires 10 define a pixel region 11, and then
So that a plurality of scan line 20 and the definition of a plurality of data wire 10 form the pixel region 11 of multiple array arrangements, often
The individual pixel region 11 is relative with a public electrode region.Provided with described in one first in each pixel region 11
Thin film transistor (TFT) 30, the array arrangement form matrix of the first film transistor 30 in the pixel region 11.It is described
The even number line of matrix is provided with multiple second thin film transistor (TFT)s 40, or the matrix odd-numbered line provided with described in one the
Two thin film transistor (TFT)s 40.I.e. described second thin film transistor (TFT) 40 is respectively positioned in the even number line of the matrix or is respectively positioned on the square
In the odd-numbered line of battle array, and each second thin film transistor (TFT) 40 is located at the first film adjacent with two of a line with it
Between transistor 30.In the embodiment of the present invention, second thin film transistor (TFT) 40 is located in the odd-numbered line of the matrix.
The first film transistor 30 includes source electrode, drain electrode and grid, and each described first film transistor 30
It is electrically connected by the source electrode with a pixel electrode.The grid is electrically connected with scan line described in one 20, the drain electrode
It is electrically connected with gate line described in one 10.In the present invention, line n m row the first film transistor 10, its grid with
Scan line GL (n) is electrically connected described in nth bar, and its drain electrode is electrically connected with data wire DL (m) described in the m articles.Described first is thin
Film transistor 30 can be amorphous silicon film transistor, low-temperature polysilicon thin film transistor (TFT), high temperature polysilicon silicon thin film transistor or oxygen
It is any in compound semiconductor thin-film transistor.Wherein, n, m are the natural number more than zero.
Second thin film transistor (TFT) 40 includes source electrode, drain electrode and grid.The grid is electrically connected with scan line described in one 20
Connect, the source electrode and the drain electrode are electrically connected with 30 points of pixel electrodes for being connected Ei of the first film transistor described in one respectively
Connect.In the present invention, second thin film transistor (TFT) 40 of line n m row, its grid and scan line GL (n) described in nth bar
It is electrically connected, the pixel electrode that its drain/source is electrically connected with the (n+1)th row m first film transistors 30 arranged enters
Row electrical connection, the pixel electrode that its source/drain is electrically connected with the n-th+2 row m first film transistors 30 arranged is carried out
Electrical connection.Also, second thin film transistor (TFT) 40 of m row is located between m+1 data lines and m data lines, from
And cause what the source electrode of second thin film transistor (TFT) 40 and drain electrode were electrically connected with other first film transistors 30
When pixel electrode is electrically connected, the source electrode of second thin film transistor (TFT) 40 and drain electrode need not be across a data wires
10 pixel electrodes that could be electrically connected with other first film transistors 30 are electrically connected, so as to reduce cross-line, it is ensured that
The quality of the liquid crystal display panel 100.In the present invention, amorphous silicon film transistor that second thin film transistor (TFT) is also,
It is any in low-temperature polysilicon thin film transistor (TFT), high temperature polysilicon silicon thin film transistor or oxide semiconductor thin-film transistor.Also,
In the present embodiment, in the odd-numbered line that the matrix is located at due to second thin film transistor (TFT) 40, second thin film transistor (TFT)
40 grid is connected with the scan line of odd-numbered line, such as scan line GL (1), GL (3).Further, the liquid crystal
Display panel 100 includes the pixel 50 of multiple array arrangements of array arrangement.Each pixel 50 is located at a pixel
In region 11.Each pixel 50 include the first film transistor 30 set described in one in pixel region 11 and with the picture
The corresponding public electrode region in plain region 11 and between the first film transistor 30 and the public electrode region
Liquid crystal region.The voltage in the public electrode region is fixed, by being filled with positive polarity electricity into the first film transistor 30
Pressure or reverse voltage, so as to drive the pixel present positive polarity potential or with the positive polarity potential potential pole
The opposite negative polarity potential of property.In the present embodiment, the type of drive of the liquid crystal display panel is the type of drive of dot inversion, i.e.,
The polarities of potentials of each pixel 50 is contrary with the polarities of potentials of any pixel 50 adjacent with its.The positive polarity
Current potential includes maximum potential value, and the negative polarity potential includes minimum level value, the maximum potential value and the minimum level
Value neutralization obtains common electrode potential value, and the common electrode potential value is identical with the potential value in the public electrode region.It is logical
In the case of often, the maximum potential value of the positive polarity potential is 14V, and the minimum level value of the negative polarity potential is 0V, described
Common electrode potential value is 7V.
When driving the progress of the liquid crystal display panel 100 picture display, start voltage to the scan line 30 input, open
The first film transistor 30 electrically connected with the scan line 20 and second thin film transistor (TFT) 40 so that the first film
The source electrode of transistor 30 is turned on drain electrode, and the source electrode of second thin film transistor (TFT) 40 is also switched on drain electrode.Pass through the data
Line 10 is filled with positive polarity voltage or reverse voltage to the first film transistor electrically connected with the data wire, that is, leads to
Cross the source electrode of the first film transistor 30 of the data wire 10 and conducting and drain to the first film transistor 30
The pixel electrode progress of electrical connection charges to positive polarity maximum potential value 14V or described pixel electrodes and carried out to the data wire 10
Negative polarity potential minimum value 0V is discharged to, so that liquid crystal two ends are produced in the corresponding pixel of the first film transistor 30
Positive polarity potential or negative polarity potential is presented in positive polarity pressure difference or negative polarity pressure difference, i.e., described pixel.In the present invention, by institute
State the source electrode of the second thin film transistor (TFT) 40 to electrically connect with first film transistor described in one 30 respectively with drain electrode, when described the
When the source electrode of two thin film transistor (TFT)s 40 is turned on drain electrode, it is electrically connected with the source electrode of second thin film transistor (TFT) 40 with drain electrode
The first film transistor 30 electrically connect pixel electrode in electric charge neutralized.
For example, starting voltage to the input of scan line described in line n 30, the first film transistor 30 of line n is opened
And second thin film transistor (TFT) 40.Electrically connected by the data wire 20 for the first film transistor 30 of line n
Pixel electrode is charged or the first film transistor 30 of line n is discharged to the data wire 20, and described second is thin
The source electrode of film transistor 40 or drain electrode conducting.In the present embodiment, because the liquid crystal display panel 10 is that type of drive is a little
Polarities of potentials in reversion, i.e., two adjacent pixels 50 is opposite.Therefore, when the first film transistor of line n
After 30 source electrode and drain electrode conducting, described first on the (n+1)th row electrically connected with the first film transistor 30 of line n
On the pixel electrode of first film transistor electrical connection on the pixel electrode and the n-th+2 row of thin film transistor (TFT) electrical connection
Charging neutrality.In the present embodiment, it is described that the first film transistor 30 in the pixel of positive polarity potential is electrically connected
Pixel electrode is that the first film transistor 30 in maximum potential value 14V, the pixel of negative polarity potential is electrically connected
The pixel electrode is potential minimum value 0V.It is described on the (n+1)th row that the first film transistor 30 of line n is electrically connected
The pixel electrode of first film transistor electrical connection on the pixel electrode and the n-th+2 row of first film transistor electrical connection
On charging neutrality after, it is described on the pixel electrode and the n-th+2 row of the electrical connection of the first film transistor on the (n+1)th row
Potential value on the pixel electrode of first film transistor electrical connection is common-battery place value 7V.
Therefore, when the picture electrically connected by the scan line 30 to the first film transistor on (n+1)th row
The electricity that the pixel electrode in plain electrode charge/electric discharge and the n-th+2 row carries out charged/discharged is only 7V, with existing skill
Charge capacity is compared with discharge electricity amount 14V in art, and charge/discharge electricity amount reduces half.The liquid crystal is being kept so as to realize
Under the scan line 20 of display panel and the structure of data wire 30, the quick charge to the liquid crystal display panel is realized, from
And can change while the aperture opening ratio for not losing picture element, the penetrance for ensureing liquid crystal panel and the guarantee liquid crystal panel yield
It is apt to the charging performance of the liquid crystal panel so that ensure that liquid crystal panel charging is sufficient within the shorter surface sweeping line opening time.
Referring to Fig. 3, another embodiment of the present invention provides a kind of liquid crystal display panel 200, the liquid crystal display panel 200
It is with the difference of above-mentioned liquid crystal display panel 100：The scan line 20 of liquid crystal display panel 200 described in the present embodiment is also
Including a puppet scan line GL (0), the pseudo- scan line GL (0) is located at first scan line GL (1) and deviates from described second
Bar scan line GL (2) side, second thin film transistor (TFT) 40 is located at each pixel region 11 of even number line.Also,
It is thin that described second also is provided between the pseudo- scan line GL (0) and first scan line GL (1) and two data wires
Film transistor 40, and the first film transistor 30 is not set.The grid of second thin film transistor (TFT) and the pseudo- scan line
GL (0) is electrically connected.Also, in the present embodiment, second thin film transistor (TFT) 40 is located in the even number line of matrix, i.e., described second
The grid of thin film transistor (TFT) 40 and the scan line of even number line are attached, such as scan line GL (2), GL (4).The puppet
Scan line GL (0) is Dummy lines, is used to drive connected second film crystal by the pseudo- scan line GL (0)
Pipe 40, is electrically connected so as to making the first film transistor 30 of the first row being connected with second thin film transistor (TFT) 40
The electric charge for the pixel electrode that pixel electrode is electrically connected with the first film transistor 30 of the second row is neutralized.So as to avoid
The pixel electrode of the thin film transistor (TFT) electrical connection of the first row can not be electrically connected with second thin film transistor (TFT) 40
Situation.So as to ensure that all first film transistors 30 in the liquid crystal display panel 100 can be realized quickly
Charging.
Figure Fig. 4 is referred to, the present invention also provides a kind of driving method for liquid crystal display panel.In the present embodiment, the liquid crystal
Displaying panel driving method drives the liquid crystal display panel 100, including：
Step 101, the offer liquid crystal display panel 100.
Step 102, open in any odd-numbered line in the matrix of multiple first film transistor arrays formation described the
Two thin film transistor (TFT)s, make the source electrode and the drain electrode conducting of second thin film transistor (TFT) on the row so that with the row
Another adjacent with the even number line of electric charge of the pixel electrode of first film transistor electrical connection in adjacent even number line
The charging neutrality of the pixel electrode of first film transistor electrical connection in one odd-numbered line.Described in the even number line
The current potential of the pixel electrode of one thin film transistor (TFT) electrical connection is electrically connected with the first film transistor in another odd-numbered line
After the charging neutrality of the pixel electrode connect, the electricity of the pixel electrode of the first film transistor electrical connection in the even number line
Lotus is identical with the electric charge of the pixel electrode of the first film transistor in another odd-numbered line.
With second thin film transistor (TFT) 40 of the first row and be connected with second thin film transistor (TFT) 40 second
Illustrated exemplified by the first film transistor 30 of row and the third line.By the scan line GL (1) of the first row to
Second thin film transistor (TFT) 40 of a line is scanned driving.So as to open second thin film transistor (TFT) 40 of the first row,
Make the source electrode and the drain electrode conducting of second thin film transistor (TFT) 40 of the first row, so that described on second row
The electric charge for the pixel electrode that first film transistor 30 is electrically connected and the electricity of the first film transistor 30 on described the third line
The charging neutrality of the pixel electrode of connection.The electricity of the pixel electrode of first film transistor electrical connection on second row
After the charging neutrality for the pixel electrode that position is electrically connected with the first film transistor on described the third line, on second row
First film transistor electrical connection pixel electrode electric charge and described the third line on the first film transistor
The electric charge of the pixel electrode of electrical connection is identical.In the present embodiment, the first film transistor electrical connection on second row
The electric charge of pixel electrode that is electrically connected with the first film transistor on described the third line of pixel electrode be 7V.
It is understood that when second thin film transistor (TFT) is located at the even number line of the matrix, opening the matrix
In any even number line on second thin film transistor (TFT), make second thin film transistor (TFT) on the row the source electrode and
The drain electrode conducting, so that the electricity for the pixel electrode that the first film transistor in the odd-numbered line adjacent with the row is electrically connected
In the electric charge of the pixel electrode of first film transistor electrical connection in lotus another even number line adjacent with the odd-numbered line
With.On the current potential and another even number line of the pixel electrode of first film transistor electrical connection in the odd-numbered line
After the charging neutrality of the pixel electrode of the first film transistor electrical connection, the first film crystal in the odd-numbered line
The pixel electricity that the electric charge of the pixel electrode of pipe electrical connection is electrically connected with the first film transistor in another even number line
The electric charge of pole is identical.Specifically, working as
The first film transistor in step 103, the driving even number line, and to described the in the even number line
Positive polarity voltage/reverse voltage is filled with one thin film transistor (TFT).
For example, what the first film transistor 30 completed described in the step 102 on second row was electrically connected
The charging neutrality for the pixel electrode that the electric charge of pixel electrode is electrically connected with the first film transistor 30 on described the third line
Afterwards, driving is scanned to first film transistor 30 described in the second row by the scan line GL (2) of second row, opens the
The first film transistor 30 of two rows, by the data wire of odd column/even column to the described first thin of the second row
The first film transistor 30 of odd column/even column is filled with positive polarity voltage in film transistor 30, passes through even column/odd number
The first film crystal of data wire even column/odd column into the first film transistor 30 of the second row of row
Pipe 30 is filled with reverse voltage.For example, electric when being filled with positive polarity in the first film transistor 30 arranged to the second row m
Pressure；Reverse voltage is filled with the first film transistor 30 arranged to the second row m+1.Wherein, m is any more than zero
Natural number.Pixel electrode by the first film transistor electrical connection on second row and the institute on described the third line
The electric charge for stating the pixel electrode of first film transistor electrical connection is 7V, therefore, no matter it is thin to described first on the second row
The pixel electrode of film transistor electrical connection is filled with reverse voltage to potential minimum value (0V) or positive polarity voltage to maximum potential
It is worth (14V), the voltage of the pixel electrode for the first film transistor electrical connection being filled with the second row is only 7V, compared to
Maximum potential value (14V) is charged to from potential minimum value (0V) or be discharged to minimum electricity from maximum potential value (14V) in the prior art
It is filled with required for place value (0V) for 14V voltage, greatly reduces discharge and recharge, so as to greatly reduce the charging interval, is protected
The charging of liquid crystal panel is demonstrate,proved and then is completed in a relatively short time, picture taste and the liquid crystal panel for improving liquid crystal panel are reliable
Property.
The first film transistor in step 104, driving another odd-numbered line, and in another odd-numbered line
The first film transistor in be filled with reverse voltage/positive polarity voltage.
For example, after completing in the step 102 to the charging of the first film transistor 30 of the second row, passing through
The scan line GL (3) of the third line is scanned to first film transistor described in the third line is driven through odd column/even column
Data wire first film transistor of odd column/even column into the first film transistor of the third line is filled with
Reverse voltage, by the data wire of even column/odd column into the first film transistor of the third line even column/
The first film transistor of odd column is filled with positive polarity voltage.For example, when the first film arranged to the second row m is brilliant
Positive polarity voltage is filled with body pipe 30, then is filled with reverse voltage in the first film transistor 30 arranged to the third line m,
Positive polarity voltage is filled with the first film transistor 30 arranged to the third line m+1.
Also, the scan line GL (3) of described the third line is scanned driving to the second thin film transistor (TFT) described in the third line, opens
Second thin film transistor (TFT) of the third line is opened, makes the source electrode of second thin film transistor (TFT) of the third line and the drain electrode
Conducting, so that on the electric charge and the fifth line of the pixel electrode that the first film transistor in the fourth line is electrically connected
First film transistor electrical connection pixel electrode charging neutrality, then to the first film crystal in fourth line
The pixel electrode of first film transistor electrical connection on the pixel electrode and the fifth line of pipe electrical connection is charged,
And the first film transistor and the second thin film transistor (TFT) for according to above-mentioned steps being sequentially completed other each rows are scanned drive
Dynamic and discharge and recharge, so as to complete the display of a frame picture.
The present invention also provides a kind of liquid crystal display device 200, and the liquid crystal display device 200 includes liquid crystal display device sheet
Body 210 and above-mentioned liquid crystal display panel 100, the liquid crystal display device body 210 and the described electricity of liquid crystal display panel 100
Connection.
Described above is the preferred embodiment of the present invention, it is noted that for those skilled in the art
For, under the premise without departing from the principles of the invention, some improvements and modifications can also be made, these improvements and modifications are also considered as
Protection scope of the present invention.
Claims (10)
1. a kind of liquid crystal display panel, it is characterised in that multiple first film transistors and array arrangement including array arrangement
Multiple second thin film transistor (TFT)s；Each first film transistor correspondence is electrically connected with a pixel electrode, and multiple described the
Two thin film transistor (TFT)s are respectively positioned in the odd-numbered line of the matrix of multiple first film transistor formation or are respectively positioned on the square
The even number line of battle array, and each second thin film transistor (TFT) is located at the first film crystal adjacent with two of a line with it
Between pipe；The pixel that second thin film transistor (TFT) in line n is electrically connected with the first film transistor on the (n+1)th row
The pixel electrode of first film transistor electrical connection on electrode and the n-th+2 row is electrically connected, when using dot inversion
Type of drive drives the liquid crystal display panel, opens second thin film transistor (TFT) in line n, makes the described of the (n+1)th row
The picture that the electric charge of the pixel electrode of first film transistor electrical connection is electrically connected with the first film transistor on the n-th+2 row
The charging neutrality of plain electrode, wherein, n is the natural number more than zero.
2. liquid crystal display panel as claimed in claim 1, it is characterised in that the liquid crystal display panel also includes interval and flat
Capable a plurality of data lines, interval and parallel multi-strip scanning line；The scan line is vertical with the data wire and exhausted each other
Edge；The first film transistor includes grid, source electrode, drain electrode and pixel electrode, and second thin film transistor (TFT) includes grid, source
Pole and drain electrode；The drain electrode of the first film transistor is electrically connected with pixel electrode described in one, to realize the thin film transistor (TFT)
With the electrical connection of the pixel electrode；Described the of line n m row in the matrix of multiple first film transistor arrays formation
The grid of one thin film transistor (TFT) is electrically connected with scan line described in nth bar, and its drain electrode is electrically connected with m data lines；In line n
The grid of second thin film transistor (TFT) is electrically connected with nth bar scan line, the leakage of second thin film transistor (TFT) in line n
Pole/source electrode pixel electrode corresponding with the first film transistor on the (n+1)th row is electrically connected, and the institute in line n
The source/drain pixel electrode corresponding with the first film transistor on the n-th+2 row for stating the second thin film transistor (TFT) is carried out
Electrical connection, wherein, n, m are the natural number more than zero.
3. liquid crystal display panel as claimed in claim 2, it is characterised in that the scan line includes a pseudo- scan line, institute
State pseudo- scan line and deviate from the side of the Article 2 scan line positioned at first scan line in parallel a plurality of data lines.
4. liquid crystal display panel as claimed in claim 3, it is characterised in that the pseudo- scan line and first scan line
And second thin film transistor (TFT) is provided between two data wires, grid and the puppet of second thin film transistor (TFT) are swept
Retouch line electrical connection.
5. liquid crystal display panel as claimed in claim 1, it is characterised in that the liquid crystal display panel also includes array arrangement
Multiple pixels, the pixel corresponds with the first film transistor and by the corresponding first film transistor
It is driven, each the polarities of potentials of the polarities of potentials of the pixel pixel adjacent with its is contrary.
6. liquid crystal display panel as claimed in claim 5, it is characterised in that the polarities of potentials of the pixel includes positive polarity electricity
Position and the negative polarity potential opposite with the positive polarity potential polarities of potentials, the positive polarity potential include maximum potential value, institute
Stating negative polarity potential includes minimum level value, and the maximum potential value neutralizes with the minimum level value and obtains common-battery electrode potential
Value.
7. liquid crystal display panel as claimed in claim 1, it is characterised in that second thin film transistor (TFT) of m row is located at
Between m+1 data lines and m data lines.
8. a kind of driving method for liquid crystal display panel, it is characterised in that including：
Liquid crystal display panel as described in claim any one of 1-7 is provided；Multiple first film transistor arrays are opened to be formed
Matrix in any odd-numbered line on second thin film transistor (TFT), make the described of second thin film transistor (TFT) on the row
Source electrode and drain electrode conducting, so that the pixel electricity of the first film transistor electrical connection in the even number line adjacent with the row
The pixel electrode of first film transistor electrical connection in the electric charge of pole another odd-numbered line adjacent with the even number line
Charging neutrality；
Drive the first film transistor in the even number line, and to the first film transistor in the even number line
In be filled with positive polarity voltage/reverse voltage；
The first film transistor in another odd-numbered line is driven, and it is thin to described first in another odd-numbered line
Reverse voltage/positive polarity voltage is filled with film transistor.
9. driving method for liquid crystal display panel as claimed in claim 8, it is characterised in that described first in the even number line
The current potential of the pixel electrode of thin film transistor (TFT) electrical connection is electrically connected with the first film transistor in another odd-numbered line
Pixel electrode charging neutrality after, the electric charge of the pixel electrode of the first film transistor in even number line electrical connection
It is identical with the electric charge of the pixel electrode of the first film transistor electrical connection in another odd-numbered line.
10. a kind of liquid crystal display device, it is characterised in that including liquid crystal display device body and such as any one of claim 1-7
Described liquid crystal display panel, the liquid crystal display device body is electrically connected with described liquid crystal display panel.
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| CN201710608995.3A CN107290912A (en) | 2017-07-24 | 2017-07-24 | Liquid crystal display panel and its driving method |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201710608995.3A CN107290912A (en) | 2017-07-24 | 2017-07-24 | Liquid crystal display panel and its driving method |
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| CN201710608995.3A Pending CN107290912A (en) | 2017-07-24 | 2017-07-24 | Liquid crystal display panel and its driving method |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107871473A (en) * | 2017-11-01 | 2018-04-03 | 武汉天马微电子有限公司 | A kind of display panel and display device |
| CN107991817A (en) * | 2017-11-29 | 2018-05-04 | 武汉华星光电技术有限公司 | A kind of display panel and its manufacture method and control method |
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| CN101271210A (en) * | 2007-03-20 | 2008-09-24 | Lg.菲利浦Lcd株式会社 | Liquid crystal display device and method of driving the same |
| CN104062790A (en) * | 2014-06-09 | 2014-09-24 | 深圳市华星光电技术有限公司 | Display device and driving method thereof |
| CN106019743A (en) * | 2016-06-15 | 2016-10-12 | 京东方科技集团股份有限公司 | Array substrate, method for driving array substrate, and relevant devices |
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| CN101271210A (en) * | 2007-03-20 | 2008-09-24 | Lg.菲利浦Lcd株式会社 | Liquid crystal display device and method of driving the same |
| CN104062790A (en) * | 2014-06-09 | 2014-09-24 | 深圳市华星光电技术有限公司 | Display device and driving method thereof |
| CN106019743A (en) * | 2016-06-15 | 2016-10-12 | 京东方科技集团股份有限公司 | Array substrate, method for driving array substrate, and relevant devices |
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| CN107871473A (en) * | 2017-11-01 | 2018-04-03 | 武汉天马微电子有限公司 | A kind of display panel and display device |
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