CN107290647B - On-off circuit tester - Google Patents
On-off circuit tester Download PDFInfo
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- CN107290647B CN107290647B CN201710515835.4A CN201710515835A CN107290647B CN 107290647 B CN107290647 B CN 107290647B CN 201710515835 A CN201710515835 A CN 201710515835A CN 107290647 B CN107290647 B CN 107290647B
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- 238000012360 testing method Methods 0.000 claims abstract description 274
- 239000003990 capacitor Substances 0.000 claims description 12
- 230000002950 deficient Effects 0.000 claims description 4
- 238000012797 qualification Methods 0.000 claims description 4
- 230000000087 stabilizing effect Effects 0.000 claims 14
- 238000004804 winding Methods 0.000 claims 4
- 238000001514 detection method Methods 0.000 abstract description 8
- 238000010586 diagram Methods 0.000 description 26
- 238000000034 method Methods 0.000 description 16
- 230000008569 process Effects 0.000 description 9
- 230000009471 action Effects 0.000 description 3
- 230000008859 change Effects 0.000 description 3
- 230000006978 adaptation Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000013078 crystal Substances 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G01R31/281—Specific types of tests or tests for a specific type of fault, e.g. thermal mapping, shorts testing
- G01R31/2812—Checking for open circuits or shorts, e.g. solder bridges; Testing conductivity, resistivity or impedance
Abstract
The invention discloses an on-off circuit tester, which is used for testing a multi-layer thick film hybrid circuit and comprises a single chip microcomputer, a power module, a display circuit and a test circuit, wherein the power module is connected with the single chip microcomputer and used for supplying power, the display circuit is connected with the single chip microcomputer and used for displaying a test result, and the test circuit is connected with the single chip microcomputer and a test pin of a test product; the test circuit comprises a drive circuit for receiving the electric potential sent by the singlechip to drive the latch, and a test board connected with a test signal end of the latch and provided with a plurality of test pins, wherein the test pins are used for being connected with the test pins to feed back test results to the latch, and the latch is also connected with the singlechip to feed back the test results to the singlechip. Therefore, the tester has the characteristics of high detection speed and high accuracy compared with manual detection, and can complete the test of a plurality of groups of test pins at one time. In addition, the tester can be reused, and has strong universality.
Description
Technical Field
The invention relates to the technical field of electronics, in particular to an on-off circuit tester.
Background
Along with the rapid development of electronic products, higher requirements are also put forward for testing corresponding circuit boards of the electronic products. In particular, thick film hybrid circuit boards with multi-layer cross wiring require on-off testing of multiple test points, such as whether the electrodes of the bridge portion of the circuit product have open circuits, short circuits, and whether the wire portions have open circuits.
In the prior art, the test of the circuit board is carried out by adopting a universal meter or a related instrument by common manual operation, the detection efficiency is low, misoperation exists, and the consistency cannot be ensured.
Therefore, how to improve the measurement efficiency and the detection speed and accuracy in the on-off test process of the circuit board are the problems to be solved by those skilled in the art.
Disclosure of Invention
The invention aims to provide an on-off circuit tester which is used for improving the measuring efficiency and the detecting speed and accuracy in the on-off test process of a circuit board.
In order to solve the technical problems, the invention provides an on-off circuit tester for testing a multi-layer thick film hybrid circuit, which comprises a singlechip, a power module connected with the singlechip and used for supplying power, a display circuit connected with the singlechip and used for displaying a test result, and a test circuit connected with the singlechip and a test pin of a test product;
the test circuit comprises a drive circuit for receiving the electric potential sent by the singlechip to drive the latch, and a test board connected with a test signal end of the latch and provided with a plurality of test pins, wherein the test pins are used for being connected with the test pins to feed back the test result to the latch, and the latch is also connected with the singlechip to feed back the test result to the singlechip.
Preferably, the device further comprises a button, a starting switch and a time delay switch which are connected with the singlechip and used for turning pages of the test result, wherein the test circuits are in a plurality of groups and are in one-to-one correspondence with the test products.
Preferably, the system further comprises an external clock circuit connected with the singlechip.
Preferably, the device further comprises a reset circuit connected with the singlechip.
Preferably, the device further comprises a pull-up resistor circuit connected with the singlechip.
Preferably, the voice prompt circuit is connected with the singlechip.
Preferably, the display circuit comprises an LCD display screen and a position indication circuit connected with the singlechip and used for displaying whether the test result of the singlechip is qualified or not and the position of the test product;
the position indication circuit comprises a defective product indication loop connected with the single chip microcomputer and a qualification indication loop connected with the single chip microcomputer, wherein the qualification indication loop comprises a plurality of groups and corresponds to the test products one by one.
Preferably, the driving circuit specifically comprises a first resistor, an NPN triode, a second resistor, a third resistor and a fourth resistor;
the first end of the first resistor is connected with the singlechip, the second end of the first resistor is connected with the base electrode of the NPN triode, the emitter electrode of the NPN triode is grounded, the collector electrode of the NPN triode is connected with the first end of the second resistor, the second end of the third resistor and the second end of the fourth resistor are all connected with the power supply module, the first end of the third resistor and the first end of the fourth resistor are connected with the power supply end of the latch, and the public end of the second resistor and the NPN triode is connected with the starting end of the latch.
Preferably, the test board specifically includes a first test needle, a second test needle, a third test needle, a fourth test needle, a fifth test needle, a sixth test needle, a first test switch, a second test switch, a third test switch, a fourth test switch, and a fifth test switch;
the first test needle is connected with a first end of the first test switch, a second end of the first test switch and a second end of the second test switch are connected with the sixth test needle, a first end of the second test switch and a first end of the third test switch are connected with the second test needle, a second end of the third test switch and a second end of the fifth test switch are connected, a first end of the fourth test switch is connected with the third test needle, a first end of the fifth test switch is connected with the fourth test needle, and a second end of the fourth test switch is connected with the fifth test needle;
the fifth test needle and the sixth test needle are connected with the test signal end, and the test product comprises 5 groups of test points, specifically 2 groups of conduction test points and 3 groups of disconnection test points.
Preferably, the latch is a 74HC573D latch.
The invention provides an on-off circuit tester which comprises a singlechip, a power supply module, a display circuit and a test circuit, wherein the test circuit comprises a driving circuit, a latch and a test board. The method comprises the steps of firstly connecting test pins with test pins on a test board, then applying corresponding level signals to the test pins, enabling signals between the test pins to be fed back to a test signal end of a latch, connecting the latch with a singlechip, receiving test results, and finally displaying the singlechip on a display circuit according to the test results. Therefore, the tester has the characteristics of high detection speed and high accuracy compared with manual detection, and can complete the test of a plurality of groups of test pins at one time. In addition, the tester can be reused, and has strong universality.
Drawings
For a clearer description of embodiments of the present invention, the drawings that are required to be used in the embodiments will be briefly described, it being apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to the drawings without inventive effort for those skilled in the art.
FIG. 1 is a block diagram of an on-off circuit tester provided by an embodiment of the invention;
FIG. 2 is a block diagram of a multi-layer thick film hybrid circuit according to an embodiment of the present invention;
fig. 3 is a circuit diagram of a power module according to an embodiment of the present invention;
FIG. 4 is a block diagram of a page turning button and a start switch according to an embodiment of the present invention;
FIG. 5 is a block diagram of a delay switch according to an embodiment of the present invention;
FIG. 6 is a pin distribution diagram of a singlechip according to an embodiment of the present invention;
FIG. 7 is a block diagram of a reset circuit according to an embodiment of the present invention;
FIG. 8 is a circuit diagram of a pull-up circuit according to an embodiment of the present invention;
FIG. 9 is a circuit diagram of a voice prompt according to an embodiment of the present invention;
FIG. 10 is a circuit diagram of an LCD display according to an embodiment of the present invention;
FIG. 11 is a circuit diagram of a position indication according to an embodiment of the present invention;
FIG. 12 is a diagram showing a connection structure between a driving circuit and a singlechip and a latch according to an embodiment of the present invention;
fig. 13 is a block diagram of a test board according to an embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by a person of ordinary skill in the art without making any inventive effort are within the scope of the present invention.
The invention provides an on-off circuit tester which is used for improving the measuring efficiency and the detecting speed and accuracy in the on-off test process of a circuit board.
In order to better understand the aspects of the present invention, the present invention will be described in further detail with reference to the accompanying drawings and detailed description.
Fig. 1 is a block diagram of an on-off circuit tester according to an embodiment of the present invention. As shown in fig. 1, the on-off circuit tester comprises a single chip microcomputer 10, a power module 11 connected with the single chip microcomputer 10 and used for supplying power, a display circuit 12 connected with the single chip microcomputer 10 and used for displaying test results, and a test circuit 13 connected with the single chip microcomputer 10 and test pins of a test product.
The test circuit 13 comprises a drive circuit 15 for receiving the electric potential sent by the singlechip 10 to drive the latch 14, and a test board 16 connected with a test signal end of the latch 14 and provided with a plurality of test pins, wherein the test pins are used for being connected with the test pins to feed back test results to the latch 14, and the latch 14 is also connected with the singlechip 10 to feed back the test results to the singlechip 10.
In particular implementations, the present on-off circuit tester is used for testing multi-layer thick film hybrid circuits, and in particular for testing on-off between test pins on circuit board 16. Fig. 2 is a block diagram of a multi-layer thick film hybrid circuit according to an embodiment of the present invention. As shown in fig. 2, the circuit contains 4 test products, JP1, JP2, JP3, JP4, respectively. Each test product contains 6 test pins, the purpose of the test being to verify whether test pin 2 and test pin 6 are on, whether test pin 3 and test pin 5 are on, whether test pin 2 and test pin 1 are off, whether test pin 3 and test pin 6 are off, and whether test pin 3 and test pin 4 are off. The test principle is as follows:
the high voltage is applied to the test pin 2 and the test pin 3, and when the low voltage is applied to the test pin 6, whether the voltage of the test pin 2 is pulled down is detected, if yes, the test pin 2 and the test pin 6 are conducted, otherwise, the test pin is disconnected; similarly, a high voltage is applied to the test pin 3, and when a low voltage is applied to the test pin 5, whether the voltage of the test pin 3 is pulled down is detected, if so, the test pin 3 and the test pin 5 are turned on, otherwise, the test pin is turned off. In addition, the test pins 2 and 1, the test pins 3 and 6, and the test pins 3 and 4 are tested in a similar manner to the above process, and the description thereof will be omitted.
By giving a potential through the singlechip 10, the driving circuit 15 generates a corresponding driving signal due to the change of the high potential and the low potential, so that the latch 14 is started. The test pins on the test board 16 are connected to the test pins, and are capable of sending test signals to the latch 14, so that the latch 14 sends test results to the singlechip 10.
Fig. 3 is a circuit diagram of a power module according to an embodiment of the invention. It will be appreciated that the power module shown in fig. 3 is only one of the specific examples and is not representative of only such an implementation. As shown in fig. 3, 220V ac power is transformed by a power switch S1, a fuse F1 and a transformer T1 to output 6.5V ac power, and then rectified by a rectifier bridge formed by diodes D1-D4 and filtered by a filter capacitor C1, and voltage of 5V is regulated by a voltage regulator tube U1 (model LM7805 in the figure) to output voltage, and the voltage is filtered by filter capacitors C2 and C3 to supply power to the whole circuit (the output end of the power module 11 is VCC).
The on-off circuit tester provided by the embodiment of the invention comprises a singlechip, a power supply module, a display circuit and a test circuit, wherein the test circuit comprises a driving circuit, a latch and a test board. The method comprises the steps of firstly connecting test pins with test pins on a test board, then applying corresponding level signals to the test pins, enabling signals between the test pins to be fed back to a test signal end of a latch, connecting the latch with a singlechip, receiving test results, and finally displaying the singlechip on a display circuit according to the test results. Therefore, the tester has the characteristics of high detection speed and high accuracy compared with manual detection, and can complete the test of a plurality of groups of test pins at one time. In addition, the tester can be reused, and has strong universality.
It can be understood that the structure of the test board and the number of the test pins in the on-off circuit tester provided in this embodiment may be set according to the specific situation of the test product, and this embodiment is not limited.
On the basis of the above embodiment, as a preferred implementation manner, the device further includes a button (including an up-turn button S3 and a down-turn button S4) connected to the single chip microcomputer 10 for turning pages of the test result, a start switch S5, and a delay switch S6, where the test circuits 13 are multiple groups and are in one-to-one correspondence with the test products.
In a specific implementation, it may be necessary to measure a plurality of test products at a time, and then one set of test circuits 13 is required for each test product, and when the number of test products is 4, as shown in fig. 2, 4 sets of test circuits 13 are required.
Fig. 4 is a block diagram of a page turning button and a start switch according to an embodiment of the present invention. Fig. 5 is a block diagram of a delay switch according to an embodiment of the present invention. Fig. 6 is a pin distribution diagram of a single chip microcomputer according to an embodiment of the present invention. The components are correspondingly connected through the reference numerals of pins on the singlechip 10. As shown in fig. 4, one end of the upturning button S3 is grounded, the other end is connected with P05 of the single-chip microcomputer 10, one end of the downturning button S4 is grounded, and the other end is connected with P06 of the single-chip microcomputer 10; one end of the starting switch S5 is grounded, and the other end is connected with P07 of the singlechip 10. Wherein the start switch S5 is a manual switch. As shown in fig. 5, the delay switch S6 is a measuring time for delaying different positions, and each time the switch is pressed for testing, the test will be automatically delayed to start.
Based on the above embodiment, as a preferred implementation manner, the external clock circuit 17 connected with the singlechip 10 is further included. As shown in fig. 6, the external clock circuit 7 includes a crystal oscillator Y1 and fourth and fifth capacitors C4 and C5. The external clock circuit 17 is used for sending a clock signal to the singlechip 10, and the specific process is not described again.
Based on the above embodiment, as a preferred embodiment, the reset circuit 18 connected to the single chip microcomputer 10 is further included.
Fig. 7 is a block diagram of a reset circuit according to an embodiment of the present invention. As shown in fig. 7, the RESET circuit includes a RESET switch S2, a sixth capacitor C6 and a second resistor R2, and one end of the RESET switch S2 is connected to RESET of the singlechip 10. J3 and J4 are contact PINs, are connected with the singlechip 10 and then are connected with the interface piece, and are 20PIN.
Based on the above embodiment, as a preferred embodiment, the pull-up resistor circuit 19 connected to the single chip microcomputer 10 is further included.
Fig. 8 is a circuit diagram of a pull-up circuit according to an embodiment of the present invention. The resistor R8-R15 is used as a pull-up resistor of the P0 port of the singlechip 10 and is respectively connected with P00-P07. When the single chip microcomputer 10 has no pull-up resistor, the pull-up resistor can be added in the manner of fig. 8, and the detailed process is not repeated.
Based on the above embodiment, as a preferred implementation manner, the voice prompt circuit 20 connected with the singlechip 10 is further included.
Fig. 9 is a circuit diagram of voice prompt according to an embodiment of the present invention. As shown in fig. 9, the circuit comprises a resistor R1, a triode Q1 and a buzzer U3, wherein one end of the resistor R1 is connected with P04 of the singlechip 10. P04 of singlechip 10 outputs high level signal, and the triode switches on to buzzer U3 begins to make a sound, thereby plays the suggestion effect.
Based on the above embodiment, as a preferred embodiment, the display circuit 12 includes an LCD display screen U2 and a position indicating circuit 21 connected to the singlechip 10 for displaying whether the test result of the singlechip 10 is qualified or not and the position where the test product is located.
The position indication circuit 21 comprises a defective product indication loop 22 connected with the single chip microcomputer 10 and a qualified indication loop 23 connected with the single chip microcomputer 10, wherein the qualified indication loops comprise a plurality of groups and are in one-to-one correspondence with the tested products.
Fig. 10 is a circuit diagram of an LCD display according to an embodiment of the present invention. As shown in fig. 10, the connection relationship between each pin of the LCD display screen U2 and the pin of the single-chip microcomputer 10 is that the VO pin is grounded through the potentiometer VR 1.
Fig. 11 is a circuit diagram of a position indication according to an embodiment of the present invention. As shown in fig. 11, the defective indication circuit 22 includes a resistor R3 and a light emitting diode D5, and one end of the resistor R3 is connected to the P30 of the singlechip 10. The eligibility indication circuit 23 includes resistors R4-R7 and LEDs D6-D9, each of which is connected to a respective one of the LEDs. The resistor R4 and the light emitting diode D6 form a group, one end of the resistor R4 is connected with the P31 of the singlechip 10, the resistor R5 and the light emitting diode D7 form a group, one end of the resistor R5 is connected with the P32 of the singlechip 10, the resistor R6 and the light emitting diode D8 form a group, one end of the resistor R6 is connected with the P33 of the singlechip 10, the resistor R7 and the light emitting diode D9 form a group, and one end of the resistor R7 is connected with the P34 of the singlechip 10. It will be appreciated that the circuit shown in fig. 11 is in the case of 4 test products. In a specific implementation, the light emitting color of the light emitting diode may be selected, for example, the light emitting diode D5 is red light, and the light emitting diodes D6-D9 are green light.
On the basis of the above-described embodiment, as a preferred embodiment, the driving circuit 15 specifically includes a first resistor, an NPN transistor, a second resistor, a third resistor, and a fourth resistor. The first end of the first resistor is connected with the singlechip 10, the second end of the first resistor is connected with the base electrode of the NPN triode, the emitter electrode of the NPN triode is grounded, the collector electrode of the NPN triode is connected with the first end of the second resistor, the second end of the third resistor and the second end of the fourth resistor are all connected with the power supply module 11, the first end of the third resistor and the first end of the fourth resistor are connected with the power supply end of the latch 14, and the common end of the second resistor and the NPN triode is connected with the starting end of the latch 14.
Fig. 12 is a connection structure diagram of a driving circuit, a singlechip and a latch according to an embodiment of the present invention. As shown in fig. 12, 4 sets of driving circuits, namely, a first driving circuit 150, a second driving circuit 151, a third driving circuit 152 and a fourth driving circuit 153, are included. The latch 14 includes a first latch A1, a second latch A2, a third latch A3, and a fourth latch A4. Preferably, latch 14 is a 74HC573D latch.
The first driving circuit 150 includes resistors R16 to R19 (resistor R16 as a first resistor, resistor R17 as a second resistor, resistor R18 as a third resistor, and resistor R19 as a fourth resistor) and an NPN transistor Q2.
The second driving circuit 151 includes resistors R20 to R23 (resistor R20 as a first resistor, resistor R21 as a second resistor, resistor R22 as a third resistor, resistor R23 as a fourth resistor) and an NPN transistor Q3.
The third driving circuit 152 includes resistors R24 to R27 (resistor R24 as a first resistor, resistor R25 as a second resistor, resistor R26 as a third resistor, and resistor R27 as a fourth resistor) and an NPN transistor Q4.
The fourth driving circuit 153 includes resistors R28 to R31 (resistor R28 as a first resistor, resistor R29 as a second resistor, resistor R30 as a third resistor, resistor R31 as a fourth resistor) and an NPN transistor Q5.
Based on the above examples, as a preferred embodiment, the test board 16 specifically includes a first test pin CZS11, a second test pin CZS12, a third test pin CZS13, a fourth test pin CZS14, a fifth test pin CZS15, a sixth test pin CZS16, a first test switch a, a second test switch B, a third test switch C, a fourth test switch D, and a fifth test switch E.
Fig. 13 is a block diagram of a test board according to an embodiment of the present invention. As shown in fig. 13, the first test pin CZS11 is connected to a first end of the first test switch a, the second end of the first test switch a and the second end of the second test switch B are both connected to the sixth test pin CZS16, the first end of the second test switch B and the first end of the third test switch CZS13 are both connected to the second test pin CZS12, the second end of the third test switch C and the second end of the fifth test switch E are both connected, the first end of the fourth test switch D is connected to the third test pin CZS13, the first end of the fifth test switch CZS15 is connected to the fourth test pin CZS14, and the second end of the fourth test switch D is connected to the fifth test pin CZS 15;
the fifth test needle CZS15 and the sixth test needle CZS16 are connected with the test signal end, and the test product comprises 5 groups of test points, specifically 2 groups of on test points and 3 groups of off test points.
In a specific implementation, when there are 4 test products, 4 test boards 16 are required to be set correspondingly, and each test board 16 is in the structure of fig. 13, and is only connected with different latches 15, and then connected with different ports of the singlechip 10, which is not described in detail in the present invention.
Taking fig. 13 as an example for illustration, the two pins of the first latch A1 are directly and indirectly driven by the change of the potential of the P20 of the singlechip 10 through the NPN triode Q2 and the peripheral circuit. The scan operation of the set of test circuits is completed when the circuit is turned on by the voltage change acting as an on-off state transition for the first latch A1 in the set of circuits. The other 3 groups of driving circuits are powered off corresponding 3 groups of testing circuits through the P21, P22 and P23 pins of the singlechip 10 and low voltage so as not to interfere the testing results of the first group of testing circuits. Therefore, the tester can be connected with 4 test products at the same time, and 5 groups of test points can be tested at the same time, so that the number of the test of one tester per day is equivalent to the workload of 5 staff, and the test efficiency is improved.
The on-off circuit tester provided by the invention is described in detail above. In the description, each embodiment is described in a progressive manner, and each embodiment is mainly described by the differences from other embodiments, so that the same similar parts among the embodiments are mutually referred. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant points refer to the description of the method section. It should be noted that it will be apparent to those skilled in the art that various modifications and adaptations of the invention can be made without departing from the principles of the invention and these modifications and adaptations are intended to be within the scope of the invention as defined in the following claims.
It should also be noted that in this specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
Claims (8)
1. The on-off circuit tester is used for testing a multilayer thick film hybrid circuit and is characterized by comprising a single chip microcomputer, a power module, a display circuit and a test circuit, wherein the power module is connected with the single chip microcomputer and used for supplying power, the display circuit is connected with the single chip microcomputer and used for displaying a test result, and the test circuit is connected with the single chip microcomputer and a test pin of a test product;
the test circuit comprises a drive circuit for receiving the electric potential sent by the singlechip to drive the latch, and a test board connected with a test signal end of the latch and provided with a plurality of test pins, wherein the test pins are used for being connected with the test pins to feed back the test result to the latch, and the latch is also connected with the singlechip to feed back the test result to the singlechip;
wherein the power module comprises: the device comprises an alternating current power supply, a power switch, a fuse, a transformer, a rectifier bridge, a first capacitor, a voltage stabilizing tube, a second capacitor and a third capacitor;
the rectifier bridge is composed of four diodes, namely a first diode, a second diode, a third diode and a fourth diode;
the alternating current power supply is connected with the power switch, the power switch is connected with the fuse, the fuse is connected with a first end of a primary side winding of the transformer, a second end of the primary side winding of the transformer is connected with the alternating current power supply, a first end of a secondary side winding of the transformer is connected with a common end formed by an anode of the second diode and a cathode of the fourth diode, a second end of the secondary side winding of the transformer is connected with a common end formed by an anode of the first diode and a cathode of the third diode, the cathode of the first diode is connected with a cathode of the second diode, the cathode of the second diode is respectively connected with a first end of the first capacitor and a first end of the voltage stabilizing tube, the second end of the voltage stabilizing tube is connected with both a first end of the second capacitor and a first end of the third capacitor, the anode of the third diode, the anode of the fourth diode, the second end of the second capacitor is connected with a second end of the voltage stabilizing tube, the second end of the voltage stabilizing tube is connected with a second end of the voltage stabilizing tube, and the third end of the voltage stabilizing tube is a common end of the voltage stabilizing tube is connected with the second capacitor, and the voltage stabilizing tube is connected with the third end of the voltage stabilizing tube, and the voltage stabilizing tube is the voltage stabilizing module is connected with the second end of the voltage stabilizing tube, and the voltage stabilizing tube is convenient to output;
the test device also comprises a button, a starting switch and a time delay switch which are connected with the singlechip and are used for turning pages of the test result, wherein the test circuits are in a plurality of groups and are in one-to-one correspondence with the test products;
the test board specifically comprises a first test needle, a second test needle, a third test needle, a fourth test needle, a fifth test needle, a sixth test needle, a first test switch, a second test switch, a third test switch, a fourth test switch and a fifth test switch;
the first test needle is connected with a first end of the first test switch, a second end of the first test switch and a second end of the second test switch are connected with the sixth test needle, a first end of the second test switch and a first end of the third test switch are connected with the second test needle, a second end of the third test switch and a second end of the fifth test switch are connected, a first end of the fourth test switch is connected with the third test needle, a first end of the fifth test switch is connected with the fourth test needle, and a second end of the fourth test switch is connected with the fifth test needle;
the fifth test needle and the sixth test needle are connected with the test signal end, and the test product comprises 5 groups of test points, specifically 2 groups of conduction test points and 3 groups of disconnection test points.
2. The on-off circuit tester according to claim 1, further comprising an external clock circuit connected to the single chip microcomputer.
3. The on-off circuit tester according to claim 1, further comprising a reset circuit connected to the single chip microcomputer.
4. The on-off circuit tester according to claim 1, further comprising a pull-up resistor circuit connected to the single chip microcomputer.
5. The on-off circuit tester according to claim 1, further comprising a voice prompt circuit connected with the single chip microcomputer.
6. The on-off circuit tester according to claim 1, wherein the display circuit comprises an LCD display screen and a position indicating circuit connected with the singlechip and used for displaying whether the test result of the singlechip is qualified or not and the position of the test product;
the position indication circuit comprises a defective product indication loop connected with the single chip microcomputer and a qualification indication loop connected with the single chip microcomputer, wherein the qualification indication loop comprises a plurality of groups and corresponds to the test products one by one.
7. The on-off circuit tester according to claim 1, wherein the driving circuit specifically comprises a first resistor, an NPN triode, a second resistor, a third resistor and a fourth resistor;
the first end of the first resistor is connected with the singlechip, the second end of the first resistor is connected with the base electrode of the NPN triode, the emitter electrode of the NPN triode is grounded, the collector electrode of the NPN triode is connected with the first end of the second resistor, the second end of the third resistor and the second end of the fourth resistor are all connected with the power supply module, the first end of the third resistor and the first end of the fourth resistor are connected with the power supply end of the latch, and the public end of the second resistor and the NPN triode is connected with the starting end of the latch.
8. The on-off circuit tester of any one of claims 1-7 wherein the latch is a 74HC573D latch.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710515835.4A CN107290647B (en) | 2017-06-29 | 2017-06-29 | On-off circuit tester |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710515835.4A CN107290647B (en) | 2017-06-29 | 2017-06-29 | On-off circuit tester |
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| CN107290647B true CN107290647B (en) | 2024-03-22 |
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| CN110031742B (en) * | 2018-01-12 | 2022-07-15 | 神讯电脑(昆山)有限公司 | Circuit board tin connection detection circuit |
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| JP2000315773A (en) * | 1999-05-06 | 2000-11-14 | Mitsubishi Electric Corp | Test device for semiconductor circuit and test method thereof |
| CN2758784Y (en) * | 2004-12-27 | 2006-02-15 | 沈科学 | Cable tester |
| CN101206602A (en) * | 2006-12-22 | 2008-06-25 | 鸿富锦精密工业（深圳）有限公司 | Computer connector tester |
| CN204154860U (en) * | 2014-10-15 | 2015-02-11 | 聚龙股份有限公司 | A kind of circuit board detection device |
| CN204652023U (en) * | 2015-04-15 | 2015-09-16 | 国家电网公司 | A kind of portable equipment charger circuit |
| CN204835682U (en) * | 2015-05-28 | 2015-12-02 | 梁翎肖 | Direct current motor supply circuit |
| CN205210219U (en) * | 2015-10-30 | 2016-05-04 | 广东利扬芯片测试股份有限公司 | Test panel is surveyed in short circuit of opening a way of chip |
| CN206848428U (en) * | 2017-06-29 | 2018-01-05 | 四平市吉华高新技术有限公司 | A kind of logical out of circuit test instrument |
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2017
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP2000315773A (en) * | 1999-05-06 | 2000-11-14 | Mitsubishi Electric Corp | Test device for semiconductor circuit and test method thereof |
| CN2758784Y (en) * | 2004-12-27 | 2006-02-15 | 沈科学 | Cable tester |
| CN101206602A (en) * | 2006-12-22 | 2008-06-25 | 鸿富锦精密工业（深圳）有限公司 | Computer connector tester |
| CN204154860U (en) * | 2014-10-15 | 2015-02-11 | 聚龙股份有限公司 | A kind of circuit board detection device |
| CN204652023U (en) * | 2015-04-15 | 2015-09-16 | 国家电网公司 | A kind of portable equipment charger circuit |
| CN204835682U (en) * | 2015-05-28 | 2015-12-02 | 梁翎肖 | Direct current motor supply circuit |
| CN205210219U (en) * | 2015-10-30 | 2016-05-04 | 广东利扬芯片测试股份有限公司 | Test panel is surveyed in short circuit of opening a way of chip |
| CN206848428U (en) * | 2017-06-29 | 2018-01-05 | 四平市吉华高新技术有限公司 | A kind of logical out of circuit test instrument |
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| CN107290647A (en) | 2017-10-24 |
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