CN107287653A - A kind of cadmium iodide two-dimensional material and preparation method thereof - Google Patents

A kind of cadmium iodide two-dimensional material and preparation method thereof Download PDF

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CN107287653A
CN107287653A CN201710456549.5A CN201710456549A CN107287653A CN 107287653 A CN107287653 A CN 107287653A CN 201710456549 A CN201710456549 A CN 201710456549A CN 107287653 A CN107287653 A CN 107287653A
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cadmium iodide
nanometer sheet
cadmium
iodide
substrate
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CN107287653B (en
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段曦东
段镶锋
艾若奇
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Hunan University
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Abstract

It is cadmium iodide nanometer sheet the invention discloses a kind of cadmium iodide two-dimensional material;Or for based on cadmium iodide nanometer sheet vertical heterojunction;Or be cadmium iodide heterojunction array.In addition, the invention also discloses a kind of preparation method of cadmium iodide two-dimensional material, i.e., by iodate cadmium dust 320 350 DEG C temperature, in substrate surface, cadmium iodide nanometer sheet is made in physical vapour deposition (PVD) under 120 150sccm carrier gas flux;Or physical vapour deposition (PVD) is in the substrate surface with two-dimensional material A, vertical heterojunction cadmium iodide two-dimensional material A is made.Described cadmium iodide nanometer sheet and its hetero-junctions have expanded new two-dimensional material and its two-dimensional hetero-junction, and the growth of its array, which is more produced, finds that new excellent electronic device and equipment provide new possibility.Use without complex operations step He other raw materials in preparation process of the present invention, equipment is simple.

Description

A kind of cadmium iodide two-dimensional material and preparation method thereof
Technical field
The invention belongs to field of nanometer material technology, it is related to the cadmium iodide nanometer sheet of two dimension, based on the vertical of cadmium iodide nanometer sheet The preparation method of hetero-junctions and its vertical heterojunction array
Technical background
Cadmium iodide is a kind of stratified material.
The discovery of graphene has triggered scientific circles to the research boom of two-dimensional material, however graphene due to it can band knot Zero band gap is presented in structure so that it receives very big limitation in electronics and optoelectronic areas.With individual layer MoS2For the two dimension of representative The chalcogenide of transition metal two (2D-TMDs) causes the great interest of people due to the band gap of non-zero.Occurred in that in recent years It is many prepared on 2D-TMDs, property research and apply, report.Recently, people also try to explore it is this different new Two-dimensional material, such as IIIA-VIA races two-dimensional material and IVA-VIIA races two-dimensional material.Cadmium iodide is expanded as a kind of stratified material It is that new excellent electronic device and equipment are provided that two-dimensional material family, its vertical heterojunction and its vertical heterojunction, which connect array, New possibility.
Based on its unique two-dimensional structure, two-dimentional cadmium iodide and the two-dimensional structure based on two-dimentional cadmium iodide possess huge latent Energy.Although cadmium iodide nanometer sheet has so big potential, different-thickness, good crystallinity, the good iodate of pattern are prepared at present Cadmium nanometer sheet also waits research.
Existing preparation method such as thermal vapor deposition,[1][2]What is prepared is cadmium iodide film, and existing preparation method is present Technical problem be thickness, pattern heterogeneity, poor, the pattern difference of crystallinity for preparing etc..The preparation method of hetero-junctions is more complicated ,[3][4]Especially the preparation of array hetero-junctions is still worth research.
Bibliography
[1] Kariper, I.A.Structural, optical and porosity properties of CdI2 Thin film.J.Mater.Res.Technol.2016,5,77-83.
[2] Tyagi, P.;Vedeshwar, A.;Mehra, N.Thickness dependent optical properties of CdI2Films.Physica B 2001,304,166-174.
[3] Yu, W.J.;Liu, Y.;Zhou, H.;Yin, A.;Li, Z.;Huang, Y.;Duan, X.Highly efficient gate-tunable photocurrent generation in vertical heterostructures Of layered materials.Nat.Nanotech.2013,8,952-958.
[4] Yu, J.H.;Lee, H.R.;Hong, S.S.;Kong, D.;Lee, H.-W.;Wang, H.;Xiong, F.; Wang, S.;Cui, Y.Vertical heterostructure of two-dimensional MoS2 and WSe2 with Vertically aligned layers.Nano Lett.2015,15,1031-1035.
The content of the invention
It is an object of the present invention to solve existing preparation method to have obtained cadmium iodide thickness, pattern heterogeneity, knot The technical problems such as crystalline substance is poor, pattern difference, the invention provides a kind of preparation method of cadmium iodide two-dimensional material, by changing base Bottom, can be made cadmium iodide nanometer sheet and cadmium iodide hetero-junctions product.
The second object of the present invention is to provide using cadmium iodide two-dimensional material made from described preparation method, specific bag Include obtained cadmium iodide nanometer sheet, cadmium iodide hetero-junctions.
A kind of cadmium iodide two-dimensional material, is cadmium iodide nanometer sheet;Or for based on cadmium iodide nanometer sheet vertical heterojunction;Or Person is cadmium iodide heterojunction array.
A kind of cadmium iodide two-dimensional material, is cadmium iodide nanometer sheet, or for based on cadmium iodide nanometer sheet vertical heterojunction (this Invention is also referred to as two-dimensional material A- cadmium iodide hetero-junctions, also referred to as cadmium iodide hetero-junctions), it is described based on cadmium iodide nanometer sheet Vertical heterojunction is to deposit cadmium iodide on two-dimensional material A surface to obtain.Described cadmium iodide heterojunction array belongs to based on iodine It is that a kind of two-dimensional material surface with certain array pattern deposits cadmium iodide in the category of cadmium nanometer sheet vertical heterojunction Formed by it is a kind of with array structure based on cadmium iodide nanometer sheet vertical heterojunction.
Cadmium iodide nanometer sheet of the present invention, is nano-sized materials in the form of sheets.
It is preferred that cadmium iodide nanometer sheet, be mono-crystalline structures.
Preferably, described cadmium iodide nanometer sheet, described cadmium iodide nanometer sheet thickness is 5-22nm.
Two-dimensional material A- cadmium iodide hetero-junctions of the present invention is cadmium iodide vertical deposition in two-dimensional material A nanometer sheets Surface formed vertical heterojunction.Two-dimensional material A is MoS2、WSe2Or WS2
Currently preferred hetero-junctions, is vertical heterojunction CdI2/MoS2、CdI2/WSe2Or CdI2/WS2
Cadmium iodide heterojunction array of the present invention, can go out array pattern, then again in two-dimensional material A surface etch Cadmium iodide is deposited, obtaining the two-dimensional material A- cadmium iodides hetero-junctions with particular array pattern, (present invention is also referred to as vertical heterogeneous Junction array).
A kind of preparation method of described cadmium iodide two-dimensional material, temperature, 120- by iodate cadmium dust at 320-350 DEG C Cadmium iodide nanometer sheet is made in substrate surface in physical vapour deposition (PVD) under 150sccm carrier gas flux;Or physical vapour deposition (PVD) is in length There is two-dimensional material A substrate surface, vertical heterojunction cadmium iodide-two-dimensional material A is made.
In the present invention, cadmium iodide is evaporated by physical vapor, substrate surface is deposited in low-temperature space under carrier gas effect, passes through Regulating and controlling temperature, carrier gas flux obtains different-thickness, and good crystallinity, the homogeneous cadmium iodide nanometer sheet of pattern, minimum thickness can reach To 5nm.
In the present invention, by the selection of the substrate in vapour deposition, it can be prepared and received using preparation method of the present invention Rice sheet material, or heterojunction material.
The inventors discovered that, when preparing cadmium iodide nanometer sheet, under suitable growth temperature and carrier gas flux, contribute to Improve pattern, the obtained nanometer sheet thickness of control, crystal property of improvement material of obtained cadmium iodide nanometer sheet etc..
The preparation method for the cadmium iodide nanometer sheet that the present invention is provided, temperature, 120- by iodate cadmium dust at 320-350 DEG C It is vapor-deposited under 150sccm carrier gas flux in substrate surface, in substrate surface formation cadmium iodide nanometer sheet.
Preferably, in the preparation process of cadmium iodide nanometer sheet, the growth temperature for controlling cadmium iodide is 320-335 DEG C of temperature Degree, 120-135sccm.
The inventive method can prepare the cadmium iodide nanometer sheet of different-thickness, prepared cadmium iodide nanometer sheet, thickness It is monocrystalline for 5-22nm, good crystallinity, pattern is good.This method can also simply prepare cadmium iodide vertical heterojunction and vertical different Matter junction array.This method operating process is simple, reproducible.
Preferably, the preparation process of described cadmium iodide nanometer sheet, described substrate is Si/SiO2Substrate, sapphire Substrate, mica substrate etc..
Further preferably, the preparation process of described cadmium iodide nanometer sheet, described substrate is Si/300nmSiO2Substrate.
Preferably, vapour deposition is carried out in tubular type gaseous phase deposition stove, wherein, described substrate is placed in iodate cadmium dust Downstream.
At described temperature, make cadmium iodide powder, then coordinate under described carrier gas stream, carry and deposit in place Substrate surface in carrier gas stream downstream, forms described cadmium iodide nanometer sheet in substrate surface.
Preferably, the preparation process of described cadmium iodide nanometer sheet, described carrier gas is argon gas and/or nitrogen;Enter one Step is preferably argon gas.
Preferably, the preparation process of described cadmium iodide nanometer sheet, the time of vapour deposition is 20-30min.
The inventive method, has two-dimensional material A substrate by changing deposition, with cadmium iodide nanometer sheet the same terms (referring mainly to growth temperature and carrier gas flux), makes cadmium iodide be deposited on two-dimensional material A surface, obtains cadmium iodide vertically heterogeneous Knot.
The present invention prepares the vertical heterojunction (cadmium iodide hetero-junctions), and MoS is compounded with substrate2、WS2、WSe2At least A kind of surface vapor deposition cadmium iodide of two-dimensional material, forms the described vertical heterojunction based on cadmium iodide.
Preferably, described hetero-junctions, has MoS in substrate2、WS2、WSe2The surface vapor of at least one nanometer sheet Cadmium iodide is deposited, described cadmium iodide hetero-junctions is formed.
Described cadmium iodide and following MoS2Interacted etc. nanometer sheet with Van der Waals force, form vertical heterojunction.
In the present invention, first MoS is deposited on the surface of substrate2、WS2、WSe2At least one nanometer sheet, then again in compound institute The described cadmium iodide of the surface vapor deposition of nanometer sheet is stated, described cadmium iodide hetero-junctions is obtained.
Preferably, described cadmium iodide hetero-junctions, MoS is compounded with substrate2、WS2、WSe2At least one nanometer sheet Surface vapor deposition cadmium iodide, form described cadmium iodide hetero-junctions.
The invention provides a kind of preparation method based on cadmium iodide nanometer sheet vertical heterojunction, by iodate cadmium dust gas phase Being deposited in substrate has MoS2、WS2、WSe2At least one nanometer sheet surface, is made described cadmium iodide hetero-junctions;Vapour deposition Temperature be 320-350 DEG C, carrier gas flux is 120-150sccm.
Preferably, in the preparation process based on cadmium iodide nanometer sheet vertical heterojunction, described substrate is Si/ SiO2Substrate, sapphire substrates, mica substrate etc.;More preferably Si/300nmSiO2Substrate.
In the described preparation process based on cadmium iodide nanometer sheet vertical heterojunction, first in the surface recombination MoS of substrate2、 WS2、WSe2At least one nanometer sheet;Complex method can select typically seen physics (chemistry) vapour deposition process.
In the preparation process of described cadmium iodide hetero-junctions, vapour deposition is carried out in tubular type gaseous phase deposition stove, wherein, institute The substrate stated is placed in iodate cadmium dust carrier gas stream downstream.
In the preparation process of described cadmium iodide hetero-junctions, described carrier gas is argon gas and/or nitrogen;Preferably argon gas.
In the preparation process of described cadmium iodide hetero-junctions, the time of vapour deposition is 20-30min.
In the present invention, by being replaced with the substrate of the two-dimensional material A with array pattern, in growth temperature of the present invention Under degree and carrier gas flux, cadmium iodide is deposited on to two-dimensional material A pattern plane, cadmium iodide heterojunction array is made.As excellent Choosing, described cadmium iodide growth, which is deposited in substrate, has MoS2、WS2、WSe2The surface of at least one nano-chip arrays pattern, Cadmium iodide, which is selectively grown in, forms described cadmium iodide vertical heterojunction array (cadmium iodide hetero-junctions on nano-chip arrays pattern Array).
The preparation method for the cadmium iodide heterojunction array that the present invention is provided, has MoS in substrate2、WS2、WSe2At least one is received The surface etch of rice piece obtains the pattern plane with array, then temperature by iodate cadmium dust at 320-350 DEG C, 120- It is vapor-deposited under 150sccm carrier gas flux on described pattern, described cadmium iodide heterojunction array is made.
In the preparation method of described cadmium iodide heterojunction array, MoS is compounded with described substrate2、WS2、WSe2Extremely Described pattern plane is made in a kind of Surface Oxygen plasma etching of few nanometer sheet.
In the preparation method of described cadmium iodide heterojunction array, there is MoS in described substrate2、WS2、WSe2At least one The surface of kind of nanometer sheet coats poly- electron beam exposure resist, is then made annealing treatment, electron beam exposure preparation case, and progress is clearly Wash, then carry out oxygen plasma processing and described pattern plane is made.
Described poly- electron beam exposure resist is at least one in methyl methacrylate (PMMA), HSQ, SU8, UV3 Kind.
Further preferably, described poly- electron beam exposure resist is methyl methacrylate (PMMA).
The preparation process of described cadmium iodide heterojunction array, described substrate is Si/SiO2Substrate, sapphire substrates, Mica substrate etc.;More preferably Si/300nmSiO2Substrate.
In the preparation process of described cadmium iodide heterojunction array, further preferred nano material A is WS2
Prepare the patterning WS used during cadmium iodide nanometer sheet vertical heterojunction array2Array preparation method it is as follows: With WS2Nanometer sheet Si/300nmSiO2On, by spin coating PMMA, annealing, by certain pattern electron beam exposure, is carried out Oxygen plasma is etched, by acetone ethanol cleaning, the final or WS that must pattern2Nano-chip arrays.
In the preparation process of described cadmium iodide heterojunction array, vapour deposition is carried out in tubular type gaseous phase deposition stove, its In, described substrate is placed in iodate cadmium dust downstream.
In the preparation process of described cadmium iodide heterojunction array, described carrier gas is argon gas and/or nitrogen;Preferably argon Gas.
In the preparation process of described cadmium iodide heterojunction array, the time of vapour deposition is 20-30min.
Technical solution of the present invention has same inventive point, that is to say:Using physical gas-phase deposite method, iodate cadmium dust is used As raw material, in substrate or the surface deposition of described nano material is compounded with, forms relevant nanometer piece, hetero-junctions, heterogeneous Junction array.
Using there is other two-dimensional materials when preparing the vertical heterojunction based on cadmium iodide nanometer sheet, vertical heterojunction array (such as chalcogenide nanometer sheet of transition metal two) or two-dimensional material array are used as growth substrate.
A kind of preferred method of the present invention, using physical gas-phase deposite method, raw material, Si/ are used as with iodate cadmium dust 300nmSiO2As substrate, constant temperature certain time at a certain temperature in a kind of tube-type atmosphere furnace, prepared in argon gas atmosphere Cadmium iodide nanometer sheet, hetero-junctions and heterojunction array;In cadmium iodide nanometer sheet growth course (vapour deposition) temperature be 320 DEG C- 350 DEG C, constant temperature time is 20-30min, and argon carrier air-flow is 120-150sccm.
A kind of preferred scheme, using with MoS2、WS2、WSe2The Si/300nmSiO of nanometer sheet2, then given birth in cadmium iodide (320 DEG C -350 DEG C at long temperature and carrier gas flux;120-150sccm), cadmium iodide selectivity is in MoS2、WS2、WSe2Nanometer Nucleation and growth on piece, form CdI2/MoS2(WS2、WSe2) vertical heterojunction.
A kind of preferred scheme, the preparation method of cadmium iodide vertical heterojunction uses the WS for having patterning2Nano-chip arrays Si/300nmSiO2, then (320 DEG C -350 DEG C under cadmium iodide growth temperature and carrier gas flux;120-150sccm), iodine Cadmium nanometer sheet selectivity is in WS2Nucleation and growth in nanometer sheet, form CdI2/WS2Vertical heterojunction array.Specific following step Suddenly:Iodate cadmium dust is placed in tube-type atmosphere furnace, position is placed on the flat-temperature zone (320 DEG C) of stove, uses Si/300nmSiO2's Oxidized silicon chip is placed in the temperature-varying zone in stove downstream to obtain appropriate crystal growth temperature as the growth substrate of nanometer sheet.Argon Gas adjusts the flow of argon gas as carrier gas, and constant temperature certain time can obtain 5-220nm cadmium iodide nanometer sheets.The life of hetero-junctions It is long then using with MoS2、WS2、WSe2The Si/300nmSiO of nanometer sheet2As substrate, CdI is prepared under proper condition2/ MoS2(WS2、WSe2) vertical heterojunction.To WS2Substrate carries out graphic array processing can prepare vertically as growth substrate Heterojunction array.
Described cadmium iodide nanometer sheet and its hetero-junctions have expanded new two-dimensional material and its two-dimensional hetero-junction, its array Growth, which is more produced, finds that excellent electronic device newly and equipment provide new possibility.
Beneficial effect
Use without complex operations step He other raw materials in preparation process of the present invention, equipment is simple.
The inventive method can prepare the cadmium iodide nanometer sheet of different-thickness, prepared cadmium iodide nanometer sheet, thickness It is monocrystalline for 5-22nm, good crystallinity, pattern is good.This method can also simply prepare cadmium iodide vertical heterojunction and vertical different Matter junction array.
Brief description of the drawings
Fig. 1 is the schematic device for preparing cadmium iodide two-dimensional material;
Fig. 2 is the optical photograph of cadmium iodide prepared by embodiment 1;
Fig. 3 is the optical photograph of cadmium iodide prepared by embodiment 2;
Fig. 4 is the optical photograph of cadmium iodide prepared by embodiment 3;
Fig. 5 is that embodiment 4 prepares CdI2/MoS2Vertical heterojunction optical photograph;
Fig. 6 is that embodiment 5 prepares CdI2/WS2Vertical heterojunction optical photograph;
Fig. 7 is that embodiment 6 prepares CdI2/WSe2Vertical heterojunction optical photograph;
Fig. 8 is that embodiment 7 prepares CdI2/WS2Vertical heterojunction array optical photo and its Raman image;
Fig. 9 is the optical photograph of cadmium iodide prepared by embodiment 8;
Figure 10 is the optical photograph of cadmium iodide prepared by comparative example 1;
Figure 11 is the optical photograph of cadmium iodide prepared by comparative example 2.
Specific implementation method:
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with case study on implementation of the present invention, to this The technical scheme of invention is made further clearly and completely to describe.It should be noted that present disclosure is not limited solely to down State content.
Embodiment 1
The specific preparation technology of the implementation case comprises the following steps:The preparation of cadmium iodide nanometer sheet:Weigh 0.1g cadmium iodides Powder is in porcelain boat, and the porcelain boat is placed on the flat-temperature zone of stove, by a fritter Si/300nmSiO2Oxidized silicon chip be used as nanometer sheet Growth substrate, be placed in another porcelain boat, be placed in the temperature-varying zone in stove downstream to obtain appropriate crystal growth temperature.Stove Son is clean with argon cleaning first, removes oxygen therein, vapor.320 DEG C are then raised to, and adjusts argon flow amount and is 120sccm, constant temperature 20min, just have the generation of monocrystalline cadmium iodide nanometer sheet on certain position of silicon wafer.The cadmium iodide of preparation is received Rice piece optical photograph is shown in Fig. 2.
Fig. 2 is the optical schematic diagram of the cadmium iodide nanometer sheet prepared, Si/SiO2Base color is purple, cadmium iodide nanometer Piece color majority is blueness, and minority is yellow.It can be clearly seen that from figure, most of obtained cadmium iodide nanometer sheet is presented The hexagon of rule and the pattern of triangle are gone out.And the nanometer sheet of blueness is relatively thin, its thickness is 5nm, and other nanometer sheets are thick Spend for 8-30nm, size is 2-10 μm.Scale in Fig. 2 is 10 μm.
Embodiment 2
The specific preparation technology of the implementation case comprises the following steps:The preparation of cadmium iodide nanometer sheet:Weigh 0.1g cadmium iodides Powder is in porcelain boat, and the porcelain boat is placed on the flat-temperature zone of stove, by a fritter Si/300nmSiO2Oxidized silicon chip be used as nanometer sheet Growth substrate, be placed in another porcelain boat, be placed in the temperature-varying zone in stove downstream to obtain appropriate crystal growth temperature.Stove Son is clean with argon cleaning first, removes oxygen therein, vapor.335 DEG C are then raised to, and adjusts argon flow amount and is 135sccm, constant temperature 20min, just have the generation of monocrystalline cadmium iodide nanometer sheet on certain position of silicon wafer.The cadmium iodide of preparation is received Rice piece optical photograph is shown in Fig. 3.
Fig. 3 is the optical schematic diagram of the cadmium iodide nanometer sheet prepared, Si/SiO2Base color is royal purple, cadmium iodide nanometer Piece color majority is yellow, and minority is blue, orange, red and green.It can be clearly seen that from figure, obtained cadmium iodide Most of nanometer sheet presents the hexagon of rule and the pattern of triangle.And the nanometer sheet of blueness is relatively thin, its thickness is 20nm, other nanometer sheet thickness are 40-220nm, and homogeneous size is 2-10 μm.Scale in Fig. 3 is 10 μm.
Embodiment 3
The specific preparation technology of the implementation case comprises the following steps:The preparation of cadmium iodide nanometer sheet:Weigh 0.1g cadmium iodides Powder is in porcelain boat, and the porcelain boat is placed on the flat-temperature zone of stove, by a fritter Si/300nmSiO2Oxidized silicon chip be used as nanometer sheet Growth substrate, be placed in another porcelain boat, be placed in the temperature-varying zone in stove downstream to obtain appropriate crystal growth temperature.Stove Son is clean with argon cleaning first, removes oxygen therein, vapor.350 DEG C are then raised to, and adjusts argon flow amount and is 150sccm, constant temperature 20min, just have the generation of monocrystalline cadmium iodide nanometer sheet on certain position of silicon wafer.The cadmium iodide of preparation is received Rice piece optical photograph is shown in Fig. 4.
Fig. 4 is the optical schematic diagram of the cadmium iodide nanometer sheet prepared, Si/SiO2Base color is purple, cadmium iodide nanometer Piece color majority is red, and minority is yellow, orange and green.It can be clearly seen that from figure, obtained cadmium iodide nanometer Most of piece presents the hexagon of rule and the pattern of triangle.And the nanometer sheet of yellow is relatively thin, its thickness is about 70nm, other nanometer sheet thickness are 120-220mm, and homogeneous size is 2-10 μm.Scale in Fig. 4 is 10 μm.
Embodiment 4
CdI2/MoS2The preparation of vertical heterojunction hetero-junctions:0.1g iodate cadmium dusts are weighed in porcelain boat, the porcelain boat is placed on The flat-temperature zone of stove, by a fritter with MoS2The Si/300nmSiO of nanometer sheet2Oxidized silicon chip as nanometer sheet growth base Piece, is placed in another porcelain boat, is placed in the temperature-varying zone in stove downstream to obtain appropriate crystal growth temperature.Stove is used first Argon cleaning is clean, removes oxygen therein, vapor.325 DEG C are then raised to, and adjusts argon flow amount for 128sccm, Constant temperature 25min, cadmium iodide nanometer sheet can be selective in MoS2Grown in nanometer sheet, form CdI2/MoS2Hetero-junctions is generated.
Fig. 5 is preparation CdI2/MoS2Vertical heterojunction optical photograph, Si/SiO2Base color is purple, triangle below Shape MoS2For darkviolet, triangle cadmium iodide above is yellow.It can be clearly seen that from figure, cadmium iodide nanometer sheet can be with The MoS being optionally grown in2On, described cadmium iodide is completely in the MoS of covering bottom2Surface, obtained CdI2/MoS2Hang down Straight hetero-junctions pattern is preferable.
Embodiment 5
CdI2/WS2The preparation of vertical heterojunction hetero-junctions:0.1g iodate cadmium dusts are weighed in porcelain boat, the porcelain boat is placed on stove The flat-temperature zone of son, by a fritter with WS2The Si/300nmSiO of nanometer sheet2Oxidized silicon chip as nanometer sheet growth substrate, It is placed in another porcelain boat, is placed in the temperature-varying zone in stove downstream to obtain appropriate crystal growth temperature.Stove uses argon first Gas flushing is clean, removes oxygen therein, vapor.350 DEG C are then raised to, and adjusts argon flow amount for 125SCCM, it is permanent Warm 20min, cadmium iodide nanometer sheet can be selective in WS2Grown in nanometer sheet, form CdI2/WS2Hetero-junctions is generated.
Fig. 6 is preparation CdI2/WS2Vertical heterojunction optical photograph, Si/SiO2Base color is purple, WS below2For Blueness, hexagon cadmium iodide above is yellow.It can be clearly seen that from figure, cadmium iodide nanometer sheet can optionally give birth to It is long WS2On, described cadmium iodide is grown in the WS of bottom completely2Surface, obtained CdI2/WS2Vertical heterojunction pattern compared with It is good.
Embodiment 6
CdI2/WSe2The preparation of vertical heterojunction hetero-junctions:0.1g iodate cadmium dusts are weighed in porcelain boat, the porcelain boat is placed on The flat-temperature zone of stove, by a fritter with WSe2The Si/300nmSiO of nanometer sheet2Oxidized silicon chip as nanometer sheet growth base Piece, is placed in another porcelain boat, is placed in the temperature-varying zone in stove downstream to obtain appropriate crystal growth temperature.Stove is used first Argon cleaning is clean, removes oxygen therein, vapor.330 DEG C are then raised to, and adjusts argon flow amount for 140SCCM, The certain 20min of constant temperature, cadmium iodide nanometer sheet can be selective in WSe2Grown in nanometer sheet, form CdI2/WSe2Hetero-junctions is generated.
Fig. 7 is preparation CdI2/WSe2Vertical heterojunction optical photograph, Si/SiO2Base color is purple, WSe below2 For blueness, hexagon cadmium iodide above is green.It can be clearly seen that from figure, cadmium iodide nanometer sheet can be optionally The WSe being grown in2On, the WSe for being grown in bottom is completely covered in described cadmium iodide2Surface, obtained CdI2/WSe2It is vertical different Matter knot pattern is preferable.
Embodiment 7
CdI2/WS2The preparation of vertical heterojunction array.
WS2The preparation of nano-chip arrays:WS2Nanometer sheet Si/300nmSiO2By spin coating PMMA, annealing, by certain Pattern electron beam exposure, carries out oxygen plasma etching, by acetone ethanol cleaning, the final or WS that must pattern2Battle array Row.
0.1g iodate cadmium dusts are weighed in porcelain boat, the porcelain boat is placed on the flat-temperature zone of stove, by a fritter with patterning WS2The array WS of nanometer sheet2Si/300nmSiO2Oxidized silicon chip as the growth substrate of nanometer sheet, be placed on another porcelain In boat, it is placed in the temperature-varying zone in stove downstream to obtain appropriate crystal growth temperature.Stove is clean with argon cleaning first, removes Oxygen therein, vapor.330 DEG C are then raised to, and adjusts argon flow amount for 140SCCM, the certain 20min of constant temperature, iodine Cadmium nanometer sheet can be selective in WS2Grown in nanometer sheet, form CdI2/WS2Heterojunction array.
Fig. 8 is preparation CdI2/WS2Vertical heterojunction array optical photo and its Raman image.
In Fig. 8, a) WS of array2The optical photograph of nanometer sheet, Si/SiO2Base color is lavender, WS2Nanometer sheet Array is purple;B) it is CdI2-WS2The optics picture of heterojunction array, Si/SiO2Base color is lavender, CdI2Nanometer sheet For green and red, CdI2Nanometer sheet presents the pattern of the hexagon of rule, CdI2Nanometer sheet is completely covered on WS2Nanometer Grown on chip arrays;C, d) it is respectively 110cm-1And 348cm-1The CdI at place2-WS2The Raman signal imaging of heterojunction array, Fig. 8 In all scale be 5 μm.
Embodiment 8
The specific preparation technology of the implementation case comprises the following steps:The preparation of cadmium iodide nanometer sheet:Weigh 0.1g cadmium iodides Powder is in porcelain boat, and the porcelain boat is placed on the flat-temperature zone of stove, by a fritter Si/300nmSiO2Oxidized silicon chip be used as nanometer sheet Growth substrate, be placed in another porcelain boat, be placed in the temperature-varying zone in stove downstream to obtain appropriate crystal growth temperature.Stove Son is clean with argon cleaning first, removes oxygen therein, vapor.350 DEG C are then raised to, and adjusts argon flow amount and is 125SCCM, constant temperature 20min, just have the generation of monocrystalline cadmium iodide nanometer sheet on certain position of silicon wafer.The cadmium iodide of preparation is received Rice piece optical photograph is shown in Fig. 9.
The optical schematic diagram of the cadmium iodide nanometer sheet of preparation, it can be seen that cadmium iodide nanometer sheet has triangle hexagon two Pattern is planted, different colours there are different thickness, and scale is 10 μm.
Comparative example 1
The specific preparation technology of this implementation comparative example 1 comprises the following steps:The preparation of cadmium iodide nanometer sheet:Weigh 0.1g iodate Cadmium dust is in porcelain boat, and the porcelain boat is placed on the flat-temperature zone of stove, by a fritter Si/300nmSiO2Oxidized silicon chip be used as nanometer The growth substrate of piece, is placed in another porcelain boat, is placed in the temperature-varying zone in stove downstream to obtain appropriate crystal growth temperature. Stove is clean with argon cleaning first, removes oxygen therein, vapor.300 DEG C are then raised to, and adjusts argon flow amount For 100sccm, constant temperature 20min, how shapeless cadmium iodide is on silicon chip.The cadmium iodide nanometer sheet optical photograph of preparation is shown in Figure 10.
Figure 10 is the optical schematic diagram of the cadmium iodide nanometer sheet prepared, Si/SiO2Base color is purple, cadmium iodide nanometer Piece color majority is yellow, and minority is crocus, red and blueness.From the figure, it can be seen that most of obtained product is not Shaping.Scale in Fig. 9 is 10 μm.
Comparative example 2
The specific preparation technology of this implementation comparative example 2 comprises the following steps:The preparation of cadmium iodide nanometer sheet:Weigh 0.1g iodate Cadmium dust is in porcelain boat, and the porcelain boat is placed on the flat-temperature zone of stove, by a fritter Si/300nmSiO2Oxidized silicon chip be used as nanometer The growth substrate of piece, is placed in another porcelain boat, is placed in the temperature-varying zone in stove downstream to obtain appropriate crystal growth temperature. Stove is clean with argon cleaning first, removes oxygen therein, vapor.400 DEG C are then raised to, and adjusts argon flow amount For 200sccm, constant temperature 20min, how shapeless cadmium iodide is on silicon chip.The cadmium iodide nanometer sheet optical photograph of preparation is shown in Figure 11.
Figure 11 is the optical schematic diagram of the cadmium iodide nanometer sheet prepared, Si/SiO2Base color is purple, cadmium iodide nanometer Piece color majority is uneven yellow and green.From the figure, it can be seen that cadmium iodide nanometer sheet pattern is irregular and very thick. Scale in Figure 11 is 10 μm.
Known by embodiment 1~3 and 8 and the achievement in research of comparative example 1~2, not in parameters such as the growth temperatures of the present invention Under, it is difficult to the cadmium iodide nanometer sheet of function admirable is made.

Claims (10)

1. a kind of cadmium iodide two-dimensional material, it is characterised in that be cadmium iodide nanometer sheet;Or be vertical based on cadmium iodide nanometer sheet Hetero-junctions;Or be cadmium iodide heterojunction array.
2. cadmium iodide two-dimensional material as claimed in claim 1, it is characterised in that cadmium iodide nanometer sheet is nanometer chi in the form of sheets Very little material.
3. cadmium iodide two-dimensional material as claimed in claim 2, it is characterised in that cadmium iodide nanometer sheet is mono-crystalline structures;It is described Cadmium iodide nanometer sheet thickness be 5-22nm.
4. cadmium iodide two-dimensional material as claimed in claim 1, it is characterised in that described vertically different based on cadmium iodide nanometer sheet Matter is become:MoS is compounded with substrate2、WS2、WSe2The surface vapor deposition cadmium iodide of at least one two-dimensional material, forms institute The vertical heterojunction based on cadmium iodide stated.
5. cadmium iodide two-dimensional material as claimed in claim 1, it is characterised in that described cadmium iodide heterojunction array is:Institute The cadmium iodide growth stated, which is deposited in substrate, has MoS2、WS2、WSe2The surface of at least one nano-chip arrays pattern, cadmium iodide Selectively it is grown in and described cadmium iodide vertical heterojunction array is formed on nano-chip arrays pattern.
6. the preparation method of the cadmium iodide nanometer sheet described in a kind of any one of claims 1 to 3, it is characterised in that by cadmium iodide Powder is vapor-deposited in substrate surface under 320-350 DEG C of temperature, 120-150sccm carrier gas flux, in substrate surface shape Into cadmium iodide nanometer sheet.
7. the preparation method of cadmium iodide nanometer sheet as claimed in claim 6, it is characterised in that described substrate is Si/SiO2Base Bottom, sapphire substrates or mica substrate,
Vapour deposition is carried out in tubular type gaseous phase deposition stove, wherein, described substrate is placed in iodate cadmium dust downstream;
Described carrier gas is argon gas and/or nitrogen;
The time of vapour deposition is 20-30min.
8. the preparation method based on cadmium iodide nanometer sheet vertical heterojunction described in a kind of claim 1 or 4, it is characterised in that The vapour deposition of iodate cadmium dust there is into MoS in substrate2、WS2、WSe2At least one nanometer sheet surface, is made described cadmium iodide Hetero-junctions;The temperature of vapour deposition is 320-350 DEG C, and carrier gas flux is 120-150sccm.
9. the preparation method as claimed in claim 8 based on cadmium iodide nanometer sheet vertical heterojunction, it is characterised in that gas phase is sunk The long-pending time is 20-30min.
10. the preparation method of the cadmium iodide heterojunction array described in a kind of claim 1 or 5, it is characterised in that have in substrate MoS2、WS2、WSe2The surface etch of at least one nanometer sheet obtains the pattern plane with array, then by iodate cadmium dust in 320- It is vapor-deposited under 350 DEG C of temperature, 120-150sccm carrier gas flux on described pattern, described cadmium iodide is made Heterojunction array;
Wherein, there is MoS in described substrate2、WS2、WSe2It is against corrosion that the surface of at least one nanometer sheet coats poly- electron beam exposure Agent, is then made annealing treatment, electron beam exposure preparation case, is cleaned, and is then carried out oxygen plasma processing and is made described Pattern plane;
Described poly- electron beam exposure resist is at least one of methyl methacrylate, HSQ, SU8, UV3;
The time of vapour deposition is 20-30min.
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CN108198753A (en) * 2017-12-29 2018-06-22 中国科学院半导体研究所 The method that selectivity patterning prepares curing hafnium boron nitride heterojunction material
WO2019184747A1 (en) * 2018-03-26 2019-10-03 湖南大学 Reaction chamber device for dual-gasflow growth of two-dimensional material
CN109629004A (en) * 2019-01-09 2019-04-16 湖南大学 The method that Van der Waals is epitaxially formed the thin transition metal tellurides two-dimensional metallic material of atom level in no dangling bonds substrate
CN110284191A (en) * 2019-07-26 2019-09-27 华中科技大学 A kind of Two-dimensional Inorganic molecular crystal material and preparation method thereof
CN110284191B (en) * 2019-07-26 2020-08-18 华中科技大学 Two-dimensional inorganic molecular crystal material and preparation method thereof

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