Disclosure of Invention
Aiming at the problems, the invention provides an automatic monitoring device of a fire control system with a GPRS data remote transmission function.
In order to solve the problems, the invention adopts the technical scheme that: the automatic monitoring device of the fire control system with GPRS data remote transmission function comprises a processor circuit, a two-bus communication circuit connected with the processor circuit, a monitoring switch input circuit, an acousto-optic alarm circuit for on-site fault alarm, an internal power supply conversion circuit for alarming site failure through a light emitting diode and a buzzer and providing a required power supply for the device, a system power supply circuit and a signal isolation power supply circuit of the device, a GPRS transmission circuit and an IP address coding circuit for providing site IP address arrangement for the device, the two-bus communication circuit is in signal communication connection with an external fire control system to keep data exchange, the monitoring switch input circuit is in signal connection with the switching value input signal of the manual/automatic converter of the fire control system, and the GPRS transmission circuit is in information interaction with a fire control headquarters through satellite data transmission.
The two bus communication circuits are connected with the processor circuit through two bus signal isolation circuits.
The processor circuit is connected with the power-on reset and programming debugging circuit
The terminal comprises pins and a BKGD pin, AN XTAL pin and AN EXTAL pin which are connected with a clock circuit, a PWM0 pin-a PWM3 pin, AN IOC0 pin-AN IOC3 pin, a TXD0 pin and AN RXD0 pin which are connected with a GPRS transmission circuit, AN AN0 pin-
AN 7 pin which is connected with AN IP address coding circuit, a MISO0 pin, a MOSI0 pin and AN SCK0 pin which are connected with AN audible and visual alarm circuit, AN SS0 pin which is connected with a monitoring switch input circuit, a TXD1 pin and AN RXD1 pin which are connected with a two-bus communication circuit or a two-bus signal isolation circuit, a VRH/VDDXRA pin is connected to a power supply terminal VCC through a power supply filter capacitor, a VSSXA pin and a VSS pin are grounded, and a TEST pin is suspended;
the power-on RESET and programming debugging circuit comprises a BDM debugger, wherein a BKGD pin of the BDM debugger is connected to a BKGD pin of the processor circuit and is connected to a VCC power supply end through a twenty-fourth resistor, a VDD pin is connected to the VCC power supply end, a RESET pin of the BDM debugger is connected to the VCC power supply end through a twenty-sixth resistor, the RESET pin is grounded through a twenty-fifth resistor and a seventeenth capacitor which are connected in series with each otherThe common terminal of the seventeen capacitors is connected to the processor circuit
The pin, the NC pin and the GND pin are grounded, and the VFP pin is suspended;
the clock circuit comprises a crystal oscillator, two ends of the crystal oscillator are respectively connected to an XTAL pin and an EXTAL pin of the processor circuit, and two ends of the crystal oscillator are grounded through an eighteenth capacitor and a nineteenth capacitor;
the power supply filter capacitor comprises a twentieth capacitor and a twentieth capacitor which are connected between a VCC power supply end and the power supply ground in parallel.
The two-bus communication circuit comprises a bus master station communication interface chip and a nonpolar bidirectional circuit, wherein the nonpolar bidirectional circuit comprises a second diode and a third diode which are connected in series, and a fourth diode and a fifth diode which are connected in series, the cathode of the second diode is connected with the cathode of the fourth diode, the anode of the second diode is connected with the cathode of the third diode, the anode of the fourth diode is connected with the cathode of the fifth diode, and the anode of the third diode is connected with the anode of the fifth diode;
the bus master station communication interface chip VCC pin is connected to the cathode of the sixth diode through a first resistor, the third capacitor and the fourth capacitor are connected in parallel between the bus master station communication interface chip VCC pin and the GND pin, the negative electrode of the third capacitor and the GND pin are grounded through signals, the VOUT pin and the SEL pin are connected to a 5V power supply and are grounded through a fifth capacitor signal, the RXD pin is connected to the RXD1 pin of the processor circuit through two bus signal isolation circuits or a sixth resistor, if signal isolation is needed, the RXD pin passes through two bus signal isolation circuits, if signal isolation is not needed, the TXD pin passes through a sixth resistor, if signal isolation is needed, the TXD pin is connected to the TXD1 pin of the processor circuit through two bus signal isolation circuits or a seventh resistor, if signal isolation is needed, the NC pin is suspended through the seventh resistor.
The two-bus signal isolation circuit comprises a first optical coupler and a second optical coupler, wherein AN AN pin of the first optical coupler is connected to a 5V power supply, a VCC pin and AN EN pin of the second optical coupler, a CATH pin of the first optical coupler is connected to AN RXD pin of a bus master station communication interface chip through a second resistor, the VCC pin and the EN pin of the first optical coupler are connected to a VCC power supply end and the AN pin of the second optical coupler, AN OUT pin of the first optical coupler is connected to AN RXD1 pin of a processor circuit and connected to the VCC pin and the EN pin through a fourth resistor, a GND pin of the first optical coupler is grounded and connected to the VCC pin and the EN pin through a seventh capacitor, the NC pin and AN NC1 pin are suspended, two bus signals are input through the SIN pin, are demodulated by the bus master station communication interface chip, then output through the RXD pin, and then are transmitted to the processor circuit through the first optical coupler;
the OUT pin of the second optical coupler is connected to a TXD pin of a bus master station communication interface chip and is connected to a VCC pin and an EN pin of the second optical coupler through a third resistor, a GND pin of the second optical coupler is grounded through a signal and is connected to a 5V power supply through a sixth capacitor, a CATH pin of the second optical coupler is connected to a TXD1 pin of a processor circuit through a fifth resistor, an NC pin and an NC1 pin are suspended, a TTL signal output by the processor circuit passes through the second optical coupler and then is input into the bus master station communication interface chip through the TXD pin, and a modulation signal is formed on a bus.
The monitoring switch input circuit comprises a third optical coupler, a CATH pin of the third optical coupler is connected to a first non-polar switch end of a fire control system manual/automatic converter through a twentieth resistor, AN AN pin is connected to a VDD power supply end, a second non-polar switch end of the fire control system manual/automatic converter and signal grounding, a VCC pin and AN EN pin are connected to a VCC power supply end, AN OUT pin is connected to a SS0 pin of a processor circuit and is connected to a VCC pin and AN EN pin through a twenty-first resistor, the GND pin is grounded and is connected to the VCC pin and the EN pin through a twelfth capacitor, the NC pin and AN NC1 pin are suspended, and Z1 and Z2 are used for inputting non-polar switch signals of the manual/automatic converter and transmitting the signals to the processor circuit after being isolated by signals of the third optical coupler;
the third optical coupler plays a role in level conversion and signal isolation, if signal isolation is not needed, the monitoring switch input circuit can be connected between a VDD power supply end and a VCC power supply end through a twenty-second resistor, a twenty-third resistor is connected between a signal ground and a power ground, a switch signal isolation function is short-circuited, the monitoring switch input circuit only plays a role in level conversion, and the power VDD is obtained through the DC-DC power circuit module.
The acousto-optic alarm circuit comprises a buzzer alarm circuit and an indicator light circuit, the buzzer alarm circuit comprises a buzzer, a pin IN + of the buzzer is connected to a VCC power supply end, a pin IN1 is connected to a collector of a second triode, a power supply of an emitter of the second triode is grounded, a base of the second triode is connected to a pin SCK0 of the processor circuit through a sixteenth resistor, and a seventeenth resistor and a thirty-first capacitor are connected IN parallel between the base of the second triode and the power supply ground;
the indicating lamp circuit comprises a first light-emitting diode and a second light-emitting diode which are respectively used as a working power supply indicating lamp and an alarm indicating lamp, wherein the anode of the first light-emitting diode and the anode of the second light-emitting diode are connected to a VCC power supply end, the cathode of the first light-emitting diode is connected to a pin of a processor circuit MOSI0 through an eighteenth resistor, and the cathode of the second light-emitting diode is connected to a pin of a processor circuit MISO0 through a nineteenth resistor.
The internal power supply conversion circuit comprises a system power supply circuit and a signal isolation power supply circuit, wherein the system power supply circuit comprises an integrated voltage stabilizing circuit, an IN pin of the integrated voltage stabilizing circuit is connected to a 12V power supply, a cathode of a ninth voltage stabilizing diode, an anode of a thirteenth capacitor and one end of a fourteenth capacitor are connected to the IN pin, an anode of the ninth voltage stabilizing diode, the negative electrode of the thirteenth capacitor and the power supply at the other end of the fourteenth capacitor are grounded, the OUT pin is output to a VCC power supply end through the first inductor, the FB pin is connected to the VCC power supply end, the GND pin and the ON/OFF pin are grounded, the cathode of the tenth voltage stabilizing diode is connected to the OUT pin, the positive electrode of the fifteenth capacitor and one end of the sixteenth capacitor are connected to the VCC power supply end, the anode of the tenth voltage stabilizing diode, the negative electrode of the fifteenth capacitor and the power supply at the other end of the sixteenth capacitor are grounded, and the system power supply circuit converts a 12V power supply input by the power supply interface into a 5V power supply required by the system circuit;
the signal isolation power supply circuit comprises a DC-DC power supply circuit, a VIN + pin of the DC-DC power supply circuit is connected to a VCC power supply end, a VOUT + pin is connected to a VDD power supply end, a VIN-pin power supply is grounded, a VOUT-pin signal is grounded, and the DC-DC power supply circuit generates another set of 5V power supplies which are completely isolated electrically through a 5V power supply of the system and used as an isolation power supply for nonpolar input.
The pin LINK1 and the pin LINK2 of the GPRS transmission circuit are respectively connected to the pin IOC0 and the pin IOC1 of the processor circuit, the pin LINK3 and the pin LINK4 of the GPRS transmission circuit are respectively connected to the pin IOC2 and the pin IOC3 of the processor circuit through an eighth resistor and a ninth resistor, the pin UTXD1 and the pin URXD1 of the GPRS transmission circuit are respectively connected to the pin RXD0 and the pin TXD0 of the processor circuit, the pin WORK of the GPRS transmission circuit is connected to the pin PWM2 of the processor circuit, the pin POWKEY of the GPRS transmission circuit is connected to the drain electrode of the first field effect tube, the gate electrode of the GPRS transmission circuit is connected to the pin PWM1 of the processor circuit through a tenth resistor, the pin GND of the GPRS transmission circuit is connected to the source electrode of the first field effect tube and the power ground, the pin RESET and the pin RELOAD of the GPRS transmission circuit are respectively connected to the RESET circuit and the data recovery circuit, the pin RE485 EN is connected to the pin PWM3 of the processor circuit, the pin 0 of the GPRS transmission circuit, a VCAP pin of the GPRS transmission circuit is connected to the anode of an eighth capacitor, a DC5-18V pin is connected to a VCC power supply end and the anode of a ninth capacitor, the cathode of the eighth capacitor and the cathode of the ninth capacitor are grounded, and an NC1 pin, an NC2 pin, an RCV _ N pin, an RCV _ P pin, an MIC _ N pin and an MIC _ P pin are suspended;
the RESET circuit comprises a first key, one end of the first key is connected to a RESET pin of the GPRS transmission circuit, is connected to a VCC power supply end through a twelfth resistor and is grounded through a tenth capacitor power supply, and the other end of the first key is grounded through a thirteenth resistor power supply;
the data recovery circuit comprises a second key, one end of the second key is connected to a RELOAD pin of the GPRS transmission circuit, is connected to a VCC power supply end through a fourteenth resistor and is grounded through an eleventh capacitor power supply, and the other end of the second key is grounded through a fifteenth resistor power supply.
The IP address coding circuit comprises a toggle switch, pins of the toggle switch are respectively connected to pins AN 0-AN 7 of the processor circuit, a group of coding addresses are provided for the device, the number of the coding addresses is 0-255, and the IP address arrangement of the device is convenient to carry out on site.
The first input end of the two bus signals, the second input end of the two bus signals, the first non-polarity switch end and the second non-polarity switch end of the fire control system manual/automatic converter are connected with the monitoring device through input interfaces, and the input interfaces are used as the input interfaces of the two bus signals of the consumption control system and the non-polarity switch signals of the manual/automatic converter; the external power supply provides electric energy for the monitoring device through a power interface, and the power interface is used as an input interface of a 12V direct-current power supply.
The invention provides an automatic monitoring device of a fire control system with a GPRS data remote transmission function, which reads signals on a manual/automatic converter in a control cabinet, sends the signals of an automatic control state to a fire control room through a traditional switch signal and a two-bus means, remotely transmits the signals to a public security fire department or a fire control remote monitoring center through a GPRS remote transmission device for real-time monitoring, monitors the control mode of fire-fighting facilities in real time, supervises and urges a unit to enable the automatic fire-fighting facilities to be in an automatic state, and thus ensures that the fire control system plays the practical role.
Detailed Description
As shown in figure 1, the fire-fighting control system automatic monitoring device with GPRS data remote transmission function comprises a processor circuit U8, a two-bus communication circuit connected with the processor circuit U8, a monitoring switch input circuit, an acousto-optic alarm circuit for on-site fault alarm, an internal power supply conversion circuit which alarms on site faults through a light emitting diode and a buzzer and provides required power supply for the device, an IP address coding circuit which provides two paths of required power supply for a system power supply circuit and a signal isolation power supply circuit of the device, a GPRS transmission circuit U4 and site IP address arrangement for the device, the two-bus communication circuit is in signal communication connection with an external fire control system to keep data exchange, the monitoring switch input circuit is in signal connection with the switching value input signal of the manual/automatic converter of the fire control system, and the GPRS transmission circuit U4 is in information interaction with a fire control headquarters through satellite data transmission.
The two bus communication circuits are connected with the processor circuit U8 through two bus signal isolation circuits.
As shown in FIG. 2, the processor circuit U8 adopts a FREESCALE series microprocessor S9S12G32CALL _32, a pin 32, a package LQFP32, 5V power supply, 2-way serial communication interface, 20-way I/O input/output port, and a processor circuit U8 including connections to power-on reset and program debug circuitry
The terminal comprises pins and a BKGD pin, AN XTAL pin and AN EXTAL pin which are connected with a clock circuit, a PWM0 pin-
PWM 3 pin, AN IOC0 pin-
IOC 3 pin, a TXD0 pin and AN RXD0 pin which are connected with a GPRS transmission circuit U4, AN AN0 pin-
AN 7 pin which is connected with AN IP address coding circuit, a MISO0 pin, a MOSI0 pin and AN SCK0 pin which are connected with AN audible and visual alarm circuit, AN SS0 pin which is connected with a monitoring switch input circuit, a TXD1 pin and AN RXD1 pin which are connected with a two-bus communication circuit or a two-bus signal isolation circuit, a VRH/VDDXRA pin is connected to a VCC power supply end through a power supply filter capacitor, a VSS pin and VSS pin power supply ground, and a TEST pin are suspended;
as shown in fig. 3, the power-on RESET and programming debugging circuit includes BDM debugger JP1, BDM debugger JP1BKGD pin is connected to U8BKGD pin of processor circuit and VCC power supply end through twenty-four resistor R24, VDD pin is connected to VCC power supply end, BDM debugger JP1RESET pin is connected to VCC power supply end through twenty-six resistor R26, RESET pin is connected to VCC power supply end through twenty-five resistor R25 and seventeenth capacitor C17 in series, common terminal of twenty-five resistor R25 and seventeenth capacitor C17 is connected to processor circuit U8
The pin, the NC pin and the GND pin are grounded, and the VFP pin is suspended;
as shown in fig. 4, the clock circuit includes a crystal oscillator XT1, two terminals of the crystal oscillator XT1 are connected to the U8XTAL pin and the exteal pin of the processor circuit, respectively, and two terminals of the crystal oscillator XT1 are grounded via an eighteenth capacitor C18 and a nineteenth capacitor C19;
the power supply filter capacitor comprises a twentieth capacitor and a twentieth capacitor which are connected between a VCC power supply end and the power supply ground in parallel.
As shown in fig. 5, the two bus communication circuits include a bus master station communication interface chip U1 and a non-polar bidirectional circuit, the non-polar bidirectional circuit includes a second diode D2 and a third diode D3 connected in series, a fourth diode D4 and a fifth diode D5 connected in series, a cathode of the second diode D2 is connected to a cathode of the fourth diode D4, an anode of the second diode D2 is connected to a cathode of the third diode D3, an anode of the fourth diode D4 is connected to a cathode of the fifth diode D5, and an anode of the third diode D3 is connected to an anode of the fifth diode D5;
the pin U1SIN of the BUS master station communication interface chip is connected to the common end of the cathode of a second diode D2, the cathode of a fourth diode D4 and the anode of a sixth diode D6, the common end of the anode of the second diode D2 and the cathode of a third diode D3 is connected to a first BUS signal input end BUS1, the common end of the anode of a fourth diode D4 and the cathode of a fifth diode D5 is connected to a second BUS signal input end BUS2, a first voltage stabilizing diode D1, a first capacitor C1 and a second capacitor C2 are connected in series between the first BUS signal input end BUS1 and the second BUS signal input end BUS2 in parallel, the common end of the first capacitor C1 and the second capacitor C42 is connected to the signal ground, the first voltage stabilizing diode D1 is used for strong current protection of a BUS inlet, the first capacitor C1 and the second capacitor C2 are used for matching with the first voltage stabilizing diode D5 to perform BUS filtering processing, the BUS master station communication interface chip VCC 581 is connected to the cathode of the sixth diode D1, the third capacitor C3 and the fourth capacitor C4 are connected in parallel between a U1VCC pin and a GND pin of the bus master station communication interface chip, the negative electrode of the third capacitor C3 and the GND pin are grounded through signals, a VOUT pin and a SEL pin are connected to a 5V power supply and are grounded through a fifth capacitor C5 signal, an RXD pin is connected to a U8RXD1 pin of the processor circuit through two bus signal isolation circuits or a sixth resistor, if signal isolation is needed, the RXD pin passes through the two bus signal isolation circuits or the seventh resistor and is connected to the U8TXD1 pin of the processor circuit, if signal isolation is needed, the TXD pin passes through the two bus signal isolation circuits, and if signal isolation is not needed, the NC pin is suspended through the seventh resistor.
As shown in fig. 6, the two bus signal isolation circuit includes a first optocoupler U2 and a second optocoupler U3, wherein the first optocoupler U2AN pin is connected to the 5V power supply and the second optocoupler U3VCC pin and the EN pin, the first optocoupler U2CATH pin is connected to the bus master station communication interface chip U1RXD pin through a second resistor R2, the first optocoupler U2VCC pin and the EN pin are connected to the VCC power supply terminal and the second optocoupler U3AN pin, the first optocoupler U2OUT pin is connected to the processor circuit U8RXD1 pin and is connected to the first optocoupler U2VCC pin and the EN pin through a fourth resistor R4, the first optocoupler U2GND pin is grounded and is connected to the first optocoupler U2VCC pin and the EN pin through a seventh capacitor C7, the NC pin and the NC1 pin are floating, the two bus signals are input through the SIN pin, and output a rxttl signal through the bus communication interface chip U1, the signal is transmitted to a processor circuit U8 after passing through a first optical coupler U2;
the pin of the second optical coupler U3OUT is connected to the pin of the bus master station communication interface chip U1TXD and is connected to the pin of the second optical coupler U3VCC and the pin EN through a third resistor R3, the pin of the second optical coupler U3GND is grounded in signal and is connected to a 5V power supply through a sixth capacitor C6, the pin of the second optical coupler U3CATH is connected to the pin of the processor circuit U8TXD1 through a fifth resistor R5, the pin NC and the pin NC1 are suspended, a TTL signal output by the processor circuit U8 is input to the bus master station communication interface chip U1 through the pin TXD after passing through the second optical coupler U3, and a modulation signal is formed on a bus.
As shown in fig. 7, the monitoring switch input circuit includes a third optical coupler U5, a third optical coupler U5CATH pin is connected to a first non-polar switch terminal Z1 of the fire fighting control system manual/automatic converter through a twentieth resistor R20, AN pin is connected to a VDD power supply terminal, a second non-polar switch terminal Z2 of the fire fighting control system manual/automatic converter and a signal ground, a VCC pin and AN EN pin are connected to a VCC power supply terminal, AN OUT pin is connected to a processor circuit U8SS0 pin and is connected to a third optical coupler U5VCC pin and AN EN pin through a twenty-first resistor R21, a GND pin is connected to a ground and is connected to a VCC pin and AN EN pin through a twelfth capacitor C12, AN NC pin and AN NC1 floating pin, Z1 and Z2 are used for inputting a non-polar switch signal of the manual/automatic converter, and are transmitted to a processor circuit U8 after being signal-isolated by the third optical coupler U5;
the third optocoupler U5 plays a role in level conversion and signal isolation, if signal isolation is not needed, the monitoring switch input circuit can be connected between a VDD power supply end and a VCC power supply end through a twenty-second resistor, and a twenty-third resistor is connected between a signal ground and a power supply ground to short-circuit the switch signal isolation function, so that the switch signal isolation function only plays a role in level conversion, and the power supply VDD is obtained through the DC-DC power supply circuit U7 module.
As shown IN fig. 8, the sound and light alarm circuit includes a buzzer alarm circuit and an indicator light circuit, the buzzer alarm circuit includes a buzzer M1, a pin M1IN + of the buzzer is connected to a VCC power supply terminal, a pin IN1 is connected to a collector of a second triode Q2, a power supply of an emitter of the second triode Q2 is grounded, a base of the second triode Q2 is connected to a pin U8SCK0 of the processor circuit through a sixteenth resistor R16, and a seventeenth resistor R17 and a thirty-first capacitor C31 are connected IN parallel between the base of the second triode Q2 and the power supply ground;
as shown in fig. 9, the indicator light circuit includes a first light emitting diode D7 and a second light emitting diode D8 as an operating power indicator light and an alarm indicator light, respectively, an anode of the first light emitting diode D7 and an anode of the second light emitting diode D8 are connected to a VCC power terminal, a cathode of the first light emitting diode D7 is connected to a pin of a processor circuit U8MOSI0 through an eighteenth resistor R18, and a cathode of the second light emitting diode D8 is connected to a pin of a processor circuit U8MISO0 through a nineteenth resistor R19.
As shown IN fig. 10, the internal power conversion circuit includes a system power circuit and a signal isolation power circuit, wherein the system power circuit includes an integrated voltage regulator circuit U6, a pin U6IN of the integrated voltage regulator circuit is connected to a 12V power supply, one ends of a ninth zener diode D9, a positive electrode of a thirteenth capacitor C13, and a fourteenth capacitor C14 are connected to an IN pin, an anode of the ninth zener diode D9, a negative electrode of the thirteenth capacitor C13, and another end of the fourteenth capacitor C14 are connected to ground, an OUT pin is output to a VCC power supply terminal through a first inductor L1, an FB pin is connected to a VCC power supply terminal, a GND pin and an ON/OFF pin are connected to ground, a cathode of a tenth zener diode D10 is connected to the OUT pin, one ends of a positive electrode of a fifteenth capacitor C15 and a sixteenth capacitor C16 are connected to the VCC power supply terminal, an anode of the tenth zener diode D10, a negative electrode of the fifteenth capacitor C15, and another end of the sixteenth capacitor C16 are connected to ground, the system power supply circuit converts a 12V power supply input by the power supply interface J2 into a 5V power supply required by the system circuit;
as shown in FIG. 11, the signal isolation power circuit comprises a DC-DC power circuit U7, a U7VIN + pin of the DC-DC power circuit is connected to a VCC power supply end, a VOUT + pin is connected to a VDD power supply end, a VIN-pin is connected to the ground, a VOUT-pin is connected to the ground through a signal, and the DC-DC power circuit U7 generates another set of 5V power supplies which are completely isolated electrically through a 5V power supply of the system and are used as an isolation power supply with non-polar input.
As shown in fig. 12, the pins U4LINK1 and LINK2 of the GPRS transmission circuit are connected to the pins U8IOC0 and IOC1 of the processor circuit, the pins U4LINK3 and LINK4 of the GPRS transmission circuit are connected to the pins U8IOC2 and IOC3 of the processor circuit through an eighth resistor R8 and a ninth resistor R9, the pins U4UTXD1 and URXD1 of the GPRS transmission circuit are connected to the pins U8RXD0 and TXD0 of the processor circuit, the pin U4WORK of the GPRS transmission circuit is connected to the pin U8PWM2 of the processor circuit, the pin U4POWKEY of the GPRS transmission circuit is connected to the pin Q1 of the first fet, the pin 4 drain of the GPRS transmission circuit is connected to the pin U8PWM1 of the processor circuit through a tenth resistor R10, the pin U4WORK of the GPRS transmission circuit is connected to the source of the first fet 1 and the power ground, the pin U4 t and the pin lou 3 of the GPRS transmission circuit are connected to the pin U4RESET circuit and the pin ad 3 of the eleventh PWM 468 of the processor circuit, a GPRS transmission circuit U4LINK pin is connected to a processor circuit U8PWM0 pin, a GPRS transmission circuit U4VCAP pin is connected to an eighth capacitor C8 anode, DC5-18V pins are connected to a VCC power supply end and a ninth capacitor C9 anode, an eighth capacitor C8 cathode and a ninth capacitor C9 cathode power supply are grounded, and an NC1 pin, an NC2 pin, an RCV _ N pin, an RCV _ P pin, an MIC _ N pin and an MIC _ P pin are suspended;
the RESET circuit comprises a first key SW1, one end of the first key SW1 is connected to a RESET pin of a GPRS transmission circuit U4, is connected to a VCC power supply end through a twelfth resistor R12 and is grounded through a tenth capacitor C10, and the other end of the first key SW1 is grounded through a thirteenth resistor R13;
the data recovery circuit comprises a second key SW2, one end of the second key SW2 is connected to a U4RELOAD pin of the GPRS transmission circuit, is connected to a VCC power supply end through a fourteenth resistor R14 and is grounded through an eleventh capacitor C11, and the other end of the second key SW2 is grounded through a fifteenth resistor R15.
As shown in fig. 13, the IP address coding circuit includes a toggle switch SW3, pins SW3 of the toggle switch are respectively connected to pins U8AN 0-AN 7 of the processor circuit, so as to provide a set of coded addresses, 0-255, for the device, thereby facilitating the IP address arrangement for the device on site.
As shown in fig. 14 and 15, the first BUS signal input port BUS1, the second BUS signal input port BUS2, the first non-polarity switch terminal Z1 and the second non-polarity switch terminal Z2 of the fire control system manual/automatic converter are connected to the monitoring device through the input interface J1, and the input interface J1 is used as the input interface of the two BUS signals of the consumption control system and the non-polarity switch signal of the manual/automatic converter; the external power supply provides electric energy for the monitoring device through a power interface J2, and the power interface J2 is used as an input interface of a 12V direct-current power supply.
When the switches arranged on fire separation facilities such as a normal automatic water-spraying fire extinguishing system, a fire-proof rolling curtain and the like controlled in a linkage mode are in an automatic state, nonpolar switch signals of a first nonpolar switch end Z1 and a second nonpolar switch end Z2 are subjected to photoelectric signal isolation and conversion through a third optical coupler U5 and then are input into a processor circuit U8 through an input interface J1, and after the level of the input signal is judged, the switch position at the moment is determined to be in a normal state in an automatic state, so that functions such as acousto-optic alarm, data remote transmission and the like are not started on site by the processor circuit U8.
When an operator sets fire separation facilities such as an automatic water spray fire extinguishing system, a fire-proof roller shutter under linkage control and the like in a manual control state or when a switching device at the moment breaks down, nonpolar switch signals of a first nonpolar switch end Z1 and a second nonpolar switch end Z2 of a manual/automatic converter are transmitted to a processor circuit U8 through a monitoring switch input circuit through an input interface J1, and under the condition that the processor circuit U8 judges that the switches are not in normal requirements, the state of the monitoring signals and data such as IP addresses of the device are simultaneously and remotely transmitted to a main control console of a fire-fighting headquarters through a GPRS transmission circuit U4, the control modes of all fire-fighting facilities are monitored in real time, and field faults are alarmed through an acousto-optic alarm circuit, so that the fire-fighting control system is ensured to play the actual role.