CN107275226A - A kind of radio frequency component integrated approach - Google Patents
A kind of radio frequency component integrated approach Download PDFInfo
- Publication number
- CN107275226A CN107275226A CN201710529729.1A CN201710529729A CN107275226A CN 107275226 A CN107275226 A CN 107275226A CN 201710529729 A CN201710529729 A CN 201710529729A CN 107275226 A CN107275226 A CN 107275226A
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- radio frequency
- frequency component
- integrated approach
- bonding
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- 238000013459 approach Methods 0.000 title claims abstract description 22
- 239000000758 substrate Substances 0.000 claims abstract description 34
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 32
- 238000000034 method Methods 0.000 claims abstract description 32
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 32
- 239000010703 silicon Substances 0.000 claims abstract description 32
- 238000013461 design Methods 0.000 claims abstract description 18
- 239000002184 metal Substances 0.000 claims abstract description 13
- 229910052751 metal Inorganic materials 0.000 claims abstract description 13
- 239000003990 capacitor Substances 0.000 claims abstract description 4
- 238000005538 encapsulation Methods 0.000 claims abstract description 4
- 238000001465 metallisation Methods 0.000 claims abstract description 4
- 238000012545 processing Methods 0.000 claims abstract description 4
- 238000005516 engineering process Methods 0.000 claims description 20
- 239000010949 copper Substances 0.000 claims description 7
- 239000010931 gold Substances 0.000 claims description 6
- 239000012212 insulator Substances 0.000 claims description 6
- 229910018459 Al—Ge Inorganic materials 0.000 claims description 3
- 229910015363 Au—Sn Inorganic materials 0.000 claims description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 3
- 229910017755 Cu-Sn Inorganic materials 0.000 claims description 3
- 229910017927 Cu—Sn Inorganic materials 0.000 claims description 3
- 229910008045 Si-Si Inorganic materials 0.000 claims description 3
- 229910006411 Si—Si Inorganic materials 0.000 claims description 3
- 239000004411 aluminium Substances 0.000 claims description 3
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- 229910052681 coesite Inorganic materials 0.000 claims description 3
- 229910052802 copper Inorganic materials 0.000 claims description 3
- 229910052906 cristobalite Inorganic materials 0.000 claims description 3
- 239000007769 metal material Substances 0.000 claims description 3
- 239000000377 silicon dioxide Substances 0.000 claims description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 3
- 229910052682 stishovite Inorganic materials 0.000 claims description 3
- 229910052905 tridymite Inorganic materials 0.000 claims description 3
- 229910008062 Si-SiO2 Inorganic materials 0.000 claims description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 2
- 229910006403 Si—SiO2 Inorganic materials 0.000 claims description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 2
- 229910052737 gold Inorganic materials 0.000 claims description 2
- 239000004332 silver Substances 0.000 claims description 2
- 229910052709 silver Inorganic materials 0.000 claims description 2
- 238000003754 machining Methods 0.000 abstract description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 3
- 238000011161 development Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000003973 paint Substances 0.000 description 2
- 229910008065 Si-SiO Inorganic materials 0.000 description 1
- 229910006405 Si—SiO Inorganic materials 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005672 electromagnetic field Effects 0.000 description 1
- 238000013467 fragmentation Methods 0.000 description 1
- 238000006062 fragmentation reaction Methods 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Semiconductor Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
The present invention provides a kind of radio frequency component integrated approach, comprises the following steps, each layer silicon substrate is processed according to circuit design, and the silicon chamber and TSV for completing each laminar substrate are processed；The metallization of each layer silicon substrate is completed, the metal pattern completed according to circuit design on each laminar substrate is drawn, and completes the embedded processing of the passive devices such as Resistor-Capacitor Unit, filter circuit；By the corresponding silicon based substrate of wafer bonding process combination, the cavity formed required for embedding component；Chip micro-group dress is carried out, the component in radio circuit is arranged in corresponding cavity；The interconnection of all silicon based substrate layers is completed by wafer bonding technique；Further three-dimensional stacked into being carried out between encapsulation, selection as needed installs other components in upper and lower surface.Method provided by the present invention, machining accuracy is high；Component all interior can be buried, and surface is accomplished bright and clean without exposed；Integrated size is small, is conducive to component miniaturization, ultrathin, produces high yield rate in batches.
Description
Technical field
The invention belongs to Electromagnetic Field and Microwave Technology field, and in particular to a kind of radio frequency component integrated approach.
Background technology
The fast development of current radio frequency micro-system, the size to radio frequency component proposes more and more harsh requirement.It is based on
The radio circuit integrated approach of conventional fabrication processes can not meet radio frequency component miniaturization, the requirement of ultrathin.New method
By further developing the heterogeneous integrated technique of silicon based three-dimensional, multilayer laminated layout is completed using silicon based substrate, so as to be substantially reduced
Radio frequency component volume.
Typical radio frequency component integrated approach mainly has following several at present：
1) the circuit integrated approach based on multiplayer microwave printed circuit board technology.
Radio circuit integrated approach based on multilayer board (PCB) technique passes through Surface Mount Component, internal completion
The form of signal lead completes the integrated of radio circuit.By development for many years, extremely mature and reliable, extensive at present
Applied to radio frequency component it is integrated in.But have that machining accuracy is low, via design is dumb, embedding component difficulty lacks
Point, can not meet the requirement of radio frequency component ultrathin at present.
2) it is based on the circuit integrated approach of LTCC (LTCC) technique.
LTCC techniques are a kind of circuit substrate manufacturing process for starting the nineties in last century to rise, compared to PCB technology,
LTCC machining accuracy is higher, and via design is more flexible.But its shortcoming it is also obvious that due to ceramics itself quality it is more crisp,
Ltcc substrate easily fragmentation in use, substrate size can not be done greatly.And there is also can not embedding a large amount of components the shortcomings of, no
Beneficial to the Miniaturization Design of radio frequency component.
The content of the invention
It is an object of the invention to provide a kind of radio frequency component integrated approach, at least one of prior art is overcome or alleviated by
Drawbacks described above.
The purpose of the present invention is achieved through the following technical solutions：A kind of radio frequency component integrated approach, comprises the following steps,
Step one：Each layer silicon substrate is processed according to circuit design, the silicon chamber and TSV for completing each laminar substrate are processed；
Step 2：The metallization of each layer silicon substrate is completed, completing the metal pattern on each laminar substrate according to circuit design paints
System, and complete the embedded processing of the passive devices such as Resistor-Capacitor Unit, filter circuit；
Step 3：By the corresponding silicon based substrate of wafer bonding process combination, the cavity formed required for embedding component；
Step 4：Chip micro-group dress is carried out, the component in radio circuit is arranged in corresponding cavity；
Step 5：The interconnection of all silicon based substrate layers is completed by wafer bonding technique；
Step 6：Further three-dimensional stacked into being carried out between encapsulation, selection as needed installs other in upper and lower surface
Component.
Preferably, the thickness of each layer silicon substrate in the step one is between 150 μm~500 μm.
Preferably, the silicon chamber size in the step one is：1 × 1~6 × 6mm2, the μ of cavity depth 20~200
m。
Preferably, the TSV through hole bore size in the step one be 3 μm~100 μm between, depth-to-width ratio≤
10:1。
Preferably, precision≤1 μm that the metal pattern in the step 2 is drawn.
Preferably, the metal material in the step 2 is gold, silver, aluminium or copper.
Preferably, the wafer bonding technique in the step 3 is that metal bonding is bonded with insulator.
Preferably, the metal bonding is Al-Ge bonding technologies, Au-Sn bonding technologies, Cu-Sn bonding technologies, Au-
Au bonding technologies or Cu-Cu bonding technologies.
Preferably, the insulator bonding closes technique, Si-SiO for Si-Si bond2Bonding technology or SiO2-SiO2Key
Close technique.
A kind of beneficial effect of radio frequency component integrated approach provided by the present invention is, 1) machining accuracy is high：Compared to
PCB/LTCC technique minimum wiring size 100um, precision as error 10um, silicon substrate integrated technique can reach minimum wiring
Size 10um, error 1um precision.Higher precision is very beneficial for the miniaturization of integrated circuit.2) component can be whole
Inside bury, surface can accomplish bright and clean without exposed component.The radio frequency component completed based on this method can be with extremely convenient insertion
Into radio frequency micro-system, be conducive to system-level integrated.3) integrated size is small, is conducive to component miniaturization, ultrathin：This method collection
Into component its volume compare and existing product reduces more than 10 times.4) high yield rate is produced in batches, it is possible to greatly reduce and penetrate
Frequency link debugging amount：This method uses the heterogeneous integrated technique of advanced silicon based three-dimensional, integrated completely by height from substrate manufacture to component
Precision die integrated production line is completed.Batch uniformity is high, can save most debugging efforts.This method can be used for small
In the design of type component, can be used for other has in the numeral of miniature requirement and the design of logic control component.
Brief description of the drawings
Fig. 1 is radio frequency component configuration diagram of the present invention；
Fig. 2 is radio frequency component integrated flow figure of the present invention.
Embodiment
To make the purpose, technical scheme and advantage of the invention implemented clearer, below in conjunction with the embodiment of the present invention
Accompanying drawing, the technical scheme in the embodiment of the present invention is further described in more detail.In the accompanying drawings, identical from beginning to end or class
As label represent same or similar element or the element with same or like function.Described embodiment is the present invention
A part of embodiment, rather than whole embodiments.The embodiments described below with reference to the accompanying drawings are exemplary, it is intended to uses
It is of the invention in explaining, and be not considered as limiting the invention.Based on the embodiment in the present invention, ordinary skill people
The every other embodiment that member is obtained under the premise of creative work is not made, belongs to the scope of protection of the invention.
The radio frequency component integrated approach of the present invention is described in further details below in conjunction with the accompanying drawings.
This method completes multilayer laminated layout, with big by developing the heterogeneous integrated technique of silicon based three-dimensional using silicon based substrate
It is big to reduce radio frequency component volume, comprise the following steps that.
As depicted in figs. 1 and 2, step one：Each layer silicon substrate is processed according to circuit design, complete the silicon chamber of each laminar substrate with
TSV is processed.The thickness of wherein each layer silicon substrate is typically needed between selecting 150 μm~500 μm according to design, silicon chamber size is general
Selection is needed according to design：1 × 1~6 × 6mm2, 20~200 μm of cavity depth；TSV through hole bore size is general according to design
Need selection：Between 3um~100um, depth-to-width ratio≤10:1.
Step 2：The metallization of each layer silicon substrate is completed, completing the metal pattern on each laminar substrate according to circuit design paints
System, and complete the embedded processing of the passive devices such as Resistor-Capacitor Unit, filter circuit；Precision≤1 μm that wherein metal pattern is drawn, can
The metal material of selection has the materials such as golden (Au), silver-colored (Ag), aluminium (Al), copper (Cu).
Step 3：By the corresponding silicon based substrate of wafer bonding process combination, the cavity formed required for embedding component.
The selectable technique of wafer bonding is divided into metal bonding and two major classes, the wherein optional Al-Ge bondings of metal bonding is bonded with insulator
5 kinds of technique, Au-Sn bonding technologies, Cu-Sn bonding technologies, Au-Au bonding technologies, Cu-Cu bonding technologies etc.；Insulator is bonded
Optional Si-Si, Si-SiO2、SiO2-SiO2Deng 3 kinds, flexibly selection can be needed according to design.
Step 4：Chip micro-group dress is carried out, the component in radio circuit is arranged in corresponding cavity.
Step 5：According to different material and design requirement, suitable wafer bonding technique is selected to complete all silicon substrate bases
The interconnection of flaggy.
Step 6：Further three-dimensional stacked into being carried out between encapsulation, selection as needed installs other in upper and lower surface
Component.
The foregoing is only a specific embodiment of the invention, but protection scope of the present invention is not limited thereto, any
Those familiar with the art the invention discloses technical scope in, the change or replacement that can be readily occurred in, all should
It is included within the scope of the present invention.Therefore, protection scope of the present invention should using the scope of the claims as
It is accurate.
Claims (9)
1. a kind of radio frequency component integrated approach, it is characterised in that comprise the following steps,
Step one：Each layer silicon substrate is processed according to circuit design, the silicon chamber and TSV for completing each laminar substrate are processed；
Step 2：The metallization of each layer silicon substrate is completed, the metal pattern completed according to circuit design on each laminar substrate is drawn, and
Complete the embedded processing of the passive devices such as Resistor-Capacitor Unit, filter circuit；
Step 3：By the corresponding silicon based substrate of wafer bonding process combination, the cavity formed required for embedding component；
Step 4：Chip micro-group dress is carried out, the component in radio circuit is arranged in corresponding cavity；
Step 5：The interconnection of all silicon based substrate layers is completed by wafer bonding technique；
Step 6：Further three-dimensional stacked into being carried out between encapsulation, selection as needed installs other yuan of device in upper and lower surface
Part.
2. radio frequency component integrated approach according to claim 1, it is characterised in that each layer silicon in the step one
The thickness of substrate is between 150 μm~500 μm.
3. radio frequency component integrated approach according to claim 1, it is characterised in that the silicon chamber chi in the step one
It is very little to be：1 × 1~6 × 6mm2, 20~200 μm of cavity depth.
4. radio frequency component integrated approach according to claim 1, it is characterised in that the TSV in the step one leads to
Hole bore size be 3 μm~100 μm between, depth-to-width ratio≤10:1.
5. radio frequency component integrated approach according to claim 1, it is characterised in that the metal figure in the step 2
Precision≤1 μm that case is drawn.
6. radio frequency component integrated approach according to claim 1, it is characterised in that the metal material in the step 2
Expect for gold, silver, aluminium or copper.
7. radio frequency component integrated approach according to claim 1, it is characterised in that the wafer key in the step 3
It is that metal bonding is bonded with insulator to close technique.
8. radio frequency component integrated approach according to claim 7, it is characterised in that the metal bonding is bonded for Al-Ge
Technique, Au-Sn bonding technologies, Cu-Sn bonding technologies, Au-Au bonding technologies or Cu-Cu bonding technologies.
9. radio frequency component integrated approach according to claim 7, it is characterised in that the insulator bonding is Si-Si bond
Close technique, Si-SiO2Bonding technology or SiO2-SiO2Bonding technology.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710529729.1A CN107275226A (en) | 2017-07-02 | 2017-07-02 | A kind of radio frequency component integrated approach |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710529729.1A CN107275226A (en) | 2017-07-02 | 2017-07-02 | A kind of radio frequency component integrated approach |
Publications (1)
| Publication Number | Publication Date |
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| CN107275226A true CN107275226A (en) | 2017-10-20 |
Family
ID=60071573
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710529729.1A Pending CN107275226A (en) | 2017-07-02 | 2017-07-02 | A kind of radio frequency component integrated approach |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107733397A (en) * | 2017-11-08 | 2018-02-23 | 中国电子科技集团公司第二十六研究所 | A kind of multilayer bonding system integrated encapsulation structure applied to film bulk acoustic wave device |
| CN108172564A (en) * | 2017-12-24 | 2018-06-15 | 中国电子科技集团公司第五十五研究所 | A kind of millimeter wave antenna and the three-dimensionally integrated encapsulation of silicon-based devices |
| CN109801908A (en) * | 2019-01-29 | 2019-05-24 | 西安微电子技术研究所 | A kind of radio-frequency module and preparation method thereof |
| CN109935522A (en) * | 2019-03-19 | 2019-06-25 | 北京遥感设备研究所 | A kind of encapsulation manufacturing method that the heterogeneous radio frequency of wafer level is integrated |
| CN111276787A (en) * | 2019-12-31 | 2020-06-12 | 中国电子科技集团公司第五十五研究所 | Three-dimensional integrated millimeter wave AiP phased array element |
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2017
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| CN106783847A (en) * | 2016-12-21 | 2017-05-31 | 中国电子科技集团公司第五十五研究所 | For the three-dimensional bonding stacked interconnected integrated manufacturing method of radio frequency micro-system device |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107733397A (en) * | 2017-11-08 | 2018-02-23 | 中国电子科技集团公司第二十六研究所 | A kind of multilayer bonding system integrated encapsulation structure applied to film bulk acoustic wave device |
| CN108172564A (en) * | 2017-12-24 | 2018-06-15 | 中国电子科技集团公司第五十五研究所 | A kind of millimeter wave antenna and the three-dimensionally integrated encapsulation of silicon-based devices |
| CN109801908A (en) * | 2019-01-29 | 2019-05-24 | 西安微电子技术研究所 | A kind of radio-frequency module and preparation method thereof |
| CN109935522A (en) * | 2019-03-19 | 2019-06-25 | 北京遥感设备研究所 | A kind of encapsulation manufacturing method that the heterogeneous radio frequency of wafer level is integrated |
| CN111276787A (en) * | 2019-12-31 | 2020-06-12 | 中国电子科技集团公司第五十五研究所 | Three-dimensional integrated millimeter wave AiP phased array element |
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