CN107273188A - A kind of virtual machine central processing unit CPU binding method and device - Google Patents
A kind of virtual machine central processing unit CPU binding method and device Download PDFInfo
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- CN107273188A CN107273188A CN201710592879.7A CN201710592879A CN107273188A CN 107273188 A CN107273188 A CN 107273188A CN 201710592879 A CN201710592879 A CN 201710592879A CN 107273188 A CN107273188 A CN 107273188A
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- 230000027455 binding Effects 0.000 title claims abstract description 68
- 238000009739 binding Methods 0.000 title claims abstract description 68
- 238000000034 method Methods 0.000 title claims abstract description 20
- 230000015654 memory Effects 0.000 claims abstract description 49
- 238000012544 monitoring process Methods 0.000 claims description 11
- 230000001934 delay Effects 0.000 claims 1
- 230000007423 decrease Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 2
- 239000011800 void material Substances 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
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- 238000006467 substitution reaction Methods 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
- G06F9/45533—Hypervisors; Virtual machine monitors
- G06F9/45558—Hypervisor-specific management and integration aspects
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
- G06F9/45533—Hypervisors; Virtual machine monitors
- G06F9/45558—Hypervisor-specific management and integration aspects
- G06F2009/4557—Distribution of virtual machine instances; Migration and load balancing
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Abstract
The invention discloses a kind of virtual machine central processing unit CPU binding method and device, it is related to virtual machine technique.Virtual machine CPU binding methods disclosed by the invention, including：The virtual machine that memory source occupancy is met or exceeded into the first given threshold is bound according to the first binding strategy with the shared L2 physical cpus cached, and first binding strategy includes following condition：The virtual machine that memory source occupancy is met or exceeded into the first given threshold is bundled on the physical cpu of shared L2 caching, and only runs the virtual machine that a memory source occupancy meets or exceeds the first given threshold on bound physical cpu.
Description
Technical field
The present invention relates to virtual machine technique, and in particular to a kind of virtual machine performance pipe that L2 cachings are shared based on physical cpu
Reason scheme.
Background technology
Each virtual cpu of virtual machine can be allocated independently on physical cpu under planization environment, for example can will be virtual
Machine A virtual machine CPU1 is assigned on physical cpu 3, so virtual machine CPU just can only use physical cpu 3 resource, but
In multi-core CPU now, each physical cpu is not completely isolated, if corresponding without correctly virtual machine CPU is assigned to
On physical cpu, it is possible to the reduction of performance can be caused.
The content of the invention
The technical problems to be solved by the invention are to provide a kind of virtual machine CPU binding methods and device, can solve void
The problem of plan machine performance is low.
In order to solve the above-mentioned technical problem, the invention discloses a kind of virtual machine central processing unit CPU binding method, bag
Include：
Memory source occupancy is met or exceeded into the virtual machine of the first given threshold according to the first binding strategy and shared
The physical cpu of L2 cachings is bound, and first binding strategy includes following condition：
The virtual machine that memory source occupancy is met or exceeded into the first given threshold is bundled in the physics of shared L2 cachings
A memory source occupancy, which is only run, on CPU, and on bound physical cpu meets or exceeds the virtual of the first given threshold
Machine.
Alternatively, the above method also includes：
Cpu resource occupancy is met or exceeded into the virtual machine of the second given threshold according to the second binding strategy and shared L2
The physical cpu of caching is bound, and second binding strategy includes following condition：
The virtual machine that cpu resource occupancy is met or exceeded into the second given threshold is bundled in the physics of shared L2 cachings
On CPU
Alternatively, in the above method, second binding strategy also includes：
It is relatively low that the virtual machine that cpu resource occupancy is met or exceeded into the second given threshold is bundled in CPU resource utilization
Shared L2 caching physical cpu on.
Alternatively, in the above method, the virtual machine that memory source occupancy is met or exceeded to the first given threshold
Before being bound according to the first binding strategy and shared the L2 physical cpu cached, in addition to：
The resource service condition of each virtual machine of monitoring host computer, the resource service condition at least includes memory source and taken
Rate and cpu resource occupancy.
There is disclosed herein a kind of virtual machine central processing unit CPU binding device, including：
Binding unit, the virtual machine of the first given threshold is met or exceeded according to the first binding plan by memory source occupancy
Slightly bound with the shared L2 physical cpus cached；
Memory cell, stores first binding strategy, and first binding strategy includes following condition：
The virtual machine that memory source occupancy is met or exceeded into the first given threshold is bundled in the physics of shared L2 cachings
A memory source occupancy, which is only run, on CPU, and on bound physical cpu meets or exceeds the virtual of the first given threshold
Machine.
Alternatively, in said apparatus, cpu resource occupancy is met or exceeded the second given threshold by the binding unit
Virtual machine bound according to the second binding strategy with the shared L2 physical cpus cached；
The memory cell, stores second binding strategy, and the second binding strategy includes following condition：
The virtual machine that cpu resource occupancy is met or exceeded into the second given threshold is bundled in the physics of shared L2 cachings
On CPU
Alternatively, in said apparatus, second binding strategy also includes：
It is relatively low that the virtual machine that cpu resource occupancy is met or exceeded into the second given threshold is bundled in CPU resource utilization
Shared L2 caching physical cpu on.
Alternatively, said apparatus also includes：
Monitoring unit, the resource service condition of each virtual machine of monitoring host computer, the resource service condition at least includes interior
Deposit resources occupation rate and cpu resource occupancy.
The whether shared L2 cachings of physical cpu are combined virtual to manage by technical scheme with virtual machine CPU bindings
Machine, i.e., realize CPU binding schemes, that has abandoned most original determines CPU binding relationships by user based on the shared L2 technologies cached
Strategy, effectively prevent due to degradation problem caused by memory contention, and reasonably formulate memory-intensive virtual machine
With the binding strategy of CPU intensive type virtual machine, the performance of virtual machine is improved.
Brief description of the drawings
Fig. 1 is the virtual machine CPU binding flow charts based on the shared L2 cachings of physical host CPU in the embodiment of the present invention.
Embodiment
For the object, technical solutions and advantages of the present invention are more clearly understood, below in conjunction with accompanying drawing to skill of the present invention
Art scheme is described in further detail.It should be noted that in the case where not conflicting, in embodiments herein and embodiment
Feature can arbitrarily be mutually combined.
Present inventor proposes, can be cached according to virtual machine CPU bindings and the whether shared L2 of each CPU of physical machine
Situation be managed come the performance to virtual machine, i.e., load higher virtual machine, it is necessary to which the virtual machine is bundled in for internal memory
With improving performance on the physical cpu of shared L2 cachings, also it is bundled in if now there are other internal memories to load high virtual machine CPU
On these physical cpus, then the performance of virtual machine can be greatly reduced, therefore can not same luck on the physical cpu of shared L2 cachings
The multiple internal memories of row load high virtual machine.Further, since the higher virtual machine of a cpu load and an internal memory load high void
Plan machine is bundled in the decline that the two virtual machine performances are not resulted on the physical cpu of shared L2 caching simultaneously, therefore can be by
The higher virtual machine of cpu load loads higher virtual machine with internal memory and is bundled in simultaneously on the physical cpu of shared L2 cachings.
Based on above-mentioned thought, the present embodiment provides a kind of virtual machine CPU bindings that L2 cachings are shared based on physical host CPU
Method, specific implementation process are as shown in figure 1, comprise the following steps：
Step 100：The internal memory of each virtual machine of monitoring host computer and CPU service condition；
In the step, other resource occupation of binding strategy can be influenceed with other resource service conditions of monitoring host computer
Rate etc..
Step 200：By memory source occupancy high (i.e. memory source occupancy meets or exceeds the first given threshold)
Virtual machine and the virtual machine of cpu resource occupancy high (i.e. cpu resource occupancy meets or exceeds the second given threshold) are according to pre-
If binding strategy bound with physical cpu.
In the step, the first binding strategy corresponding for the high virtual machine of memory source occupancy includes following condition：
1st, internal memory is loaded into higher virtual machine to be bundled on the physical cpu of shared L2 cachings：
For example, virtual machine A has 0-7 CPU in 8 vCPU, physical machine to share L2 cachings, 8-15 CPU share L2 cachings,
If now virtual machine A internal memories load is higher, virtual machine A 8 vCPU are bundled in No. 0-7 or 8-15 physical cpus
On with improving performance.
2nd, internal memory loads higher multiple virtual machines and can not be bundled in simultaneously on the physical cpu of same shared L2 cachings：
For example, virtual machine B has 8 vCPU, if the load of virtual machine A internal memories is higher and has been bundled in 0-7 things
Manage on CPU, then virtual machine B can only be bundled on 8-15 physical cpus to ensure performance, otherwise occur that performance significantly drops
Low phenomenon.
Above-mentioned binding strategy is followed, is the physics that the high virtual machine of memory source occupancy is bundled in shared L2 cachings
On CPU, and a high virtual machine of memory source occupancy can only be run on the physical cpu of binding；
The second binding strategy corresponding for the high virtual machine of cpu resource occupancy includes following condition：
The higher virtual machine of cpu load is tied up on the physical cpu of shared L2 cachings, wherein, the higher virtual machine of cpu load
Loading higher virtual machine with internal memory can tie up on the physical cpu of same shared L2 cachings simultaneously：
For example, virtual machine C has 8 CPU, and cpu load is higher, and now the 8 of virtual machine C CPU can be bundled in physics
On main frame on any 8 of 0-15 CPU, virtual machine A and virtual machine B performance are not interfered with.
It is noted that can also judge which virtual machine CPU usage is relatively low on 16 CPU of physical host, as far as possible
It is bundled on the relatively low physical cpu of these occupancies, to ensure not having cpu resource competition appearance.I.e. above-mentioned second binding plan
It can also slightly include, the high virtual machine of cpu resource occupancy is bundled on the relatively low physical cpu of CPU resource utilization, with equal
The resource of each physical cpu of weighing is used.
In addition, being not up to the virtual machine and cpu resource occupancy of the first given threshold not for memory source occupancy
Reach the second given threshold virtual machine can according to existing mode can other modes carry out physical cpu binding, the present embodiment pair
This does not do specifically limited.
The present embodiment also provides a kind of virtual machine central processing unit CPU binding device, and above-mentioned binding method can be achieved.It is main
To include binding unit and memory cell.
Binding unit, by memory source occupancy high (i.e. memory source occupancy meets or exceeds the first given threshold)
Virtual machine is bound according to the first binding strategy with the shared L2 physical cpus cached；
This element, can also be high (i.e. cpu resource occupancy meets or exceeds the second given threshold) by cpu resource occupancy
Virtual machine bound according to the second binding strategy with the shared L2 physical cpus cached
Memory cell, stores binding strategy, wherein, the first binding strategy includes following condition：
On the physical cpu that the high virtual machine of memory source occupancy is bundled in shared L2 cachings, and bound physics
CPU is upper only to run the high virtual machine of a memory source occupancy.
Second binding strategy mainly includes following condition：
On the physical cpu that the high virtual machine of cpu resource occupancy is bundled in shared L2 cachings
It is noted that the virtual machine high to cpu resource occupancy is also contemplated that the cpu usage of physical machine, i.e.,
Two binding strategies also include：
The high virtual machine of cpu resource occupancy is bundled in the physical cpu of the relatively low shared L2 cachings of CPU resource utilization
On.
In practical application, said apparatus can also include monitoring unit, be mainly used in the money of each virtual machine of monitoring host computer
Source service condition, resource service condition at least includes memory source occupancy and cpu resource occupancy.
From above-described embodiment as can be seen that technical scheme is scientifically formulated according to virtual machine real-time monitoring data
Different virtual machine CPU binding strategies, it is to avoid user blindly binds and causes hydraulic performance decline；It is close with reference to memory-intensive and CPU
Collection type virtual machine formulates corresponding binding strategy for the different use demands that physical cpu shares L2 cachings, it is to avoid virtual
Machine is bundled in the physics that shared L2 is cached due to hydraulic performance decline caused by resource contention, and by memory-intensive virtual machine
CPU is upper can to lift certain performance.
One of ordinary skill in the art will appreciate that all or part of step in the above method can be instructed by program
Related hardware is completed, and described program can be stored in computer-readable recording medium, such as read-only storage, disk or CD
Deng.Alternatively, all or part of step of above-described embodiment can also use one or more integrated circuits to realize.Accordingly
Each module/unit in ground, above-described embodiment can be realized in the form of hardware, it would however also be possible to employ the shape of software function module
Formula is realized.The application is not restricted to the combination of the hardware and software of any particular form.
It is described above, it is only the preferred embodiments of the present invention, is not intended to limit the scope of the present invention.It is all this
Within the spirit and principle of invention, any modification, equivalent substitution and improvements done etc. should be included in the protection model of the present invention
Within enclosing.
Claims (8)
1. a kind of virtual machine central processing unit CPU binding method, it is characterised in that including：
The virtual machine that memory source occupancy is met or exceeded into the first given threshold delays according to the first binding strategy with shared L2
The physical cpu deposited is bound, and first binding strategy includes following condition：
The virtual machine that memory source occupancy is met or exceeded into the first given threshold is bundled in the physical cpu of shared L2 cachings
On, and the virtual machine that a memory source occupancy meets or exceeds the first given threshold is only run on bound physical cpu.
2. the method as described in claim 1, it is characterised in that methods described also includes：
The virtual machine that cpu resource occupancy is met or exceeded into the second given threshold is cached according to the second binding strategy and shared L2
Physical cpu bound, second binding strategy include following condition：
The virtual machine that cpu resource occupancy is met or exceeded into the second given threshold is bundled on the physical cpu of shared L2 cachings.
3. method as claimed in claim 2, it is characterised in that second binding strategy also includes：
The virtual machine that cpu resource occupancy is met or exceeded into the second given threshold is bundled in that CPU resource utilization is relatively low to be total to
On the physical cpu for enjoying L2 cachings.
4. the method as described in any one of claims 1 to 3, it is characterised in that described that memory source occupancy is reached or surpassed
Cross before the virtual machine of the first given threshold bound according to the first binding strategy and shared the L2 physical cpu cached, also wrap
Include：
The resource service condition of each virtual machine of monitoring host computer, the resource service condition at least include memory source occupancy and
Cpu resource occupancy.
5. a kind of virtual machine central processing unit CPU binding device, it is characterised in that including：
Binding unit, by memory source occupancy meet or exceed the virtual machine of the first given threshold according to the first binding strategy with
The physical cpu of shared L2 cachings is bound；
Memory cell, stores first binding strategy, and first binding strategy includes following condition：
The virtual machine that memory source occupancy is met or exceeded into the first given threshold is bundled in the physical cpu of shared L2 cachings
On, and the virtual machine that a memory source occupancy meets or exceeds the first given threshold is only run on bound physical cpu.
6. device as claimed in claim 5, it is characterised in that
The binding unit, the virtual machine of the second given threshold is met or exceeded according to the second binding plan by cpu resource occupancy
Slightly bound with the shared L2 physical cpus cached；
The memory cell, stores second binding strategy, and the second binding strategy includes following condition：
The virtual machine that cpu resource occupancy is met or exceeded into the second given threshold is bundled on the physical cpu of shared L2 cachings.
7. device as claimed in claim 6, it is characterised in that second binding strategy also includes：
The virtual machine that cpu resource occupancy is met or exceeded into the second given threshold is bundled in that CPU resource utilization is relatively low to be total to
On the physical cpu for enjoying L2 cachings.
8. the device as described in any one of claim 5 to 7, it is characterised in that also include：
Monitoring unit, the resource service condition of each virtual machine of monitoring host computer, the resource service condition at least includes internal memory and provided
Source occupancy and cpu resource occupancy.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110442423A (en) * | 2019-07-09 | 2019-11-12 | 苏州浪潮智能科技有限公司 | A kind of method and apparatus for realizing that virtual machine reserves CPU using control group |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101788920A (en) * | 2010-02-05 | 2010-07-28 | 北京航空航天大学 | CPU virtualization method based on processor partitioning technology |
| CN103268297A (en) * | 2013-05-20 | 2013-08-28 | 浙江大学 | Accelerating core virtual scratch pad memory method based on heterogeneous multi-core platform |
| CN103403689A (en) * | 2012-07-30 | 2013-11-20 | 华为技术有限公司 | Resource failure management method, device and system |
| CN106383747A (en) * | 2016-08-31 | 2017-02-08 | 华为技术有限公司 | Method and device for scheduling computing resources |
-
2017
- 2017-07-19 CN CN201710592879.7A patent/CN107273188B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101788920A (en) * | 2010-02-05 | 2010-07-28 | 北京航空航天大学 | CPU virtualization method based on processor partitioning technology |
| CN103403689A (en) * | 2012-07-30 | 2013-11-20 | 华为技术有限公司 | Resource failure management method, device and system |
| CN103268297A (en) * | 2013-05-20 | 2013-08-28 | 浙江大学 | Accelerating core virtual scratch pad memory method based on heterogeneous multi-core platform |
| CN106383747A (en) * | 2016-08-31 | 2017-02-08 | 华为技术有限公司 | Method and device for scheduling computing resources |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110442423A (en) * | 2019-07-09 | 2019-11-12 | 苏州浪潮智能科技有限公司 | A kind of method and apparatus for realizing that virtual machine reserves CPU using control group |
| CN110442423B (en) * | 2019-07-09 | 2022-04-26 | 苏州浪潮智能科技有限公司 | Method and equipment for realizing CPU reservation of virtual machine by using control group |
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