CN107240592B - Image sensor for improving light utilization rate and preparation method thereof - Google Patents
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Abstract
The invention discloses an image sensor for improving light utilization rate and a preparation method thereof, wherein the image sensor comprises an integrated substrate unit and an alternative isolation layer, the alternative isolation layer is positioned above the integrated substrate unit, the integrated substrate unit comprises a photodiode and a filling layer, the filling layer is positioned above the photodiode, the image sensor also comprises an optical channel groove and an optical channel, the optical channel groove is formed by etching the alternative isolation layer and the filling layer which are positioned above the photodiode, the optical channel groove comprises an optical channel groove I positioned in the alternative isolation layer and an optical channel groove II positioned in the filling layer, and the optical channel is filled in the optical channel groove. The image sensor for improving the light utilization rate has the excellent characteristics of high incident light utilization rate, simple process, low cost, low sensitivity and low noise.
Description
Technical Field
The invention relates to the field of image sensors, in particular to an image sensor for improving light utilization rate and a manufacturing method thereof.
Background
The image sensor comprises a Charge Coupled Device (CCD) and a Complementary Metal Oxide Semiconductor (CMOS), the CCD manufacturing process is complex, the cost is high, the CMOS is easy to generate miscellaneous points, and the process is complex. The back side illumination technology (BSI) type CMOS commonly used at present adopts a wafer bonding technology to change the internal structure of an element, i.e., to turn the direction of the element of a photosensitive layer and allow light energy to enter from the back side directly, thereby avoiding the influence of a circuit and a transistor between a micro lens and a photodiode on light rays in the traditional CMOS sensor structure, remarkably improving the efficiency of light and greatly improving the shooting effect under a low illumination condition.
However, there are three drawbacks in back side illumination technology (BSI) type CMOS technology: (1) incident light enters from the back of the wafer and reaches the photodiode, photoelectric conversion occurs in the light transmission process, and signals are read out through certain equipment; in a general optical path to the photodiode, the most significant problem is that birefringence occurs at the interface of different isolation films, or light is reflected or internally scattered from the microlens to the photodiode, which reduces the light utilization rate. (2) In the BSI technique, the light absorption layer is fabricated on the epitaxial wafer, which is very demanding on the quality of the epitaxial wafer, and the dislocation or irregularity of the crystal in the epitaxial wafer can affect the propagation dislocation of light, thereby affecting the quality of the image sensor. (3) In the BSI technique, carrier leakage between adjacent pixels needs to be prevented, so a deep trench isolation is generally generated on the structure or a trench is completed first and then polished by the CMP technique, which is complicated and tedious in process and causes a substantial increase in cost.
Disclosure of Invention
The invention aims to solve the technical problem of providing an image sensor for improving the light utilization rate, wherein a light channel groove is formed by etching alternating isolation layers and filling layers which are positioned above a photodiode, the opening of the light channel groove is larger than the lighting area of the photodiode, the light utilization rate is increased, and the image sensor is simple in process, low in cost, small in sensitivity and low in noise.
In order to achieve the purpose, the invention adopts the following technical scheme: an image sensor for improving light utilization rate comprises an integrated substrate unit and an alternative isolation layer, wherein the alternative isolation layer is positioned above the integrated substrate unit, the integrated substrate unit comprises a photodiode and a filling layer, the filling layer is positioned above the photodiode, the image sensor further comprises an optical channel groove and an optical channel, the optical channel groove is formed by etching the alternative isolation layer and the filling layer which are positioned above the photodiode, the optical channel groove comprises an optical channel groove I positioned in the alternative isolation layer and an optical channel groove II positioned in the filling layer, the lower surface of the optical channel groove I is completely superposed with the upper surface of the optical channel groove II, the side wall of the optical channel groove I is vertical, the cross section area in the horizontal direction is larger than the lighting area of the photodiode, and the optical channel groove II is a conical optical channel groove, and the side walls of the two sides and the bottom edge of the optical channel groove II form the same obtuse angle, and the optical channel is filled in the optical channel groove.
Furthermore, the integrated substrate unit further comprises a semiconductor substrate, an N-channel stop layer, shallow trench isolation, a P-type buried layer, a P-well region, a photodiode N-type region, a photodiode P-type region, a gate oxide layer, a transfer gate electrode, a reset gate electrode, a thermal oxide layer, an N-type lightly doped region, an N-type source drain region, a photodiode protective film, a filling layer, a contact hole and a tungsten plug.
Further, the photodiode comprises a photodiode P-type region and a photodiode N-type region, and the light collecting region of the photodiode is a region of the photodiode P-type region close to the filling layer in the horizontal direction.
Furthermore, a reflecting film is deposited on the side wall of the light channel groove II.
Further, the reflecting film is a convex surface which is thin at two sides and thick in the middle and has a fixed curvature.
Further, the reflecting film is TiN.
Further, the reflecting film is Al2O3。
Further, the alternating isolation layers are SiN isolation layers and SiO isolation layers2The isolation layers are alternately deposited.
Further, the optical channel is filled with SiN.
The present invention also provides a method of manufacturing the image sensor for improving light utilization efficiency according to claim 1, comprising the steps of:
s01, manufacturing an integrated substrate unit containing a photodiode and a filling layer, wherein the filling layer is positioned above the photodiode;
s02 depositing alternating isolation layers on the filling layer;
s03, etching a light channel groove I with a vertical side wall in the alternating isolation layer above the photodiode, wherein the cross-sectional area of the light channel groove I in the horizontal direction is larger than the lighting area of the photodiode;
s04 etching a light channel groove II in the filling layer above the photodiode, wherein the side walls of two sides of the light channel groove II form the same obtuse angle with the bottom edge of the light channel groove II, and the lower surface of the light channel groove I is completely overlapped with the upper surface of the light channel groove II;
and S05, filling the etched optical channel groove I and the etched optical channel groove II to form an optical channel.
The invention has the beneficial effects that: the alternating isolation layer and the filling layer which are positioned above the photodiode are etched to form an optical channel groove I with vertical side walls in the alternating isolation layer and an optical channel groove II with obtuse angles between the side walls and the bottom edge in the filling layer, wherein the opening of the optical channel groove is larger than the lighting area of the photodiode, so that the utilization rate of incident light is increased, and the process time is shortened; meanwhile, a thin reflecting film with fixed curvature is deposited in the middle of the conical light channel groove II in the filling layer, so that incident light is ensured to enter the photodiode to the maximum extent through the light channel, light loss behaviors such as birefringence, reflection, internal scattering and the like in the alternate isolation layer are avoided, and the light utilization rate is further increased.
Drawings
Fig. 1 to 8 are schematic cross-sectional views illustrating a method of manufacturing an image sensor according to embodiment 1.
Fig. 9 to 14 are schematic cross-sectional views illustrating a method of manufacturing an image sensor according to embodiment 2.
In the figure: 1 semiconductor substrate, 2N channel stop layer, 3 shallow trench isolation, 4P type buried layer, 5P well region, 6 photodiode N type region, 7 photodiode P type region, 8 gate oxide layer, 9 transfer gate electrode, 10 reset gate electrode, 11 thermal oxide layer, 12N type lightly doped region, 13N type source drain region, 14 photodiode protective film, 15 filling layer, 16 contact hole, 17 tungsten plug, 18SiN isolation layer, 19SiO2Isolation layer, 20SiN isolation layer, 21SiN isolation layer, 22SiO2Isolation layer, 23SiN isolation layer, 24SiO2Isolation layer, 25SiN isolation layer, 26SiN isolation layer, 27SiO2Isolation layer, 28SiN isolation layer, 29SiO2Isolation layer, 30SiN isolation layer, 31SiN isolation layer, 32SiO2Spacer layer, 33 photoresist, 34 etching plasma, 35 light channel trench, 36SiN filling layer, 37 light channel, 38 reflective film coating, 39 reflective film.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention are described in detail below with reference to the accompanying drawings.
An image sensor with improved light utilization efficiency comprises an integrated substrate unit and alternate isolation layersOn the integrated substrate unit, the alternating isolation layers are SiN and SiO2Alternating deposition formation. The integrated substrate unit comprises a photodiode and a filling layer, the filling layer is located above the photodiode, the integrated substrate unit further comprises an optical channel groove and an optical channel, the optical channel groove is formed by etching an alternate isolation layer and the filling layer which are located above the photodiode, the optical channel groove is composed of an optical channel groove I located in the alternate isolation layer and an optical channel groove II located in the filling layer, the side wall of the optical channel groove I is vertical, the cross sectional area in the horizontal direction is larger than the lighting area of the photodiode, and the lighting area of the photodiode is the area of a photodiode P-type area close to the filling layer and the alternate isolation layer in the horizontal direction. The light channel groove II is a conical light channel groove, the side walls of the two sides and the bottom edge of the light channel groove II form the same obtuse angle, and the lower surface of the light channel groove I and the upper surface of the light channel groove II are completely overlapped, so that the light channel groove is rectangular on the upper surface and is hexagonal in an isosceles trapezoid shape on the lower surface in a sectional view, and the length of the lower bottom edge of the isosceles trapezoid is smaller than that of the upper bottom edge. SiN is filled in the light channel groove to form a light channel.
The integrated substrate unit further comprises a semiconductor substrate, an N-channel stop layer, shallow trench isolation, a P-type buried layer, a P-well region, a photodiode N-type region, a photodiode P-type region, a gate oxide layer, a transfer gate electrode, a reset gate electrode, a thermal oxidation layer, an N-type lightly doped region, an N-type source drain region, a photodiode protective film, a filling layer, a contact hole and a tungsten plug. .
Wherein, a reflective film can be deposited on the side wall of the light channel groove in the filling layer. The reflecting film is a convex surface with two thin sides and a thick middle part and a fixed curvature. The reflecting film is TiN or Al2O3。
The following two specific embodiments are taken as examples to illustrate the specific manufacturing method of the image sensor of the present invention:
example 1
The specific manufacturing process of the image sensor for improving the light utilization rate comprises the following steps:
referring to FIG. 1, the resistivity is 8 in the N (100) directionUsing a 0-100 omega.m silicon substrate as a semiconductor substrate 1, performing RCA cleaning by using a cleaning solution containing SC1, HF and SC2, forming a 10nm thermal oxide layer on the silicon semiconductor substrate 1 by wet thermal oxidation, sequentially depositing a 35nm polysilicon layer and a 15nm SiN isolation layer on the thermal oxide layer by chemical vapor deposition, etching a 50nm deep trench through a photoresist mask, removing the photoresist, and forming 25nm SiO in the trench2Oxide layer on the formed SiO2Performing ion implantation on the oxide layer to form an N-channel stop layer 2, and forming SiO with a thickness of 500nm in the N-channel stop layer 2 by chemical vapor deposition2And annealing the layer in a nitrogen atmosphere at 950 ℃ for 60 minutes to form the shallow trench isolation 3 by a planarization technology.
And forming a P-type buried layer 4 on the semiconductor substrate by etching and boron ion implantation by using the photoresist as a mask, and removing the photoresist. And forming a P well region 5 on the P type buried layer 4 by etching and boron ion implantation by taking photoresist as a mask, and removing the photoresist.
Forming a photodiode N-type region 6 by etching and arsenic ion implantation with the photoresist as a mask, and removing the photoresist; and forming a photodiode P-type region 7 by etching and boron ion implantation by using the photoresist as a mask, removing the photoresist, and thermally annealing the photodiode at 1000 ℃ for 30 minutes.
RCA cleaning is carried out on the annealed semiconductor substrate, a gate oxide layer 8 with the thickness of 7nm is formed through an in-situ water vapor generation method, and a layer of polycrystalline silicon with the thickness of 200nm is deposited on the gate oxide layer 8 through a chemical vapor deposition method. Forming N-type polycrystal on the polysilicon by etching and arsenic ion implantation by using photoresist as a mask, and removing the photoresist; and similarly, taking the photoresist as a mask, forming a P-type polycrystal through etching and boron ion implantation, and removing the photoresist. After that, with the photoresist as a mask agent, the transfer gate electrode 9 and the reset gate electrode 10 are formed by dry etching the polysilicon and removing the photoresist.
And taking the photoresist as a mask, and obtaining the N-type lightly doped region 12 by implanting phosphorus ions and removing the photoresist. The thermal oxide layer 11 is formed on the semiconductor substrate by wet oxidation at 900 ℃. RCA cleaning of the thermal oxide layer 11Washing and depositing SiO 10nm on the surface2And photoresist is coated on the layer and the 30nm SiN isolation layer, the position right above the photodiode is coated with the photoresist, the thermal oxidation layer of the rest part is removed through dry etching, the photodiode protection film 14 positioned above the photodiode is formed, and then the photoresist is removed. And coating photoresist on the floating diffusion pixel region, taking the photoresist as a mask, etching, injecting arsenic ions, and removing the photoresist to form the N-type source drain region 13. Finally, 80nm of silicon oxide and 1200nm of borophosphosilicate glass are sequentially deposited on the upper surface of the semiconductor substrate, annealed for 30 minutes in a nitrogen environment at 825 ℃, and subjected to chemical mechanical polishing to form the filling layer 15.
As shown in fig. 2, a photoresist is coated on the filling layer 15, and the contact hole 16 is etched by using a photoresist mask, and the photoresist is removed.
As shown in fig. 3, a Ti layer of 10nm, a TiN layer of 7nm, and a W layer of 300nm are sequentially deposited in the contact hole 16, and an excess portion of the W layer is removed by CMP to form a tungsten plug 17.
As shown in FIG. 4, a 28nm SiN isolation layer 18 and a 200nm SiO isolation layer are sequentially deposited on the upper surfaces of the tungsten plug 17 and the filling layer 152And an isolation layer 19 and a 60nm SiN isolation layer 20, wherein metal wiring is performed in the isolation layer, and the metal wiring is a mixture of Ta — Cu and Cu. Then, a 50nm SiN isolation layer 21 and a 270nm SiO isolation layer are sequentially deposited on the upper surface of the SiN isolation layer 202 Isolation layer 22, 40nm SiN isolation layer 23, 300nm SiO2The isolation layer 24, the 80nm SiN isolation layer 25, the metal wiring in the isolation layer, the metal wiring using Ta-Cu and Cu mixture. Then, a 50nm SiN isolation layer 26 and a 270nm SiO isolation layer are sequentially deposited on the upper surface of the SiN isolation layer 252 Isolation layer 27, 40nm SiN isolation layer 28, 300nm SiO2The isolation layer 29 is a 100nm SiN isolation layer 30, and metal wiring is performed in the isolation layer, and a mixture of Ta — Cu and Cu is used for the metal wiring.
As shown in FIG. 5, 50nm SiO is sequentially deposited on the upper surface of the SiN spacer 30 by chemical vapor deposition2Spacer 31 and 220nm SiN spacer 32. Thereafter, 200nm BARC, 2500nm photoresist 3 was applied over the SiN spacer 323 and 200 nm.
As shown in FIG. 6, the alternating spacers are SiN spacers and SiO2The isolation layers are formed by alternately depositing SiN isolation layers and SiO isolation layers 18-32 in the figure2An isolation layer forming the light channel trench in two steps: the first step, using photoresist 33 as a mask agent, adopting etching plasma 34 to isotropically etch the alternate isolation layer to form a light channel groove I with a vertical side wall, wherein the cross-sectional area of the light channel groove in the alternate isolation layer in the horizontal direction is larger than that of the photodiode P-type area in the horizontal direction; and secondly, continuously etching the filling layer 15 on the basis of the first-step etching to form a conical optical channel groove II, so that the lower surface of the optical channel groove I is completely overlapped with the upper surface of the optical channel groove II, and the side walls of two sides of the optical channel groove II form the same obtuse angle with the bottom edge of the optical channel groove II. After two-step etching and removal of the photoresist 33, an optical channel trench 35 is formed over the photodiode.
As shown in fig. 7, an 1800nm SiN fill layer 36 is deposited along the surface of the light channel trench 35 and the SiN isolation layer 32, and the SiN isolation layer 36 completely fills the light channel trench 33.
As shown in fig. 8, the excess SiN filling layer 36 is removed by chemical mechanical polishing, so that the SiN isolation layer 36 is completely filled in the optical channel trench 35, and an optical channel 37 located in the optical channel trench is formed.
Example 2
The specific manufacturing process of the image sensor for improving the light utilization rate comprises the following steps:
the same steps as those in FIGS. 1 to 6 are repeated with reference to the description of example 1.
As shown in FIG. 9, a reflective film 38 of 60nm TiN or 80nm Al is deposited by PVD along the surface of the channel trench II and the SiN spacer 322O3A metal layer.
As shown in FIG. 10, a 100nm photoresist 33 is applied to the outer surface of the reflective thin film coating 38 and to the vertical sidewalls of the light tunnel trench I.
As shown in fig. 11 and 12, the reflective film 38 in the optical channel trench ii is etched by using the etching plasma 34, and the photoresist is used as a mask, the upper half portion of the reflective film 38 in the optical channel trench ii is etched into a circular shape, and then the lower half portion of the reflective film 38 is etched into a circular shape. Finally, a thin reflecting film 39 with a fixed curvature is etched on the middle of the reflecting film coating 38 on the two sides in the optical channel groove II, the rest reflecting film coatings are completely etched, and then the photoresist 33 is removed.
As shown in fig. 13, an 1800nm SiN filling layer 36 is deposited on the upper surfaces of the light channel trench 35 and the SiN isolation layer 32, and the SiN filling layer 36 completely fills the light channel trench 35.
As shown in fig. 14, the excess SiN filling layer 36 is removed by chemical mechanical polishing, so that the SiN filling layer 36 is completely filled in the light channel trench 35, and a light channel 37 located in the light channel trench is formed.
The above description is only a preferred embodiment of the present invention, and the embodiment is not intended to limit the scope of the present invention, so that all equivalent structural changes made by using the contents of the specification and the drawings of the present invention should be included in the scope of the appended claims.
Claims (9)
1. An image sensor for improving light utilization rate comprises an integrated substrate unit and an alternative isolation layer, wherein the alternative isolation layer is arranged above the integrated substrate unit, the integrated substrate unit comprises a photodiode and a filling layer, the filling layer is arranged above the photodiode, and the image sensor is characterized by further comprising an optical channel groove and an optical channel, the optical channel groove is formed by etching the alternative isolation layer and the filling layer which are arranged above the photodiode, the optical channel groove is composed of an optical channel groove I arranged in the alternative isolation layer and an optical channel groove II arranged in the filling layer, the lower surface of the optical channel groove I is completely coincided with the upper surface of the optical channel groove II, the side wall of the optical channel groove I is vertical, the cross section area in the horizontal direction is larger than the lighting area of the photodiode, and the optical channel groove II is a conical optical channel groove, and the side walls of the two sides and the bottom edge of the optical channel groove II form the same obtuse angle, a reflecting film is deposited on the side wall of the optical channel groove II, and the optical channel is filled in the optical channel groove.
2. The image sensor of claim 1, wherein the integrated substrate unit further comprises a semiconductor substrate, an N-channel stop layer, shallow trench isolation, a P-type buried layer, a P-well region, a photodiode N-type region, a photodiode P-type region, a gate oxide layer, a transfer gate electrode, a reset gate electrode, a thermal oxide layer, an N-type lightly doped region, an N-type source/drain region, a photodiode protection film, a filling layer, a contact hole, and a tungsten plug.
3. The image sensor of claim 1, wherein the photodiode comprises a photodiode P-type region and a photodiode N-type region, and the light collecting region of the photodiode is a region of the photodiode P-type region close to the filling layer in the horizontal direction.
4. The image sensor as claimed in claim 1, wherein the reflective film is a convex surface with a constant curvature, and the two sides of the reflective film are thin and the middle of the reflective film is thick.
5. The image sensor of claim 1, wherein the reflective film is TiN.
6. The image sensor as claimed in claim 1, wherein the reflective film is Al2O3。
7. The image sensor of claim 1, wherein the alternating isolation layers are SiN isolation layers and SiO isolation layers2The isolation layers are alternately deposited.
8. The image sensor of claim 1, wherein the light channel is filled with SiN.
9. A method of manufacturing the light use efficiency-improved image sensor of claim 1, comprising the steps of:
s01, manufacturing an integrated substrate unit containing a photodiode and a filling layer, wherein the filling layer is positioned above the photodiode;
s02 forming alternate isolation layers on the filling layer;
s03, etching a light channel groove I with a vertical side wall in the alternating isolation layer above the photodiode, wherein the cross-sectional area of the light channel groove I in the horizontal direction is larger than the lighting area of the photodiode;
s04, etching a light channel groove II in the filling layer above the photodiode, wherein the side walls of two sides of the light channel groove II form the same obtuse angle with the bottom edge of the light channel groove II, the lower surface of the light channel groove I is completely overlapped with the upper surface of the light channel groove II, and a reflecting film is deposited on the side wall of the light channel groove II;
and S05, filling the etched optical channel groove I and the etched optical channel groove II to form an optical channel.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201710355855.XA CN107240592B (en) | 2017-05-19 | 2017-05-19 | Image sensor for improving light utilization rate and preparation method thereof |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201710355855.XA CN107240592B (en) | 2017-05-19 | 2017-05-19 | Image sensor for improving light utilization rate and preparation method thereof |
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| Publication Number | Publication Date |
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| CN107240592A CN107240592A (en) | 2017-10-10 |
| CN107240592B true CN107240592B (en) | 2020-05-15 |
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| KR20000041459A (en) * | 1998-12-22 | 2000-07-15 | 김영환 | Image sensor and fabrication method thereof |
| CN201877429U (en) * | 2010-10-18 | 2011-06-22 | 格科微电子（上海）有限公司 | Image sensor |
| CN102881700A (en) * | 2012-09-18 | 2013-01-16 | 上海集成电路研发中心有限公司 | CMOS image sensor and manufacturing method thereof |
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| US7592645B2 (en) * | 2004-12-08 | 2009-09-22 | Canon Kabushiki Kaisha | Photoelectric conversion device and method for producing photoelectric conversion device |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20000041459A (en) * | 1998-12-22 | 2000-07-15 | 김영환 | Image sensor and fabrication method thereof |
| CN201877429U (en) * | 2010-10-18 | 2011-06-22 | 格科微电子（上海）有限公司 | Image sensor |
| CN102881700A (en) * | 2012-09-18 | 2013-01-16 | 上海集成电路研发中心有限公司 | CMOS image sensor and manufacturing method thereof |
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