CN107240585A - Has the circuit arrangement of antistatic protection function - Google Patents
Has the circuit arrangement of antistatic protection function Download PDFInfo
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- CN107240585A CN107240585A CN201610185943.5A CN201610185943A CN107240585A CN 107240585 A CN107240585 A CN 107240585A CN 201610185943 A CN201610185943 A CN 201610185943A CN 107240585 A CN107240585 A CN 107240585A
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- 238000010586 diagram Methods 0.000 description 8
- 230000003068 static effect Effects 0.000 description 5
- 238000000034 method Methods 0.000 description 3
- 230000001681 protective effect Effects 0.000 description 3
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000009825 accumulation Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000009993 protective function Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
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- Semiconductor Integrated Circuits (AREA)
Abstract
A kind of circuit arrangement for having antistatic protection function, including the first signal bonding pad, the first electrostatic discharging path and the second electrostatic discharging path.First electrostatic discharging path includes the first power rail, the first signal electrostatic discharge circuit and at least one first power supply electrostatic discharge circuit.First signal electrostatic discharge circuit is coupled between the first power rail and the first signal bonding pad.At least one first power supply electrostatic discharge circuit is coupled between the first power rail and earthing power supply rail.Second electrostatic discharging path includes second source rail and an at least second source electrostatic discharge circuit.At least a second source electrostatic discharge circuit is coupled between second source rail and earthing power supply rail.The voltage level of first power rail is less than the voltage level of second source rail.When electrostatic is produced by first signal bonding pad, the first external signal is discharged through the first electrostatic discharging path.
Description
Technical field
There is electricity more the invention relates to a kind of circuit arrangement for having antistatic protection function, and in particular to one kind
The circuit arrangement of source rail.
Background technology
Material in nature, may be via friction or electrification by induction, and obtains or lose electronics, and this kind of electric charge is
Referred to as electrostatic.When these electric charges are built up, potential difference can be produced with surrounding environment, if electric charge is via electric discharge road
Footpath and produce the transport phenomena between different potentials, i.e., referred to as static discharge (Electrostatic Discharge, ESD) is existing
As.
The mode that JEDEC tissues discharge by ESD Producing reasons and its to integrated circuit (Integrated Circuit, IC)
Difference, several different modes are categorized as by ESD, including human-body model (Human-Body Model, HBM),
Machine discharge mode (Machine Model, MM), element charge mode (Charge-Device Model, CDM).Lift
For example, human body possible accumulation electrostatic when ground is walked about, when people touches integrated circuit, electrostatic just can be via collection
Pin into circuit enters integrated circuit, and IC interior element is caused damage.And as integrated circuit is advanced
Process technique, component size is gradually reduced, and also element is gradually reduced for ESD protective capacities, but extraneous
Electrostatic produced by environment is not reduced.Therefore, how electrostatic discharge protection circuit is suitably designed, is current industry institute
One of problem endeavoured.
The content of the invention
An object of the present invention, is to provide a kind of circuit arrangement for having antistatic protection function, is applicable to have not
In the circuit supplied with voltage source, and preferably antistatic capacity can be provided.When electrostatic signal is connect by signal
Can be by preferably release power rail release electrostatic after entering at pad.
According to one embodiment of the invention, propose that a kind of circuit arrangement for having antistatic protection function, including the first signal connect
Pad, the first electrostatic discharging path and the second electrostatic discharging path.First signal bonding pad receives the first external signal.
First electrostatic discharging path includes the first power rail, the first signal electrostatic discharge circuit and at least one first power supply is quiet
Discharge of electricity circuit.First signal electrostatic discharge circuit is coupled between the first power rail and the first signal bonding pad.At least
One first power supply electrostatic discharge circuit is coupled between the first power rail and earthing power supply rail.Second electrostatic discharging path
Including second source rail and an at least second source electrostatic discharge circuit.An at least second source electrostatic discharge circuit coupling
It is connected between second source rail and earthing power supply rail.The voltage level of first power rail is less than the voltage of second source rail
Level.When electrostatic is produced by first signal bonding pad, discharge first outside through first electrostatic discharging path and believe
Number.
Below in conjunction with the drawings and specific embodiments, the present invention will be described in detail, but not as a limitation of the invention.
Brief description of the drawings
Fig. 1 illustrates the circuit arrangement schematic diagram of the tool antistatic protection function according to first embodiment of the invention.
Fig. 2 illustrates the circuit arrangement schematic diagram of the tool antistatic protection function according to second embodiment of the invention.
Fig. 3 illustrates the circuit arrangement schematic diagram of the tool antistatic protection function according to third embodiment of the invention.
Fig. 4 illustrates the circuit arrangement schematic diagram of the tool antistatic protection function according to fourth embodiment of the invention.
Embodiment
Below in conjunction with the drawings and specific embodiments, the present invention will be described in detail, but not as a limitation of the invention.
ESD protection circuit is that integrated circuit is specifically used to do electrostatic discharge protective and is used, and ESD protection circuit is provided
ESD current paths, discharge for electrostatic induced current, cause IC to damage to avoid electrostatic induced current from flowing into IC internal circuits.
Because ESD comes from integrated circuit external, so ESD protection circuit is generally disposed at adjacent signal connection pad (PAD).With
CMOS (Complementary Metal-Oxide-Semiconductor, CMOS) integrated electricity
Exemplified by road, signal bonding pad is typically connected to the gate (gate) of input stage element, and because gate pole oxidation layer is easily by ESD
Punched, therefore one group of ESD protection circuit can be set on the side of signal bonding pad, to protect input stage element to avoid
By ESD damage.In addition, because supply power rail (VDD) and earthing power supply rail (VSS) pin between may also meet with
Discharged by ESD, therefore, in supply power rail (VDD) and earthing power supply rail (VSS) side can generally also configure
ESD protection circuit.
Integrated circuit under normal operating conditions, be failure to actuate by ESD protection circuit.Therefore, in design except wanting
It can meet outside the ESD protection capability required by integrated circuit, also to reduce as much as possible because plus ESD protection
Circuit and increased cost, such as the increase of circuit layout (layout) area or the increase of manufacturing step.
And as the demand for integrating various difference in functionality IC wafers is increasingly improved, and current product is for low work(
The attention of rate consumption, the design of multi-power domain (multi power domain) is widely used.The present invention proposes a kind of
In the circuit that can be applied to multi-power domain, good antistatic capacity can be both provided, and can effectively save shared electricity consumption
The ESD protection circuit of road surface product, the embodiment of the present invention described further below.
In the circuit of a multi-power domain, it may include have at least two different supply voltages, such as a wherein power supply
Rail can provide voltage level for VDDSupply voltage, another power rail can provide voltage level for VDDHSupply electricity
Pressure, wherein VDD<VDDH, such as VDD=3.3V, VDDH=5V, with response to the difference needed for different elements in circuit
Supply voltage.Earthing power supply rail is comprised additionally in circuit, earthing power supply rail is used to the most negative confession in indication circuit herein
Answer voltage VSS, the voltage level of earthing power supply rail is not limited to 0 volt.Multi-power domain circuit may include multiple letters
Number connection pad, a portion signal bonding pad receive or output signal voltage range correspondence to VDD, another part letter
Number connection pad receive or output signal voltage range correspondence to VDDH。
In the following description, ESD protection circuit may include multiple electrostatic discharge circuits, with above-mentioned multi-power domain electricity
Exemplified by road, each power rail can have each self-corresponding electrostatic discharge circuit, with profit release ESD electric currents.For example in electricity
Between source rail and earthing power supply rail, a power supply electrostatic discharge circuit can be coupled;In another power rail and ground connection electricity
Between the rail of source, another power supply electrostatic discharge circuit can be coupled.The element that electrostatic discharge circuit is used e.g. diode
(diode) or metal-oxide semiconductor (MOS) (MOS), can also arrange in pairs or groups resistance again to constitute by diode and/or MOS
Electrostatic discharge circuit, but the present invention is not limited thereto.For the power rail with high voltage level, by pair
The electrostatic discharge circuit answered need to be designed in high voltage, it is thus possible to the diode or more stages string for needing more stages to concatenate
The repeatedly MOS elements of (cascode), consequently, it is possible to when ESD electric currents need to flow through electrostatic discharge circuit, it is quiet to make
Discharge of electricity circuit can bear high voltage, it is necessary to place diode or MOS elements that large area string changes.However, many
The clamped circuit of level may cause ESD failure chances to improve, or cause what circuit can be born when ESD is tested
ESD voltage grade is reduced.
According to the method for one embodiment of the invention, it can select wherein to be best suitable for making among multiple power rails of circuit
For a target power rail of ESD electric current release way, and the electrostatic discharge circuit of signal bonding pad is couple to this target
Power rail.The mode of selection target power rail can be that voltage is relatively low among the multiple power rails of selection, above-mentioned to avoid
The multistage element problem (area and protective capacities) that changes of going here and there referred to.In another embodiment, the side of selection target power rail
Formula, can also be a power rail for selecting equivalent resistance minimum, or select to provide most power supply electrostatic discharge circuits
One power rail in path.Describe the circuit of the tool antistatic protection function of the present invention in detail with several embodiments individually below
Device.
Fig. 1 illustrates the circuit arrangement schematic diagram of the tool antistatic protection function according to first embodiment of the invention.Have electrostatic to prevent
The circuit arrangement 1 of protective function includes putting for receiving the first external signal X the first signal bonding pad 210, the first electrostatic
Power path and the second electrostatic discharging path.Wherein, the first electrostatic discharging path includes the first signal static discharge electricity
Road 211, the first power rail P1 and at least one first power supply electrostatic discharge circuit 110.First signal static discharge
Circuit 211 is coupled between the first power rail P1 and the first signal bonding pad 210.First power supply electrostatic discharge circuit
110 are coupled between the first power rail P1 and earthing power supply rail P0.Second electrostatic discharging path includes second source
Rail P2 and the second source electrostatic discharge circuit 120 being coupled between second source rail P2 and earthing power supply rail P0.
In one embodiment, the first power rail P1 voltage level VDDLess than second source rail P2 voltage level VDDH。
When electrostatic is produced by the first signal bonding pad 210, circuit arrangement 1 is quiet through the first signal through the first electrostatic discharging path
Discharge of electricity circuit 211, the first power rail P1 and the first power supply electrostatic discharge circuit 110 discharge the first external signal
X.That is, can be by preferably release power rail (the first electricity after an electrostatic signal is entered by the first signal bonding pad 210
Source rail P1) release electrostatic.
For the sake of graphical simplicity, the first power supply electrostatic discharge circuit 110, second source static discharge in Fig. 1
The explanatory note of the signal electrostatic discharge circuit 221 of circuit 120 and first is all expressed as electrostatic discharge circuit, but
The people for being familiar with this art is appreciated that these three electrostatic discharge circuits each can realize framework using different,
To be respectively suitable for the power rail and signal bonding pad of different voltage levels.In addition, in Fig. 1, the first power supply electrostatic
Discharge circuit 110 is only illustrated with a square, in actual circuit, and the first power supply electrostatic discharge circuit 110 can be wrapped
Multiple electrostatic discharge circuits being coupled between the first power rail P1 and earthing power supply rail P0 are included, similarly, the second electricity
Source electrostatic discharge circuit 120 can include multiple electrostatic being coupled between second source rail P2 and earthing power supply rail P0
Discharge circuit.
In embodiment as shown in Figure 1, selected target power rail is that have low voltage position among two power rails
Standard (VDD) the first power rail P1, the first signal electrostatic discharge circuit 211 is coupled to the first power rail P1, wherein
The voltage range for the first external signal X that one signal bonding pad 210 is received not necessarily corresponds to the first power rail P1's
Voltage level VDD.In one embodiment, the voltage model for the first external signal X that the first signal bonding pad 210 is received
It is the voltage level V for corresponding to second source rail P2 to encloseDDH.In this embodiment, selected among circuit arrangement 1
The relatively low power rail of voltage (the first power rail P1), the first power rail is couple to by the first signal electrostatic discharge circuit 211
P1.Consequently, it is possible to when whether circuit arrangement 1 performs ESD tests, or during 1 actual normal operation of circuit arrangement,
When the voltage level of the first external signal X received by the first signal bonding pad 210 is higher than the first power rail P1 electricity
Press level VDDWhen, the first signal electrostatic discharge circuit 211, the first power rail P1, the first power supply electrostatic can be passed through
Discharge circuit 110 and discharge the first external signal X.First external signal X can be high voltage when ESD is tested
Signal, or when circuit normal operation, voltage range is VDDHSignal.
Due in this embodiment, high voltage signal (VDDH) can be via the power rail (with relatively low voltage level
One power rail P1) release, the power supply electrostatic discharge circuit institute using the of a relatively high power rail of voltage level can be avoided
The larger circuit area needed, can also avoid the high pressure resistant element that may be needed using high voltage circuit, while can also drop
The chance of low ESD failures, improves ESD voltage level.
Fig. 2 illustrates the circuit arrangement schematic diagram of the tool antistatic protection function according to second embodiment of the invention.With Fig. 1 phases
Compared with the first power supply electrostatic discharge circuit 110 illustrated originally in Fig. 1 is expressed as three and is coupled in fig. 2
The first power supply electrostatic discharge circuit 111,112 and 113 between one power rail P1 and earthing power supply rail P0.Herein
In embodiment, it when selection target power rail, can select that one of most electrostatic discharge circuit paths can be provided, or
It is one of equivalent resistance minimum of electrostatic discharge circuit.For example, in one embodiment, the first power supply electrostatic is put
Circuit 111,112,113 has the more circuit being coupled between the first power rail P1 and earthing power supply rail P0,
Second source electrostatic discharge circuit 120 has the less electricity being coupled between second source rail P2 and earthing power supply rail P0
Road, in this example, the equivalent resistance of all first power supply electrostatic discharge circuits 111,112,113 is less than the second electricity
The equivalent resistance of source electrostatic discharge circuit 120, therefore the first power rail P1 of selection is as target power rail, by the first letter
Number electrostatic discharge circuit 211 is coupled to the first power rail P1.
Because the target power rail of selection is can to provide one of most electrostatic discharge circuit paths, or static discharge electricity
One of the equivalent resistance minimum on road, so can more rapidly more equivalent to that can provide preferably ESD release pipelines
ESD is effectively discharged, and obtains higher ESD voltage grade.The people for being familiar with this art understands, due to utilizing
There is the electrostatic discharge circuit path of relatively low equivalent resistance, therefore, it is possible to relatively low electrostatic discharge circuit area in circuit
Reach identical ESD voltage grade.When judging ESD qualities, a conventional index (Figure of Merit, FOM)
For ESD voltage grade divided by ESD circuit area, as described above, there is smaller equivalent resistance ESD electricity by selection
The power rail on road, can reach preferably FOM.
In addition, in the embodiment shown in Fig. 2, circuit arrangement 1 has further included secondary signal electrostatic discharge circuit 212,
It is coupled between the first signal bonding pad 210 and earthing power supply rail P0.Secondary signal electrostatic discharge circuit 212 and first is believed
Different circuit implementations can be used in number electrostatic discharge circuit 211.When outside first received by the first signal bonding pad 210
Portion signal X voltage level is less than earthing power supply rail P0 (VSS) when, can through secondary signal electrostatic discharge circuit 212,
Earthing power supply rail P0, the first power supply electrostatic discharge circuit 111,112,113 and discharge the first external signal X.
Fig. 3 illustrates the circuit arrangement schematic diagram of the tool antistatic protection function according to third embodiment of the invention.Implement herein
In example, circuit arrangement 1 further includes quiet for the second external signal Y of reception secondary signal connection pad 220, the 3rd signal
The signal electrostatic discharge circuit 222 of discharge of electricity circuit 221 and the 4th.Wherein, the 3rd signal electrostatic discharge circuit 221
It is coupled between the power rail P1 of secondary signal connection pad 220 and first, the 4th signal electrostatic discharge circuit 222 is coupled to
Between binary signal connection pad 220 and earthing power supply rail P0.When electrostatic is produced by secondary signal connection pad 220, received
Second external signal Y voltage level, which is higher than, to be grounded, the 3rd signal electrostatic discharge circuit 221 of the transmission of circuit arrangement 1,
First power rail P1 and the first power supply electrostatic discharge circuit 110 discharge the second external signal Y.When electrostatic is by the second letter
When number connection pad 220 is produced, the second external signal Y voltage level is less than earthing power supply rail P0 voltage level VSS
When, circuit arrangement 1 can pass through the 4th signal electrostatic discharge circuit 222, earthing power supply rail P0, the first power supply electrostatic
Discharge circuit 110 and discharge the second external signal Y.
(it is the first electricity in this example in the target power rail that have selected among circuit arrangement 1 in the embodiment that Fig. 3 is illustrated
Source rail P1) after, the first signal bonding pad 210 and secondary signal connection pad 220 are respectively with respective electrostatic discharge circuit coupling
It is connected to target power rail.The voltage range for the first external signal X that wherein the first signal bonding pad 210 is received can be with
The voltage range for the second external signal Y that secondary signal connection pad 220 is received is differed, no matter that is, signal bonding pad is connect
Signal bonding pad, can be all coupled in circuit arrangement 1 most by the voltage range of the external signal of receipts with electrostatic discharge circuit
Easily successfully discharge ESD target power rail.
For example, the first external signal X voltage range can be corresponded to second source rail P2 voltage level VDDH,
Second external signal Y voltage range can be corresponded to the first power rail P1 voltage level VDD, the such as first letter
Number connection pad 210 can receive the signal from different external circuits respectively from secondary signal connection pad 220, respectively with not
With voltage range, and inside circuit arrangement 1, the first signal bonding pad 210 and secondary signal connection pad 220 can be with
Respectively identical the is coupled to through the first signal electrostatic discharge circuit 211 and the 3rd signal electrostatic discharge circuit 221
One power rail P1, to reach FOM that ESD is optimal.
Fig. 4 illustrates the circuit arrangement schematic diagram of the tool antistatic protection function according to fourth embodiment of the invention.Implement herein
In example, circuit arrangement 1 further includes the 3rd electrostatic discharging path, and the 3rd electrostatic discharging path includes the 3rd power rail P3
And it is coupled to the 3rd power supply electrostatic discharge circuit 130 between the 3rd power rail P3 and earthing power supply rail P0.One
In embodiment, the 3rd power rail P3 voltage level VDDLLess than the first power rail P1 voltage level VDD。
In this embodiment, circuit arrangement 1 can use more than two power domain, i.e., except VDDAnd VDDHIt
Outside, voltage level is further included less than VDDVDDL, VDDLSuch as less than 1.8V.First signal electrostatic discharge circuit
211 and the 3rd signal electrostatic discharge circuit 221 might not be coupled to the power rail with minimum voltage level,
And the power rail with optimal ESD releasabilities can be coupled to.For example, the 3rd power rail P3 voltage
Level VDDLAlthough than the first power rail P1 voltage level VDDIt is low, but the 3rd power rail is used in circuit arrangement
P3 element may be less, and the electrostatic discharge circuit being coupled between the 3rd power rail P3 and earthing power supply rail P0 can
Can be also less, and cause all at least one first power supply electrostatic discharge circuits 110 equivalent resistance be less than it is all extremely
The equivalent resistance of few one the 3rd power supply electrostatic discharge circuit 130, therefore the first power rail P1 of selection is as target power rail,
By the first signal bonding pad 210 and secondary signal connection pad 220 respectively through the first signal electrostatic discharge circuit 211 and
3rd signal electrostatic discharge circuit 221 is couple to the first power rail P1.
By the circuit arrangement using the above embodiment of the present invention, in the circuit arrangement that a multi-power domain can be found out,
Target power rail with optimal ESD releasabilities, target power is coupled to by signal bonding pad through electrostatic discharge circuit
Rail.The larger circuit area needed for the power supply electrostatic discharge circuit using high-voltage power supply rail can be so avoided, and
Avoid the high pressure resistant element that use cost is higher.And because target power rail has good ESD releasabilities, so
Circuit arrangement can effectively improve ESD voltage grade, or phase can be reached with relatively low electrostatic discharge circuit area
Same ESD voltage grade, reaches preferably FOM.
Certainly, the present invention can also have other various embodiments, in the case of without departing substantially from spirit of the invention and its essence,
Those skilled in the art work as can make various corresponding changes and deformation according to the present invention, but these change accordingly
Become and deformation should all belong to the protection domain of appended claims of the invention.
Claims (10)
1. a kind of circuit arrangement for having antistatic protection function, it is characterised in that including:
One first signal bonding pad, receives one first external signal;
One first electrostatic discharging path, including:
One first power rail;
One first signal electrostatic discharge circuit, is coupled between first power rail and first signal bonding pad;With
And
At least one first power supply electrostatic discharge circuit, is coupled between first power rail and an earthing power supply rail;
And
One second electrostatic discharging path, including:
One second source rail;And
An at least second source electrostatic discharge circuit, is coupled between the second source rail and the earthing power supply rail;
Wherein, the voltage level of first power rail is less than the voltage level of the second source rail;
Wherein, when electrostatic is produced by first signal bonding pad, this is discharged outside first through first electrostatic discharging path
Portion's signal.
2. circuit arrangement as claimed in claim 1, it is characterised in that all at least one first power supply electrostatic are put
The equivalent resistance of circuit is less than the equivalent resistance of all at least second source electrostatic discharge circuits.
3. circuit arrangement as claimed in claim 1, it is characterised in that also include:
One secondary signal electrostatic discharge circuit, is coupled between first signal bonding pad and the earthing power supply rail.
4. circuit arrangement as claimed in claim 1, it is characterised in that also include:
One the 3rd electrostatic discharging path, including:
One the 3rd power rail;And
At least one the 3rd power supply electrostatic discharge circuit, is coupled between the 3rd power rail and the earthing power supply rail;
Wherein, the voltage level of the 3rd power rail is different from the voltage level of first power rail.
5. circuit arrangement as claimed in claim 4, it is characterised in that all at least one first power supply electrostatic are put
The equivalent resistance of circuit is less than the equivalent resistance of all at least one the 3rd power supply electrostatic discharge circuits.
6. circuit arrangement as claimed in claim 1, it is characterised in that also include:
One secondary signal connection pad, receives one second external signal;And
One the 3rd signal electrostatic discharge circuit, is coupled between the secondary signal connection pad and first power rail;
Wherein, when electrostatic is produced by the secondary signal connection pad, through the 3rd signal electrostatic discharge circuit, this first
Power rail and at least one first power supply electrostatic discharge circuit discharge second external signal.
7. circuit arrangement as claimed in claim 6, it is characterised in that first signal bonding pad received this first
The voltage range for second external signal that the voltage range of external signal is received with the secondary signal connection pad is differed.
8. circuit arrangement as claimed in claim 6, it is characterised in that first signal bonding pad received this first
The corresponding voltage level to the second source rail of the voltage range system of external signal.
9. circuit arrangement as claimed in claim 8, it is characterised in that the secondary signal connection pad received this second
The corresponding voltage level to first power rail of the voltage range system of external signal.
10. circuit arrangement as claimed in claim 6, it is characterised in that also include:
One the 4th signal electrostatic discharge circuit, is coupled between the secondary signal connection pad and the earthing power supply rail.
Priority Applications (1)
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CN201610185943.5A CN107240585B (en) | 2016-03-29 | 2016-03-29 | Circuit device with electrostatic protection function |
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CN201610185943.5A CN107240585B (en) | 2016-03-29 | 2016-03-29 | Circuit device with electrostatic protection function |
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CN107240585A true CN107240585A (en) | 2017-10-10 |
CN107240585B CN107240585B (en) | 2020-03-17 |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110149789A (en) * | 2019-03-25 | 2019-08-20 | 南京中感微电子有限公司 | The circuit of electromagnetic radiation is resisted in enhancing |
Citations (3)
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US20070097581A1 (en) * | 2005-11-01 | 2007-05-03 | Freescale Semiconductor, Inc. | Electrostatic discharge (ESD) protection circuit for multiple power domain integrated circuit |
CN201364900Y (en) * | 2008-12-18 | 2009-12-16 | 比亚迪股份有限公司 | Electrostatic discharge protection device of multi-power domain integrated circuit |
US20130235497A1 (en) * | 2012-03-08 | 2013-09-12 | Taiwan Semiconductor Manufacturing Co. Ltd. | ELECTRO-STATIC DISCHARGE CLAMP (ESD) FOR NxVDD POWER RAIL |
-
2016
- 2016-03-29 CN CN201610185943.5A patent/CN107240585B/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20070097581A1 (en) * | 2005-11-01 | 2007-05-03 | Freescale Semiconductor, Inc. | Electrostatic discharge (ESD) protection circuit for multiple power domain integrated circuit |
CN201364900Y (en) * | 2008-12-18 | 2009-12-16 | 比亚迪股份有限公司 | Electrostatic discharge protection device of multi-power domain integrated circuit |
US20130235497A1 (en) * | 2012-03-08 | 2013-09-12 | Taiwan Semiconductor Manufacturing Co. Ltd. | ELECTRO-STATIC DISCHARGE CLAMP (ESD) FOR NxVDD POWER RAIL |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110149789A (en) * | 2019-03-25 | 2019-08-20 | 南京中感微电子有限公司 | The circuit of electromagnetic radiation is resisted in enhancing |
CN110149789B (en) * | 2019-03-25 | 2020-08-28 | 南京中感微电子有限公司 | Circuit for enhancing resistance to electromagnetic radiation |
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