CN1072395C - Dual modes microwave/mm wave integrated circuit sealing pack - Google Patents
Dual modes microwave/mm wave integrated circuit sealing pack Download PDFInfo
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- CN1072395C CN1072395C CN97103794A CN97103794A CN1072395C CN 1072395 C CN1072395 C CN 1072395C CN 97103794 A CN97103794 A CN 97103794A CN 97103794 A CN97103794 A CN 97103794A CN 1072395 C CN1072395 C CN 1072395C
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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Abstract
The present invention relates to a dual-mode microwave/millimeter wave integrated circuit package structure with the advantages of low cost, high working frequency, quick heat radiation, high reliability, etc. Particularly, the package structure of the present invention can provide two operating modes including a microstrip line mode and a coplanar waveguide mode, which can not be achieved by a commonly known microwave IC package structure.
Description
The invention relates to the little integrated circuit encapsulation of a kind of Shuan Chongmoshiweibo millimeter wave, especially relevant for a kind of microwave/millimeter wave integrated circuit encapsulation that microstrip line (microstrip line) pattern and two kinds of working methods of co-plane waveguide (coplanar waveguide) pattern are provided.
Past, microstrip line was the waveguide component that microwave IC design is the most widely known over 30 years; On the other hand, the application of co-plane waveguide has considerable progress in recent years.Two kinds of working methods respectively have its pluses and minuses, and the microstrip line working method is owing to be to be single mode, so be easy to use, co-plane waveguide then has the less advantage of decay, and ground connection is more or less freely; On the other hand, the decay of microstrip line is big than co-plane waveguide, co-plane waveguide then since non-be single mode, so comparatively difficult in the use.
Figure 10 illustrates to show a kind of known microwave integrated circuit IC encapsulating structure, it is to be disclosed in United States Patent (USP) number 5, in 235,208, comprising: the three-layer type pedestal (same concept also can be extended to the pedestal more than four layers) that upper metal layer 91, intermediate metal layer 92 and below metal level 93 are constituted, IC wafer 94, transmission line 95, IC wafer weld part 96, top dielectric layer 97, below dielectric layer 98, via hole (via hole) 991,992,993,994 etc.It is to utilize this multilayer pedestal to form a transmission medium, or back side lead formula co-plane waveguide, to be connected with IC wafer 94.This kind IC packaged type is owing to the lead frame that does not have as Figure 11 and Figure 12, the inductance value of encapsulating structure integral body is less, therefore has higher frequency of operation (report according to the document can reach more than the 20GHz), but it is to adopt the mode of sealing to come protection against the tide that its shortcoming is this kind encapsulation, or originally be higher than SOIC (SmallOutline Integrated Circuit) encapsulating structure, so little by little replaced by the SOIC packaged type.
The SOIC encapsulation technology is the most widely used at present encapsulation technology, and its structure can be represented by Figure 11.Main points are the mode that IC wafer 81 is installed (surface mounting) with plane formula is adhered in the oar portion (paddle) 821 of lead frame 82, stamp bonding wire (bond wire) 83, after fixing with colloidal materials 84 then, form with plastic cement 85 injection moldings again.Its advantage is the protection by the plastic layer 85 of outside, and preventing influences electrical characteristic because of the intrusion of moisture, dust etc., thereby has improved reliability.But along with the miniaturization of IC encapsulation, though the formed inductance value of lead frame or bonding wire reduces, the line of wire frame is also relative with distance between centers of tracks to be dwindled, and then electromagnetic coupled amount therebetween be can not be ignored, and this is its shortcoming.
Figure 12 represents the another kind of SOIC encapsulating structure that the people proposed such as Marc Gomes-Casseres and Philip M.Fabis in recent years, be very similar to traditional SOIC encapsulating structure of Figure 11, unique difference is the oar portion (paddle) 821 of lead frame 82 is replaced with an artificial diamond pedestal 86, to reach the enhancing heat-conducting effect, thereby the reduction loss, be the encapsulation architecture of a kind of suitable High-Power Microwave IC.
Above-mentioned several known encapsulation technology all can't provide microstrip line/co-plane waveguide two kinds of working methods simultaneously, and following shortcoming is arranged respectively: that shown in Figure 10 is not to adopt plane formula to install, and comparatively bother in the manufacturing, and cost is higher.Rising along with frequency of utilization shown in Figure 11, the electromagnetic energy loss that radiate are bigger, have a strong impact on the piece electrical performance after the packing.Though loss shown in Figure 12 is lower, owing to adopt artificial diamond, so cost improves naturally.
In view of this, main purpose of the present invention is to provide a kind of low cost packaging technique, is same as the SOIC encapsulation technology, and it utilizes colloidal materials to fix, again with plastic cement injection molding (with reference to 94 and 85 among Figure 11 or Figure 12), so have high-reliability equally.And its encapsulating structure has via hole (with reference to 991 among Figure 10,992,993,994), helps to dispel the heat to surrounding enviroment.In addition, because the overall package structure designs according to waveguide mode, so operating frequency is very high, without dwindling design especially in typical case, the above operating frequency of 30GHz can be reached easily.Especially what deserves to be mentioned is that encapsulating structure of the present invention can provide microstrip line mould and two kinds of working methods of co-plane waveguide, this is that any known microwave IC encapsulating structure can't be reached.
The structure of dual modes microwave of the present invention/millimetre integrated circuit encapsulation can by view on shown in Figure 1, shown in Figure 2 under view, profile shown in Figure 3 be illustrated.View shows that upper surface of the present invention comprises on Fig. 1: a left side, top metal tape 11 and the right metal tape 12 in top, distributed areas are extended the formed belt-like zone of a segment distance by about middle position of the left border of upper surface and right border towards the central point of upper surface respectively, and left metal tape 11 has via hole 111 and 121 to be connected to lower surface at the left border and the right border of upper surface respectively with right metal tape 12; Left side insulating tape 13 and right insulating tape 14 are elongate and have very little area, lay respectively at the outside of the left metal tape 11 in top and right metal tape 12; Intermetallic metal district, top 15, be distributed in the All Ranges of upper surface except a left side, top metal tape 11, the right metal tape 12 in top, left insulating tape 13 and right insulating tape 14, intermetallic metal band 15 is following both sides on the left border of upper surface respectively, with these both sides up and down of right border, and place, the rough centre position of horizontal direction has via hole 151-156 to be connected to upper surface; IC wafer 16, place the rough face position on the upper surface, the scope that wafer covered all is positioned at intermetallic metal district, top 15, and be not covered on any via hole, signal end and earth terminal 161-168 are positioned on the wafer 16 surface, have some bonding wires to be set out by its upper surface respectively and are connected to the left metal tape 11 in top, the right metal tape 12 in top, top intermetallic metal district 15; Colloidal materials portion 17 (with reference to figure 3) is covered on IC wafer 16 and the above-mentioned bonding wire, in order to IC wafer 16 is fixing; Plastic cement portion 18 is formed on the colloidal materials portion 17 in the mode of injection molding.In addition, the part between upper surface and the lower surface is a substrate 19.
View shows that lower surface comprises under Fig. 2: a left side, below metal tape 21,22, and 23, the formed belt-like zone of a segment distance is extended by side, mid portion, upside under the left border of lower surface respectively in distributed areas towards the right side of lower surface, each metal tape has via hole 151,111,152 to be connected to intermetallic metal district, top 15, a left side, top metal tape 11, top intermetallic metal district 15 respectively; The right metal tape 24,25,26 in below, the formed belt-like zone of a segment distance is extended by side, mid portion, upside under the suitable edge of lower surface respectively in distributed areas towards the left side of lower surface, each metal tape has via hole 153,121,154 to be connected to intermetallic metal district, top 15, the right metal tape 12 in top, top intermetallic metal district 15 respectively; Intermetallic metal district, below 27 is distributed on the rough centre position of lower surface horizontal direction between the edge and lower edge, has via hole 156,155 to be connected to intermetallic metal district, top 15.
Fig. 1 represent double-mode of the present invention small/millimetre integrated circuit encapsulation on view;
Fig. 2 represents view under dual modes microwave of the present invention/millimetre integrated circuit encapsulation;
Fig. 3 represent double-mode of the present invention small/a-a ' line profile of millimetre integrated circuit encapsulation;
Fig. 4 represents the user's circuit board under the microstrip line pattern;
Fig. 5 represents the user's circuit board under the co-plane waveguide pattern;
Fig. 6 represents view on the another kind of embodiment of dual modes microwave of the present invention/millimetre integrated circuit encapsulation;
Fig. 7 and Fig. 8 represent to utilize IC of the present invention to be encapsulated under microstrip line pattern and the co-plane waveguide pattern respectively, its reflected signal and penetrate the simulated experiment result of signal;
Fig. 9 represents with a kind of typical electric crystal as the maxgain value Gmax of the electric crystal that IC16 the was measured result of variations for frequency;
Figure 10 represents a kind of known microwave IC encapsulating structure;
Figure 11 represents another kind of known microwave IC encapsulating structure;
Figure 12 represents the microwave IC encapsulating structure that another is known.
IC encapsulation of the present invention is to be connected together with mode and extraneous microwave/millimeter wave IC that plane formula is installed, is fit to the exploitation of a large amount of production technologies.Therefore, the linking circuit when the external world is when being designed to main body with microstrip line, utilizes IC encapsulation of the present invention to operate under the microstrip line mode of operation, is described as follows:
Can be considered to IC encapsulation of the present invention shown in Figure 1 this moment is to place on the external circuit shown in Figure 4.When the external microwave circuit with microstrip line 31 (Fig. 4) input because microstrip line 31 directly contacts (for example with welding manner) with metal tape 22 among Fig. 2, microwave signal can vertically rise to metal tape 11 (Fig. 1) via via hole 111 by 22 (Fig. 2).When microwave signal is imported, support the reverse ground back flow current of microstrip line pattern to pass via hole 301-307 to user's substrate ground 33 via the ground (30 among Fig. 4) that is system, again via the metal tape 21,23,24,26 that is in contact with it, and metal area 27 (Fig. 2), and see through each self-corresponding via hole 151,152,153,154 and, 155,156 and up rise to metal area 15 (Fig. 1).Therefore, when using the microstrip line pattern, be that the ground backflow of system can be led to the intermetallic metal district 15 (Fig. 1) of IC encapsulation swimmingly, and this metal area 15 is the ground planes as IC16.
The below configuration of explanation bonding wire: microwave signal connects 1 or several bonding wires signal input part 161 to the IC16 by the leading edge 161 ' of metal tape 11, this bonding wire and ground plane 15 and middle air or the waveguide of a similar microstrip line of filler formation.Because the crack is very little between metal tape 11 and the ground plane 15, utilize the formed microstrip line construction of bonding wire 161-161 ' only to cause slightly discontinuity.The situation of bonding wire 162-162 ' is similar, omits its explanation at this.By the external bonding wire of the earth terminal 163-168 of IC16 is earth connection, be divided into two classes: (1) is shown in bonding wire 163-163 ', 164-164 ', 165-165 ', 166-166 ', be to be connected to the nearest point 163 ', 164 ' of range points 161 ' (being positioned at the front end of metal tape 11) by point 163,164,165,166 respectively, with the nearest point 165 ' 166 ' of range points 162 ' (being positioned at the front end of metal tape 12); (2) shown in bonding wire 167,167 ', 168-168 ', be to be connected to metal area 15 by point 167, the 168 the shortest wiring of usefulness respectively.
In sum, according to IC encapsulation of the present invention, played by signal input part when using the work of microstrip line pattern that to form a quite continuous and complete microstrip transmission lines be system, the while, good ground plane 15 and two kind of different types of earth connection formed good grounded circuit with IC16 again.
On the other hand, when the linking circuit in the external world was formed by co-plane waveguide, its external circuit can represent by Fig. 5, comprising: substrate 40, metallic plate 42, dielectric layer 41, metal tape 43,44,45,46,47,48 etc.Wherein this dielectric layer 41 can be filled out with medium or not fill out any material and substrate 40 is suspended on the metallic plate 42, forms the hanging type co-plane waveguide, and substrate 40 is directly contacted with metallic plate 42, formation back side conductor type co-plane waveguide.
IC encapsulation of the present invention can be accepted inputing or outputing of hanging type co-plane waveguide or back side guided wave formula co-plane waveguide, below describe with the hanging type co-plane waveguide: among Fig. 5, co-plane waveguide by copline metal tape 43-44-45 and formed ground connection one signal of 46-47-48-ground connection is imported and output by substrate 40 by the user, and the terminal 431-4541-451 of these copline metal tapes is connected with 24-25-26 (Fig. 2) with the bottom 21-22-23 of IC encapsulation of the present invention by the mode as welding with 461-471-481.The signal of co-plane waveguide is imported by 441 (Fig. 5), via metal tape 22, via hole 111 (Fig. 2), up to metal tape 11 (Fig. 1).Simultaneously, the reverse earth current loop of co-plane waveguide also via the metal tape 21 of 431 and 451 (Fig. 5) and IC encapsulation bottom surface with after 23 contact, up enter full wafer ground plane 15 via via hole 151 and 152.
At this moment, the direction of wave travel of co-plane waveguide transfers vertical direction to by horizontal direction, most of electromagnetic energy still be dispersed in holding wire-metal tape 11, and ground wire-ground plane 15 between.The co-plane waveguide that changes into horizontal direction at the front end 161 ' of metal tape 11 with the input 161 of bonding wire jumper connection to IC16.Simultaneously, the ground plane 15 of co-plane waveguide both sides is connected to the reference earth point 163 and 164 of IC16 respectively by bonding wire in 163 ' and 164 ' part.Therefore, 163-163 ', 161-161 ', 164-164 ' and wherein filled media or air form the co-plane waveguide that another group is connected mutually, and the electromagnetic energy hanging type is imported IC16 obliquely.In like manner, 165-165 ', 162-162 ', 166-166 ' also form co-plane waveguide, in order to electromagnetic energy is derived IC16.
Fig. 6 shows according to another kind of IC encapsulation of the present invention, is commonly referred to as anti-dress wafer method (flip-chip), is to form according to IC encapsulation change shown in Figure 1.At first, with lower surface counter-rotating on the IC16, signal end and earth terminal all are positioned at lower surface.Secondly, metal tape 11 and metal tape 12 are prolonged the width of its left and right directions, make in the scope that IC16 covers, middle body is positioned on the virgin metal district 15; Left part is positioned on the metal tape 11, and the right side part is positioned on the metal tape 12, and IC16 is not covered on any via hole.The input signal end of IC16 contacts with metal tape 11, output signal end contacts with metal tape 12, and all earth terminals all contact with metal zone 15, and to metal area 15 by the suitably etching in addition of IC16 institute cover part, and aforementioned discontinuity slightly more can be avoided fully, and transmission characteristic is better.
Fig. 7, Fig. 8 and Fig. 9 are the experimental results of utilizing IC encapsulation of the present invention.Wherein Fig. 7 and Fig. 8 represent that respectively the area size is the substrate of 2.5mm*3.2mm, the two ports discrete parameter under microstrip line pattern and co-plane waveguide pattern (2-port scattering parameter) value (dB).The calculating of its numerical value is that employing Frequency Domain Integration equation method and Green's impedance function (Green ' s Impedance Function) analysis microwave packaging are the two ports discrete parameter that is connected under (through) state at input and output.With Fig. 1 is example, the signal end 161 and 162 of IC16 is connected together (short circuit) with short lines, and earth terminal (163,167), (167,165), (164,168), (168,166) are connected together with short lines respectively.Though aforesaid substrate size (2.5mm*3.2mm) is considerably big, by Fig. 7 and Fig. 8 as can be known, IC encapsulation of the present invention still has good microwave packaging characteristic: (1) up in the operational frequency range of 30GHz, the input reflection is number S
11All remain on-below the 15dB, the signal that expression reflects is considerably less; (2) up in the operational frequency range of 30GHz, transmission is number S
21All remain on-more than the 1dB, the signal of the expression overwhelming majority all transmits through IC16 in the past, relatively two kinds of mode of operations can be found: the loss under the microstrip line pattern is big than co-plane waveguide pattern end, by Fig. 7 and Fig. 8 as can be known, IC of the present invention is encapsulated in sizable frequency range (up in 30GHz), can successfully apply to microstrip line/co-plane waveguide double-mode.
Fig. 9 adopts typical 0.25 μ m GaAs PHEMT (Pseudomorphic High ElectronMobility Transistor) to implant the substrate of above-mentioned size as IC16, and survey the two ports of its common source discrete parameter, again this discrete parameter is changed into the maxgain value Gmax of electric crystal.Fig. 9 shows the change curve of Gmax for frequency, this slope of a curve quite accords with theoretical value-6dB/octave, with the mode of heterodyne with curve also extended as can be known up in the frequency of 30GHz, the Gmax value is all more than 0dB, prove that IC encapsulation of the present invention can cooperate microwave/millimeter wave semiconductor technology at present, is increased to millimere-wave band with the operating frequency after the encapsulation.
Concrete enforcement aspect that is proposed in detailed description of the invention or embodiment are only in order to be easy to illustrate technology contents of the present invention, and be not with narrow sense of the present invention be limited to this embodiment, in the situation that does not exceed spirit of the present invention and following claim scope, can make many variations and implement.
Claims (9)
1, a kind of dual modes microwave/millimetre integrated circuit encapsulation comprises upper surface, lower surface and the substrate between this upper and lower surface, and this upper surface comprises:
The right metal tape in left metal tape in top and top, distributed areas are extended the formed belt-like zone of a segment distance by about middle position of the left border of upper surface and right border towards the central point of upper surface respectively, and this left side metal tape and right metal tape have via hole to be connected to this lower surface at the left border and the right border of upper surface respectively;
A left side insulating tape and right insulating tape are elongate and have very little area, lay respectively at the outside of left metal tape in this top and right metal tape;
Intermetallic metal district, top, be distributed in the All Ranges of upper surface except the left metal tape in this top, the right metal tape in top, left insulating tape and right insulating tape, this intermetallic metal band is following both sides on the left border of upper surface respectively, with following both sides on the right border, and place, the rough centre position of horizontal direction has via hole to be connected in this lower surface;
The IC wafer, place the rough middle position on this upper surface, the scope that wafer covered all is positioned at this intermetallic metal district, top, and be not covered on any via hole, signal end and earth terminal are positioned on this wafer the surface, have some bonding wires to be set out by this upper surface respectively and are connected to the left metal tape in this top, the right metal tape in this top, this intermetallic metal district, top;
Colloidal materials portion is covered on this IC wafer and these bonding wires, in order to this IC wafer is fixed;
Plastic cement portion is formed on this colloidal materials portion in the mode of injection molding,
This lower surface comprises:
A left side, first, second and third below metal tape, the formed belt-like zone of a segment distance is extended by side, mid portion, downside on the left border of lower surface respectively in distributed areas towards the right side of lower surface, each metal tape has via hole to be connected to this intermetallic metal district, top, a left side, top metal tape, top intermetallic metal district respectively;
The right metal tape in first, second and third below, the formed belt-like zone of a segment distance is extended by side, mid portion, downside on the right border of lower surface respectively in distributed areas towards the left side of lower surface, each metal tape has via hole to be connected to this intermetallic metal district, top, the right metal tape in top, top intermetallic metal district respectively;
Intermetallic metal district, below is distributed on the rough centre position of lower surface horizontal direction between the edge and lower edge, has via hole to be connected to the intermetallic metal district of this top.
2, dual modes microwave as claimed in claim 1/millimetre integrated circuit encapsulation, wherein this intermetallic metal district, top has two via holes to be connected to this intermetallic metal district, below.
3, dual modes microwave as claimed in claim 1/millimetre integrated circuit encapsulation, wherein the bonding wire on this IC wafer is divided three classes: (1) input signal bonding wire is that the input signal end by this IC upper wafer surface is connected to the nearest part of the left metal tape in this top; (2) the output signal bonding wire is that output signal end by this IC upper wafer surface is connected to the nearest part of the right metal tape in this top; (3) earthy bonding wire be earth terminal by this IC upper wafer surface be connected in apart from the pad of left metal tape in this top or right metal tape recently on the point in intermetallic metal district.
4, dual modes microwave as claimed in claim 3/millimetre integrated circuit encapsulation, wherein the earth terminal that also comprises by this IC upper wafer surface of this earthy bonding wire is connected in this intermetallic metal district, top with the shortest bonding wire.
5, dual modes microwave as claimed in claim 1/millimetre integrated circuit encapsulation, wherein this substrate is multiple-plate structure, can be thereon with circuit design, and utilize via hole and this IC wafer to be combined into a module.
6, a kind of dual modes microwave/millimetre integrated circuit encapsulation comprises upper surface and lower surface, and this upper surface comprises:
The right metal tape in left metal tape in top and top, distributed areas respectively by about middle position of the left border of upper surface and right border up centre of surface point extend the formed belt-like zone of a segment distance, this left side metal tape and right metal tape have via hole to be connected to this lower surface at the left border and the right border of upper surface respectively;
A left side insulating tape and right insulating tape are elongate and have very little area, lay respectively at the outside of left metal tape in this top and right metal tape;
Intermetallic metal district, top, be distributed in the All Ranges of upper surface except the left metal tape in this top, the right metal tape in top, left insulating tape and right insulating tape, this intermetallic metal band is following both sides on the left border of upper surface respectively, with following both sides on the right border, and place, the rough centre position of horizontal direction has via hole to be connected to this lower surface;
The IC wafer, place the rough middle position on this upper surface, signal end and earth terminal are positioned at the lower surface of this wafer, in the scope that wafer covered, middle body is positioned on this intermetallic metal district, top, left part is positioned on the left metal tape in this top, the right side part is positioned on the right metal tape in this top, and be not covered on any via hole, the input signal end of this IC wafer contacts with the left metal tape in this top, output signal end contacts with the right metal tape in this top, and all earth terminals all contact with this intermetallic metal district, top, and to should the contact of intermetallic metal district, top by the suitably in addition etching of this IC wafer institute cover part, in case this IC wafer surface short circuit;
Colloidal materials portion covers on this IC wafer, in order to this IC wafer is fixed;
Plastic cement portion is formed on this colloidal materials portion in the mode of injection molding,
This lower surface comprises:
A left side, first, second and third below metal tape, distributed areas respectively on the left border by lower surface, mid portion, downside extend the formed belt-like zone of a segment distance towards the right side of lower surface, has via hole to be connected to this intermetallic metal district, top, a left side, top metal tape, top intermetallic metal district respectively;
The right metal tape in first, second and third below, the formed belt-like zone of a segment distance is extended by side, mid portion, downside on the right border of lower surface respectively in distributed areas towards the left side of lower surface, have via hole to be connected to this intermetallic metal district, top, the right metal tape in top, top intermetallic metal district respectively;
Intermetallic metal district, below is distributed on the rough centre position of lower surface horizontal direction between the edge and lower edge, has via hole to be connected to this intermetallic metal district, top.
7, dual modes microwave as claimed in claim 6/millimetre integrated circuit encapsulation, wherein this intermetallic metal district, top has two via holes to be connected to this intermetallic metal district, below.
8, dual modes microwave as claimed in claim 6/millimetre integrated circuit encapsulation, wherein the input signal end of this IC wafer contacts with the left metal tape in this top, and output signal contacts with the right metal tape in this top, and all earth terminals all contact with this intermetallic metal district, top.
9, dual modes microwave as claimed in claim 6/millimetre integrated circuit encapsulation, wherein this substrate is multiple-plate structure, can be thereon with circuit design, and utilize via hole and this IC wafer to be combined into a module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN97103794A CN1072395C (en) | 1997-04-18 | 1997-04-18 | Dual modes microwave/mm wave integrated circuit sealing pack |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN97103794A CN1072395C (en) | 1997-04-18 | 1997-04-18 | Dual modes microwave/mm wave integrated circuit sealing pack |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1197286A CN1197286A (en) | 1998-10-28 |
| CN1072395C true CN1072395C (en) | 2001-10-03 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN97103794A Expired - Fee Related CN1072395C (en) | 1997-04-18 | 1997-04-18 | Dual modes microwave/mm wave integrated circuit sealing pack |
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| CN (1) | CN1072395C (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8058953B2 (en) * | 2008-12-29 | 2011-11-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Stacked coplanar waveguide having signal and ground lines extending through plural layers |
| CN101937900B (en) * | 2010-07-31 | 2013-01-09 | 华为技术有限公司 | Micro and millimeter wave circuit |
| CN105826275B (en) * | 2016-03-21 | 2018-10-26 | 中国电子科技集团公司第五十五研究所 | Silicon substrate multichannel TR components and design method |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5522132A (en) * | 1993-06-07 | 1996-06-04 | St Microwave Corp., Arizona Operations | Microwave surface mount package |
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- 1997-04-18 CN CN97103794A patent/CN1072395C/en not_active Expired - Fee Related
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5522132A (en) * | 1993-06-07 | 1996-06-04 | St Microwave Corp., Arizona Operations | Microwave surface mount package |
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| CN1197286A (en) | 1998-10-28 |
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