CN107197365A - A kind of method and system of signal transmission - Google Patents

A kind of method and system of signal transmission Download PDF

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Publication number
CN107197365A
CN107197365A CN201710630167.XA CN201710630167A CN107197365A CN 107197365 A CN107197365 A CN 107197365A CN 201710630167 A CN201710630167 A CN 201710630167A CN 107197365 A CN107197365 A CN 107197365A
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China
Prior art keywords
data
signal
alignment
clock
tmds
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CN201710630167.XA
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Chinese (zh)
Inventor
魏国
苏进
陈�峰
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Long Xun Semiconductor (hefei) Ltd By Share Ltd
Lontium Semiconductor Corp
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Long Xun Semiconductor (hefei) Ltd By Share Ltd
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Priority to CN201710630167.XA priority Critical patent/CN107197365A/en
Publication of CN107197365A publication Critical patent/CN107197365A/en
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/436Interfacing a local distribution network, e.g. communicating with another STB or one or more peripheral devices inside the home
    • H04N21/4363Adapting the video stream to a specific local network, e.g. a Bluetooth® network
    • H04N21/43632Adapting the video stream to a specific local network, e.g. a Bluetooth® network involving a wired protocol, e.g. IEEE 1394
    • H04N21/43635HDMI
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/4302Content synchronisation processes, e.g. decoder synchronisation

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

A kind of method and system of signal transmission are disclosed in the embodiment of the present invention, the TMDS come from HDMI three data channel transfers is received, each data channel is transmitted to the TMDS come and is converted to the data signal that form exports the data of N number of byte for each clock;Then, the data of the corresponding N number of byte of each data channel are subjected to the data after alignment one group of alignment of generation;The data after three groups of alignment are synchronized into the data signal after generation synchronization again;The data signal after synchronization is finally converted into analog signal output.Data signal of the form for the data of the N number of byte of each clock output is converted to by the way that each data channel is transmitted into the TMDS come, and present clock period is N times of standard clock cycle, digital clock frequencies can be reduced, the transmission of signal can be realized under relatively low technique, and then reduces the process costs and development difficulty of exploitation chip.

Description

A kind of method and system of signal transmission
Technical field
The present invention relates to signal processing technology field, and in particular to a kind of method and system of signal transmission.
Background technology
With continuing to develop for electronics technology, requirement of the spectators to image quality also more and more higher, more people start to select high definition TV even ultra high-definition TV (e.g., 4K TVs).Nowadays 4K ultrahigh resolutions have become trend in the industry, many displays Equipment and video capture device are all initially added into the support to 4K resolution ratio.
HDMI (High-Definition Media Interface, HDMI) can transmit superelevation Clear signal, such as 4K signals, 8K signals, this ultra high-definition signal has without compression, lossless high-resolution and real-time characteristic, The listening of high-quality, visual experience can be brought for user.Such as, 4K30Hz, HDMI2.0 have been supported in HDMI1.4b versions Frame data 4K60Hz is brought up into, it makes picture more smooth, this is also the increased result of transmission rate.
When transmitting ultra high-definition signal by HDMI2.0, because bandwidth is too high, therefore, with the increase of transmission range, meeting The problem of there is asynchronous signal and degradation.It is this to reach because HDMI2.0 requires that digital circuit operates in 600Hz It is required that, to solve the above problems at present, it is necessary to the flow in the technique of deep-submicron, add exploitation chip process costs and Development difficulty.
The content of the invention
In view of this, the embodiment of the present invention provides a kind of method and system of signal transmission, can reduce exploitation chip Process costs and development difficulty.
To achieve the above object, the embodiment of the present invention provides following technical scheme:
A kind of method of signal transmission, methods described includes:
The minimum differential signal transmission TMDS come from HDMI three data channel transfers is received, by each data channel The TMDS that transmission comes is converted to data signal, and the form of the data signal exports the data of N number of byte for each clock, and works as The preceding clock cycle is N times of standard clock cycle, and the N is the positive integer more than 1;
The data of the corresponding N number of byte of each data channel are subjected to the data after alignment one group of alignment of generation;
Data after three groups of alignment are synchronized into the data signal after generation synchronization;
Data signal after the synchronization is converted into analog signal output.
Optionally, it is described after the data signal that the data by after three groups of alignment synchronize after generation synchronization Method also includes:
The error count that the data after every group of alignment occur in preset time is counted, when the error count finds default During threshold value, output interrupt signal to outside micro-control unit MCU so that the MCU notify source re-start calibration, will calibrate Signal afterwards is exported by three data channel.
Optionally, methods described also includes:
Whether the cycle for detecting present clock is N times of standard clock cycle.
Optionally, methods described also includes:
Current standards clock is obtained to enable with data rate ratio and scrambling, and real-time update.
A kind of system of signal transmission, the system includes:
Data sink, the minimum differential signal transmission that three data channel transfers for receiving from HDMI are come TMDS, each data channel is transmitted the TMDS come and is converted to data signal, the form of the data signal is defeated for each clock Go out the data of N number of byte, and present clock period is N times of standard clock cycle, the N is the positive integer more than 1;
Alignment of data module, for the data of the corresponding N number of byte of each data channel to be carried out into one group pair of alignment generation Data after neat;
Channel Synchronous module, for the data after three groups of alignment to be synchronized to the data signal after generation synchronization;
Data transmitter, for the data signal after the synchronization to be converted into analog signal output.
Optionally, the system also includes:
Error detection module, for the data signal after the data by after three groups of alignment synchronize generation synchronization Afterwards, the error count that the data after every group of alignment occur in preset time is counted, when the error count finds default threshold During value, output interrupt signal is to outside micro-control unit MCU so that the MCU notifies source to re-start calibration, after calibration Signal exported by three data channel.
Optionally, the system also includes:
Clock detection module, for detecting whether the cycle of present clock is N times of standard clock cycle.
Optionally, the system also includes:
SCDC modules, are enabled for obtaining Current standards clock with data rate ratio and scrambling, and real-time update.
Based on above-mentioned technical proposal, a kind of method and system of signal transmission are disclosed in the embodiment of the present invention, receive from The minimum differential signal transmission TMDS that HDMI three data channel transfers are come, each data channel is transmitted the TMDS come and turned Data signal is changed to, the form of the data signal exports the data of N number of byte for each clock, and present clock period is mark N times of quasi- clock cycle, the N is the positive integer more than 1;Then, the data of the corresponding N number of byte of each data channel are entered Data after row alignment one group of alignment of generation;The data after three groups of alignment are synchronized into the data signal after generation synchronization again; The data signal after the synchronization is finally converted into analog signal output.By the way that each data channel is transmitted into the TMDS turn of coming Data signal is changed to, the form of the data signal exports the data of N number of byte for each clock, and present clock period is mark N times of quasi- clock cycle, can reduce digital clock frequencies, the transmission of signal can be realized under relatively low technique, and then reduce Develop the process costs and development difficulty of chip.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing There is the accompanying drawing used required in technology description to be briefly described, it should be apparent that, drawings in the following description are only this The embodiment of invention, for those of ordinary skill in the art, on the premise of not paying creative work, can also basis The accompanying drawing of offer obtains other accompanying drawings.
Fig. 1 is a kind of schematic flow sheet of the method for signal transmission disclosed in the embodiment of the present invention;
Fig. 2 is the schematic flow sheet of the method for another signal transmission disclosed in the embodiment of the present invention;
Fig. 3 is the schematic flow sheet of the method for another signal transmission disclosed in the embodiment of the present invention;
Fig. 4 is the schematic flow sheet of the method for another signal transmission disclosed in the embodiment of the present invention;
Fig. 5 is a kind of structural representation of the system of signal transmission disclosed in the embodiment of the present invention;
Fig. 6 is the structural representation of the system of another signal transmission disclosed in the embodiment of the present invention;
Fig. 7 is the structural representation of the system of another signal transmission disclosed in the embodiment of the present invention;
Fig. 8 is the structural representation of the system of another signal transmission disclosed in the embodiment of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete Site preparation is described, it is clear that described embodiment is only a part of embodiment of the invention, rather than whole embodiments.It is based on Embodiment in the present invention, it is every other that those of ordinary skill in the art are obtained under the premise of creative work is not made Embodiment, belongs to the scope of protection of the invention.
Accompanying drawing 1 is referred to, Fig. 1 is a kind of schematic flow sheet of the method for signal transmission disclosed in the embodiment of the present invention, should Method comprises the following steps:
Step S100, receives the minimum differential signal transmission TMDS come from HDMI three data channel transfers, will be every The TMDS that individual data channel transfer is come is converted to data signal, and the form of the data signal exports N number of byte for each clock Data, and present clock period is N times of standard clock cycle, and the N is the positive integer more than 1;
HDMI (High Definition Multimedia Interface, HDMI) has three numbers According to passage, transmission is that (Transition-minimized differential signaling minimize transmission poor to TMDS Sub-signal).TMDS is analog signal.The analog signal of each data channel is converted into data signal, form is each clock N number of pixel (pixel is equal to the data of a byte) is exported, and present clock period is the N of standard clock cycle Times, N is greater than 1 positive integer.Point out that bandwidth range is Rbit in standard time clock=TMDS Clock, HDMI1.4 specifications<= 3.4Gbps, can support 4K30Hz resolution ratio, then TMDS Clock=(TMDS bit period)/(TMDS under the specification clock period)ratio is 1/10.It is 3.4Gbps that bandwidth range is pointed out in HDMI2.0 specifications<Rbit<=6Gbps, can Support 4K60Hz resolution ratio, then TMDS Clock=(TMDS bit period)/(TMDS clock under the specification period)ratio is 1/40)。
The analog signal of each passage is converted to by data signal by data sink, form is that each clock exports N Individual pixel, and present clock period is N times of standard clock cycle, N is greater than 1 positive integer, can reduce digital dock Frequency, under relatively low technique, can realize HDMI2.0 extension.Specifically, when HDMI2.0 sends 4K60Hz image in different resolution, Digital dock reaches 594Mhz (each TMDS clock sampling 10bit data), very high to technological requirement.When data sink When string turns and form is changed into each TMDS clock samplings 20bit data, TMDS clocks only need to 297Mhz.Similarly string is turned simultaneously When form is changed into N times, TMDS clocks only need to original 1/N.
The data of the corresponding N number of byte of each data channel are carried out the number after alignment one group of alignment of generation by step S110 According to;
HDMI1.4 codings define three cycles:Video data Period (video data cycle), Data Island Period (packet cycle) and Control Period (controlling cycle), different cycles have corresponded to different coded systems. HDMI2.0 coded system has a very big change, but HDMI2.0 SSCP (Scrambler synchronization Control period, scrambling synchronization controlling cycle) it is consistent with HDMI1.4 Control Period coded systems, all use Maximum coded system, alignment of data is according to the encoded radio of the Control Period by alignment of data.Control Period's Value after data encoding only has 4 kinds of numerical value:10’b1101010100,10’b0010101011,10’b0101010100,10’ b1010101011.As long as detecting any one of this 4 numerical value, you can by alignment of data.
Data after three groups of alignment are synchronized the data signal after generation synchronization by step S120;
Specifically, can be according to the leading edge position of Control Period encoded radio, the data after three groups of alignment are carried out Data signal after synchronous generation synchronization.HDMI2.0 SSCP and HDMI1.4 controlling cycle coded system are identical, all use Maximum coded system (number of times of 0 and 1 upset is more than or equal to 7), the 0 of other cycles and 1 upset number of times is both less than 7 (0 to 1 or 1 To 0, upset number of times adds 1;0 to 0 or 1 to 1, upset number of times is constant, and number of times is overturn altogether inside statistics 10bit values).For example: Result after the data encoding of controlling cycle only has 4 values:10 ' b1101010100 (upset number of times is 7), 10 ' B0010101011 (upset number of times is 7), 10 ' b0101010100 (upset number of times is 8), 10 ' b1010101011 (upset number of times For 8).Detect that 0 and 1 upset number of times of three data channel is more than or equal to 7 rising edge respectively, then by the rising of 3 passages Along alignment.
Step S130, analog signal output is converted to by the data signal after the synchronization.
A kind of method of signal transmission is disclosed in the present embodiment, receives and comes most from HDMI three data channel transfers Smallization differential signal transmission TMDS, each data channel is transmitted the TMDS come and is converted to data signal, the data signal Form is the data that each clock exports N number of byte, and present clock period is N times of standard clock cycle, the N for more than 1 positive integer;Then, the data of the corresponding N number of byte of each data channel are subjected to the data after alignment one group of alignment of generation; The data after three groups of alignment are synchronized into the data signal after generation synchronization again;Finally the data signal after the synchronization is turned It is changed to analog signal output.By by each data channel transmit come TMDS be converted to data signal, the data signal Form is the data that each clock exports N number of byte, and present clock period is N times of standard clock cycle, can reduce number Word clock frequency, can realize the transmission of signal, and then reduce the process costs and exploitation hardly possible of exploitation chip under relatively low technique Degree.
Accompanying drawing 2 is referred to, Fig. 2 is the schematic flow sheet of the method for another signal transmission disclosed in the embodiment of the present invention, This method comprises the following steps:
Step S200, receives the minimum differential signal transmission TMDS come from HDMI three data channel transfers, will be every The TMDS that individual data channel transfer is come is converted to data signal, and the form of the data signal exports N number of byte for each clock Data, and present clock period is N times of standard clock cycle, and the N is the positive integer more than 1;
The data of the corresponding N number of byte of each data channel are carried out the number after alignment one group of alignment of generation by step S210 According to;
Data after three groups of alignment are synchronized the data signal after generation synchronization by step S220;
Step S230, the error count that the data after every group of alignment of statistics occur in preset time, when the mistake meter When number finds predetermined threshold value, output interrupt signal is to outside micro-control unit MCU so that the MCU notifies source to re-start school Standard is simultaneously exported the signal after calibration by three data channel.
HDMI2.0SPEC (Software Requirement Specification, software-implemented fault injection book) is provided Error detection look-up table, by data just effectively, bear effect and 0 effective look-up table, the numerical value of each data channel is detected in real time Whether meet standard, if not being inconsistent standardization, illustrate the numerical fault, often detect a mistake, counter adds 1, often The error counter of statistics is output to read-only register by 10ms, and beyond threshold value, (register can match somebody with somebody the error count in every 10ms Put) when, interrupt signal is exported to outside MCU (Microcontroller Unit, micro-control unit) to notify Source (sources End, can be understood as TMDS transmitting terminals in the present embodiment), re-start Calibration (calibration) and by the signal after calibration Exported by three data channel, to ensure that signal transmission is correct.
Step S240, analog signal output is converted to by the data signal after the synchronization.
It should be noted that in the present embodiment in addition to step S230, implementing for other steps can be found in a upper implementation Example.
In the present embodiment, by error detection, detection error in data can be moved and interruption is produced, ensure that signal is transmitted Correctly.
Accompanying drawing 3 is referred to, Fig. 3 is the schematic flow sheet of the method for another signal transmission disclosed in the embodiment of the present invention, This method comprises the following steps:
Step S300, receives the minimum differential signal transmission TMDS come from HDMI three data channel transfers, will be every The TMDS that individual data channel transfer is come is converted to data signal, and the form of the data signal exports N number of byte for each clock Data, and present clock period is N times of standard clock cycle, and the N is the positive integer more than 1;
Step S310, whether the cycle for detecting present clock is N times of standard clock cycle.
Specifically, 1ms pulse high level is periodically generated using crystal oscillator clock, it is then to be measured in this 1ms of real-time statistics The count value K of clock, according to the size of K values, calculates the cycle of clock to be measured.For example:Clock frequency to be measured is 50Mhz, then The clock count K of statistics is 50000 in 1ms.Current clock frequency counter can be pushed away by K value.
The data of the corresponding N number of byte of each data channel are carried out the number after alignment one group of alignment of generation by step S320 According to;
Data after three groups of alignment are synchronized the data signal after generation synchronization by step S330;
Step S340, the error count that the data after every group of alignment of statistics occur in preset time, when the mistake meter When number finds predetermined threshold value, output interrupt signal is to outside micro-control unit MCU so that the MCU notifies source to re-start school Standard, the signal after calibration is exported by three data channel.
Step S350, analog signal output is converted to by the data signal after the synchronization.
It should be noted that in the present embodiment in addition to step S310, implementing for other steps can be found in a upper implementation Example.
In the present embodiment, clock detection is the additional step for completing whole signals transmission, is able to confirm that present clock Whether the cycle is correct.
Accompanying drawing 4 is referred to, Fig. 4 is the schematic flow sheet of the method for another signal transmission disclosed in the embodiment of the present invention, This method comprises the following steps:
Step S400, receives the minimum differential signal transmission TMDS come from HDMI three data channel transfers, will be every The TMDS that individual data channel transfer is come is converted to data signal, and the form of the data signal exports N number of byte for each clock Data, and present clock period is N times of standard clock cycle, and the N is the positive integer more than 1;
Step S410, whether the cycle for detecting present clock is N times of standard clock cycle.
Step S420, obtains Current standards clock and is enabled with data rate ratio and scrambling, and real-time update.
Specifically, HDMI2.0SCDC (State and control data can be monitored according to HDMI DDC communication protocols Channel, state and control data passage) TMDS configuration registers, obtain current TMDS clocks and data rate ratio and Scrambling is enabled, and real-time update
The data of the corresponding N number of byte of each data channel are carried out the number after alignment one group of alignment of generation by step S430 According to;
Data after three groups of alignment are synchronized the data signal after generation synchronization by step S440;
Step S450, the error count that the data after every group of alignment of statistics occur in preset time, when the mistake meter When number finds predetermined threshold value, output interrupt signal is to outside micro-control unit MCU so that the MCU notifies source to re-start school Standard, the signal after calibration is exported by three data channel.
Step S460, analog signal output is converted to by the data signal after the synchronization.
It should be noted that in the present embodiment in addition to step S420, implementing for other steps can be found in a upper implementation Example.
In the present embodiment, the current TMDS clocks of hardware automatic detection are enabled with data rate ratio and scrambling, are reduced The flow of software merit rating, can reduce system response time, can quickly export correct video image.
The execution sequencing of each step in explanation, embodiment of the method is needed further exist for not by step numbers Limitation, under different scenes, the execution sequencing of each step can be different.
Accompanying drawing 5 is referred to, Fig. 5 is a kind of structural representation of the system of signal transmission disclosed in the embodiment of the present invention, should System includes:
Data sink 100, the minimum differential signal transmission that three data channel transfers for receiving from HDMI are come TMDS, each data channel is transmitted the TMDS come and is converted to data signal, the form of the data signal is defeated for each clock Go out the data of N number of byte, and present clock period is N times of standard clock cycle, the N is the positive integer more than 1;
Alignment of data module 110, for the data of the corresponding N number of byte of each data channel to be carried out into one group of alignment generation Data after alignment;
Channel Synchronous module 120, for the data after three groups of alignment to be synchronized to the data signal after generation synchronization;
Data transmitter 130, for the data signal after the synchronization to be converted into analog signal output.
Accompanying drawing 6 is referred to, Fig. 6 is the structural representation of the system of another signal transmission disclosed in the embodiment of the present invention, The system is except including the data sink 100 shown in Fig. 5, alignment of data module 110, Channel Synchronous module 120 and data hair Send outside device 130, in addition to error detection module 140.
Error detection module 140, for the numeral after the data by after three groups of alignment synchronize generation synchronization After signal, the error count that the data after every group of alignment of statistics occur in preset time, when the error count finds pre- If during threshold value, output interrupt signal is to outside micro-control unit MCU so that the MCU notifies source to re-start calibration, high-ranking officers Signal after standard is exported by three data channel.
Accompanying drawing 7 is referred to, Fig. 7 is the structural representation of the system of another signal transmission disclosed in the embodiment of the present invention, The system including the data sink 100 shown in Fig. 6, alignment of data module 110, Channel Synchronous module 120, data except sending Outside device 130 and error detection module 140, in addition to clock detection module 150.
Clock detection module 150, for detecting whether the cycle of present clock is N times of standard clock cycle.
Accompanying drawing 8 is referred to, Fig. 8 is the structural representation of the system of another signal transmission disclosed in the embodiment of the present invention, The system including the data sink 100 shown in Fig. 7, alignment of data module 110, Channel Synchronous module 120, data except sending Outside device 130, error detection module 140 and clock detection module 150, in addition to SCDC modules 160.
SCDC modules 160, are enabled for obtaining Current standards clock with data rate ratio and scrambling, and real-time update.
In summary:
A kind of method and system of signal transmission are disclosed in the embodiment of the present invention, three data channel from HDMI are received The minimum differential signal transmission TMDS that transmission comes, each data channel is transmitted the TMDS come and is converted to data signal, described The form of data signal is the data that each clock exports N number of byte, and present clock period is N times of standard clock cycle, The N is the positive integer more than 1;Then, the data of the corresponding N number of byte of each data channel are subjected to one group pair of alignment generation Data after neat;The data after three groups of alignment are synchronized into the data signal after generation synchronization again;Finally by after the synchronization Data signal be converted to analog signal output.By by each data channel transmit come TMDS be converted to data signal, institute The data that the form of data signal exports N number of byte for each clock are stated, and present clock period is the N of standard clock cycle Times, digital clock frequencies can be reduced, the transmission of signal, and then the technique for reducing exploitation chip can be realized under relatively low technique Cost and development difficulty.
The embodiment of each in this specification is described by the way of progressive, and what each embodiment was stressed is and other Between the difference of embodiment, each embodiment identical similar portion mutually referring to.For device disclosed in embodiment For, because it is corresponded to the method disclosed in Example, so description is fairly simple, related part is said referring to method part It is bright.
Professional further appreciates that, with reference to the unit of each example of the embodiments described herein description And algorithm steps, can be realized with electronic hardware, computer software or the combination of the two, in order to clearly demonstrate hardware and The interchangeability of software, generally describes the composition and step of each example according to function in the above description.These Function is performed with hardware or software mode actually, depending on the application-specific and design constraint of technical scheme.Specialty Technical staff can realize described function to each specific application using distinct methods, but this realization should not Think beyond the scope of this invention.
Directly it can be held with reference to the step of the method or algorithm that the embodiments described herein is described with hardware, processor Capable software module, or the two combination are implemented.Software module can be placed in random access memory (RAM), internal memory, read-only deposit Reservoir (ROM), electrically programmable ROM, electrically erasable ROM, register, hard disk, moveable magnetic disc, CD-ROM or technology In any other form of storage medium well known in field.
The foregoing description of the disclosed embodiments, enables professional and technical personnel in the field to realize or using the present invention. A variety of modifications to these embodiments will be apparent for those skilled in the art, as defined herein General Principle can be realized in other embodiments without departing from the spirit or scope of the present invention.Therefore, it is of the invention The embodiments shown herein is not intended to be limited to, and is to fit to and principles disclosed herein and features of novelty phase one The most wide scope caused.

Claims (8)

1. a kind of method of signal transmission, it is characterised in that methods described includes:
The minimum differential signal transmission TMDS come from HDMI three data channel transfers is received, each data channel is transmitted The TMDS come is converted to data signal, and the form of the data signal exports the data of N number of byte for each clock, and when current The clock cycle is N times of standard clock cycle, and the N is the positive integer more than 1;
The data of the corresponding N number of byte of each data channel are subjected to the data after alignment one group of alignment of generation;
Data after three groups of alignment are synchronized into the data signal after generation synchronization;
Data signal after the synchronization is converted into analog signal output.
2. according to the method described in claim 1, it is characterised in that synchronize generation in the data by after three groups of alignment After data signal after synchronization, methods described also includes:
The error count that the data after every group of alignment occur in preset time is counted, when the error count finds predetermined threshold value When, output interrupt signal is to outside micro-control unit MCU so that the MCU notifies source to re-start calibration, after calibration Signal is exported by three data channel.
3. according to the method described in claim 1, it is characterised in that methods described also includes:
Whether the cycle for detecting present clock is N times of standard clock cycle.
4. according to the method described in claim 1, it is characterised in that methods described also includes:
Current standards clock is obtained to enable with data rate ratio and scrambling, and real-time update.
5. a kind of system of signal transmission, it is characterised in that the system includes:
Data sink, the minimum differential signal transmission TMDS that three data channel transfers for receiving from HDMI are come will The TMDS that each data channel transmission comes is converted to data signal, and the form of the data signal exports N number of word for each clock The data of section, and present clock period is N times of standard clock cycle, the N is the positive integer more than 1;
Alignment of data module, for the data of the corresponding N number of byte of each data channel to be carried out after alignment one group of alignment of generation Data;
Channel Synchronous module, for the data after three groups of alignment to be synchronized to the data signal after generation synchronization;
Data transmitter, for the data signal after the synchronization to be converted into analog signal output.
6. system according to claim 5, it is characterised in that the system also includes:
Error detection module, for the data by after three groups of alignment synchronize generation synchronization after data signal it Afterwards, the error count that the data after every group of alignment occur in preset time is counted, when the error count finds predetermined threshold value When, output interrupt signal is to outside micro-control unit MCU so that the MCU notifies source to re-start calibration, after calibration Signal is exported by three data channel.
7. system according to claim 5, it is characterised in that the system also includes:
Clock detection module, for detecting whether the cycle of present clock is N times of standard clock cycle.
8. system according to claim 5, it is characterised in that the system also includes:
SCDC modules, are enabled for obtaining Current standards clock with data rate ratio and scrambling, and real-time update.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108174285A (en) * 2017-12-26 2018-06-15 龙迅半导体(合肥)股份有限公司 A kind of interface conversion method and system
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