CN107196668B

CN107196668B - Radio frequency circuit switch chip, radio frequency circuit, antenna device and electronic equipment

Info

Publication number: CN107196668B
Application number: CN201710465950.5A
Authority: CN
Inventors: 丛明; 冯斌
Original assignee: Guangdong Oppo Mobile Telecommunications Corp Ltd
Current assignee: Guangdong Oppo Mobile Telecommunications Corp Ltd
Priority date: 2017-06-19
Filing date: 2017-06-19
Publication date: 2020-11-13
Anticipated expiration: 2037-06-19
Also published as: CN107196668A

Abstract

The embodiment of the invention provides a radio frequency circuit switch chip, a radio frequency circuit, an antenna device and electronic equipment. The radio frequency circuit switch chip comprises a first switch, a second switch, a first combiner and a second combiner, when a first output sub-port and a second output sub-port of the first switch are respectively communicated with the first combiner, carrier aggregation of an intermediate frequency signal and a high frequency signal is realized, and when a third output sub-port of the first switch and the second switch are respectively communicated with the second combiner, carrier aggregation of the intermediate frequency signal, the high frequency signal and the low frequency signal is realized; when the first switch is disconnected with the first combiner, and the third output sub-port of the first switch and the second switch are respectively connected with the second combiner, carrier aggregation of high-frequency signals or intermediate-frequency signals and low-frequency signals is achieved. The invention controls the radio frequency signals of different frequency bands to carry out carrier aggregation through the radio frequency circuit switch chip so as to improve the diversity of carrier aggregation of the radio frequency signals by the electronic equipment.

Description

Radio frequency circuit switch chip, radio frequency circuit, antenna device and electronic equipment

Technical Field

The present invention relates to the field of communications technologies, and in particular, to a radio frequency circuit switch chip, a radio frequency circuit, an antenna device, and an electronic apparatus.

Background

With the development of communication technology, more and more communication frequency bands can be supported by the mobile terminal. For example, an LTE (Long Term Evolution) communication signal may include a signal having a frequency between 700MHz and 2700 MHz.

Radio frequency signals that can be supported by a mobile terminal can be divided into low frequency signals, intermediate frequency signals, and high frequency signals. The low-frequency signal, the intermediate-frequency signal and the high-frequency signal respectively comprise a plurality of sub-frequency band signals. Each sub-band signal needs to be transmitted to the outside world via an antenna.

Thus, a Carrier Aggregation (CA) technique has been produced. Through carrier aggregation, a plurality of sub-frequency band signals can be aggregated together to improve the uplink and downlink transmission rate of the network.

Currently, the frequency resources of the various communication markets around the world are different from each other. Communication operators in different regions have different communication spectrum allocations, so that different frequency band combination requirements of carrier aggregation exist. However, the frequency band for aggregation in the current carrier aggregation is single, and the diversity is lacking, so that the above requirements cannot be met.

Disclosure of Invention

The embodiment of the invention provides a radio frequency circuit switch chip, a radio frequency circuit, an antenna device and electronic equipment, which can improve the diversity of carrier aggregation of radio frequency signals by the electronic equipment.

The embodiment of the invention provides a radio frequency circuit switch chip, which comprises a first switch, a second switch, a first combiner and a second combiner, wherein the first switch is connected with the first switch;

when a first output sub-port and a second output sub-port of the first switch are respectively communicated with a first combiner, the first combiner carries out carrier aggregation on the intermediate-frequency signal and the high-frequency signal respectively output by the first output sub-port and the second output sub-port to form a first aggregation signal, and when a third output sub-port and a second switch of the first switch are respectively communicated with a second combiner, the second combiner carries out carrier aggregation on the first aggregation signal and the low-frequency signal output by the second switch;

when the first switch is disconnected with the first combiner, and the third output sub-port of the first switch and the second switch are respectively connected with the second combiner, the second combiner carries out carrier aggregation on the high-frequency signal or the intermediate-frequency signal output by the first switch and the low-frequency signal output by the second switch.

The embodiment of the invention also provides a radio frequency power supply, which comprises a front-end module, a radio frequency circuit switch chip and an antenna, wherein the front-end module, the radio frequency circuit switch chip and the antenna are sequentially connected;

the radio frequency circuit switch chip comprises a first switch, a second switch, a first combiner and a second combiner;

The embodiment of the invention also provides an antenna device which comprises the radio frequency circuit.

Correspondingly, the embodiment of the invention also provides electronic equipment, which comprises a shell and a circuit board, wherein the circuit board is arranged in the shell, and the circuit board is provided with a radio frequency circuit which is the radio frequency circuit.

The radio frequency circuit switch chip provided by the embodiment of the invention can control radio frequency signals of different frequency bands to carry out carrier aggregation, so that the diversity of carrier aggregation of the radio frequency signals by electronic equipment can be improved.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly introduced below. It is obvious that the drawings in the following description are only some embodiments of the invention, and that for a person skilled in the art, other drawings can be derived from them without inventive effort.

Fig. 1 is an exploded schematic view of an electronic device according to an embodiment of the present invention.

Fig. 2 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.

Fig. 3 is a schematic diagram of a first structure of a radio frequency circuit according to an embodiment of the present invention.

Fig. 4 is a schematic diagram of a second structure of the rf circuit according to the embodiment of the present invention.

Fig. 5 is a schematic diagram of a first structure of a front-end module in a radio frequency circuit according to an embodiment of the present invention.

Fig. 6 is a schematic diagram of a second structure of a front-end module in a radio frequency circuit according to an embodiment of the present invention.

Fig. 7 is a schematic structural diagram of a radio frequency circuit switch chip in the radio frequency circuit according to the embodiment of the present invention.

Fig. 8 is another schematic structural diagram of an electronic device according to an embodiment of the present invention.

Detailed Description

The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", and the like, indicate orientations and positional relationships based on those shown in the drawings, and are used only for convenience of description and simplicity of description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be considered as limiting the present invention. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first", "second", may explicitly or implicitly include one or more of the described features. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.

In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; may be mechanically connected, may be electrically connected or may be in communication with each other; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.

In the present invention, unless otherwise expressly stated or limited, "above" or "below" a first feature means that the first and second features are in direct contact, or that the first and second features are not in direct contact but are in contact with each other via another feature therebetween. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.

The following disclosure provides many different embodiments or examples for implementing different features of the invention. To simplify the disclosure of the present invention, the components and arrangements of specific examples are described below. Of course, they are merely examples and are not intended to limit the present invention. Furthermore, the present invention may repeat reference numerals and/or letters in the various examples, such repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. In addition, the present invention provides examples of various specific processes and materials, but one of ordinary skill in the art may recognize applications of other processes and/or uses of other materials.

The embodiment of the invention provides electronic equipment. The electronic device can be a smart phone, a tablet computer and the like. Referring to fig. 1 and2, the electronic device 100 includes a cover plate 101, a display screen 102, a circuit board 103, a battery 104, and a housing 105.

Wherein the cover plate 101 is mounted to the display screen 102 to cover the display screen 102. The cover plate 101 may be a transparent glass cover plate. In some embodiments, the cover plate 101 may be a glass cover plate made of a material such as sapphire.

The display screen 102 is mounted on the housing 105 to form a display surface of the electronic device 100. The display screen 102 may include a display area 102A and a non-display area 102B. The display area 102A is used to display information such as images and texts. The non-display area 102B does not display information. The bottom of the non-display area 102B may be provided with functional elements such as a fingerprint module, a touch circuit, and the like.

The circuit board 103 is mounted inside the housing 105. The circuit board 103 may be a motherboard of the electronic device 100. Functional components such as a camera, a proximity sensor, and a processor may be integrated on the circuit board 103. Meanwhile, the display screen 102 may be electrically connected to the circuit board 103.

In some embodiments, Radio Frequency (RF) circuitry is disposed on the circuit board 103. The radio frequency circuit can communicate with a network device (e.g., a server, a base station, etc.) or other electronic devices (e.g., a smart phone, etc.) through a wireless network to complete information transceiving with the network device or other electronic devices.

In some embodiments, as shown in fig. 3, the rf circuit 200 includes a front-end module 21, an rf circuit switch chip 22 and an antenna 25, and the front-end module 21, the rf circuit switch chip 22 and the antenna 25 are connected in sequence.

The radio frequency circuit switch chip 22 includes a first switch 221, a second switch 222, a first combiner 223, and a second combiner 224.

When the first output sub-port and the second output sub-port of the first switch 221 are respectively connected with the first combiner 223, the first combiner 223 performs carrier aggregation on the intermediate frequency signal and the high frequency signal respectively output by the first output sub-port and the second output sub-port of the first switch 221 to form a first aggregation signal, and when the third output sub-port of the first switch 221 and the second switch 222 are respectively connected with the second combiner 224, the second combiner 224 performs carrier aggregation on the first aggregation signal and the low frequency signal output by the second switch 222.

When the first switch 221 and the first combiner 223 module are disconnected and the third output sub-port of the first switch 221 and the second switch 222 and the second combiner 224 are respectively connected, the second combiner 224 performs carrier aggregation on the high-frequency signal or the intermediate-frequency signal output by the first switch 221 and the low-frequency signal output by the second switch 222.

In some embodiments, referring to fig. 4 to 6, the front-end module 21 includes a radio frequency transceiver 211, a low frequency amplifier component 212, an intermediate frequency amplifier component 213, a high frequency amplifier component 214, a low frequency filter component 215, an intermediate frequency filter component 216, and a high frequency filter component 217.

Wherein, the rf transceiver 211, the lf amplifier module 212 and the lf filter module 215 are connected in sequence. The rf transceiver 211, the if amplifier module 213 and the if filter module 216 are connected in sequence. The rf transceiver 211, the rf amplifier 214 and the rf filter 217 are connected in sequence.

The high frequency filter 217 and the intermediate frequency filter 216 are respectively connected to a first switch 221, and the low frequency filter 215 is connected to a second switch 222.

In practical applications, the low frequency amplifier assembly 212 includes a low frequency amplifier 2121 and a low frequency gate 2122. The low frequency filtering component 215 includes a plurality of first filters 2151. The first filter 2151 may be a duplexer. The low frequency gate 2122 has a low frequency port having at least two fourth sub-ports, for example, in the present embodiment, the low frequency port has a fourth sub-port L1, a fourth sub-port L2, a fourth sub-port L3 and a fourth sub-port L4, and a first input port L0. The low frequency gate 2122 can selectively connect the first input port L0 with one of the at least two fourth sub-ports L1/L2/L3/L4. Each fourth sub-port is connected to a first filter 2151.

In practical applications, the if amplifier assembly 213 includes an if amplifier 2131 and an if gate 2132. The if filtering component 216 includes a plurality of second filters 2161. The second filter 2161 may be a duplexer. The if gate 2132 has an if port with a first subport M1, a second subport M2, a second subport M3 and a second subport M4, and a second input port M0. The if gate 2132 can selectively connect the second input port M0 with one of the first subport M1 and the second subport M2/M3/M4. The first sub-port M1 and the second sub-port M2/M3/M4 are respectively connected to the plurality of second filters 2161 in a one-to-one correspondence.

The high frequency amplifier module 214 includes a high frequency amplifier 2141 and a high frequency gate 2142. The high frequency filtering component 217 includes a plurality of third filters 2171. The third filter 2171 may be a duplexer. The high frequency gate 2142 has a high frequency port and a third input port H0, wherein the high frequency port includes at least two third sub-ports, for example, the at least two third sub-ports are a third sub-port H1, a third sub-port H2, a third sub-port H3 and a third sub-port H4. The high frequency gate 2142 can selectively connect the third input port H0 with one of the at least two third sub-ports H1/H2/H3/H4. The at least two third sub-ports H1/H2/H3/H4 are respectively connected to the plurality of third filters 2171 in one-to-one correspondence.

As shown in fig. 6, in some embodiments, the front end module 21 includes a radio frequency transceiver 211, a low frequency amplifier component 212, an intermediate frequency amplifier component 213, a high frequency amplifier component 214, a low frequency filter component 215, an intermediate frequency filter component 216, a high frequency filter component 217, a first phase shifting component 218, a second phase shifting component 219, and a third phase shifting component 210. The first phase shifting block 218, the second phase shifting block 219, and the third phase shifting block 210 are used to adjust the phase of the signal amplitude of the up-going signal or the down-going signal of the low frequency signal, the intermediate frequency signal, and the high frequency signal, respectively.

The rf transceiver 211, the lf amplifier component 212, the lf filter component 215, and the first phase shift component 218 are connected in sequence. The rf transceiver 211, the if amplifier module 213, the if filter module 216, and the second phase shifter module 219 are connected in sequence. The rf transceiver 211, the rf amplifier 214, the rf filter 217, and the third phase shifter 210 are connected in sequence.

The second phase shifting block 219 and the third phase shifting block 210 are respectively connected to a first switch 221, and the first phase shifting block 218 is connected to a second switch 222.

The first phase shifting assembly 218 includes a plurality of first phase shifters 2181. Each first phase shifter 2181 is connected to a first filter 2151.

The second phase shift element 219 includes a plurality of second phase shifters 2191. Each second phase shifter 2191 is coupled to a second filter 2161.

The third phase shift assembly 210 includes a plurality of third phase shifters 2101. Each third phase shifter 2101 is connected to a third filter 2171.

Referring to fig. 4 and fig. 7, in some embodiments, the first switch 221 includes a first output sub-port 2211, a second output sub-port 2212 and a third output sub-port 2213.

The first output sub-port 2211 of the first switch 221 is connected to a first input port of the first combiner 223.

The second output sub-port 2212 of the first switch 221 is connected to the second output port of the first combiner 223.

The third output sub-port 2213 of the first switch 221 is connected to the first input port of the second combiner 224.

An input terminal of the second switch 222 is connected to a second input port of the second combiner 224.

The output of the second combiner 224 is connected to the antenna 25.

Each of the first sub-port M1 and the second sub-port M2/M3/M4 of the if gate 2132 of the front end module 21 may be connected to the corresponding input port of the first output sub-port 2211 of the first switch 221 through a second filter 2161. The first output sub-port 2211 of the first switch 221 is connected to the input of the first combiner 223.

Each of the third sub-ports H1/H2/H3/H4 of the high frequency port of the high frequency gate 2142 of the front end module 21 is connected to the corresponding input port of the second output sub-port 2212 of the first switch 221 through a third filter 2171, and the second output sub-port 2212 of the first switch 221 is connected to the input terminal of the first combiner 223.

The output terminal of the first combiner 223 is connected to the first input port of the second combiner 224 through the third output sub-port 2213 of the first switch 221.

Each fourth sub-port of the low frequency gate 2122 of the front-end module 21 is connected to the second switch 222 through a first filter 2151, and the second switch 222 is connected to the second input port of the second combiner 224.

In some embodiments, the first switch 221 includes a first single-pole-multiple-throw switch K11, a second single-pole-multiple-throw switch K12, and a third single-pole-multiple-throw switch K13.

Each of the first sub-port M1 and the second sub-port M2/M3/M4 of the if port of the if gate 2132 of the front end module 21 can be connected to the first single-pole multi-throw switch K11 through a second filter 2161. The first single-pole-multi-throw switch K11 is connected to the input of the first combiner 223.

Each of the third sub-ports H1/H2/H3/H4 of the high frequency port of the high frequency gate 2142 of the front end module 21 is connected to the second single-pole multi-throw switch K12 through a third filter 2171, and the second single-pole multi-throw switch K12 is connected to the input terminal of the first combiner 223.

The output terminal of the first combiner 223 is connected to the first input port of the second combiner 224 through the third single-pole multi-throw switch K13.

The input ends of the first single-pole multi-throw switch K11 and the second single-pole multi-throw switch K12 are respectively connected with the intermediate frequency port and the high frequency port correspondingly, and the output ends of the first single-pole multi-throw switch K11 and the second single-pole multi-throw switch K12 are respectively connected with the input end of the first combiner 223; the output terminals of the first combiner 223 are respectively connected to the input ports of the first switches 221.

When the first combiner 223 and the first single-pole multi-throw switch K11 are turned on, the first combiner 223 performs carrier aggregation on the high frequency signal and the intermediate frequency signal to form a first aggregated signal, and when the third single-pole multi-throw switch K13 and the second switch 222 are respectively connected to the second combiner 224, the second combiner 224 performs carrier aggregation on the first aggregated signal and the low frequency signal.

When the first combiner 223 is disconnected from the first spdt switch K11 and the second spdt switch K12, and when the third spdt switch K13 and the second switch 222 are respectively connected to the second combiner 224, the second combiner 224 performs carrier aggregation on a high frequency signal or an intermediate frequency signal and a low frequency signal.

In some embodiments, the first switch 221 comprises a plurality of first input sub-ports a1/a2/A3/a4/a5/a6/a7/A8/a9, a first output sub-port C1(2211), a second output sub-port C2(2212), and a third output sub-port C3(2213), the intermediate frequency port having a first sub-port M1 and at least two second sub-ports M2/M3/M4, the high frequency port having at least two third sub-ports H1/H2/H3/H4;

the plurality of first input sub-ports a1 to a9 are respectively connected with the output ends of the first sub-port M1, the at least two second sub-ports M2/M3/M4, the at least two third sub-ports H1/H2/H3/H4 and the first combiner 223 in a one-to-one correspondence manner, the first output sub-port E0 is connected with the first input end of the second combiner 224, the third output sub-port C3 is connected with the first input end of the second combiner 224, the first output sub-port C1 and the second output sub-port C2 are respectively connected with the input end of the first combiner 223 in a correspondence manner, and the first switch 221 is used for selectively connecting each first input sub-port of the plurality of first input sub-ports with the corresponding output sub-port;

the second switch includes a plurality of second input sub-ports and a fourth output sub-port, the low frequency port has at least two fourth sub-ports, each of the fourth sub-ports is connected to one of the fourth input sub-ports, and the second switch is configured to connect one of the second input sub-ports with the fourth output sub-port.

The second switch 222 includes a plurality of second input sub-ports B1/B2/B3/B4 and a fourth output sub-port B0, wherein the plurality of second input sub-ports B1/B2/B3/B4 may be a second input sub-port B1, a second input sub-port B2, a second input sub-port B3 and a second input sub-port B4. The fourth sub-port L1/L2/L3/L4 of the low frequency port is connected with the second input sub-port B1/B2/B3/B4 in a one-to-one correspondence, and the second switch 222 is configured to connect one of the plurality of second input sub-ports B1/B2/B3/B4 with the fourth output sub-port B0.

In a specific application, the second switch 222 is a fourth single-pole-multi-throw switch K2, wherein the number of pass terminals of the fourth single-pole-multi-throw switch K2 is the same as the number of the second input sub-ports.

The first single-pole multi-throw switch K11 has a gating end a1/a2/A3/a4 respectively connected to the first sub-port M1 and the at least two second sub-ports M2/M3/M4 in a one-to-one correspondence manner, a fixed end C1 of the first single-pole multi-throw switch K11 is connected to a first input end of the first combiner 223, and the first single-pole multi-throw switch K11 selectively connects one of the first sub-port M1 and the at least two second sub-ports M2/M3/M4 to the first input end of the first combiner 223.

The second single-pole multi-throw switch K12 has a gating terminal a5/a6/a7/a8 respectively connected to the at least two third sub-ports H1/H2/H3/H4 in a one-to-one correspondence, a fixed terminal C2 of the second single-pole multi-throw switch K12 is connected to the second input terminal of the first combiner 223, and the second single-pole multi-throw switch K12 selectively connects one of the at least two third sub-ports H1/H2/H3/H4 to the second input terminal of the first combiner 223.

The gating end of the third single-pole multi-throw switch K13 is connected with the plurality of first input sub-ports in a one-to-one correspondence manner, the fixed end of the third single-pole multi-throw switch is connected with the first input end of the second combiner, and the third single-pole multi-throw switch selectively connects one first input port of the first input sub-ports with the first input end of the second combiner.

The third single-pole-multi-throw switch K13 is connected to the input terminal of the second combiner 224 and the output terminal of the first combiner 223, and the third single-pole-multi-throw switch K13 selectively connects the output terminal of the first combiner 223 and the input terminal of the second combiner 224.

When the first combiner 223 and the first and second single-pole multi-throw switches K11 and K12 are turned on, the first combiner 223 performs carrier aggregation on a high frequency signal and an intermediate frequency signal to form a first aggregated signal, and when the third and second single-pole multi-throw switches K13 and 222 are respectively communicated with the second combiner 224, the second combiner 224 performs carrier aggregation on the first aggregated signal and a low frequency signal.

In specific application, the gating end a9 of the third single-pole multi-throw switch K13 is connected to the output end of the first combiner 223, the fixed end C3 of the third single-pole multi-throw switch K13 is connected to the first input end of the second combiner 224, the third single-pole multi-throw switch K13 selectively connects the output end of the first combiner 223 to the first input end of the second combiner 224, and the second switch 222 is connected to the second input end of the second combiner 224, so as to implement carrier aggregation of the intermediate frequency signal, the high frequency signal, and the low frequency signal.

In some embodiments, the third single-pole-multi-throw switch K13 is further selectively connected to a plurality of first input sub-ports a1/a2/A3/a4/a5/A6/a7/A8/a9 in the first switch and the first input terminal of the second combiner 224, wherein the plurality of first input sub-ports a1 to a9 are respectively connected to the first sub-port M1, the at least two second sub-ports M2/M3/M4, the at least two third sub-ports H1/H2/H3/H4, and the output terminal of the first combiner 223 in a one-to-one correspondence. The third single-pole-multi-throw switch K13 may selectively connect the if port, the hf port, or the output of the first combiner 223 with the input of the second combiner 224.

For example, the gate terminal A1/A2/A3/A4 of the third single-pole multi-throw switch K13 is respectively connected with the first sub-port M1 and at least two second sub-ports M2/M3/M4, the gating end A5/A6/A7/A8 of the third single-pole multi-throw switch K13 is respectively connected with at least two third sub-ports H1/H2/H3/H4, the gate terminal a9 of the third single-pole multi-throw switch K13 is connected to the output terminal of the first combiner 223, the fixed terminal C3 of the third single-pole multi-throw switch K13 is connected to the first input terminal of the second combiner 224, the third single-pole multi-throw switch K13 selectively connects the intermediate frequency port, the high frequency port or the output terminal of the first combiner 223 to the input terminal of the second combiner 224, the second switch 222 is connected to a second input terminal of the second combiner 224 to implement carrier aggregation of the high frequency signal or the intermediate frequency signal and the low frequency signal.

In the present embodiment, the signals in M1-M4 are the first intermediate frequency sub-signal, the second intermediate frequency sub-signal, the third intermediate frequency sub-signal and the fourth intermediate frequency sub-signal of the intermediate frequency signals, respectively. The signals in H1-H4 are the first high frequency sub-signal, the second high frequency sub-signal, the third high frequency sub-signal and the fourth high frequency sub-signal of the high frequency signal, respectively. The signals in the L1-L4 are the first low-frequency sub-signal, the second low-frequency sub-signal, the third low-frequency sub-signal and the fourth low-frequency sub-signal in the intermediate frequency signal, respectively.

The high frequency signal, the intermediate frequency signal, and the low frequency signal are only relative concepts, and are not absolutely distinguished in frequency range. For example, the low frequency signal is 700-.

For example, the intermediate frequency signals include radio frequency signals in bands 1, bands 3, bands 34, bands 39, and the like; the high-frequency signals comprise radio frequency signals of Band7, Band40, Band41 and other frequency bands; the low-frequency signals comprise radio frequency signals of bands 8, bands 12, bands 20 or bands 26.

Referring to fig. 7, when carrier aggregation is required to be performed on the low frequency signal, the high frequency signal, and the intermediate frequency signal, for example, when the first intermediate frequency sub-signal, the first high frequency sub-signal, and the first low frequency sub-signal are subjected to carrier aggregation, the gate terminal a1 of the first single-pole multi-throw switch K11 is connected to the fixed terminal C1, the gate terminal a5 of the second single-pole multi-throw switch K12 is connected to the fixed terminal C2, the gate terminal a9 of the third single-pole multi-throw switch K13 is connected to the third output sub-port C3, and the second input sub-port B1 of the second switch 222 is connected to the second output sub-port B0, so that the first intermediate frequency sub-signal and the first high frequency sub-signal formed after carrier aggregation is performed on the first combiner 223 and the first low frequency sub-signal are subjected to carrier aggregation in the second combiner 224.

When the low frequency signal and the intermediate frequency signal need to be carrier-aggregated, for example, when the first intermediate frequency sub-signal and the first low frequency sub-signal need to be carrier-aggregated, the gate terminal a1 and the third output sub-port C3 of the third single-pole multi-throw switch K13 are turned on, and the second input sub-port B1 and the second output sub-port B0 of the second switch 222 are turned on, so that the first intermediate frequency sub-signal and the first low frequency sub-signal are carrier-aggregated in the second combiner 224.

When the low frequency signal and the high frequency signal need to be carrier-aggregated, for example, when the first high frequency sub-signal and the first low frequency sub-signal need to be carrier-aggregated, the gate terminal a5 and the third output sub-port C3 of the third single-pole multi-throw switch K13 are turned on, and the second input sub-port B1 and the second output sub-port B0 of the second switch 222 are turned on, so that the first high frequency sub-signal and the first low frequency sub-signal are carrier-aggregated in the second combiner 224.

In some embodiments, as shown in fig. 7, the rf circuit switch chip 22 may be an integral part of the rf circuit 200 or may be a separate device.

In some embodiments, the first output sub-port 2211 of the first switch 221 is connected to a first input port of the first combiner 223. The second output sub-port 2212 of the first switch 221 is connected to the second output port of the first combiner 223. The third output sub-port 2213 of the first switch 221 is connected to the first input port of the second combiner 224. An input terminal of the second switch 222 is connected to a second input port of the second combiner 224.

In some embodiments, the first switch 221 and the second switch 222 may be packaged to form a first chip 225.

Therefore, by adopting the technical scheme, the low-frequency and medium-frequency signals, the low-frequency and high-frequency signals or the low-frequency, medium-frequency and high-frequency signals are selectively subjected to carrier aggregation, so that the selectivity and diversity of the carrier aggregation can be improved.

Continuing with reference to fig. 1 and 2. Wherein the battery 104 is mounted inside the housing 105. The battery 104 is used to provide power to the electronic device 100.

The housing 105 is used to form the outer contour of the electronic device 100. The material of the housing 105 may be plastic or metal. The housing 105 may be integrally formed.

Referring to fig. 8, fig. 8 is a schematic structural diagram of an electronic device 100 according to an embodiment of the present invention. The electronic device 100 includes an antenna apparatus 10, a memory 20, a display unit 30, a power supply 40, and a processor 50. Those skilled in the art will appreciate that the configuration of the electronic device 100 shown in fig. 8 does not constitute a limitation of the electronic device 100. Electronic device 100 may include more or fewer components than shown, or some components may be combined, or a different arrangement of components.

The antenna device 10 includes the rf circuit 200 described in any of the above embodiments. The antenna device 10 can communicate with a network device (e.g., a server) or other electronic devices (e.g., a smart phone) through a wireless network, and complete information transceiving with the network device or other electronic devices.

The memory 20 may be used to store applications and data. The memory 20 stores applications containing executable program code. The application programs may constitute various functional modules. The processor 50 executes various functional applications and data processing by running the application programs stored in the memory 20.

The display unit 30 may be used to display information input to the electronic apparatus 100 by a user or information provided to the user and various graphic user interfaces of the electronic apparatus 100. These graphical user interfaces may be made up of graphics, text, icons, video, and any combination thereof. The display unit 30 may include a display panel.

The power supply 40 is used to power the various components of the electronic device 100. In some embodiments, power supply 40 may be logically coupled to processor 50 through a power management system, such that functions to manage charging, discharging, and power consumption management are performed through the power management system.

The processor 50 is the control center of the electronic device 100. The processor 50 connects various parts of the entire electronic device 100 using various interfaces and lines, performs various functions of the electronic device 100 and processes data by running or executing an application program stored in the memory 20 and calling data stored in the memory 20, thereby monitoring the electronic device 100 as a whole.

In addition, the electronic device 100 may further include a camera module, a bluetooth module, and the like, which are not described herein again.

The radio frequency circuit switch chip, the radio frequency circuit, the antenna device and the electronic device provided by the embodiments of the present invention are described in detail above, and the principle and the implementation manner of the present invention are explained in this document by applying specific examples, and the description of the above embodiments is only used to help understanding of the present invention. Meanwhile, for those skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.

Claims

1. A radio frequency circuit switch chip is characterized in that the radio frequency circuit switch chip comprises a first switch, a second switch, a first combiner and a second combiner; wherein the first switch and the second switch are packaged to form a first chip, the first switch comprises a first single-pole multi-throw switch, a second single-pole multi-throw switch and a third single-pole multi-throw switch, the first single-pole multi-throw switch comprises a first input sub-port A1/A2/A3/A4 and a first output sub-port C1, the second single-pole multi-throw switch comprises A5/A6/A7/A8 and a second output sub-port C2, the third single-pole multi-throw switch comprises a first input sub-port A1/A2/A3/A4/A5/A6/A7/A8/A9 and a third output sub-port C9, the second switch comprises a second input sub-port B695B 2/B2/B3/B4 and a fourth output sub-port;

when the first switch is disconnected with the first combiner, and the third output sub-port of the first switch and the second switch are respectively connected with the second combiner, the second combiner carries out carrier aggregation on the high-frequency signal or the intermediate-frequency signal output by the first switch and the low-frequency signal output by the second switch;

the method specifically comprises the following steps:

when the first input sub-port a1, a2, A3 or a4 is in communication with the first output sub-port C1, the first input sub-port a5, a6, a7 or A8 is in communication with the second output sub-port C2, the first input sub-port a9 is in communication with the third output sub-port C3, and the first output sub-port C1 and the second output sub-port C2 are in communication with a first combiner, respectively, the third output sub-port C3 is in communication with an output of the first combiner, the first combiner carrier-aggregates the first intermediate frequency sub-signal, the second intermediate frequency sub-signal, the third intermediate frequency sub-signal or the fourth intermediate frequency sub-signal output by the first output sub-port C1 with the first high frequency sub-signal, the second high frequency sub-signal, the third high frequency sub-signal or the fourth high frequency sub-signal output by the second output sub-port C2 to form a first aggregated high frequency sub-signal, and when the third output sub-port C3 is in communication with the second output sub-port C3, the second combiner performs carrier aggregation on the first aggregation signal and the first low-frequency sub-signal, the second low-frequency sub-signal, the third low-frequency sub-signal or the fourth low-frequency sub-signal output by the fourth output sub-port;

when the first switch is disconnected from the first combiner, the first input sub-port a1, a2, A3 or a4 is connected with the third output sub-port C3, and the third output sub-port C3 and the fourth output sub-port are respectively connected with the second combiner, the second combiner performs carrier aggregation on the first intermediate frequency sub-signal, the second intermediate frequency sub-signal, the third intermediate frequency sub-signal or the fourth intermediate frequency sub-signal output by the third output sub-port C3 and the first low frequency sub-signal, the second low frequency sub-signal, the third low frequency sub-signal or the fourth low frequency sub-signal output by the fourth output sub-port;

when the first switch is disconnected from the first combiner, the first input sub-port a5, a6, a7 or A8 is connected to the third output sub-port C3, and the third output sub-port C3 and the fourth output sub-port are respectively connected to the second combiner, the second combiner performs carrier aggregation on the first high-frequency sub-signal, the second high-frequency sub-signal, the third high-frequency sub-signal or the fourth high-frequency sub-signal output from the third output sub-port C3 and the first low-frequency sub-signal, the second low-frequency sub-signal, the third low-frequency sub-signal or the fourth low-frequency sub-signal output from the fourth output sub-port.

2. The radio frequency circuit switch chip of claim 1, wherein:

a first output sub-port of the first switch is connected with a first input port of the first combiner;

a second output sub-port of the first switch is connected with a second input port of the first combiner;

a third output sub-port of the first switch is connected with a first input port of the second combiner; and

and the input end of the second switch is connected with the second input port of the second combiner.

3. A radio frequency circuit is characterized by comprising a front-end module, a radio frequency circuit switch chip and an antenna, wherein the front-end module, the radio frequency circuit switch chip and the antenna are sequentially connected;

the radio frequency circuit switch chip comprises a first switch, a second switch, a first combiner and a second combiner; wherein the first switch and the second switch are packaged to form a first chip, the first switch comprises a first single-pole multi-throw switch, a second single-pole multi-throw switch and a third single-pole multi-throw switch, the first single-pole multi-throw switch comprises a first input sub-port A1/A2/A3/A4 and a first output sub-port C1, the second single-pole multi-throw switch comprises A5/A6/A7/A8 and a second output sub-port C2, the third single-pole multi-throw switch comprises a first input sub-port A1/A2/A3/A4/A5/A6/A7/A8/A9 and a third output sub-port C9, the second switch comprises a second input sub-port B695B 2/B2/B3/B4 and a fourth output sub-port;

the method specifically comprises the following steps:

4. The radio frequency circuit of claim 3, wherein:

a third output sub-port of the first switch is connected with a first input port of the second combiner;

the input end of the second switch is connected with the second input port of the second combiner; and

and the output end of the second combiner is connected with the antenna.

5. The RF circuit of claim 4, wherein the front-end module comprises a low frequency port, an intermediate frequency port, and a high frequency port, the first switch comprises a plurality of first input sub-ports, the intermediate frequency port and the high frequency port are respectively connected to corresponding input ports of the first switch, and the low frequency port is connected to an input terminal of the second switch.

6. The radio frequency circuit according to claim 5, wherein the input port of the first switch further comprises a plurality of first input sub-ports, the intermediate frequency port has a first sub-port and at least two second sub-ports, and the high frequency port has at least two third sub-ports;

the plurality of first input sub-ports are respectively connected with the first sub-ports, the at least two second sub-ports, the at least two third sub-ports and the output ends of the first combiner in a one-to-one correspondence manner, the third output sub-ports are connected with the first input ends of the second combiners, the first output sub-ports and the second output sub-ports are respectively connected with the input ends of the first combiners in a corresponding manner, and the first switch is used for selectively connecting each first input sub-port of the plurality of first input sub-ports with the corresponding output sub-port;

the second switch comprises a plurality of second input sub-ports and a fourth output sub-port, the low frequency port has at least two fourth sub-ports, each fourth sub-port is connected with one fourth input sub-port, and the second switch is used for connecting one second input sub-port of the plurality of second input sub-ports with the fourth output sub-port.

7. The radio frequency circuit of claim 3, wherein the front-end module comprises a radio frequency transceiver, a low frequency amplifier component, an intermediate frequency amplifier component, a high frequency amplifier component, a low frequency filter component, an intermediate frequency filter component, and a high frequency filter component;

the radio frequency transceiver, the low-frequency amplifier component and the low-frequency filtering component are sequentially connected;

the radio frequency transceiver, the intermediate frequency amplifier assembly and the intermediate frequency filter assembly are sequentially connected;

the radio frequency transceiver, the high-frequency amplifier assembly and the high-frequency filter assembly are sequentially connected;

the high-frequency filtering component and the intermediate-frequency filtering component are respectively connected with the first single-pole multi-throw switch and the second single-pole multi-throw switch;

the low-frequency filtering component is connected with the second switch.

8. The RF circuit of claim 7, wherein the low frequency amplifier component includes a low frequency amplifier and a low frequency gate, the low frequency gate having a first input port and the low frequency port, each fourth sub-port of the low frequency port being connected to the second switch through the low frequency filter component, the low frequency gate being configured to connect the first input port to one of the fourth sub-ports;

the low-frequency filtering component comprises a plurality of first filters, and each fourth sub-port is respectively connected with the second switch through one first filter.

9. The radio frequency circuit of claim 7, wherein the intermediate frequency amplifier component comprises an intermediate frequency amplifier and an intermediate frequency gate;

the intermediate frequency gate is provided with a second input port and the intermediate frequency port, and a first sub-port and at least two second sub-ports of the intermediate frequency port are respectively connected with the first single-pole multi-throw switch through the intermediate frequency filtering component;

the intermediate frequency gate is used for selectively connecting the second input port with one of the first sub-port and the second sub-port;

the intermediate frequency filtering component comprises a plurality of second filters, and each first sub-port and each second sub-port are respectively connected with the first single-pole multi-throw switch through one second filter.

10. The radio frequency circuit according to claim 7, wherein the high frequency amplifier component comprises a high frequency amplifier and a high frequency gate;

the high-frequency gate is provided with a third input port and the high-frequency port, and at least two third sub-ports of the high-frequency port are respectively connected with the second single-pole multi-throw switch through the high-frequency filtering component;

the high-frequency gate is used for selectively connecting the second input port with one third sub-port of the third sub-ports;

the high-frequency filtering component comprises a plurality of third filters, and each third sub-port is respectively connected with the second single-pole multi-throw switch through a third filter.

11. An antenna arrangement comprising a radio frequency circuit as claimed in any one of claims 3 to 10.

12. An electronic device, comprising a housing and a circuit board, wherein the circuit board is mounted inside the housing, and the circuit board is provided with a radio frequency circuit, and the radio frequency circuit is the radio frequency circuit according to any one of claims 3 to 10.