CN107168778B - Task processing method and task processing device - Google Patents
Task processing method and task processing device Download PDFInfo
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- CN107168778B CN107168778B CN201710204192.1A CN201710204192A CN107168778B CN 107168778 B CN107168778 B CN 107168778B CN 201710204192 A CN201710204192 A CN 201710204192A CN 107168778 B CN107168778 B CN 107168778B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
- G06F9/485—Task life-cycle, e.g. stopping, restarting, resuming execution
- G06F9/4856—Task life-cycle, e.g. stopping, restarting, resuming execution resumption being on a different machine, e.g. task migration, virtual machine migration
Abstract
The embodiment of the invention discloses a task processing method, which comprises the following steps: acquiring at least one target execution task, and acquiring a memory access address of the at least one target execution task; determining a physical access address of each target execution task based on the memory access address of each target execution task; wherein the target execution task is run by at least two different central processing units; the physical access address represents processor identifications of at least two central processing units running the target execution task; determining the data distribution proportion of the target execution task in different central processing units by using at least the processor identifier represented by the physical access address, and determining whether to perform data migration processing on the at least one target execution task based on the data distribution proportion so as to operate all data of the at least one target execution task in the same central processing unit. The embodiment of the invention also discloses a task processing device.
Description
Technical Field
The present invention relates to task processing technologies, and in particular, to a task processing method and a task processing apparatus.
Background
In a computing environment, a Non-Uniform Memory Access Architecture (NUMA) poses a significant performance challenge, for example, frequent Memory accesses between processors (i.e., NUMA nodes) often occur. In practical application, the overhead of the NUMA system is increased due to cross-node memory access, and most of NUMA systems occupy more Central Processing Units (CPUs) in NUMA nodes, thereby reducing system performance.
Disclosure of Invention
In order to solve the existing technical problems, embodiments of the present invention provide a task processing method and a task processing apparatus, which can at least solve the above problems in the prior art.
The technical scheme of the embodiment of the invention is realized as follows:
a first aspect of an embodiment of the present invention provides a task processing method, including:
acquiring at least one target execution task, and acquiring a memory access address of the at least one target execution task;
determining a physical access address of each target execution task based on the memory access address of each target execution task; wherein the target execution task is run by at least two different central processing units; the physical access address represents processor identifications of at least two central processing units running the target execution task;
determining the data distribution proportion of the target execution task in different central processing units by using at least the processor identifier represented by the physical access address, and determining whether to perform data migration processing on the at least one target execution task based on the data distribution proportion so as to operate all data of the at least one target execution task in the same central processing unit.
In the above scheme, the acquiring at least one target execution task includes:
collecting at least one execution task, screening the at least one execution task, and screening out at least one target execution task meeting a preset rule; the preset rule represents that access delay data of the executed task is larger than a first threshold value; or the target parameters for representing the execution task meet the preset conditions.
In the above solution, the data distribution ratio represents a distribution ratio of a total data amount of the target execution task executed by a first central processing unit of the at least two central processing units to a total data amount of the target execution task executed by other central processing units of the at least two central processing units; correspondingly, the determining whether to perform data migration processing on the at least one target execution task based on the data distribution proportion includes:
judging whether the data distribution proportion is smaller than a second threshold value;
and when the data migration is determined to be smaller than the second threshold value, performing data migration processing on the at least one target execution task.
In the foregoing solution, the performing data migration processing on the at least one target execution task includes:
migrating memory access addresses operated by at least part of data in the at least one target execution task; alternatively, the first and second electrodes may be,
and migrating the process corresponding to the at least one target execution task.
A second aspect of an embodiment of the present invention provides a task processing apparatus, including:
the processor is used for acquiring at least one target execution task and acquiring a memory access address of the at least one target execution task; determining a physical access address of each target execution task based on the memory access address of each target execution task; wherein the target execution task is run by at least two different central processing units; the physical access address represents processor identifications of at least two central processing units running the target execution task;
the counter is used for determining the data distribution proportion of the target execution task in different central processing units at least by utilizing the processor identifier represented by the physical access address;
correspondingly, the processor is further configured to determine whether to perform data migration processing on the at least one target execution task based on the data distribution ratio, so that all data of the at least one target execution task are executed in the same central processing unit.
In the above scheme, the processor is further configured to acquire at least one execution task, screen the at least one execution task, and screen out at least one target execution task that meets a preset rule; the preset rule represents that access delay data of the executed task is larger than a first threshold value; or the target parameters for representing the execution task meet the preset conditions.
In the above solution, the data distribution ratio represents a distribution ratio of a total data amount of the target execution task executed by a first central processing unit of the at least two central processing units to a total data amount of the target execution task executed by other central processing units of the at least two central processing units; in a corresponding manner, the first and second electrodes are,
the processor is further configured to determine whether the data distribution ratio is smaller than a second threshold; and when the data migration is determined to be smaller than the second threshold value, performing data migration processing on the at least one target execution task.
In the above scheme, the processor is further configured to migrate a memory access address where at least part of data in the at least one target execution task runs; or migrating the process corresponding to the at least one target execution task.
In the above scheme, the processor is further configured to determine a physical page identifier of each target execution task based on the memory access address of the target execution task; and determining the physical access address of each target execution task based on the physical page identification.
According to the task processing method and the task processing device, after at least one target execution task is acquired, the physical access address of the target execution task is determined by obtaining the memory access address of the target execution task, and then the data distribution proportion of the target execution task in different central processing units is determined by using the physical access address, so that whether data migration processing is performed on the at least one target execution task or not is determined based on the data distribution proportion, and all data of the at least one target execution task can be conveniently operated in the same central processing unit. Moreover, the embodiment of the invention determines whether to perform data migration or not based on the data distribution proportion of the target execution task in different central processing units, compared with the existing mode of observing the cross-node access source by using the simulated page fault mode, the embodiment of the invention does not need to simulate the page fault abnormity, so that the problem of inaccurate information counted because the operating system maintains the data structure to identify whether the page fault is true or not is avoided, namely, compared with the existing mode of observing the cross-node access source by using the simulated page fault mode, the embodiment of the invention is more efficient and accurate.
Drawings
FIG. 1 is a schematic flow chart of a task processing method according to an embodiment of the present invention;
FIG. 2 is a diagram illustrating a comparison between a task before migration and a task after migration in a task processing method according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a task processing device according to an embodiment of the present invention.
Detailed Description
So that the manner in which the features and aspects of the present invention can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings.
Example one
The embodiment provides a task processing method; the method can be specifically applied to a task processing device, where the task processing device is connected or provided with a plurality of central processing units, for example, the task processing device is provided or connected with a plurality of NUMA nodes, so that when the NUMA nodes execute tasks, the task management device can monitor the cross-node memory access condition, i.e., monitor which processes or memory areas frequently have cross-node memory access, and then perform migration processing on the cross-node accessed tasks by means of a memory or process migration framework, so as to control the running data corresponding to one task to run in the same node, thereby laying a foundation for achieving high efficiency performance. Specifically, fig. 1 is a schematic flow chart illustrating an implementation of a task processing method according to an embodiment of the present invention; as shown in fig. 1, the method includes:
step 101: acquiring at least one target execution task, and acquiring a memory access address of the at least one target execution task;
in a specific embodiment, the task processing device does not perform node monitoring on all executed tasks, but performs targeted monitoring on specific tasks, and specifically, after the task processing device collects at least one executed task, the task processing device first screens the at least one executed task, screens out tasks meeting preset rules as target executed tasks, and then obtains at least one target executed task. Here, the preset rule may specifically indicate that the access delay data for executing the task is greater than a first threshold, for example, greater than 3 clock; or, the preset rule represents that the target parameter of the executed task meets the preset condition, for example, the memory node number of the executed task represents a preset memory, or the process number of the executed task represents a preset process, where in practical application, a process or a memory area where cross-node memory access frequently occurs may be used as the preset process, or the preset memory, and the target executed task is screened out in the above manner. Of course, in practical application, the screening may be performed in other manners according to practical requirements, and this embodiment does not limit this.
Step 102: determining a physical access address of each target execution task based on the memory access address of each target execution task; wherein the target execution task is run by at least two different central processing units; the physical access address represents processor identifications of at least two central processing units running the target execution task;
in this embodiment, the determined operation data of the target execution task is executed in different central processing units, for example, as shown in the left diagram of fig. 2, part of the operation data in the target execution task 1 is executed in NUMA Node 0 (Node 0), and the other part of the operation data is executed in NUMA Node 1 (Node 1), meanwhile, part of the operation data in the target execution task 2 is executed in NUMA Node 0 (Node 0), and the other part of the operation data is executed in NUMA Node 1 (Node 1), that is, the operation data of the target execution task is executed in different nodes. The physical access address corresponding to the target execution task carries processor identifiers of different central processing units operated by the target execution task, and the processor identifiers can uniquely point to a specific central processing unit, so that the data distribution proportion of the target execution task in different central processing units can be conveniently counted based on the physical access address.
In practical application, a physical access address may be determined in the following manner, and specifically, a physical page identifier of each target execution task is determined based on a memory access address of the target execution task; and determining the physical access address of each target execution task based on the physical page identifier, and further laying a foundation for determining the data distribution proportion of the target execution tasks in different central processing units based on the physical access addresses.
Step 103: and determining the data distribution proportion of the target execution task in different central processing units by using at least the processor identifier represented by the physical access address, and determining whether to perform data migration processing on the at least one target execution task based on the data distribution proportion.
Specifically, when the data distribution proportion meets a specific condition, data migration processing is performed on the at least one target execution task, and the purpose that all data of the target execution task are operated in the same central processing unit is achieved; as shown in the right diagram of fig. 2, when the data distribution ratio corresponding to the target executive task 1 and the target executive task 2 satisfies a specific condition, data migration processing is performed on the target executive task 1 and the target executive task 2, so that all the operation data corresponding to the target executive task 1 is operated in the NUMA Node 1 (Node 1), and all the operation data corresponding to the target executive task 2 is operated in the NUMA Node 0 (Node 0).
In this way, according to the method of the embodiment of the present invention, after at least one target execution task is acquired, the physical access address of the target execution task is determined by obtaining the memory access address of the target execution task, and then the data distribution ratio of the target execution task in different central processing units is determined by using the physical access address, so that whether to perform data migration processing on the at least one target execution task is determined based on the data distribution ratio, so as to facilitate all data of the at least one target execution task to be executed in the same central processing unit, and therefore, a foundation is laid for achieving high performance. Moreover, the embodiment of the invention determines whether to perform data migration or not based on the data distribution proportion of the target execution task in different central processing units, compared with the existing mode of observing the cross-node access source by using the simulated page fault mode, the embodiment of the invention does not need to simulate the page fault abnormity, so that the problem of inaccurate information counted because the operating system maintains the data structure to identify whether the page fault is true or not is avoided, namely, compared with the existing mode of observing the cross-node access source by using the simulated page fault mode, the embodiment of the invention is more efficient and accurate.
Example two
Based on the method described in the first embodiment, the present embodiment provides a data migration condition and a specific data migration manner; in particular, the amount of the solvent to be used,
in an embodiment, the data distribution ratio specifically represents a distribution ratio of a total data amount of the target execution task executed in a first central processing unit of the at least two central processing units to a total data amount of the target execution task executed in other central processing units of the at least two central processing units; in practical application, each target execution task corresponds to one main central processing unit, for example, after the task processing device obtains the target execution task, a specific central processing unit is allocated to the target execution task based on load balancing and the like, and the specific central processing unit allocated by the task processing device to the target execution task is a main processing unit corresponding to the target execution task. Further, when there are a plurality of slave processors, the data distribution ratio may specifically represent a ratio of a total data amount of the target execution task running in the main processor (e.g., the first central processing unit) to a total data amount of the target execution task running in one of the slave processors, or a ratio of a total data amount of the target execution task running in the main processor (e.g., the first central processing unit) to a total data amount of the target execution tasks running in all of the slave processors. Therefore, a foundation is laid for determining the data migration strategy based on the data distribution proportion.
Further, after the data distribution proportion is determined, the task processing device further determines whether the data distribution proportion is smaller than a second threshold, if so, the data distribution proportion is smaller than 50%, and when the data distribution proportion is determined to be smaller than the second threshold, the task processing device performs data migration processing on the at least one target execution task. That is, the task processing device determines that the total data amount of the target execution task running in the main processor is small, and the total data amount running in the auxiliary processor is large, the data migration processing is executed, otherwise, the data migration processing is not executed.
Further, the task processing device may perform data migration processing in the following manner, specifically, migrate a memory access address where at least part of data in the at least one target execution task runs; or migrating the process corresponding to the at least one target execution task. That is, the task processing device may migrate a process or migrate a memory access address.
Here, in practical application, a hardware counter can be used to count the data distribution ratio, and the method has low interference to the system and is efficient and accurate. The embodiments of the present invention are further described in detail below by specific application examples; specifically, a memory access monitoring service is bound to each CPU, which programs the register mechanism of the CPU. Further, when the operating system is started, the memory access monitoring service is started (the service has a timer clock of 60s and can be closed or continued as required), and when the memory access monitoring service is started or continued, the PEBS register is programmed, wherein the sampling rate is 100Hz, the filtering condition is that the memory delay is greater than 3 clocks, and simultaneously the address of the sampled hardware buffer area is distributed. Here, when each sample arrives, the hardware will automatically interrupt, and the interrupt response fetches the state of each register, the memory access address, the CPU number, the physical page number, the memory node number where the interrupt occurs, and the process number associated with the memory access address from the hardware buffer. When the 60s timer interrupt occurs, counting the local and remote access proportion of each sampling physical page of each process according to the CPU number, the memory node number, the process number and the physical page number. If the ratio is less than 1: 1, that is, more remote accesses, migration processing is performed, such as process migration or memory migration.
EXAMPLE III
The present embodiment provides a task processing device, where the task processing device is connected or provided with a plurality of central processing units, for example, the task processing device is provided with or connected with a plurality of NUMA nodes, so that when the NUMA nodes execute tasks, the task management device can monitor the cross-node memory access condition, that is, monitor which processes or which memory areas frequently have cross-node memory access, and then perform migration processing on the cross-node accessed tasks by using a memory or a process migration framework, so as to control running data corresponding to one task to run in the same node, thereby laying a foundation for achieving high efficiency. Specifically, as shown in fig. 3, the task processing device includes:
the processor 31 is configured to acquire at least one target execution task and obtain a memory access address of the at least one target execution task; determining a physical access address of each target execution task based on the memory access address of each target execution task; wherein the target execution task is run by at least two different central processing units; the physical access address represents processor identifications of at least two central processing units running the target execution task;
the counter 32 is used for determining the data distribution proportion of the target execution task in different central processing units at least by using the processor identifier represented by the physical access address;
correspondingly, the processor 31 is further configured to determine whether to perform data migration processing on the at least one target execution task based on the data distribution ratio, so as to run all data of the at least one target execution task in the same central processing unit.
In a specific embodiment, the processor 31 does not perform node monitoring on all executed tasks, but performs targeted monitoring on a specific task, and specifically, the processor 31 is further configured to acquire at least one executed task, screen the at least one executed task, and screen out at least one target executed task that meets a preset rule; the preset rule represents that access delay data of the executed task is larger than a first threshold value; or the target parameters for representing the execution task meet the preset conditions. Here, the preset rule may specifically indicate that the access delay data for executing the task is greater than a first threshold, for example, greater than 3 clock; or, the preset rule represents that the target parameter of the executed task meets the preset condition, for example, the memory node number of the executed task represents a preset memory, or the process number of the executed task represents a preset process, in practical application, a process or a memory area where cross-node memory access frequently occurs may be used as the preset process, or the preset memory, and the target executed task is screened out in the above manner. Of course, in practical application, the screening may be performed in other manners according to practical requirements, and this embodiment does not limit this.
In another specific embodiment, the data distribution ratio represents a distribution ratio of a total data amount of the target execution task executed in a first central processing unit of the at least two central processing units to a total data amount of the target execution task executed in other central processing units of the at least two central processing units; in practical application, each target execution task corresponds to one main central processing unit, for example, after the task processing device obtains the target execution task, a specific central processing unit is allocated to the target execution task based on load balancing and the like, and the specific central processing unit allocated by the task processing device to the target execution task is a main processing unit corresponding to the target execution task. Further, when there are a plurality of slave processors, the data distribution ratio may specifically represent a ratio of a total data amount of the target execution task running in the main processor (e.g., the first central processing unit) to a total data amount of the target execution task running in one of the slave processors, or a ratio of a total data amount of the target execution task running in the main processor (e.g., the first central processing unit) to a total data amount of the target execution tasks running in all of the slave processors. Therefore, a foundation is laid for determining the data migration strategy based on the data distribution proportion.
Further, after determining the data distribution ratio, the processor 31 is further configured to determine whether the data distribution ratio is smaller than a second threshold, for example, smaller than 50%; and when the data migration is determined to be smaller than the second threshold value, performing data migration processing on the at least one target execution task. That is, the task processing device determines that the total data amount of the target execution task running in the main processor is small, and the total data amount running in the auxiliary processor is large, the data migration processing is executed, otherwise, the data migration processing is not executed.
In another embodiment, the processor 31 is further configured to migrate a memory access address where at least part of data in the at least one target execution task is executed; or migrating the process corresponding to the at least one target execution task.
In another embodiment, the physical access address may be determined in the following manner, and the processor 31 is further configured to determine a physical page identifier of each target execution task based on the memory access address of the target execution task; and determining the physical access address of each target execution task based on the physical page identification.
Here, in practical application, a hardware counter can be used to count the data distribution ratio, and the method has low interference to the system and is efficient and accurate. The embodiments of the present invention are further described in detail below by specific application examples; specifically, a memory access monitoring service is bound to each CPU, which programs the register mechanism of the CPU. Further, when the operating system is started, the memory access monitoring service is started (the service has a timer clock of 60s and can be closed or continued as required), and when the memory access monitoring service is started or continued, the PEBS register is programmed, wherein the sampling rate is 100Hz, the filtering condition is that the memory delay is greater than 3 clocks, and simultaneously the address of the sampled hardware buffer area is distributed. Here, when each sample arrives, the hardware will automatically interrupt, and the interrupt response fetches the state of each register, the memory access address, the CPU number, the physical page number, the memory node number where the interrupt occurs, and the process number associated with the memory access address from the hardware buffer. When the 60s timer interrupt occurs, counting the local and remote access proportion of each sampling physical page of each process according to the CPU number, the memory node number, the process number and the physical page number. If the ratio is less than 1: 1, that is, more remote accesses, migration processing is performed, such as process migration or memory migration.
Here, it should be noted that: the above description of the task processing device embodiment is similar to the above description of the method, and has the same advantageous effects as the method embodiment. For technical details that are not disclosed in the embodiment of the task processing device of the present invention, those skilled in the art should refer to the description of the embodiment of the method of the present invention to understand that, for the sake of brevity, detailed description is not repeated here.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of a hardware embodiment, a software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, optical storage, and the like) having computer-usable program code embodied therein.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
The foregoing is merely an example of the embodiments of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the embodiments of the present invention, and these modifications and decorations should also be regarded as the protection scope of the embodiments of the present invention.
Claims (6)
1. A method for processing a task, the method comprising:
collecting at least one execution task, screening the at least one execution task, and screening out at least one target execution task meeting a preset rule; the preset rule represents that the access delay data of the at least one executive task is larger than a first threshold value, or the target parameter representing the at least one executive task meets a preset condition;
obtaining a memory access address of the at least one target execution task;
determining a physical page identifier of each target execution task based on the memory access address of each target execution task;
determining a physical access address of each target execution task based on the physical page identifier; wherein the target execution task is run by at least two different central processing units; the physical access address represents processor identifications of at least two central processing units running a target execution task;
determining the data distribution proportion of the target execution task in different central processing units by using the processor identifier represented by the physical access address; judging whether the data distribution proportion is smaller than a second threshold value; and when the data is determined to be smaller than the second threshold value, performing data migration processing on the at least one target execution task so as to enable all data of the at least one target execution task to be operated in the same central processing unit.
2. The method of claim 1, wherein the data distribution ratio characterizes a distribution ratio of a total amount of data operated by a first central processing unit of the at least two central processing units to a total amount of data operated by other central processing units than the first central processing unit of the at least two central processing units for a target execution task.
3. The method according to claim 1 or 2, wherein the performing data migration processing on the at least one target execution task comprises:
migrating a memory access address operated by partial data in the at least one target execution task; alternatively, the first and second electrodes may be,
and migrating the process corresponding to the at least one target execution task.
4. A task processing apparatus, characterized in that the task processing apparatus comprises:
the processor is used for acquiring at least one execution task, screening the at least one execution task and screening out at least one target execution task meeting a preset rule; the preset rule represents that the access delay data of the at least one executive task is larger than a first threshold value, or the target parameter representing the at least one executive task meets a preset condition;
obtaining a memory access address of the at least one target execution task;
determining a physical page identifier of each target execution task based on the memory access address of each target execution task;
determining a physical access address of each target execution task based on the physical page identifier; wherein the target execution task is run by at least two different central processing units; the physical access address represents processor identifications of at least two central processing units running a target execution task;
the counter is used for determining the data distribution proportion of the target execution task in different central processing units by utilizing the processor identifier represented by the physical access address;
correspondingly, the processor is further configured to determine whether the data distribution ratio is smaller than a second threshold; and when the data is determined to be smaller than the second threshold value, performing data migration processing on the at least one target execution task so as to enable all data of the at least one target execution task to be operated in the same central processing unit.
5. The task processing device according to claim 4, wherein the data distribution ratio represents a distribution ratio of a total data amount of the target execution task executed by a first central processing unit of the at least two central processing units to a total data amount of the target execution task executed by other central processing units than the first central processing unit.
6. The task processing device according to claim 4 or 5, wherein the processor is further configured to migrate a memory access address where a part of data in the at least one target execution task is executed; or migrating the process corresponding to the at least one target execution task.
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