CN107168660B - Image processing cache system and method - Google Patents

Image processing cache system and method Download PDF

Info

Publication number
CN107168660B
CN107168660B CN201610128075.7A CN201610128075A CN107168660B CN 107168660 B CN107168660 B CN 107168660B CN 201610128075 A CN201610128075 A CN 201610128075A CN 107168660 B CN107168660 B CN 107168660B
Authority
CN
China
Prior art keywords
module
image
image processing
image data
prefetching command
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201610128075.7A
Other languages
Chinese (zh)
Other versions
CN107168660A (en
Inventor
孔欣
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chengdu Analog Circuit Technology Inc
Original Assignee
Chengdu Analog Circuit Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chengdu Analog Circuit Technology Inc filed Critical Chengdu Analog Circuit Technology Inc
Priority to CN201610128075.7A priority Critical patent/CN107168660B/en
Publication of CN107168660A publication Critical patent/CN107168660A/en
Application granted granted Critical
Publication of CN107168660B publication Critical patent/CN107168660B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G06F3/1407General aspects irrespective of display type, e.g. determination of decimal point position, display with fixed or driving decimal point, suppression of non-significant zeros
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00General purpose image data processing
    • G06T1/60Memory management
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2200/00Indexing scheme for image data processing or generation, in general
    • G06T2200/28Indexing scheme for image data processing or generation, in general involving image processing hardware

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • General Engineering & Computer Science (AREA)
  • Image Processing (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Image Input (AREA)

Abstract

The invention discloses an image processing cache system, which comprises a reading control module, an image processing module connected with the reading control module, an output cache module connected with the image processing module and a screen driving module connected with the output cache module, wherein the reading control module judges whether an image data prefetching command exists at the output end of a screen, if so, the image data is processed according to the image data prefetching command and through the image processing module and then written into the output cache module, and the output cache module outputs the processed image data to the screen driving module according to the image data prefetching command. The invention also discloses an image processing caching method. The invention reduces the required cache memory units, reduces the unstable time sequence when data is fetched, and enhances the cache capacity under the condition of not increasing the required data bandwidth.

Description

Image processing cache system and method
Technical Field
The present invention relates to the field of image processing, and in particular, to an image processing cache system and method.
Background
In the image processing process, it is often necessary to perform superposition operation on multiple image layers, in the process of outputting an image to a screen, it is necessary to ensure that the output image data is continuous and complete, and the time sequence of the original image data read from a storage space to an image processing unit may be indefinite, especially when there are multiple masters capable of operating the storage space, so that it is necessary to pre-process a part of image data read from the image processing unit before the output starts, so as to smooth out the unstable time sequence of the acquired data.
In the prior art, the method for preprocessing image data is generally adopted, wherein data of all layers needing superposition operation are respectively read into corresponding caches in advance, the length of the pre-reading is possibly two rows (during zooming operation), one row or half row is needed to be output for image processing, and when the resolution of the image is needed to be higher and higher, the needed data caches are increased in multiple, so that the cost of a chip is greatly increased.
Disclosure of Invention
The invention aims to overcome the defects of the prior art, and provides an image processing cache system and method, which can reduce the required cache storage units, reduce the time sequence instability condition when data is fetched, and enhance the cache capacity under the condition of not increasing the required data bandwidth.
The aim of the invention is realized by the following technical scheme: an image processing cache system, characterized in that: the image processing cache system comprises a reading control module, an image processing module connected with the reading control module, an output cache module connected with the image processing module and a screen driving module connected with the output cache module, wherein the reading control module judges whether an image data prefetching command exists at the output end of the screen, if so, the image data is processed according to the image data prefetching command and through the image processing module and then written into the output cache module, and the output cache module outputs the processed image data to the screen driving module according to the image data prefetching command.
The read control module comprises an access sub-module for judging whether the image data pre-fetching command exists or not and reading line data according to the image data pre-fetching command.
The image processing module comprises a parameter setting sub-module for setting layer parameters, a judging sub-module for judging whether superposition operation exists in the image data prefetching command and whether the read data is the last line, and an operation control sub-module for carrying out image operation processing according to the image data prefetching command.
The layer parameters comprise the maximum superposition layer number of image processing, the image data address and the image processing mode.
The image processing mode comprises superposition operation, scaling operation and brightness adjustment operation, and the image operation processing comprises image superposition operation processing and image scaling operation processing.
An image processing caching method comprises the following steps:
Setting layer parameters through a parameter setting submodule of the image processing module;
judging whether an image data prefetching command exists at the output end of the screen through a reading control module, and if so, entering the next step; if not, continuing to execute the step;
Judging whether superposition operation exists in the image data prefetching command or not through a judging submodule of the image processing module, if so, reading all the data needing superposition layers through an access submodule of the reading control module, and entering the next step; if not, reading the data of the display layer to be displayed through the access sub-module of the reading control module, and entering the next step;
performing image operation processing through an operation control sub-module of the image processing module according to the image data prefetching command;
the image processing module processes the image data and then writes the processed image data into the output buffer module;
Outputting the processed image data to a screen driving module according to the image data prefetching command through the output buffer module; meanwhile, judging whether the read data is the last line or not through a judging submodule of the image processing module, and if so, entering the next step; and
And judging whether an end action command exists at the screen output end through the reading control module, and if so, ending the action.
The layer parameters comprise the maximum superposition layer number of image processing, the image data address and the image processing mode.
The image processing mode comprises superposition operation, scaling operation and brightness adjustment operation, and the image operation processing comprises image superposition operation processing and image scaling operation processing.
The beneficial effects of the invention are as follows: the required cache memory units are reduced, the time sequence instability condition during data access can be reduced, and the cache capacity is enhanced under the condition that the required data bandwidth is not increased.
Drawings
FIG. 1 is a system architecture diagram of an image processing cache system of the present invention;
FIG. 2 is a flow chart of an image processing caching method according to the present invention.
Detailed Description
The technical solution of the present invention will be described in further detail with reference to the accompanying drawings, but the scope of the present invention is not limited to the following description.
As shown in fig. 1, fig. 1 is a system architecture diagram of an image processing cache system according to the present invention, where the image processing cache system includes a read control module, an image processing module connected to the read control module, an output cache module connected to the image processing module, and a screen driving module connected to the output cache module, where the read control module determines whether an image data prefetching command exists at an output end of the screen, if so, the image data is processed by the image processing module according to the image data prefetching command and then written into the output cache module, and the output cache module outputs the processed image data to the screen driving module according to the image data prefetching command.
The image processing module comprises a parameter setting sub-module, a judging sub-module and an operation control sub-module, wherein the parameter setting sub-module is used for setting image layer parameters including the maximum superposition layer number of the image data, the image data address and the image processing mode (including superposition operation, scaling operation, brightness adjusting operation and the like), the judging sub-module is used for judging whether superposition operation exists in the image data pre-fetching command and whether the read line data is the last line, and the operation control sub-module is used for carrying out image superposition, image scaling and the like according to the image data pre-fetching command.
As shown in fig. 2, fig. 2 is a flowchart of a method of the present invention for image processing and caching, and the method of the present invention includes the following steps:
step one, the action starts.
And step two, setting layer parameters including the maximum image processing superposition layer number, the image data address and the image processing mode (including superposition operation, scaling operation, brightness adjustment operation and the like) through a parameter setting sub-module of the image processing module.
Judging whether the screen output end has an image data prefetching command or not through a reading control module, namely judging whether the screen output end has a requirement for display or not, and if so, entering the next step; if not, the step is continued.
Judging whether superposition operation exists in the image data pre-fetching command or not through a judging sub-module of the image processing module, if so, reading all the data needing superposition layers through an access sub-module of the reading control module, and entering the next step; if not, reading the data of the display layer to be displayed through the access sub-module of the reading control module, and entering the next step.
And fifthly, performing image operation processing including operation processing such as image superposition operation and image scaling operation through an operation control sub-module of the image processing module according to the image data pre-fetching command.
And step six, processing the image data through the image processing module and writing the processed image data into the output buffer module.
Step seven, outputting the processed image data to a screen driving module through an output buffer module according to the image data pre-fetching command; meanwhile, judging whether the read data is the last line or not through a judging submodule of the image processing module, and if so, entering the next step; if not, returning to the step four.
Step eight, judging whether an end action command exists at the screen output end through a reading control module, and if so, ending the action; if not, returning to the step two.
Compared with the prior art, the image processing caching system and method have the following advantages: 1. each layer no longer needs to be cached for a complete line, so that the required cache storage units are reduced to be close to 1/n (n is the maximum superposition layer number); 2. the pre-cached data is of a fixed length (1 line or 2 lines), so that the situation that the actual output cached data is reduced possibly caused by scaling operation in the prior art is avoided, and the time sequence instability condition during data fetching can be reduced; 3. the buffering capacity is enhanced without increasing the required data bandwidth.
In summary, the image processing cache system and method of the present invention reduce the required cache memory units, and can reduce the unstable timing when fetching data, and enhance the cache capacity without increasing the required data bandwidth.

Claims (6)

1. An image processing cache system, characterized in that: the image processing cache system comprises a reading control module, an image processing module connected with the reading control module, an output cache module connected with the image processing module and a screen driving module connected with the output cache module, wherein the reading control module judges whether an image data prefetching command exists at the output end of the screen, if so, the image data is processed according to the image data prefetching command and through the image processing module and then written into the output cache module, and the output cache module outputs the processed image data to the screen driving module according to the image data prefetching command;
the reading control module comprises an access sub-module for judging whether the image data prefetching command exists or not and reading line data according to the image data prefetching command;
The image processing module comprises a parameter setting sub-module for setting layer parameters, a judging sub-module for judging whether superposition operation exists in the image data prefetching command and whether the read data is the last line, and an operation control sub-module for carrying out image operation processing according to the image data prefetching command.
2. The image processing caching system of claim 1, wherein: the layer parameters comprise the maximum superposition layer number of image processing, the image data address and the image processing mode.
3. The image processing caching system of claim 2, wherein: the image processing mode comprises superposition operation, scaling operation and brightness adjustment operation, and the image operation processing comprises image superposition operation processing and image scaling operation processing.
4. An image processing caching method comprises the following steps:
Setting layer parameters through a parameter setting submodule of the image processing module;
judging whether an image data prefetching command exists at the output end of the screen through a reading control module, and if so, entering the next step; if not, continuing to execute the step;
Judging whether superposition operation exists in the image data prefetching command or not through a judging submodule of the image processing module, if so, reading all the data needing superposition layers through an access submodule of the reading control module, and entering the next step; if not, reading the data of the display layer to be displayed through the access sub-module of the reading control module, and entering the next step;
performing image operation processing through an operation control sub-module of the image processing module according to the image data prefetching command;
the image processing module processes the image data and then writes the processed image data into the output buffer module;
Outputting the processed image data to a screen driving module according to the image data prefetching command through the output buffer module; meanwhile, judging whether the read data is the last line or not through a judging submodule of the image processing module, and if so, entering the next step; and
And judging whether an end action command exists at the screen output end through the reading control module, and if so, ending the action.
5. The image processing caching method according to claim 4, wherein: the layer parameters comprise the maximum superposition layer number of image processing, the image data address and the image processing mode.
6. The image processing caching method according to claim 5, wherein: the image processing mode comprises superposition operation, scaling operation and brightness adjustment operation, and the image operation processing comprises image superposition operation processing and image scaling operation processing.
CN201610128075.7A 2016-03-08 2016-03-08 Image processing cache system and method Active CN107168660B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201610128075.7A CN107168660B (en) 2016-03-08 2016-03-08 Image processing cache system and method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201610128075.7A CN107168660B (en) 2016-03-08 2016-03-08 Image processing cache system and method

Publications (2)

Publication Number Publication Date
CN107168660A CN107168660A (en) 2017-09-15
CN107168660B true CN107168660B (en) 2024-05-10

Family

ID=59849826

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201610128075.7A Active CN107168660B (en) 2016-03-08 2016-03-08 Image processing cache system and method

Country Status (1)

Country Link
CN (1) CN107168660B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108009987B (en) * 2017-12-01 2021-08-20 中国科学院长春光学精密机械与物理研究所 Image zooming device and zooming method

Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1731374A (en) * 2005-08-25 2006-02-08 北京中星微电子有限公司 A cache prefetch module and method thereof
CN1757018A (en) * 2003-03-06 2006-04-05 皇家飞利浦电子股份有限公司 Data processing system with prefetching means
US7028096B1 (en) * 1999-09-14 2006-04-11 Streaming21, Inc. Method and apparatus for caching for streaming data
CN101022551A (en) * 2007-03-15 2007-08-22 上海交通大学 Motion compensating module pixel prefetching device in AVS video hardware decoder
CN101140658A (en) * 2007-10-11 2008-03-12 上海交通大学 Data pre-fetching system in video processing
CN101321240A (en) * 2008-06-25 2008-12-10 华为技术有限公司 Method and device for multi-drawing layer stacking
CN101488333A (en) * 2009-01-22 2009-07-22 中兴通讯股份有限公司 Image display device and display outputting method thereof
CN103077129A (en) * 2012-12-31 2013-05-01 上海算芯微电子有限公司 Information processing method and device
CN103875253A (en) * 2012-08-21 2014-06-18 索尼公司 Information processing device, information processing method, program and server device
CN105049781A (en) * 2014-12-27 2015-11-11 中航华东光电(上海)有限公司 Image processing system based on Field Programmable Gate Array (FPGA)
CN205451035U (en) * 2016-03-08 2016-08-10 成都锐成芯微科技有限责任公司 Image processing buffer memory system

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005013136A1 (en) * 2003-08-04 2005-02-10 Mitsubishi Denki Kabushiki Kaisha Video information device and module unit
US8797233B2 (en) * 2008-08-20 2014-08-05 The Regents Of The University Of California Systems, methods, and devices for dynamic management of data streams updating displays

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7028096B1 (en) * 1999-09-14 2006-04-11 Streaming21, Inc. Method and apparatus for caching for streaming data
CN1757018A (en) * 2003-03-06 2006-04-05 皇家飞利浦电子股份有限公司 Data processing system with prefetching means
CN1731374A (en) * 2005-08-25 2006-02-08 北京中星微电子有限公司 A cache prefetch module and method thereof
CN101022551A (en) * 2007-03-15 2007-08-22 上海交通大学 Motion compensating module pixel prefetching device in AVS video hardware decoder
CN101140658A (en) * 2007-10-11 2008-03-12 上海交通大学 Data pre-fetching system in video processing
CN101321240A (en) * 2008-06-25 2008-12-10 华为技术有限公司 Method and device for multi-drawing layer stacking
CN101488333A (en) * 2009-01-22 2009-07-22 中兴通讯股份有限公司 Image display device and display outputting method thereof
CN103875253A (en) * 2012-08-21 2014-06-18 索尼公司 Information processing device, information processing method, program and server device
CN103077129A (en) * 2012-12-31 2013-05-01 上海算芯微电子有限公司 Information processing method and device
CN105049781A (en) * 2014-12-27 2015-11-11 中航华东光电(上海)有限公司 Image processing system based on Field Programmable Gate Array (FPGA)
CN205451035U (en) * 2016-03-08 2016-08-10 成都锐成芯微科技有限责任公司 Image processing buffer memory system

Also Published As

Publication number Publication date
CN107168660A (en) 2017-09-15

Similar Documents

Publication Publication Date Title
JP5351145B2 (en) Memory control device, memory system, semiconductor integrated circuit, and memory control method
US20130101275A1 (en) Video Memory Having Internal Programmable Scanning Element
CN110958362A (en) Image correction system and method based on block table look-up
US10347220B1 (en) Data compression and decompression method for DeMura table
WO2022016925A1 (en) Neural network computing device
JP2016502211A (en) Image memory access optimization
US8102399B2 (en) Method and device for processing image data stored in a frame buffer
US20080036764A1 (en) Method and apparatus for processing computer graphics data
CN110322904B (en) Compressed image information reading control method and device
US20160373757A1 (en) Analytics Assisted Encoding
US7061496B2 (en) Image data processing system and image data reading and writing method
US6917363B2 (en) Method and system for processing two-dimensional image data
US20120147023A1 (en) Caching apparatus and method for video motion estimation and compensation
CN107168660B (en) Image processing cache system and method
US10580107B2 (en) Automatic hardware ZLW insertion for IPU image streams
US8732384B1 (en) Method and apparatus for memory access
US20130278775A1 (en) Multiple Stream Processing for Video Analytics and Encoding
US8350865B2 (en) Method and system for efficiently organizing data in memory
US11972504B2 (en) Method and system for overlapping sliding window segmentation of image based on FPGA
JP5475859B2 (en) Image display drive device
JP6693215B2 (en) Image processing device
US20130120419A1 (en) Memory Controller for Video Analytics and Encoding
JP2021090124A (en) Image processing apparatus and method for processing image processing apparatus
CN116974475A (en) Data caching method and device and electronic equipment
US8976200B1 (en) Display controller for rotation of image data

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant