CN107168098B - Electronic countermeasure simulation system - Google Patents
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- CN107168098B CN107168098B CN201710335661.3A CN201710335661A CN107168098B CN 107168098 B CN107168098 B CN 107168098B CN 201710335661 A CN201710335661 A CN 201710335661A CN 107168098 B CN107168098 B CN 107168098B
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Abstract
The invention provides an electronic countermeasure simulation system, which comprises a signal generation module, wherein the signal generation module is used for generating a pulse description word data stream according to received scene parameters and outputting the pulse description word data stream for signal simulation. By using the pulse description words to describe the basic characteristics of the radio frequency pulses, the complex and changeable battlefield electromagnetic environment can be fully described, including the characteristics of the electromagnetic environment in the aspects of time domain, frequency domain, space domain and the like, and the requirement of electronic countermeasure simulation on simulation of the complex battlefield electromagnetic environment is met.
Description
Technical Field
The invention relates to the technical field of simulation, in particular to an electronic countermeasure simulation system.
Background
The rapid development of science and technology has greatly changed the appearance of modern battlefields, wherein electronic stations, namely electronic countermeasure, are commonly known in the modern war as an important combat means. Electronic countermeasures and actions are taken by two opposing parties to weaken and destroy the use efficiency of the electronic equipment of the opposing party and ensure the performance of the electronic equipment of the opposing party. Because the evaluation consumption of the actual combat drilling on the electronic combat is huge, simulation technology is generally adopted to perform simulation tests on the electronic combat.
An electronic countermeasure simulation system in the prior art mainly comprises a microwave darkroom, a radar signal environment simulator, a radar simulator, a radio frequency signal generation system, a simulation computer network and software, a display control system, a rotary table, a special instrument and meter, and a system communication device. The radar signal simulator simulates and generates microwave signals of all radars according to all radar transmitting signal parameters set by the battle conditions.
In the prior art, the design methods of radar signal analog sources are mainly divided into two types: the first is a signal analog source design based on a digital frequency storage technology, and the second is a signal analog source design based on a direct digital synthesis technology. The analog source designed by the first technology has strong universality, but the hardware complexity is high, and the cost is high; the simulation source hardware designed by the second technology is simple and low in cost, but has poor universality, is difficult to simulate a complex radar signal, and often only simulates a simple point target echo signal.
In modern battlefields, due to the use of a large number of radars, missile weapons and communication equipment, the battlefield electromagnetic environment is extremely complex, and a large number of battlefield electromagnetic environments exist in a small range. Therefore, the method has low efficiency and inaccuracy in describing the radar radiation signal set, and does not meet the requirement of an electronic countermeasure simulation system.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, the present invention provides an electronic countermeasure simulation system.
The electronic countermeasure simulation system comprises a signal generation module, wherein the signal generation module is used for generating a pulse description word data stream according to received scene parameters and outputting the pulse description word data stream for signal simulation.
Wherein the system further comprises: the device comprises a control module and a signal simulation module; the control module is used for generating the scene parameters according to the received setting instructions and sending the scene parameters to the signal generating module; the signal simulation module is used for simulating and outputting a radio frequency analog signal according to the pulse description word data stream received from the signal generation module.
The signal generation module comprises a description word unit, a mixing and sorting unit and an overlapping processing unit; the description word unit is used for generating a pulse description word according to the scene parameters and sending the pulse description word to the mixing and sorting unit; the mixed sequencing unit is used for sequencing the pulse description words according to the arrival time of the leading edge of the pulse, acquiring a pulse description word sequence and sending the pulse description word sequence to the overlapping processing unit; the overlapping processing unit is used for discarding or merging the overlapping pulses in the pulse description word sequence, acquiring the pulse description word data stream, and sending the pulse description word data stream to the signal simulation module.
The signal simulation module comprises an intermediate frequency simulation unit and a radio frequency simulation unit; the intermediate frequency analog unit is used for carrying out frequency conversion processing on the pulse descriptor data stream, acquiring an intermediate frequency analog signal and sending the intermediate frequency analog signal to the radio frequency analog unit; the radio frequency simulation unit is used for carrying out up-conversion processing on the intermediate frequency simulation signal, acquiring a radio frequency simulation signal and injecting the radio frequency simulation signal into the radar receiver through an injection mode.
The intermediate frequency analog unit is also used for outputting a pulse carrier frequency code and a pulse amplitude code to the radio frequency analog unit so as to adjust the frequency point and the amplitude of the radio frequency analog signal.
Wherein, the intermediate frequency analog unit is further configured to: and after the time sequence condition is preset, outputting the radar type number, the pulse carrier frequency code, the pulse arrival azimuth code and the pulse amplitude code which are latched before the preset time sequence condition to the radio frequency simulation unit.
The intermediate frequency simulation unit is realized by an intermediate frequency data playback card, and the intermediate frequency data playback card comprises a DSP module, an FPGA module and a DDS module; the DSP module is connected with the signal generating module and is used for receiving data, data interrupt management and data caching; the FPGA module is connected with the DSP module and is used for clock management, logic control and interpolation filtering processing; the DDS module is respectively connected with the FPGA module and the DSP module and is used for providing digital carrier signals for quadrature modulation.
The DSP module comprises a waveform generation unit, a data cache unit, a PCI interface and a configuration control unit; the PCI interface is respectively connected with a PCI bus, the data cache unit and the configuration control unit, wherein the control module accesses an address space inside the DSP module and loads a program to the DSP module through the PCI interface, and the DSP module accesses an external PCI storage space through the PCI interface; the waveform generation unit and the data cache unit are respectively connected with the FPGA module and used for acquiring signal waveform information according to the data sent by the control module and sending the signal waveform information and the data information to the FPGA module for interpolation and filtering; the configuration control unit is connected with the DDS module and is used for carrying out interrupt management on the operation in the DDS module according to the data sent by the control module.
The FPGA module comprises a logic control unit, an address decoding unit, an interpolation filtering unit, an FIFO unit and a DCM unit; the interpolation filtering unit is respectively connected with the DSP module and the FIFO unit, and is used for carrying out high-speed interpolation and filtering processing on the data sent by the DSP module and sending the processed data to the DDS module through the FIFO unit; the DCM unit is connected with the DDS module and is used for providing a reference clock for the DDS module to perform clock management.
The DDS module comprises a reverse CIC filter, a half-band filter, a CIC filter, a D/A unit, a function unit and a frequency multiplication unit; the reverse CIC filter is connected with the CIC filter through the half-band filter and is used for forming an interpolation filter to perform a partial interpolation function; the reverse CIC filter is used for compensating the passband attenuation of the CIC filter so as to ensure flat amplitude response in a Nyquist bandwidth; the frequency multiplication unit is connected with the FPGA unit and is used for performing frequency multiplication processing on a reference clock to obtain a system clock, and the system clock is a working clock of the DDS module.
The electronic countermeasure simulation system provided by the invention can fully describe the complex and changeable battlefield electromagnetic environment by using the pulse description words to describe the basic characteristics of the radio frequency pulse, and can meet the requirement of electronic countermeasure simulation on simulating the complex battlefield electromagnetic environment, wherein the characteristics of the electromagnetic environment in the aspects of time domain, frequency domain, space domain and the like.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and those skilled in the art can also obtain other drawings according to the drawings without creative efforts.
FIG. 1 is a block diagram of an electronic countermeasure simulation system provided by an embodiment of the invention;
fig. 2 is a block diagram of a signal generation module according to an embodiment of the present invention;
FIG. 3 is a block diagram of a signal simulation module according to an embodiment of the present invention;
fig. 4 is a block diagram of a design of a radio frequency analog unit according to an embodiment of the present invention;
fig. 5 is a block diagram of a structure for generating an intermediate frequency analog signal in real time by PDW data according to an embodiment of the present invention;
fig. 6 is a block diagram of an implementation of an intermediate frequency analog unit provided by an embodiment of the present invention;
FIG. 7 is a block diagram of a hardware implementation of a PCI data playback card according to an embodiment of the present invention;
FIG. 8 is a block diagram of PCI data playback card implementation logic provided in accordance with an embodiment of the present invention;
fig. 9 is a block diagram of an implementation of a data playback function provided in an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some embodiments, but not all embodiments, of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The embodiment of the invention provides an electronic countermeasure simulation system, which comprises a signal generation module, wherein the signal generation module is used for generating a pulse description word data stream according to received scene parameters and outputting the pulse description word data stream for signal simulation.
The scene parameters are parameters describing the electromagnetic environment of a battlefield, the pulse signal module can simulate the pulse signals according to the scene parameters, and the pulse signals obtained through simulation are pulse signals expected in simulation.
The battlefield electromagnetic environment refers to the collection of all radar radiation signals reaching the electronic warfare equipment, and the receiver of the electronic warfare equipment receives pulse streams formed by the radar signals. Pulse Description Word (PDW) may be used to Describe the basic characteristics of rf pulses. The Pulse Description Word (PDW) generally includes the following: pulse carrier frequency (RF), Pulse Width (PW), pulse leading edge arrival Time (TOA), pulse arrival angle (DOA), and Pulse Amplitude (PA). For convenience of description, a pulse description word is hereinafter represented by PDW.
In addition to the above parameters, the PDW considers the Pulse Repetition Interval (PRI), which is the pulse interval between any two adjacent pulses, and which exhibits regularity when accumulated over a long period of time. Therefore, PRI is often used in PDW instead of TOA to examine the temporal regularity of the pulses. Thus, in an embodiment of the present invention, the PDW model may be built using the five parameters described above (RF, PW, PRI, DOA, and PA). After the scene parameters are input into the PDW model, a PDW can be obtained; after the scene parameters corresponding to different radars are input into the PDW model, a PDW data stream containing a plurality of PDWs can be obtained.
The electronic countermeasure simulation system provided by the embodiment of the invention can fully describe the complex and changeable battlefield electromagnetic environment by using the pulse description words to describe the basic characteristics of the radio frequency pulse, and can meet the requirement of electronic countermeasure simulation on simulation of the complex battlefield electromagnetic environment, wherein the characteristics of the electromagnetic environment in the aspects of time domain, frequency domain, space domain and the like.
Fig. 1 is a block diagram of an electronic countermeasure simulation system according to an embodiment of the present invention, as shown in fig. 1, based on the above embodiment, the system further includes: a control module 101 and a signal simulation module 103; the control module 101 is configured to generate the scene parameter according to the received setting instruction, and send the scene parameter to the signal generating module 102; the signal simulation module 103 is configured to simulate and output a radio frequency analog signal according to the pulse description word data stream received from the signal generation module 102.
The control module 101 is a control and operation center of the radar simulation system, and is a channel through which the simulation system interacts with a user or an upper system. The control module 101 is mainly used for receiving a setting instruction of a user for the simulation system, wherein the setting instruction reflects a pulse expected by the user. The control module 101 is connected to the signal simulation module 102, and transmits scene parameters specified by settings to the signal generation module 102.
In addition to the above functions, the control module 101 includes the following functions: receiving a control instruction and data of an upper control computer; setting a working mode of the radar simulation system; completing the binding and downloading of parameters such as signal waveform, carrier frequency, intra-pulse modulation and the like, and simulating various signal waveforms of the radar; setting a motion track of a tracked target and selecting a signal waveform of a tracking beam, downloading, and simulating various working modes of radar such as searching, tracking, searching and tracking; performing state query and fault check on each signal generation unit and each control unit of the radar simulation system in real time, and displaying the state of each unit on an interface; and receiving and displaying respective working states uploaded by the subsystems through a network, and uploading working parameters and states of the radar simulation system to an upper control center in real time.
The signal simulation module 103 is connected to the signal generation module 102, and simulates and generates a radio frequency analog signal according to the PDW data stream received from the signal generation module 102, and transmits the radio frequency analog signal.
Fig. 2 is a block diagram of a signal generation module according to an embodiment of the present invention, and as shown in fig. 2, based on the embodiment, the signal generation module includes: a description word unit 201, a mixing sorting unit 202, and an overlap processing unit 203; the descriptor unit 201 is configured to generate a pulse descriptor according to the scene parameter, and send the pulse descriptor to the mixing and sorting unit 202; the hybrid sorting unit 202 is configured to sort the pulse description words according to arrival times of pulse leading edges, obtain a pulse description word sequence, and send the pulse description word sequence to the overlap processing unit 203; the overlap processing unit 203 is configured to discard or combine the pulses overlapped in the pulse description word sequence, obtain the pulse description word data stream, and send the pulse description word data stream to the signal simulation module.
In the mixed sorting unit 202, each PDW corresponds to a pulse of one radar, so that PDWs of multiple radars can be sorted sequentially according to the TOA sequence, and a group of ordered PDW data is formed. For the overlay processing unit 203, a driver structure may be called to transfer the PDW data stream into the hardware buffer of the signal simulation module.
In the signal generation module, a corresponding PDW may be generated from the radar signal form. Radar signal waveform types may include conventional pulse signals, frequency agile signals, re-frequency stagger signals, re-frequency slide signals, chirp signals, non-chirp signals, phase encoded signals, and combination signals. For example, the repetition frequency jitter signal is a signal that remains unchanged in the frequency domain, has a consistent pulse width, and randomly jumps within a certain range in the repetition period. The repetition frequency jittered signal is divided into inter-pulse jitters and burst jitters. Inter-pulse jitter is a periodic random jitter whose value repeats between each pulse. The pulse group jitter refers to the random jitter between a group of pulses (more than or equal to 2), and the repetition period in the pulse group is kept unchanged. A corresponding PDW data stream may be generated from the radar signal form.
In generating the PDW data stream, the antenna direction pattern form also needs to be considered. The radar antenna is an entrance for the whole radar and the external space to be mutually communicated, and is an important component of the radar. The high-frequency oscillation energy generated by the transmitter is radiated to the space in the form of electromagnetic waves through the antenna, and the echo of the target is collected by the antenna and is sent to the receiver and the terminal equipment for processing. Therefore, certain characteristics of the antenna are important for a radar, mainly the antenna operating frequency, the beam width, and the antenna gain. The directional diagram is an important parameter of the radar antenna, and the form of the directional diagram should be known specifically in addition to the horizontal beam width and the vertical beam width of the antenna, so that the embodiment of the invention can provide 3 typical two-dimensional directional diagrams (gaussian type, cosine type and sinc function type) for a user to select. And respectively calculating azimuth pattern attenuation factors and pitch pattern attenuation factors according to the angle of the target deviating from the axis of the antenna.
Fig. 3 is a block diagram of a signal simulation module according to an embodiment of the present invention, as shown in fig. 3, the signal simulation module includes an intermediate frequency simulation unit 301 and a radio frequency simulation unit 302 according to the above embodiment; the intermediate frequency analog unit 301 is configured to perform frequency conversion processing on the pulse descriptor data stream, acquire an intermediate frequency analog signal, and send the intermediate frequency analog signal to the radio frequency analog unit 302; the radio frequency simulation unit 302 is configured to perform up-conversion processing on the intermediate frequency analog signal, acquire a radio frequency analog signal, and inject the radio frequency analog signal into a radar receiver in an injection mode.
The radio frequency analog unit 302 mainly performs up-conversion on the intermediate frequency analog signal to a radio frequency signal, and the working frequency band covers P, L, C, S and Ka, etc., and is injected into the radar receiver through an injection mode.
Fig. 4 is a design block diagram of the radio frequency analog unit according to the embodiment of the present invention, and as shown in fig. 4, the radio frequency analog unit 301 is described by taking simulation of main airborne and shipboard radar signals (P band, 230-1000 MHz) of the aircraft carrier battle group as an example, but the scope of the embodiment of the present invention is not limited thereto. The radio frequency analog unit mainly considers the design of a P wave band (230-1000 MHz). The other frequency bands are designed similarly, and the different frequency bands can be switched by the microwave switch. The P-band up-conversion has the following specific indexes, namely the input frequency of an intermediate frequency signal: 75 MHz; radio frequency output frequency: 230MHz to 1000 MHz; instantaneous bandwidth of signal: 50 MHz; gain: 30dB plus or minus 2.5 dB; controllable attenuation: 30dB, 1dB step; radio frequency output amplitude: -20dBm to 10 dBm; intermediate frequency input signal dynamic range: -20 dBm- +10 dBm; frequency stepping: 1 Hz; output P-1: not less than 13 dBm; stray suppression: not less than 50 dBc; harmonic suppression: not less than 50 dBc; phase noise: less than or equal to-80 dBc/Hz @1 KHz; third order intermodulation products: at an output power of-10 dBm, 50dBc was suppressed.
Based on the above embodiment, the intermediate frequency analog unit is further configured to output the pulse carrier frequency code and the pulse amplitude code to the radio frequency analog unit to adjust the frequency point and the amplitude of the radio frequency analog signal.
Based on the above embodiment, the intermediate frequency analog unit is further configured to: and after the time sequence condition is preset, outputting the radar type number, the pulse carrier frequency code, the pulse arrival azimuth code and the pulse amplitude code which are latched before the preset time sequence condition to the radio frequency simulation unit.
Fig. 5 is a block diagram of generating an intermediate frequency analog signal in real time by PDW data according to an embodiment of the present invention, and as shown in fig. 5, a hardware system of a radar intermediate frequency analog unit plays a role of a slave of a whole signal analog module, and mainly performs the following functions: before the simulation starts, PDW data transmitted by simulation software (a host) is stored into an address corresponding to the self expansion memory; after the simulation is started, the slave machines independently work under the control of relevant parameters set by the host machine. A pulse generator in the hardware system generates radio frequency pulses; simultaneously latching other code element data (a radar type number RC, a pulse radio frequency carrier frequency code RF, a pulse arrival azimuth code DOA and a pulse amplitude control code PA) of the PDW, and outputting the data and an intermediate frequency pulse signal together after a certain time sequence relation is met; the simulator hardware board card outputs an RF code and a PA code and controls the frequency point and the amplitude of a radio frequency signal generated by the frequency synthesis source.
Based on the embodiment, the intermediate frequency simulation unit is realized by an intermediate frequency data playback card, and the intermediate frequency data playback card comprises a DSP module, an FPGA module and a DDS module; the DSP module is connected with the signal generating module and is used for receiving data, data interrupt management and data caching; the FPGA module is connected with the DSP module and is used for clock management, logic control and interpolation filtering processing; the DDS module is respectively connected with the FPGA module and the DSP module and is used for providing digital carrier signals for quadrature modulation.
The intermediate frequency signal analog unit can be realized by a D/A intermediate frequency data playback card. And the D/A intermediate frequency data playback card completes digital up-conversion and data playback of the baseband signal to generate an intermediate frequency analog signal. From the perspective of signal sampling, any waveform is composed of a sequence of numbers, provided that the nyquist sampling theorem is satisfied. Therefore, a waveform can be reproduced as long as it is described by the D/a converter using the corresponding sampling points.
Fig. 6 is a block diagram of an embodiment of an intermediate frequency analog unit according to an embodiment of the present invention, and as shown in fig. 6, data for generating an intermediate frequency analog signal is baseband complex sequence data, which may be from a storage medium or generated by an algorithm. And the data is converted into uniform playback equipment data, and then high-speed interpolation and quadrature modulation are carried out, so that signal waveform generation at any baud rate can be realized. The level of the output signal is adjusted through the gain control module, and the carrier frequency of the output signal is adjusted through the frequency adjusting module. After D/A and analog filtering, intermediate frequency analog signals of any frequency are generated.
Fig. 8 is a block diagram of a PCI data playback card implementation logic provided in an embodiment of the present invention, and fig. 9 is a block diagram of a data playback function implementation scheme (taking a single channel as an example) provided in an embodiment of the present invention, and as shown in fig. 8 and fig. 9, a specific hardware design scheme may adopt a DDS + FPGA + DSP structure, and fully utilizes characteristics of the DDS structure, the FPGA structure, and the DSP structure in data operation and processing to achieve advantage complementation.
Fig. 7 is a schematic diagram of a hardware implementation structure of a PCI data playback card according to an embodiment of the present invention, as shown in fig. 7, where the DUC and the D/a portion may use an AD9957 chip, which integrates digital up-conversion and DAC, the sampling rate is 1GS/s, and the power consumption is reduced by more than 50% compared with other direct frequency synthesizers, and a modulation signal with an intermediate frequency of 400MHz can be generated, and the spurious-free dynamic range reaches 80 dB. It has three modes of operation: quadrature modulation mode, interpolation DAC mode, and single tone mode. When the device works in a quadrature modulation mode, IQ two paths multiplex a parallel data input port with 18 bits in a time division mode, and one I data and one Q data are repeated continuously.
Based on the above embodiment, the DSP module includes a waveform generation unit, a data cache unit, a PCI interface, and a configuration control unit; the PCI interface is respectively connected with a PCI bus, the data cache unit and the configuration control unit, wherein the control module accesses an address space inside the DSP module and loads a program to the DSP module through the PCI interface, and the DSP module accesses an external PCI storage space through the PCI interface; the waveform generation unit and the data cache unit are respectively connected with the FPGA module and used for acquiring signal waveform information according to the data sent by the control module and sending the signal waveform information and the data information to the FPGA module for interpolation and filtering; the configuration control unit is connected with the DDS module and is used for carrying out interrupt management on the operation in the DDS module according to the data sent by the control module.
The DSP module can be selected from TMSC6416T, and the DSP core dominant frequency reaches 1 GHz. In the aspect of external interfaces, 64 EDMA channels are provided, each channel corresponds to a special synchronous trigger event, so that the EDMA can be triggered by events such as external interrupts, external hardware interrupts and interrupts for completing the transmission of other EDMA, and the data movement is started. In addition, in the TMS320C6416, a PCI interface is added, so that the DSP part can be easily connected to an external main CPU with PCI function through the PCI interface in a seamless mode.
The PCI interface in TMSC6416T conforms to the PCI2.2 specification, with PCI master/slave functionality; support 32bit wide address and data multiplexing bus; the highest working frequency is 33 MHz; the PC host can access all address spaces in the DSP through the PCI interface and load programs to the DSP; the DSP may also access external PCI memory space through the interface. The DSP module completes functions of a PCI interface module, interrupt management, data transmission and the like and provides data cache.
Based on the above embodiment, the FPGA module includes a logic control unit, an address decoding unit, an interpolation filtering unit, a FIFO unit, and a DCM unit; the interpolation filtering unit is respectively connected with the DSP module and the FIFO unit, and is used for carrying out high-speed interpolation and filtering processing on the data sent by the DSP module and sending the processed data to the DDS module through the FIFO unit; the DCM unit is connected with the DDS module and is used for providing a reference clock for the DDS module to perform clock management.
The FPGA module can adopt an XC5VLX50 chip which supports 2-level speed, the maximum speed is 550Mb/s, and the industrial-level temperature resistance is (-40-85 ℃), so that the requirements of the embodiment of the invention can be met. The FPGA module mainly completes the functions of clock management, logic control, data transmission, interpolation filtering and the like.
Based on the above embodiment, the DDS module includes an inverse CIC filter, a half-band filter, a CIC filter, a D/a unit, a function unit, and a frequency doubling unit; the reverse CIC filter is connected with the CIC filter through the half-band filter and is used for forming an interpolation filter to perform a partial interpolation function; the reverse CIC filter is used for compensating the passband attenuation of the CIC filter so as to ensure flat amplitude response in a Nyquist bandwidth; the frequency multiplication unit is connected with the FPGA unit and is used for performing frequency multiplication processing on a reference clock to obtain a system clock, and the system clock is a working clock of the DDS module.
The DDS module provides a digital carrier signal SIN/COS for quadrature modulation, a working clock of the DDS module is a system clock, and the system clock is obtained by frequency multiplication processing of a reference clock. Meanwhile, it needs to perform partial interpolation function, for example, a fixed 4-fold interpolation filter is formed by cascading 2 half-band filters, and the interpolation multiple of a cascaded integrator-comb filter (CIC) is 2-63, so that the total interpolation multiple is 8-252. An Inverse CIC filter is used to compensate for the passband attenuation of the CIC filter to ensure a flat amplitude response within the nyquist bandwidth.
In order to meet the requirements of various modulations, different baud rates, controllable level and adjustable arbitrary intermediate frequency, the simulation system provided by the embodiment of the invention adopts a general and programmable hardware architecture for hardware platform design, realizes various functions through software programming, adopts system hardware consisting of advanced chips in the industry at present, meets the playback requirement of future high-speed signals, and has good expandability.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (7)
1. An electronic countermeasure simulation system, comprising a signal generation module for generating a pulse description word data stream from received scene parameters and outputting the pulse description word data stream for signal simulation;
the system also comprises a control module and a signal simulation module;
the control module is used for generating the scene parameters according to the received setting instructions and sending the scene parameters to the signal generating module;
the signal simulation module is used for simulating and outputting a radio frequency analog signal according to the pulse description word data stream received from the signal generation module;
the signal generation module comprises a description word unit, a mixing and sorting unit and an overlapping processing unit;
the description word unit is used for generating a pulse description word according to the scene parameters and sending the pulse description word to the mixing and sorting unit;
the mixed sequencing unit is used for sequencing the pulse description words according to the arrival time of the leading edge of the pulse, acquiring a pulse description word sequence and sending the pulse description word sequence to the overlapping processing unit;
the overlapping processing unit is used for discarding or merging the overlapping pulses in the pulse description word sequence to obtain the pulse description word data stream and sending the pulse description word data stream to the signal simulation module;
the signal simulation module comprises an intermediate frequency simulation unit and a radio frequency simulation unit;
the intermediate frequency analog unit is used for carrying out frequency conversion processing on the pulse descriptor data stream, acquiring an intermediate frequency analog signal and sending the intermediate frequency analog signal to the radio frequency analog unit;
the radio frequency simulation unit is used for carrying out up-conversion processing on the intermediate frequency simulation signal, acquiring a radio frequency simulation signal and injecting the radio frequency simulation signal into the radar receiver through an injection mode.
2. The system of claim 1, wherein the if analog unit is further configured to output a pulse carrier code and a pulse amplitude code to the rf analog unit to adjust the frequency point and amplitude of the rf analog signal.
3. The system of claim 1, wherein the if analog unit is further configured to:
and after the time sequence condition is preset, outputting the radar type number, the pulse carrier frequency code, the pulse arrival azimuth code and the pulse amplitude code which are latched before the preset time sequence condition to the radio frequency simulation unit.
4. The system according to claim 1 or 2, wherein the intermediate frequency analog unit is implemented by an intermediate frequency data playback card, and the intermediate frequency data playback card comprises a DSP module, an FPGA module, and a DDS module;
the DSP module is connected with the signal generating module and is used for receiving data, data interrupt management and data caching;
the FPGA module is connected with the DSP module and is used for clock management, logic control and interpolation filtering processing;
the DDS module is respectively connected with the FPGA module and the DSP module and is used for providing digital carrier signals for quadrature modulation.
5. The system of claim 4, wherein the DSP module comprises a waveform generation unit, a data buffer unit, a PCI interface and a configuration control unit;
the PCI interface is respectively connected with a PCI bus, the data cache unit and the configuration control unit, wherein the control module accesses an address space inside the DSP module and loads a program to the DSP module through the PCI interface, and the DSP module accesses an external PCI storage space through the PCI interface;
the waveform generation unit and the data cache unit are respectively connected with the FPGA module and used for acquiring signal waveform information according to the data sent by the control module and sending the signal waveform information and the data information to the FPGA module for interpolation and filtering;
the configuration control unit is connected with the DDS module and is used for carrying out interrupt management on the operation in the DDS module according to the data sent by the control module.
6. The system of claim 4, wherein the FPGA module comprises a logic control unit, an address decode unit, an interpolation filter unit, a FIFO unit, and a DCM unit;
the interpolation filtering unit is respectively connected with the DSP module and the FIFO unit, and is used for carrying out high-speed interpolation and filtering processing on the data sent by the DSP module and sending the processed data to the DDS module through the FIFO unit;
the DCM unit is connected with the DDS module and is used for providing a reference clock for the DDS module to perform clock management.
7. The system of claim 4, wherein the DDS module comprises an inverse CIC filter, a half-band filter, a CIC filter, a D/A unit, a function unit, and a frequency multiplier unit;
the reverse CIC filter is connected with the CIC filter through the half-band filter and is used for forming an interpolation filter to perform a partial interpolation function;
the reverse CIC filter is used for compensating the passband attenuation of the CIC filter so as to ensure flat amplitude response in a Nyquist bandwidth;
the frequency multiplication unit is connected with the FPGA unit and is used for performing frequency multiplication processing on a reference clock to obtain a system clock, and the system clock is a working clock of the DDS module.
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| CN108226869B (en) * | 2017-12-13 | 2021-07-06 | 扬州健行电子科技有限公司 | Detection method of radar signal with multiple frequency spread |
| CN109683147B (en) * | 2019-02-25 | 2020-09-22 | 北京华力创通科技股份有限公司 | Method and device for generating chaotic pulse stream signal in real time and electronic equipment |
| CN111766563A (en) * | 2019-10-17 | 2020-10-13 | 南京国立电子科技有限公司 | Signal processing and waveform generating apparatus and method thereof |
| CN111025239A (en) * | 2019-12-26 | 2020-04-17 | 南京国立电子科技有限公司 | Pulse transmitting method, device, storage medium and pulse transmitting equipment |
| CN111158263B (en) * | 2019-12-27 | 2020-10-27 | 中国航天科工集团八五一一研究所 | Method for realizing internal field simulation intermediate control |
| CN111289951B (en) * | 2020-03-06 | 2022-03-25 | 南京长峰航天电子科技有限公司 | Wide pulse equivalent simulation method and device based on least square |
| CN112737991B (en) * | 2020-12-14 | 2022-08-16 | 中电科思仪科技股份有限公司 | Sequence-based multi-format signal modulation information control method |
| CN116500568B (en) * | 2023-06-29 | 2023-10-13 | 成都华兴汇明科技有限公司 | Method and system for generating long-time dynamic multi-target overlapping signals |
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