CN107147399B - Driver - Google Patents
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- CN107147399B CN107147399B CN201710325233.2A CN201710325233A CN107147399B CN 107147399 B CN107147399 B CN 107147399B CN 201710325233 A CN201710325233 A CN 201710325233A CN 107147399 B CN107147399 B CN 107147399B
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- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M9/00—Parallel/series conversion or vice versa
Abstract
A driver having a plurality of drive units and adapted for use with a transmitter, comprising: a de-emphasis sub-driver and a leading sub-driver. The de-emphasis sub-driver includes a first number of driving units, wherein the first number of driving units receive a de-emphasis signal according to a first selection signal to output a de-emphasis current, and receive a main data signal according to an inverse of the first selection signal to output a main data current. The leading sub-driver comprises a second number of driving units, wherein the second number of driving units receive the leading signals according to a second selection signal and output the leading currents, and receive the main data signals reversely according to the second selection signal and output the main data currents. The invention can reduce the circuit area and reduce the parasitic capacitance.
Description
Technical Field
The present invention relates to a driver for a transmitter, and more particularly, to a driver for a transmitter and capable of sharing a current source.
Background
In a sequencer/de-sequencer (SerDes ePHY), a transmitter includes a Parallel input/Serial output (PISO) and a driver to transmit a high speed Serial differential signal to a lane. However, the sequencer/de-sequencer (SerDes ePHY) must be compatible with different fading channels, and therefore the transmitter's equalizer must cover a wider range and a higher calibration accuracy.
Furthermore, higher operating speeds significantly reduce the tolerance of the output parasitic capacitance of the transmitter of the sequencer/desequencer (SerDes ePHY), and therefore there is a need for improved drivers for wider range coverage, higher calibration accuracy, and smaller output parasitic capacitance.
Disclosure of Invention
In view of the above, the present invention provides a driver having a plurality of driving units and adapted to a transmitter, comprising: a de-emphasis sub-driver and a leading sub-driver. The de-emphasis sub-driver includes a first number of the driving units, wherein the first number of the driving units receive a de-emphasis signal according to a first selection signal and output a de-emphasis current, and wherein the first number of the driving units receive a main data signal according to an inverse direction of the first selection signal and output a main data current. The front punch driver includes a second number of the driving units, wherein the second number of the driving units receive a front punch signal according to a second selection signal and output a front punch current, and wherein the second number of the driving units receive the main data signal according to an inverse direction of the second selection signal and output the main data current.
According to an embodiment of the invention, the driver further comprises: a main data driver. The main data driver includes a third number of the driving units, wherein the third number of the driving units receive the main data signal according to a third selection signal and output the main data current, and wherein the driving units of the de-emphasis sub-driver and the front-burst sub-driver are shared with the main data driver.
According to an embodiment of the present invention, a first portion of the first number of the driving units outputs the main data current, and a second portion of the second number of the driving units outputs the main data current, wherein the number of the driving units receiving the main data signal is a sum of the first portion, the second portion, and the third number.
According to an embodiment of the present invention, each of the driving units includes: the circuit comprises a multiplexer, a single-end-to-double-end circuit, a first current source, a second current source and a driving circuit. The multiplexer includes a first input node and a second input node, wherein the multiplexer outputs one of a signal of the first input node and a signal of the second input node according to a selection signal, wherein the first input node receives the main data signal, and the second input node receives one of the de-emphasis signal and the preamble signal. The single-end to double-end circuit converts the signal output by the multiplexer into a first driving signal, a first inverse driving signal, a second driving signal and a second inverse driving signal. The first current source obtains a current value from a first node. The second current source outputs the current value to a second node. The driving circuit is coupled between the first node and the second node, and is used for respectively outputting or obtaining the current value to an inverted signal output node and a signal output node.
According to an embodiment of the present invention, the driving circuit includes: a first N-type transistor, a second N-type transistor, a first P-type transistor and a second P-type transistor. The first N-type transistor receives the first driving signal and is coupled between the signal output node and the first node. The second N-type transistor receives the first inversion driving signal and is coupled between the inversion signal output node and the first node. The first P-type transistor receives the second driving signal and is coupled between the second node and the inverted signal output node. The second P-type transistor receives the second inversion driving signal and is coupled between the second node and the signal output node.
According to an embodiment of the present invention, the current values of the first number of the driving units are raised to the power of 2.
According to an embodiment of the present invention, the current values of the second number of the driving units are raised to the power of 2.
The invention can reduce the circuit area and reduce the parasitic capacitance.
Drawings
FIG. 1 is a block diagram of a driver according to an embodiment of the invention;
fig. 2 is a circuit diagram of a sub-driver according to an embodiment of the invention;
FIG. 3 is a block diagram of a driver according to another embodiment of the present invention; and
fig. 4 is a circuit diagram showing a driving unit according to another embodiment of the present invention.
Detailed Description
The following description is an example of the present invention. The general principles of the present invention are intended to be illustrative, but not limiting, of the scope of the invention, which is defined by the claims.
It is noted that the following disclosure provides many different embodiments, or examples, for implementing different features of the invention. The following specific examples and arrangements of components are merely illustrative of the spirit of the invention and are not intended to limit the scope of the invention. Moreover, the following description may repeat reference numerals and/or letters in the various examples. However, this repetition is for the purpose of providing a simplified and clear illustration only and is not intended to limit the scope of the various embodiments and/or configurations discussed below. Moreover, the description below of one feature connected to, coupled to, and/or formed on another feature, and the like, may actually encompass a variety of different embodiments that include the feature in direct contact, or that include other additional features formed between the features, and the like, such that the features are not in direct contact.
Fig. 1 is a block diagram of a driver according to an embodiment of the invention. As shown in fig. 1, the driver 100 includes a de-emphasis sub-driver 110, a main sub-driver 120, and a leading sub-driver 130. According to an embodiment of the present invention, the driver 100 is adapted for use in a transmitter.
The de-emphasis sub-driver 110 is configured to receive a previous bit data dt1 and output a first weighted current IW1, the main sub-driver 120 receives a current bit data dt0 and outputs a second weighted current IW2, the front sub-driver 130 receives a next bit data dt-1 and outputs a third weighted current IW3, and the first weighted current IW1, the second weighted current IW2 and the third weighted current IW3 are summed at the signal output node DP and the inverted signal output node DN.
Fig. 2 is a circuit diagram of a sub-driver according to an embodiment of the invention. As shown in fig. 2, the sub-driver 200 includes a driving circuit 210, a first current source array 220, a second current source array 230, and a single-to-double-ended circuit 240. According to an embodiment of the present invention, any one of the weighted sub-driver 110, the main sub-driver 120 and the leading sub-driver 130 of fig. 1 can be composed of the sub-driver 200 of fig. 2.
The driving circuit 210 includes a first P-type transistor MP1, a second P-type transistor MP2, a first N-type transistor MN1 and a second N-type transistor MN2, wherein the first P-type transistor MP1 is coupled between a second node N2 and an inverted signal output node DN, the second P-type transistor MP2 is coupled between a second node N2 and a signal output node DP, the first N-type transistor MN1 is coupled between the signal output node DP and a first node N1, and the second N-type transistor MN2 is coupled between the inverted signal output node DN and a first node N1.
The first current source array 220 and the second current source array 230 are respectively composed of a plurality of current sources, wherein the first current source array 220 draws a current from the first node N1, and the second current source array 230 outputs a current to the second node N2. According to an embodiment of the present invention, the first current source array 220 and the second current source array 230 are composed of a plurality of current sources LSB, 2LSB raised to the power of 2 of the minimum current LSB2LSB、23LSB、……、2N-1Current source composed of LSB, wherein LSB, 2LSB2LSB、23LSB、……、2N-1Each of the LSBs is connected in series with a switch S. According to an embodiment of the present invention, the sub-driver 200 of fig. 2 can be any one of the de-emphasis sub-driver 110, the main sub-driver 120 and the leading sub-driver 130 of fig. 1, wherein N can be determined according to the respective requirements of the de-emphasis sub-driver 110, the main sub-driver 120 and the leading sub-driver 130.
The single-to-dual terminal circuit 240 is configured to convert the bit data dt into a first driving signal PDP, a first inverse driving signal PDN, a second driving signal MDP and a second inverse driving signal MDN, wherein the first driving signal PDP, the first inverse driving signal PDN, the second driving signal MDP and the second inverse driving signal MDN are configured to respectively drive the first P-type transistor MP1, the second P-type transistor MP2, the first N-type transistor MN1 and the second N-type transistor MN2 of the driving circuit 210, such that a current of the second current source array 230 flows out from one of the inverse signal output node D and the signal output node DP, and a current of the first current source array 220 flows in from the other of the inverse signal output node D and the signal output node DP.
Due to the fact thatThe weighted sub-driver 110 and the front-pulse sub-driver 130 have current sources LSB, … …, 2, respectivelyN-1LSB, the unselected current sources are not shared with the main sub-driver 120 and will cause an idle. For example, assuming that the maximum current of the weighted sub-driver 110 is 31LSB, the first current source array 220 and the second current source array 230 have current sources LSB, 2LSB and 2LSB, respectively2LSB、23LSB、24LSB so that the maximum current is 31 LSB. According to an embodiment of the present invention, when the sub-driver 110 has only current sources LSB, 24The LSB is selected to provide current through the driving circuit 210, and the remaining current sources 2LSB, 22LSB、23The LSB is not selected and is idle.
Since the weighted sub-driver 110 and the main sub-driver 120 are composed of different sub-drivers 200, the current sources 2LSB and 2 idle by the weighted sub-driver 1102LSB、23The LSB cannot provide current to the main sub-driver 120, and the idle current source not only increases the area of the circuit, but also increases the output parasitic capacitance, which results in an increase in the operating speed. Furthermore, when the equalizer is adapted to different specifications, the calibration of the equalizer is very complicated and often needs to be completed by a microprocessor.
Fig. 3 is a block diagram of a driver according to another embodiment of the invention. Comparing fig. 3 with fig. 1, the driver 300 receives the selection signal SEQ in addition to the de-emphasis sub-driver 310, the main sub-driver 320, and the pre-cursor sub-driver 330. The driver 300 is equally applicable to a transmitter according to an embodiment of the present invention. The selection signal SEQ will be described in detail below.
Fig. 4 is a circuit diagram showing a driving unit according to another embodiment of the present invention. As shown in fig. 4, the driving unit 400 includes a driving circuit 410, a first current source 420, a second current source 430, a single-to-double end circuit 440, and a multiplexer 450. According to an embodiment of the present invention, a plurality of driving units 400 are used to form any one of the de-emphasis sub-driver 310, the main sub-driver 320 and the leading sub-driver 330 of fig. 3.
The driving circuit 410 is the same as the driving circuit 210 of fig. 2 in thatThis will not be described in detail. The first current source 420 and the second current source 430 are M times the minimum current LSB, where M is a power of 2, i.e. N is 20,21,22,……,2N-1. According to an embodiment of the present invention, for example, assuming that the maximum current of the weighting sub-driver 310 is 31LSB, the de-weighting sub-driver 310 is composed of 5 driving units 300, where M is 2 respectively0、21、22、23And 24。
The single-to-dual conversion circuit 440 is similar to the single-to-dual conversion circuit 220 shown in fig. 2, and is configured to receive the output signal of the multiplexer 450 to generate the first driving signal PDP, the first driving signal PDN, the second driving signal MDP, and the second driving signal MDN, so as to drive the driving circuit 310.
The multiplexer 450 comprises a first input node NI1, which first input node NI1 receives the primary data signal dt0, and a second input node NI2, which second input node NI2 receives one of the de-emphasis signal dt1 and the preamble signal dt-1. The multiplexer 450 is configured to output one of the signal of the first input node NI1 and the signal of the second input node NI2 according to the selection signal SEQ.
According to an embodiment of the present invention, when the driving unit 400 constitutes the de-emphasis sub-driver 310 of fig. 3, the second input node NI2 receives the de-emphasis signal dt 1. According to another embodiment of the present invention, when the driving unit 400 constitutes the leading sub-driver 330 of fig. 3, the second input node NI2 instead receives the leading signal dt-1.
According to an embodiment of the present invention, when the maximum current of the de-emphasis sub-driver 110 is 31LSB and only the current sources LSB, 24When LSB is selected, the remaining current sources 2LSB, 22LSB、23The LSB is not selected and is idle, representing current source LSB, 24The multiplexer 350 of the driving unit 300 corresponding to the LSB selects the de-emphasis signal dt1 to generate the first driving signal PDP, the first inverse driving signal PDN, the second driving signal MDP and the second inverse driving signal MDN according to the selection signal SEQ. The remaining unselected current sources 2LSB, 22LSB、23The driving unit 400 corresponding to the LSBThe multiplexer 450 selects the main data signal dt0 according to the selection signal SEQ.
In other words, the driving units 400 not selected by the de-emphasis sub-driver 310 can be selected by the main sub-driver 320. Therefore, the driving unit 400 of the de-emphasis sub-driver 310 can be shared with the main sub-driver 320, so that the first current source 420 and the second current source 430 can be more efficiently utilized, and the circuit area and the parasitic capacitance can be reduced.
According to another embodiment of the present invention, when the maximum current of the front pulse driver 330 is 15LSB, the front pulse driver 330 is composed of 4 driving units 400, where M is 2 respectively0、21、22And 23. When only the current source LSB, 23When LSB is selected, the remaining current sources 2LSB, 22The LSB is not selected and is idle, representing current source LSB, 23The multiplexer 450 of the driving unit 400 corresponding to the LSB selects the leading signal dt-1 according to the selection signal SEQ to generate the first driving signal PDP, the first inverse driving signal PDN, the second driving signal MDP and the second inverse driving signal MDN. The remaining unselected current sources 2LSB, 22The multiplexer 450 of the driving unit 400 corresponding to the LSB selects the main data signal dt0 according to the selection signal SEQ.
In other words, the driving units 400 not selected by the pre-driver 330 can be selected by the main sub-driver 320. Therefore, the driving unit 400 of the front-side sub-driver 330 can be shared with the main sub-driver 320, so that the first current source 420 and the second current source 430 can be more efficiently utilized, and the circuit area and the parasitic capacitance can be reduced.
Since the driving unit 400 shown in fig. 4 enables the driving unit 400 of the de-emphasis sub-driver 310 and the front-pulse driver 330 to be used as the main sub-driver 320, the number of required current sources is reduced, and thus the parasitic capacitance and the area of the circuit layout are reduced, and the transmitter can also operate at a higher speed due to the lower parasitic capacitance, so that the performance is more excellent.
According to an embodiment of the present invention, when the current of the de-emphasis sub-driver 310 is 31LSB, the current of the main sub-driver 320 is 34LSB, and the current of the leading sub-driver 330 is 15LSB, a gain (boost) of 38dB can be achieved with only 80LSB in total. Furthermore, since the total current of the equalizer is the same (80 LSB according to the above embodiment), only the settings of the pre-cursor driver and the de-cursor driver need to be calibrated when being applied to different specifications, so that the calibration of the equalizer is greatly simplified.
What has been described above is a general characterization of the embodiments. Those skilled in the art should readily appreciate that they can readily use the present disclosure as a basis for designing or modifying other structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those skilled in the art should also realize that the same may be configured without departing from the spirit and scope of the present invention and that various changes, substitutions, and alterations can be made therein without departing from the spirit and scope of the present invention. The illustrative method represents exemplary steps only, and the steps are not necessarily performed in the order represented. Additional, alternative, changed order and/or elimination steps may be added, substituted, changed order and/or eliminated as appropriate and consistent with the spirit and scope of the disclosed embodiments.
Claims (7)
1. A driver for a transmitter, the driver having a plurality of drive units, comprising:
a de-emphasis sub-driver including a first number of the driving units, wherein the first number of the driving units receive a de-emphasis signal according to a first selection signal and output a de-emphasis current, and wherein the first number of the driving units output a main data current according to an inverse of the first selection signal; and
a burst driver, comprising a second number of the driving units, wherein the second number of the driving units receive a burst signal according to a second selection signal and output a burst current, and wherein the second number of the driving units receive the main data signal according to an inverse direction of the second selection signal and output the main data current.
2. The driver of claim 1, further comprising:
a main data driver including a third number of the driving units, wherein the third number of the driving units receive the main data signal according to a third selection signal and output the main data current, and wherein the driving units of the de-emphasis sub-driver and the front sub-driver are shared with the main data driver.
3. The driver of claim 2, wherein a first portion of the first number of the driving units outputs the main data current and a second portion of the second number of the driving units outputs the main data current, wherein the number of the driving units receiving the main data signal is a sum of the first portion, the second portion, and the third number.
4. The driver as claimed in claim 2, wherein each of the driving units comprises:
a multiplexer including a first input node and a second input node, wherein the multiplexer outputs one of a signal of the first input node and a signal of the second input node according to a selection signal, wherein the first input node receives the main data signal, and the second input node receives one of the de-emphasis signal and the preamble signal;
a single-end to double-end circuit for converting the signal output by the multiplexer into a first driving signal, a first inverse driving signal, a second driving signal and a second inverse driving signal;
a first current source obtaining a current value from a first node;
a second current source for outputting the current value to a second node; and
and a driving circuit coupled between the first node and the second node for outputting or obtaining the current value to the inverted signal output node and the signal output node, respectively.
5. The driver according to claim 4, wherein said driving circuit comprises:
a first N-type transistor receiving the first driving signal and coupled between the signal output node and the first node;
a second N-type transistor receiving the first inversion driving signal and coupled between the inversion signal output node and the first node;
a first P-type transistor receiving the second driving signal and coupled between the second node and the inverted signal output node; and
the second P-type transistor receives the second inversion driving signal and is coupled between the second node and the signal output node.
6. The driver of claim 5, wherein said current value of said first number of said drive units is a power of 2.
7. The driver of claim 5, wherein said current value of said second number of said drive units is a power of 2.
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| CN201710325233.2A CN107147399B (en) | 2017-05-10 | 2017-05-10 | Driver |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103797732A (en) * | 2013-11-05 | 2014-05-14 | 华为技术有限公司 | Communication method, peripheral component interconnect express (PCIE) chip and PCIE devices |
| CN105763184A (en) * | 2016-03-10 | 2016-07-13 | 上海兆芯集成电路有限公司 | Pre-driving device used for driving low voltage differential signal driving circuit |
| CN106339024A (en) * | 2015-07-08 | 2017-01-18 | 创意电子股份有限公司 | Voltage mode signal transmitter |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7817727B2 (en) * | 2006-03-28 | 2010-10-19 | GlobalFoundries, Inc. | Hybrid output driver for high-speed communications interfaces |
| US8497707B2 (en) * | 2011-09-07 | 2013-07-30 | Advanced Micro Devices, Inc. | Transmitter equalization method and circuit using unit-size and fractional-size subdrivers in output driver for high-speed serial interface |
| US8755474B2 (en) * | 2011-12-14 | 2014-06-17 | Pericom Semiconductor Corporation | Signal conditioning by combining precursor, main, and post cursor signals without a clock signal |
| JP6007843B2 (en) * | 2013-03-26 | 2016-10-12 | 富士通株式会社 | Signal transmission circuit, semiconductor integrated circuit, and signal transmission circuit adjustment method |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103797732A (en) * | 2013-11-05 | 2014-05-14 | 华为技术有限公司 | Communication method, peripheral component interconnect express (PCIE) chip and PCIE devices |
| CN106339024A (en) * | 2015-07-08 | 2017-01-18 | 创意电子股份有限公司 | Voltage mode signal transmitter |
| CN105763184A (en) * | 2016-03-10 | 2016-07-13 | 上海兆芯集成电路有限公司 | Pre-driving device used for driving low voltage differential signal driving circuit |
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