CN107145661B - Circuit design method of real exponential power memristor model - Google Patents
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Abstract
A circuit design method of a real exponential power memristor model is characterized in that on the basis of a simple chaotic circuit which only comprises a linear passive conductance, a linear passive capacitor and a nonlinear memristor, an exponential power memristor function polynomial is constructed, and the exponential power is a continuously variable positive real number. The real exponential power memristor model system is subjected to numerical simulation, and the existence of the classical chaotic attractor of the system is verified. Corresponding circuit experiment simulation results show that the electronic device designed by the invention meets the essential characteristics of the memristor, and the real exponential power memristor function has wider and universal application value.
Description
Technical Field
The invention belongs to the field of a nonlinear circuit and a memristor circuit theory in a system, and relates to the design and implementation of a simplest chaotic system and a memristor circuit.
Background
In 1971, Hipport, scientists L eon O.Chua predicted, according to electronic theory, that there was a fourth fundamental component of the circuit, namely a memristor, which was a two-port device, in addition to resistive, capacitive, and inductive components, 2008, the Stanley Williams team, USA, successfully developed a solid-state memristor using a double-layer titanium dioxide film based on a Dia memristor model, making Chua theory physically practical.
At present, scientists at home and abroad analyze the dynamic characteristics and essential characteristics of a memristor by finding an ideal memristor model equivalent circuit, and the analysis on the associative memory capacity of a general memristor model is less, Muthuswamy and Chua in 2010 use a linear passive inductor, a linear passive capacitor and a nonlinear memristor, namely 3 circuit basic element designs to realize the simplest chaotic circuit, which is called a simplest chaotic system.
Disclosure of Invention
The invention aims to provide a memristor function polynomial which is a variable real number exponential power model, construct a real number exponential power memristor circuit and analyze feasibility and practicability of the memristor circuit.
The invention designs a new memristor model on the basis of a simplest chaotic system, and when the exponential power of a memristor function polynomial in the model is a variable positive integer, the simplest chaotic system can present chaotic behaviors; the polynomial exponential power is expanded to be a positive real number, and the system can still present a chaos phenomenon by adjusting linear parameters. Meanwhile, the circuit schematic diagram of the general memristor model is designed, and the tight hysteresis loop characteristic of the memristor is verified.
The invention is realized by the following technical scheme.
The invention discloses a circuit design method of a real exponential power memristor model, which comprises the following steps:
step S01: constructing a general memristor model with memristor function polynomial exponential power as variable parameters based on a simplest chaotic system;
step S02: selecting the memristor function polynomial exponential power in the step S01 as a positive integer, and verifying the chaotic characteristics of the simplest chaotic system;
step S03: designing a circuit schematic diagram of a positive integer exponent power memristor model based on the step S02, and verifying existence of three essential characteristics of the memristor element;
step S04: expanding the positive integer in the step S02 to a positive real number, and calculating the chaos characteristic of the simplest chaotic system based on the real number exponential power memristor model by numerical value;
step S05: a circuit schematic diagram of a general memristor model when the memristor function polynomial exponential power is positive and real is designed based on the step S04, and three essential characteristics of the memristor element are verified.
Furthermore, the circuit design method of the real exponential power memristor model comprises the following specific steps:
step 1: the simplest chaotic system design containing exponential power.
The simplest chaotic system circuit diagram is shown in fig. 1, and comprises three basic circuit elements, namely: a linear passive inductor, a linear passive capacitor and a nonlinear memristor. The kinetic behavior is described below:
where C is the capacitance value, L is the inductance value, R (z) is the resistance of the memristive element, z is the state variable of the memristive element, iC,iL,iMCurrent through capacitor, inductor and memristor, vC,vMThe voltages across the capacitive and memristive elements, respectively. The invention selects a memristor element model as follows:
let x (t) be vC(t),y(t)＝iL(t) due to iM(t)＝-iL(t), the dynamical equation of the simplest chaotic system in the invention is changed into:
in the formula, b1,b2,b3,c1,c2,c3Are system parameters and α are variable exponential parameters.
Step 2: and (3) performing numerical simulation on the simplest chaotic system with the memristor function polynomial being integer exponential power.
The method comprises the steps of firstly selecting memristor function polynomial exponential power α in a general memristor model as a variable positive integer, fixing a capacitor and an inductance value, setting initial conditions of the system, observing whether the system can generate a chaotic attractor or not by adjusting linear parameters of the system, simultaneously giving an input signal, observing a volt-ampere characteristic curve of the memristor model with the integer exponential power, and verifying whether the model is an 8-shaped tight hysteresis loop passing through an origin or not.
And (3) calculating an L yapunov index under specific parameters of the system by using a definition method, and theoretically proving whether a chaotic attractor of the system exists or not.
And step 3: and designing an integer exponent power memristor circuit schematic diagram.
For the general memristor model with the integer exponent power in the step 2, a principle diagram of the memristor circuit with the integer exponent power is designed by adopting a Multisim circuit simulation system, and the principle diagram is compared with the numerical calculation result in the step 2, so that the existence of three essential characteristics of the memristor element is verified.
And 4, step 4: the memristor function polynomial is the simplest chaotic system numerical simulation of real exponential power.
In order to enable the memristor model to be more general, the memristor function polynomial exponential power α is expanded from a positive integer to a positive real number, the capacitance, the inductance value and the initial condition of the system are unchanged, whether the chaotic attractor can be generated by the system at the moment is observed by adjusting the linear parameters of the system, meanwhile, an input signal is given, the volt-ampere characteristic curve of the memristor model at the moment is observed, and whether the memristor model is an 8-shaped tight hysteresis loop passing through the origin is verified.
And the L yapunov index under specific parameters of the system is calculated by using a definition method, so that whether the chaotic attractor of the system exists or not is theoretically proved.
And 5: real exponential powers are common memristor circuit schematic designs.
For the real exponential power general memristor model in the step 4, a power operation module is added on the basis of the integer exponential power memristor circuit in the step 3, wherein the power operation circuit is formed by combining an integrated logarithmic operation circuit and an integrated exponential operation circuit. Any real number exponential power can be realized by adjusting the values of the related components of the resistor.
The invention is characterized in that: the nonlinear memristor model in the simplest chaotic system is a general memristor model, and when the memristor function polynomial exponential powers are respectively variable positive integers and positive real numbers, the system can generate a classical chaotic attractor. Meanwhile, a general memristor circuit schematic diagram of integer exponential power and real exponential power is designed, and the existence of three essential characteristics of the memristor model is verified.
Drawings
FIG. 1 is a circuit diagram of the simplest chaotic system including memristive elements according to the present invention.
FIG. 2 shows the current-voltage characteristic curves of the state variable trajectories of the real exponential memristor model and the general memristor model when α is equal to 1, (a) is an x-y variable trajectory, (b) is an x-z variable trajectory, (c) is a y-z variable trajectory, and (d) is iM-vMAnd (4) variable trace.
FIG. 3 shows the current-voltage characteristic curves of each state variable locus of a real exponential memristor model and a general memristor model when α is 2, (a) is an x-y variable locus, (b) is an x-z variable locus, (c) is a y-z variable locus, and (d) is iM-vMAnd (4) variable trace.
FIG. 4 shows the current-voltage characteristic curves of the state variable trajectories of the real exponential memristor model and the general memristor model when α is equal to 3, (a) is an x-y variable trajectory, (b) is an x-z variable trajectory, (c) is a y-z variable trajectory, and (d) is iM-vMAnd (4) variable trace.
FIG. 5 is a schematic diagram of an integer exponential power general memristor circuit when α is 1 according to the present invention.
Fig. 6 is a current-voltage characteristic curve of a general memristor when the input signal frequency f is 1.7Hz when α is 1 according to the present invention.
Fig. 7 is a current-voltage characteristic curve of a common memristor when the input signal frequency f is 6.7Hz when the input signal frequency α is 1 according to the present invention.
Fig. 8 is a current-voltage characteristic curve of a general memristor when the input signal frequency f is 45Hz when the input signal frequency α is 1 according to the present invention.
Fig. 9 shows the current-voltage characteristic curves of the state variable trajectories and the general memristor model of the simplest chaotic system (4) when α is 1.6, where (a) is an x-y variable trajectory, (b) is an x-z variable trajectory, (c) is a y-z variable trajectory, and (d) is iM-vMAnd (4) variable trace.
FIG. 1 shows a schematic view of aWhen the α of the invention is 3.3, the simplest chaotic system (4) is the state variable tracks and the volt-ampere characteristic curve of a general memristor model, (a) is the x-y variable track, (b) is the x-z variable track, (c) is the y-z variable track, and (d) is the i-z variable trackM-vMAnd (4) variable trace.
Fig. 11 shows that when α is 3.8, the simplest chaotic system (4) has state variable tracks and volt-ampere characteristic curves of a general memristor model, where (a) is an x-y variable track, (b) is an x-z variable track, (c) is a y-z variable track, and (d) is iM-vMAnd (4) variable trace.
Fig. 12 is a schematic diagram of a real exponential power general memristor circuit when α is 1.6 according to the present invention.
FIG. 13 is a circuit for performing a powered analog operation in accordance with the present invention.
Fig. 14 is a current-voltage characteristic curve of a general memristor when the input signal frequency f is 1.7Hz when α is 1.6 according to the present invention.
Fig. 15 is a current-voltage characteristic curve of a typical memristor when the input signal frequency f is 6.7Hz when the frequency of α is 1.6 according to the present invention.
Fig. 16 is a current-voltage characteristic curve of a common memristor when the input signal frequency f is 45Hz when the input signal frequency is α is 1.6 according to the present invention.
Detailed Description
The present invention will be described in further detail below with reference to the accompanying drawings.
Example 1. And (3) performing numerical simulation on the simplest chaotic system when the memristor polynomial exponential power is a variable positive integer.
(1) The simplest chaotic system design containing exponential power.
The capacitance and inductance of the simplest chaotic system are respectively selected as C1, L1, and the initial conditions are set as x (0) 0.1, y (0) 0.1, and z (0) 0.01, so that the system (3) correspondingly becomes:
(2) the memristive function polynomial exponentiation α takes a positive integer.
When the memristive function polynomial exponential power α is 1, the linear parameter b is selected1＝-0.5,b2＝0.5,b3＝0.5,c1＝-1,c2＝-1.5,c3And (3), each state variable phase diagram locus of the system (4) is a classical chaotic attractor as shown in fig. 2(a), (b) and (c), and the diagram (d) depicts a general memristor volt-ampere characteristic curve, which is a tight hysteresis loop in an inverse-italic '8' shape passing through an origin, wherein an input signal is selected to be a sine wave with the frequency f being 1.7 Hz.
The L yapunov indexes of the system are calculated by a definition method to be L E respectively1＝0.3793,LE2＝-0.3638,LE3Due to L E value, one is greater than 0 and the sum of the three is less than 0, -1.4018, it is theoretically demonstrated that system (4) has a classical chaotic attractor in example 1.
The application also completes the selection of the linear parameter b when the memresistance function polynomial exponential α is 2 and α is 31＝-0.5,b2＝0.5,b3＝0.5,c1＝-1,c2＝-1.5,c3And (3), the trajectories of the state variable phase diagrams of the system (4) are respectively shown as (a), (b) and (c) in fig. 3 and 4, which are both classic chaotic attractors, and (d) in fig. 3 and 4 respectively depict the volt-ampere characteristic curve of a general memristor, which is a tight loop hysteresis loop in an inverse-italic "8" shape passing through the origin, wherein the input signal is selected to be a sine wave with the frequency f being 1.7 Hz.
(3) Integer exponential powers general memristor circuit schematic designs.
An integer exponential power general memristor model when design α is 1 is shown in FIG. 5, where U is0A、U1A、U2AIs an operational amplifier AD712JN, A1、A2Is an analog multiplier. Selection of Rs＝10Ω,Rs1＝100kΩ,Rs21k omega and m-1000, the current iMConverted voltage v0Expressed as:
let Rf＝100kΩ,Rb1＝Rb2＝Rb3When 200k Ω, the memristive function expression is:
vM＝(-0.5+0.5z+0.5z)·miM(6)
setting parameter Cf＝10uF,Rc1＝100kΩ,Rc2＝66.7kΩ,Rc333.3k Ω, then the memristor internal state variable z is expressed as:
the current source uses a sine wave with an amplitude of 10 mA. In order to research three essential characteristics of the memristor, experiments are carried out when the frequency is equal to 1.7Hz and 6.7Hz respectively, the voltage-current ratio of the current probe XCP1 is directly 1V/mA which is 1000V/A, the direction is the reverse direction of the current source, and the corresponding m is-1000. At the moment, the volt-ampere characteristic curves of the memristor are shown in fig. 6 and 7, and are tight hysteresis loops which contract at the origin, so that the intrinsic characteristics (i) of the memristor are satisfied; meanwhile, comparing fig. 6 and fig. 7, it can be found that the hysteresis side lobe area of the memristor monotonically decreases with the increase of the frequency, and the essential characteristic (ii) of the memristor is satisfied. To verify the essential characteristics (iii) of the memristor, an experiment is carried out with a frequency of 45Hz (relatively approaching infinity), and the circuit simulation is as shown in fig. 8, and is approximately shrunk to a single-valued function.
Example 2. And (3) performing numerical simulation on the simplest chaotic system when the memristor polynomial exponential power is positive and real.
(1) The simplest chaotic system design containing exponential power.
Referring to the step (1) in the embodiment example 1, the simplest chaotic system design containing exponential power is completed.
(2) The memristive function polynomial exponentiation α takes real numbers.
When the memristive function polynomial exponential power α is 1.6, the linear parameter b is selected1＝-0.5,b2＝0.5,b3＝0.5,c1＝-1,c2＝-1.6,c3When the locus of each state variable phase diagram of the system (4) is as shown in fig. 9(a), (b) and (c), which are both classic chaotic attractors, and (d) depicts a general memristor volt-ampere characteristic curve, which is a tight hysteresis loop in an inverse-italic '8' shape passing through the origin, wherein the input signal isA sine wave with a frequency f of 1.7Hz is selected.
The L yapunov indexes of the system are calculated by a definition method to be L E respectively1＝0.3548,LE2＝-0.3426,LE3Due to L E value of-1.4677, one is greater than 0 and the sum of the three is less than 0, it is theoretically demonstrated that a classical chaotic attractor exists in example 4 in the system (4).
The application also completes the selection of the linear parameter b when the memresistance function polynomial power α is 3.3 and α is 3.81＝-0.5,b2＝0.5,b3＝0.5,c1＝-1,c2＝-1.6,c3Fig. 10 and fig. 11(a), (b), and (c) are both classic chaotic attractors, and fig. 10 and fig. 11(d) depict current-voltage characteristic curves of general memristors, which are tight hysteresis loops of an inverse-italic "8" shape passing through the origin, respectively, wherein the input signal is selected to be a sine wave with a frequency f of 1.7 Hz. (3) And designing a real number power operation circuit.
For the real exponential power general memristor model in (S4), the schematic diagram of the designed circuit is as shown in FIG. 12, that is, a power operation module (FIG. 13) is added at the rightmost side of FIG. 5 and is used as an analog multiplier A2An input terminal. Wherein the power operation circuit is composed of a left frame integrated logarithm operation circuit and a right frame integrated exponential operation circuit, and its output voltage u0Can be expressed as:
if order IR1R1＝1,IR2R9＝1,
Then
By adjusting the resistance R4,R5,R6,R7Any real exponential power can be realized.
(4) Real exponential powers are common memristor circuit schematic designs.
In a real exponential power general memristor circuit schematic diagram, continuing to take α -1.6 as an example, setting circuit parameters as follows1＝R2＝R3＝R8＝R9＝100kΩ；Rref1＝Rref2＝1500kΩ；R4＝R5＝R7＝100kΩ,R6＝25kΩ；Rc2Other parameters set the same integer exponential power general memristor circuit parameters 62.5k Ω.
The measurement method is the same as that in the step (3) of the embodiment 1, and then the current-voltage characteristic curves of the real exponential power general memristor are depicted as fig. 14, 15 and 16, and observation shows that the three essential characteristics of the memristor are also satisfied.
Claims (1)
1. A circuit design method of a real exponential power memristor model is characterized by comprising the following steps:
step S01: based on the Chua simplest chaotic system, the dynamic behavior is described as follows:
the memristive element model is selected as:
where C is the capacitance value, L is the inductance value, R (z) is the resistance of the memristive element, z is the state variable of the memristive element, iC,iL,iMCurrent through capacitor, inductor and memristor, vC,vMVoltages across the capacitive and memristive elements, b1,b2,b3,c1,c2,c3Are systematic linear parameters, and α is an exponential power parameter;
step S02, selecting the memristor function polynomial exponential power α in the step S01 as a positive integer, and verifying the chaotic characteristics of the simplest chaotic system;
step S03, designing a circuit schematic diagram of the positive integer exponential power α memristor model based on the step S02, and verifying existence of three essential characteristics of the memristor element;
step S04: expanding the positive integer in the step S02 to a positive real number, and calculating the chaos characteristic of the simplest chaotic system based on the real number exponential power memristor model;
and step S05, designing a circuit schematic diagram of the general memristor model when the memristor function polynomial exponential power α is positive and real numbers based on the step S04, and verifying three essential characteristics of the memristor element.
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| CN108319797B (en) * | 2018-03-09 | 2019-08-20 | 武汉科技大学 | A kind of equivalent circuit of fractional order memristor |
| CN108449059A (en) * | 2018-05-25 | 2018-08-24 | 南京信息工程大学 | A kind of signal scaling circuit based on power function |
| CN110209111B (en) * | 2019-06-10 | 2022-05-13 | 华北电力大学（保定） | Adjustable fractional order passive inductor based on field programmable gate array |
| CN110488634B (en) * | 2019-09-03 | 2022-06-10 | 江西理工大学 | Method for realizing reverse synchronization and rotation reverse synchronization in coupled oscillator system |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2016054340A1 (en) * | 2014-10-02 | 2016-04-07 | Board Of Regents, The University Of Texas System | Coupled memristor devices to enable feedback control and sensing of micro/nanoelectromechanical actuator and sensors |
| CN205622637U (en) * | 2016-04-28 | 2016-10-05 | 李博雅 | Simplest series connection is recalled and is hindered circuit |
-
2017
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2016054340A1 (en) * | 2014-10-02 | 2016-04-07 | Board Of Regents, The University Of Texas System | Coupled memristor devices to enable feedback control and sensing of micro/nanoelectromechanical actuator and sensors |
| CN205622637U (en) * | 2016-04-28 | 2016-10-05 | 李博雅 | Simplest series connection is recalled and is hindered circuit |
Non-Patent Citations (2)
| Title |
|---|
| Bifurcation Analysis and Chaos in Simplest;Mohammed-Salah Abdelouahab;《IEEE Proccedings of 3rd International Conference on Control, Engineering & Information Technology (CEIT)》;20150527;全文 * |
| 混沌理论在忆阻器电路及图像安全中的应用研究;滕琳;《中国博士学位论文全文数据库-工程科技II辑》;20170315;第19-45页 * |
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