CN107145661A - A kind of circuit design method of real number index power memristor model - Google Patents
A kind of circuit design method of real number index power memristor model Download PDFInfo
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Abstract
A kind of circuit design method of real number index power memristor model, only including a linear passive conductance, on the basis of the brief chaos circuit of one linear passive electric capacity and a non-linear memristor, the memristor function multinomial of an exponential depth is constructed, the exponential depth is the arithmetic number of continuous variable.Real number index power memristor model system to the present invention carries out numerical simulation, demonstrates the existence of system Classical Chaos attractor.Corresponding Experiment of Electrical Circuits simulation result shows that the electronic device that the present invention is designed meets the substantive characteristics of memristor, and real number index power memristor function has more extensive and general application value.
Description
Technical field
The invention belongs to the memristor Circuit theory field in nonlinear circuit and system, it is related to most simple chaos system, memristor
Device circuit design is with realizing.
Background technology
1971, scientist Chinese descendant in America Leon O.Chua were according to theory of electronics, it is predicted that except resistance, electric capacity, inductance
Outside element, also there is the 4th kind of primary element, i.e. memristor of circuit.Memristor is Two-port netwerk device, and it connects magnetic flux and electricity
Lotus non-linear relation.2008, Stanley Williams team of HP Lab of the U.S. was based on Cai Shi memristor models, utilized
Two-layer titanium dioxide film successfully develops solid-state memristor, enables Chua theory physics realizations.Hereafter, it is vast both at home and abroad to learn
Person explored from the angle of mathematics and physics the base attribute of memristor, physical model, using and its manufacture.Adhikari,
Biolek et al. proposes three substantive characteristics of memristor, i.e. (i), and when a bipolarity periodic signal drives, the device is in v-
It is a tight hysteresis curve tightened in origin in i planes, and response is the cycle；(ii) since critical frequency, by magnetic hysteresis
Valve area monotone decreasing with the increase of driving frequency；(iii) when frequency approach is in infinity, tight hysteresis curve is punctured into one
Individual monotropic function.
Scientist analyzes the power of memristor by finding preferable memristor model equivalent circuit both at home and abroad at present
Characteristic and substantive characteristics are learned, and it is less for the associative memory capability analysis of general memristor model.Muthuswamy in 2010
A linear passive inductance, a linear passive electric capacity and a non-linear memristor are utilized with Chua, i.e., 3 circuits are substantially first
Part design realizes simplest chaos circuit, and we term it most simple chaos system.On this basis, Lin Teng in 2014
Et al. memristor function is replaced with into quartic polynomial function, add the complexity of chaotic systems attractor, and by integer rank
System is extended to new fractional-order system.And for the research of general memristor model, it is spy all to concentrate on memristor function multinomial
Determine the situation of integral indices power, and the research for variable real number index power rarely has and is related to.
The content of the invention
It is variable real number index power model the purpose of the present invention is to propose to a kind of memristor function multinomial, builds the real number and refer to
Number power memristor circuit, analyzes its feasibility and practicality.
The present invention devises memristor function in a kind of new memristor model, the model on the basis of most simple chaos system
When polynomial exponential depth takes variable positive integer, chaotic behavior can be presented in most simple chaos system；By exponent of polynomial power expand to
Arithmetic number, by adjusting linear dimensions, chaos phenomenon can be still presented in system.Meanwhile, the present invention devises the general memristor mould
The circuit theory diagrams of type, demonstrate the tight hysteresis curve characteristic of memristor.
The present invention is achieved by the following technical solutions.
The circuit design method of real number index power memristor model of the present invention, comprises the following steps：
Step S01：Based on most simple chaos system, construction memristor function exponent of polynomial power is the general memristor of variable element
Device model；
Step S02：Memristor function exponent of polynomial power in step S01 is chosen for positive integer, its most simple chaos system is verified
The chaotic characteristic of system；
Step S03：The circuit theory diagrams of positive integer exponential depth memristor model are designed based on step S02, memristor element is verified
Three substantive characteristics existence；
Step S04：Positive integer in step S02 is expanded to arithmetic number, numerical computations are based on the real number index power memristor mould
The chaotic characteristic of the most simple chaos system of type；
Step S05：General memristor model when memristor function exponent of polynomial power is arithmetic number is designed based on step S04
Circuit theory diagrams, verify three substantive characteristics of memristor element.
Further, the circuit design method of real number index power memristor model of the present invention, it is comprised the following steps that：
Step 1：Most simple chaos system design containing exponential depth.
Most simple chaos system circuit diagram is as shown in figure 1, it includes three basic circuit elements, i.e.,：One linear passive electricity
Sense, a linear passive electric capacity and a non-linear memristor.Its dynamic behavior is described as follows：
Wherein, C is that capacitance, L are inductance values, and R (z) is the resistance of memristor element, and z is the state variable of memristor element,
iC,iL,iMRespectively flow through the electric current of electric capacity, inductance and memristor, vC,vMRespectively electric capacity and the voltage at memristor element two ends.
Memristor component models are chosen for by the present invention：
Make x (t)=vC(t), y (t)=iL(t), simultaneously because iM(t)=- iL(t), then the present invention in most simple chaos system
Kinetics equation be accordingly changed into：
In formula, b1,b2,b3,c1,c2,c3It is systematic parameter, α is variable exponential depth parameter.
Step 2：Memristor function multinomial is the most simple chaos system numerical simulation of integral indices power.
Memristor function exponent of polynomial power α in general memristor model is chosen for variable positive integer by the present invention first, Gu
Determine electric capacity, inductance value and system primary condition is set, by adjusting system linear parameter, can observing system produce chaos attraction
Son；Given input signal, observes the VA characteristic curve of integral indices power memristor model, whether verify it was origin simultaneously
" 8 " font tight hysteresis curve.
Using define method computing system special parameter under Lyapunov indexes, in theory proof system chaos attractor be
It is no to exist.
Step 3：Integral indices power memristor schematic diagram design.
For the general memristor model of integral indices power in step 2, integer is designed using Multisim circuit simulation systems
The memristor circuit theory diagrams of exponential depth, and compared with the numerical result in step 2, verify three essence of memristor element
The existence of feature.
Step 4：Memristor function multinomial is the most simple chaos system numerical simulation of real number index power.
To make memristor model in the present invention more general, memristor function exponent of polynomial power α is expanded from positive integer
To arithmetic number, electric capacity, inductance value and system primary condition are constant, and by adjusting system linear parameter, now can system for observation
Produce chaos attractor；Given input signal simultaneously, the VA characteristic curve of observation now memristor model, verify its whether be
Cross the tight hysteresis curve of " 8 " font of origin.
The same Lyapunov indexes using under definition method computing system special parameter, in theory proof system chaos attraction
Son whether there is.
Step 5：The general memristor schematic diagram design of real number index power.
For the general memristor model of real number index power in step 4, integral indices power memristor circuit base in step 3
On, increase a power operation module, wherein power operation circuit is by integrated logarithmic operational circuit and integrated exponent arithmetic circuit
Combine.Any real number index power can be realized by adjusting the related component values of resistance.
The method have the characteristics that：Non-linear memristor model is general memristor model in most simple chaos system, and its
When memristor function exponent of polynomial power is respectively variable positive integer and arithmetic number, system can produce Classical Chaos attractor.Together
When devise integral indices power and the general memristor circuit theory diagrams of real number index power, demonstrate the three of memristor model of the present invention
Individual substantive characteristics existence.
Brief description of the drawings
Fig. 1 includes the most simple chaos system circuit diagram of memristor element for the present invention.
When Fig. 2 is α of the present invention=1, each state variable track of real number index power memristor model and general memristor model
VA characteristic curve.(a) it is x-y variables track, (b) is x-z variables track, and (c) is y-z variables track, and (d) is iM-vMVariable
Track.
When Fig. 3 is α of the present invention=2, each state variable track of real number index power memristor model and general memristor model
VA characteristic curve.(a) it is x-y variables track, (b) is x-z variables track, and (c) is y-z variables track, and (d) is iM-vMVariable
Track.
When Fig. 4 is α of the present invention=3, each state variable track of real number index power memristor model and general memristor model
VA characteristic curve.(a) it is x-y variables track, (b) is x-z variables track, and (c) is y-z variables track, and (d) is iM-vMVariable
Track.
Integral indices power general memristor circuit theory diagrams when Fig. 5 is α of the present invention=1.
When Fig. 6 is α of the present invention=1 during frequency input signal f=1.7Hz general memristor VA characteristic curve.
When Fig. 7 is α of the present invention=1 during frequency input signal f=6.7Hz general memristor VA characteristic curve.
When Fig. 8 is α of the present invention=1 during frequency input signal f=45Hz general memristor VA characteristic curve.
When Fig. 9 is α of the present invention=1.6, the volt of most simple each state variable track of chaos system (4) and general memristor model
Pacify characteristic curve.(a) it is x-y variables track, (b) is x-z variables track, and (c) is y-z variables track, and (d) is iM-vMVariable rail
Mark.
During Figure 10 α of the present invention=3.3, the volt of most simple each state variable track of chaos system (4) and general memristor model
Pacify characteristic curve.(a) it is x-y variables track, (b) is x-z variables track, and (c) is y-z variables track, and (d) is iM-vMVariable rail
Mark.
During Figure 11 α of the present invention=3.8, the volt of most simple each state variable track of chaos system (4) and general memristor model
Pacify characteristic curve.(a) it is x-y variables track, (b) is x-z variables track, and (c) is y-z variables track, and (d) is iM-vMVariable rail
Mark.
Real number index power general memristor circuit theory diagrams when Figure 12 is α of the present invention=1.6.
Figure 13 is power analog operational circuit of the present invention.
When Figure 14 is α of the present invention=1.6 during frequency input signal f=1.7Hz general memristor VA characteristic curve.
When Figure 15 is α of the present invention=1.6 during frequency input signal f=6.7Hz general memristor VA characteristic curve.
When Figure 16 is α of the present invention=1.6 during frequency input signal f=45Hz general memristor VA characteristic curve.
Embodiment
The present invention is described in further detail below with reference to accompanying drawing.
Embodiment 1.Most simple chaos system numerical simulation when memristor function exponent of polynomial power is variable positive integer.
(1) the most simple chaos system design containing exponential depth.
Be chosen for C=1, L=1 respectively to most simple chaos system electric capacity, inductance value, and set primary condition for x (0)=
0.1, y (0)=0.1, z (0)=- 0.01, then system (3) be accordingly changed into：
(2)：Memristor function exponent of polynomial power α takes positive integer.
As memristor function exponent of polynomial power α=1, linear dimensions b is chosen1=-0.5, b2=0.5, b3=0.5, c1
=-1, c2=-1.5, c3=-3, then each state variable phasor track of system (4) respectively as Fig. 2 (a), (b), shown in (c),
For classical chaos attractor, figure (d) then depicts general memristor VA characteristic curve, to cross backslash body " 8 " word of origin
The sine wave that the selection of the tight hysteresis curve of type, wherein input signal is frequency f=1.7Hz.
Calculating system Lyapunov indexes using definition method is respectively：LE1=0.3793, LE2=-0.3638, LE3=-
1.4018, because LE values have one to be more than 0, and three's sum is less than 0, and proof system (4) has one in embodiment 1 in theory
Individual Classical Chaos attractor.
The application is also completed as memristor function exponent of polynomial power α=2 and α=3, same to choose linear dimensions b1
=-0.5, b2=0.5, b3=0.5, c1=-1, c2=-1.5, c3Each state variable phasor track difference of=- 3, then system (4)
As shown in Fig. 3 and Fig. 4 (a), (b), (c), they are classical chaos attractor, and Fig. 3 and Fig. 4 (d) then describe respectively
General memristor VA characteristic curve, for the tight hysteresis curve of backslash body " 8 " font for crossing origin, wherein input signal is selected
For frequency f=1.7Hz sine wave.
(3) the general memristor schematic diagram design of integral indices power.
The general memristor model of integral indices power is as shown in figure 5, wherein U when designing α=10A、U1A、U2AFor operational amplifier
AD712JN, A1、A2For analog multiplier.Select Rs=10 Ω, Rs1=100k Ω, Rs2=1k Ω, and set m=-1000, then it is electric
Flow iMThe voltage v being converted into0It is expressed as：
Make Rf=100k Ω, Rb1=Rb2=Rb3=200k Ω, then memristor function expression be：
vM=(- 0.5+0.5z+0.5z) miM (6)
Arrange parameter Cf=10uF, Rc1=100k Ω, Rc2=66.7k Ω, Rc3=33.3k Ω, then memristor internal state
Variable z is expressed as：
Current source uses amplitude for 10mA sine waves.To study three substantive characteristics of memristor, difference selecting frequency etc.
Tested when 1.7Hz, 6.7Hz, current probe XCP1 voltage x current ratio directly chooses 1V/mA=1000V/A, direction
Then elect current source opposite direction, correspondence m=-1000 as.Now the VA characteristic curve of the memristor as shown in Figure 6,7, be
The tight hysteresis curve that origin shrinks, meets the substantive characteristics (i) of memristor；Comparison diagram 6, Fig. 7 are it can be found that with frequency simultaneously
Increase, the magnetic hysteresis secondary lobe area monotone decreasing of memristor meets the substantive characteristics (ii) of memristor.To verify the sheet of memristor
Matter feature (iii), selecting frequency is that 45Hz (relative to tend to be infinitely great) is tested, and circuit simulation is as shown in figure 8, approximate contraction
Into a monotropic function.
Embodiment 2.Most simple chaos system numerical simulation when memristor function exponent of polynomial power is arithmetic number.
(1) the most simple chaos system design containing exponential depth.
With reference to the step (1) in embodiment 1, the most simple chaos system design containing exponential depth is completed.
(2)：Memristor function exponent of polynomial power α takes real number.
As memristor function exponent of polynomial power α=1.6, linear dimensions b is chosen1=-0.5, b2=0.5, b3=0.5, c1
=-1, c2=-1.6, c3=-3, then each state variable phasor track of system (4) respectively as Fig. 9 (a), (b), shown in (c),
For classical chaos attractor, figure (d) then depicts general memristor VA characteristic curve, to cross backslash body " 8 " word of origin
The sine wave that the selection of the tight hysteresis curve of type, wherein input signal is frequency f=1.7Hz.
Calculating system Lyapunov indexes using definition method is respectively：LE1=0.3548, LE2=-0.3426, LE3=-
1.4677, because LE values have one to be more than 0, and three's sum is less than 0, and proof system (4) has one in example 4 in theory
Individual Classical Chaos attractor.
The application is also completed as memristor function exponent of polynomial power α=3.3 and α=3.8, chooses linear dimensions b1
=-0.5, b2=0.5, b3=0.5, c1=-1, c2=-1.6, c3Each state variable phasor track difference of=- 3, then system (4)
As shown in Figure 10 and Figure 11 (a), (b), (c), they are classical chaos attractor, and Figure 10 and Figure 11 (d) then describe respectively
General memristor VA characteristic curve, for the tight hysteresis curve of backslash body " 8 " font for crossing origin, wherein input signal is selected
For frequency f=1.7Hz sine wave.(3) real number power operation circuit design.
For the general memristor model of real number index power in (S4), design circuit theory diagrams are as shown in figure 12, i.e., Fig. 5's
The rightmost side increases a power operation module (Figure 13), and as analog multiplier A2One input.Wherein power is transported
Calculating circuit, integrated exponent arithmetic electrical combination is formed in integrated logarithmic operational circuit and right frame in left frame, its output voltage
u0It is represented by：
If making IR1R1=1, IR2R9=1,ThenBy adjusting resistance R4,
R5,R6,R7, any real number index power can be achieved.
(4) the general memristor schematic diagram design of real number index power.
In the general memristor circuit theory diagrams of real number index power, continue by taking α=1.6 as an example, each parameter of circuit is set such as
Under：R1=R2=R3=R8=R9=100k Ω；Rref1=Rref2=1500k Ω；R4=R5=R7=100k Ω, R6=25k Ω；
Rc2=62.5k Ω, other specification is set with the general memristor circuit parameter of integral indices power.
Measuring method is also with the volt-ampere of measuring method, the then general memristor of real number index power in the step of embodiment 1 (3)
Characteristic curve is depicted as Figure 14,15,16, and observation can be found, equally meets three substantive characteristics of memristor.
Claims (1)
1. a kind of circuit design method of real number index power memristor model, it is characterized in that comprising the following steps：
Step S01：Based on most simple chaos system, construction memristor function exponent of polynomial power is the general memristor mould of variable element
Type；
Step S02：Memristor function exponent of polynomial power in step S01 is chosen for positive integer, its most simple chaos system is verified
Chaotic characteristic；
Step S03：The circuit theory diagrams of positive integer exponential depth memristor model, the three of checking memristor element are designed based on step S02
The existence of individual substantive characteristics；
Step S04：Positive integer in step S02 is expanded to arithmetic number, numerical computations are based on the real number index power memristor model
The chaotic characteristic of most simple chaos system；
Step S05：The circuit of general memristor model when memristor function exponent of polynomial power is arithmetic number is designed based on step S04
Schematic diagram, verifies three substantive characteristics of memristor element.
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108319797A (en) * | 2018-03-09 | 2018-07-24 | 武汉科技大学 | A kind of equivalent circuit of fractional order memristor |
| CN108449059A (en) * | 2018-05-25 | 2018-08-24 | 南京信息工程大学 | A kind of signal scaling circuit based on power function |
| CN110209111A (en) * | 2019-06-10 | 2019-09-06 | 华北电力大学（保定） | Adjustable fractional order passive inductor based on field programmable gate array |
| CN110488634A (en) * | 2019-09-03 | 2019-11-22 | 江西理工大学 | Reverse sync is realized in coupled oscillator system and rotates the method for reverse sync |
| CN113255274A (en) * | 2021-04-15 | 2021-08-13 | 杭州电子科技大学 | Piecewise linear memristor model and design method |
| CN115130411A (en) * | 2022-07-14 | 2022-09-30 | 电子科技大学 | FPGA and DAC-based real-time reconfigurable universal memristor simulation method |
| CN115270677A (en) * | 2022-07-14 | 2022-11-01 | 电子科技大学 | Simulation method of real-time reconfigurable general memristor |
| CN115499116A (en) * | 2022-09-19 | 2022-12-20 | 江西理工大学 | Implementation method of simple memristor hyperchaotic circuit with large-scale parameter range |
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Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108319797A (en) * | 2018-03-09 | 2018-07-24 | 武汉科技大学 | A kind of equivalent circuit of fractional order memristor |
| CN108449059A (en) * | 2018-05-25 | 2018-08-24 | 南京信息工程大学 | A kind of signal scaling circuit based on power function |
| CN110209111A (en) * | 2019-06-10 | 2019-09-06 | 华北电力大学（保定） | Adjustable fractional order passive inductor based on field programmable gate array |
| CN110209111B (en) * | 2019-06-10 | 2022-05-13 | 华北电力大学（保定） | Adjustable fractional order passive inductor based on field programmable gate array |
| CN110488634A (en) * | 2019-09-03 | 2019-11-22 | 江西理工大学 | Reverse sync is realized in coupled oscillator system and rotates the method for reverse sync |
| CN110488634B (en) * | 2019-09-03 | 2022-06-10 | 江西理工大学 | Method for realizing reverse synchronization and rotation reverse synchronization in coupled oscillator system |
| CN113255274A (en) * | 2021-04-15 | 2021-08-13 | 杭州电子科技大学 | Piecewise linear memristor model and design method |
| CN115130411A (en) * | 2022-07-14 | 2022-09-30 | 电子科技大学 | FPGA and DAC-based real-time reconfigurable universal memristor simulation method |
| CN115270677A (en) * | 2022-07-14 | 2022-11-01 | 电子科技大学 | Simulation method of real-time reconfigurable general memristor |
| CN115499116A (en) * | 2022-09-19 | 2022-12-20 | 江西理工大学 | Implementation method of simple memristor hyperchaotic circuit with large-scale parameter range |
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