CN107145332B - Method and device for generating random number in OpenCL kernel program - Google Patents
Method and device for generating random number in OpenCL kernel program Download PDFInfo
- Publication number
- CN107145332B CN107145332B CN201710294725.XA CN201710294725A CN107145332B CN 107145332 B CN107145332 B CN 107145332B CN 201710294725 A CN201710294725 A CN 201710294725A CN 107145332 B CN107145332 B CN 107145332B
- Authority
- CN
- China
- Prior art keywords
- shift register
- random seed
- random number
- register array
- random
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims abstract description 47
- 238000004364 calculation method Methods 0.000 claims abstract description 69
- 238000003860 storage Methods 0.000 claims description 2
- 238000004422 calculation algorithm Methods 0.000 description 18
- 230000006870 function Effects 0.000 description 15
- 238000012545 processing Methods 0.000 description 9
- 230000008569 process Effects 0.000 description 5
- 238000005457 optimization Methods 0.000 description 4
- 238000013461 design Methods 0.000 description 3
- 238000011161 development Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000007418 data mining Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000005070 sampling Methods 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 125000004122 cyclic group Chemical group 0.000 description 1
- 238000010801 machine learning Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/58—Random or pseudo-random number generators
- G06F7/582—Pseudo-random number generators
- G06F7/584—Pseudo-random number generators using finite field arithmetic, e.g. using a linear feedback shift register
Abstract
The invention discloses a method and a device for generating random numbers in an OpenCL kernel program, wherein the method comprises the following steps: setting a random seed parameter in the kernel program, and calculating by using a pseudo-random number calculation formula to obtain a random number; saving the new random seed parameter in the first bit of the shift register array; and controlling the new random seed parameter to move to the last bit of the shift register array by a reverse order shift method. The method solves the problem that random number generation cannot be realized in Opencl standard.
Description
Technical Field
The invention relates to the technical field of big data processing, in particular to a method and a device for generating random numbers in OpenCL kernel programs.
Background
At present, heterogeneous computing mainly refers to a computing mode of forming a system by using computing units of different system architectures, different computing tasks can be allocated to each computing subsystem according to the structural characteristics of the computing subsystem, advantages which are not possessed by a traditional architecture are shown in the aspects of improving computing performance, energy efficiency ratio and computing real-time performance of a server, and common computing units of the heterogeneous computing mainly include a CPU (central processing unit), a GPU (graphic processing unit), a DSP (digital signal processor), an ASIC (application specific integrated circuit), an FPGA (field programmable gate array) and the like. The Field Programmable Gate Array (FPGA) is a novel heterogeneous computing accelerator, which consists of Programmable logic blocks and an interconnection network, can execute a plurality of threads in different logics, realizes pipeline parallel processing, and has strong parallel processing capability. The special chips such as the FPGA are used as accelerating equipment to be matched with the CPU to form an FPGA heterogeneous computing platform, so that the computing capability of a data center can be improved while the power consumption of a system is reduced, and data processing is accelerated. The traditional FPGA development realizes parallel operation by Hardware Description Language (HDL), and has higher requirement on developers and longer development period. OpenCL is a standard API and programming language designed by the Khronos Group for heterogeneous computing devices (heterogeneous devices). After self-standardization, CPU and GPU manufacturers soon announced that their products support the OpenCL programming model. With the maturity of OpenCL compiling comprehensive tools of FPGA manufacturers, the FPGA also realizes an algorithm debugging mode adopting an OpenCL high-level language, and can be directly written into the FPGA for program verification, thereby providing convenience guarantee for the rapid application development of the FPGA widely applied to the field of general computing. The OpenCL program comprises a host program and a kernel program, wherein the kernel program is a calculation process of a core algorithm and is realized on an FPGA; the host program is responsible for data transmission and execution scheduling of the kernel program by the CPU.
Big data processing is the hot field of FPGA heterogeneous computing, and relates to the common computing means for random number generation in an algorithm of machine learning and data mining for data sampling simulation, a classic pseudo-random number generation function rand () function is provided in C and C + + language standards, but the standard of an OpenCL advanced programming model based on FPGA does not support rand pseudo-random number generation, so that the operations of data sampling and the like in the data mining algorithm cannot realize parallel optimization on an FPGA heterogeneous computing platform, and the overall performance of the algorithm is influenced.
Disclosure of Invention
The invention aims to provide a method and a device for generating random numbers in an OpenCL kernel program, so as to solve the problem that the random numbers cannot be generated in the Opencl standard.
To solve the above technical problem, the present invention provides a method for generating a random number in an OpenCL kernel program, including:
setting a random seed parameter in the kernel program, and calculating by using a pseudo-random number calculation formula to obtain a random number;
saving the new random seed parameter in the first bit of the shift register array;
and controlling the new random seed parameter to move to the last bit of the shift register array by a reverse order shift method.
Preferably, the calculating the random number by using a pseudo random number calculation formula includes:
initializing the random seed parameters, updating the random seed parameters obtained by the last calculation to obtain new random seed parameters, and calculating by using the new random seed parameters to obtain the new random parameters.
Preferably, the saving the new random seed parameter before the first bit of the shift register array further comprises:
defining a shift register array, and using the last bit of the shift register array to update the random seed parameter.
Preferably, the controlling the new random seed parameter to move to the last bit of the shift register array by the reverse shift method includes:
after the random number is generated each time, the shift register is shifted in a reverse order, and new random seeds are gradually shifted to the last bit of the shift register array for participating in the calculation of the next random number.
The invention also provides a random number generation device in the OpenCL kernel program, which is used for realizing the method and comprises the following steps:
the calculation module is used for setting a random seed parameter in the kernel program and calculating by using a pseudo-random number calculation formula to obtain a random number;
the storage module is used for storing the new random seed parameter in the first bit of the shift register array;
and the moving module is used for controlling the new random seed parameter to move to the last bit of the shift register array by a reverse-order shifting method.
Preferably, the calculation module is specifically configured to set a random seed parameter in the kernel program, initialize the random seed parameter, update the random seed parameter obtained by the previous calculation to obtain a new random seed parameter, and calculate the new random parameter by using the new random seed parameter.
Preferably, the saving module further comprises:
and the defining unit is used for defining a shift register array, and the last bit of the shift register array is used for updating the random seed parameter.
Preferably, the moving module is specifically configured to shift the shift register in reverse order after generating the random number each time, and gradually shift the new random seed to the last bit of the shift register array for participating in the calculation of the next random number.
The invention provides a method and a device for generating random numbers in an OpenCL kernel program.A random seed parameter is set in the kernel program, and the random numbers are calculated by using a pseudo random number calculation formula; saving the new random seed parameter in the first bit of the shift register array; and controlling the new random seed parameter to move to the last bit of the shift register array by a reverse order shift method. Therefore, the problem that the OpenCL standard does not support the rand random number generation function in the C language standard is solved by the aid of the pseudorandom number calculation formula, the problem that the parameter dependence in the calculation formula is solved by the aid of the shift register reverse shift strategy, random numbers can be generated in kernel functions of the OpenCL, and the problem that the random numbers cannot be generated in the Opencl standard is solved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
FIG. 1 is a flowchart of a method for generating random numbers in an OpenCL kernel program according to the present invention;
FIG. 2 is a schematic diagram of a parallel computation flow of OpenCL codes in an FPGA;
FIG. 3 is a schematic structural diagram of a random number generation apparatus in an OpenCL kernel program according to the present invention.
Detailed Description
The core of the invention is to provide a method and a device for generating random numbers in OpenCL kernel programs, so as to solve the problem that the generation of the random numbers cannot be realized in the Opencl standard.
In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, fig. 1 is a flowchart illustrating a method for generating random numbers in an OpenCL kernel program according to the present invention, the method including:
s11: setting a random seed parameter in the kernel program, and calculating by using a pseudo-random number calculation formula to obtain a random number;
s12: saving the new random seed parameter in the first bit of the shift register array;
s13: and controlling the new random seed parameter to move to the last bit of the shift register array by a reverse order shift method.
Therefore, in the method, the intermediate result of the random seed, namely the new random seed parameter, is always stored in the first bit of the shift register array, the random seed is controlled to move to the last bit of the register array through reverse shift, and the last bit is always used for updating the random seed parameter in the pseudo random number calculation formula, so that the problem that the OpenCL standard does not support the rand random number generation function in the C language standard is solved by using the pseudo random number calculation formula, the problem that the parameter dependence in the calculation formula is solved by using the shift register reverse shift strategy, the random number can be generated in the kernel function of the OpenCL, and the problem that the generation of the random number cannot be realized in the Opencl standard is solved.
Based on the above method, further, in step S11, the process of calculating the random number by using the pseudo random number calculation formula specifically includes: initializing the random seed parameters, updating the random seed parameters obtained by the last calculation to obtain new random seed parameters, and calculating by using the new random seed parameters to obtain the new random parameters.
Further, step S12 is preceded by: defining a shift register array, and using the last bit of the shift register array to update the random seed parameter.
Further, the process of step S13 specifically includes: after the random number is generated each time, the shift register is shifted in a reverse order, and new random seeds are gradually shifted to the last bit of the shift register array for participating in the calculation of the next random number.
The invention mainly utilizes FPGA based on OpenCL standard to realize accelerated design of a big data processing algorithm, utilizes a random number function calculation formula to solve the problem that the OpenCL standard does not support rand random number generation function in C language standard, utilizes a shift register reverse order shift strategy to solve the parameter dependence problem in the calculation formula, can generate random numbers in kernel function of OpenCL, utilizes circulation to develop to realize parallelization optimization of the algorithm, and improves the application range of an OpenCL programming model in algorithm optimization and the calculation performance of the algorithm.
Random number generation is realized in the kernel function of OpenCL, data dependence in the algorithm is solved by using a shift register reverse order shifting method, and the performance of the algorithm is improved.
The algorithm part of the kernel function for calculation on the FPGA performs uniform full expansion, and the calculation performance of the algorithm on the FPGA is further optimized and improved in parallel.
The invention provides a parallel optimization design method of a random number generation algorithm in an OpenCL kernel program, which fully utilizes a shift register, defines a pseudo-random number generation calculation formula in the kernel program, solves the parameter dependence in the calculation formula by using the reverse order shift of the shift register, realizes the whole expansion parallel calculation of a production line in the process of generating and calculating a plurality of random numbers, and further improves the calculation performance of the algorithm under a distributed framework.
The method mainly solves the problem that random number generation cannot be realized in the OpenCL standard, firstly, random seed parameters are set in a kernel program, random numbers are generated through calculation of a pseudo-random number calculation formula, then, the middle results of the random seeds are always stored in the 0 th bit of a shift register array, the random seeds are controlled to move to the 2 nd bit of the register array through reverse order shift, and the bits are always used for updating the random seed parameters in the pseudo-random number calculation formula.
The pseudo code for generating n random numbers in kernel using the pseudo random number calculation formula is as follows:
firstly, initializing random seeds, updating the random seeds obtained by the last calculation to obtain new random seeds when new random numbers are generated each time, and then calculating by using new random seed parameters to obtain new random numbers; the calculation method is simple and effective, but when the random seed parameters are calculated in the FPGA, the random seed parameters have a front-back dependency relationship and cannot be subjected to parallel calculation, so that the calculation performance is influenced; the pseudo code for saving the intermediate result by the shift register shift process is as follows:
firstly, defining a shift register array, wherein the last bit of the array is used for updating the parameter of the random seed, after the random number is generated each time, performing reverse shift on the register, updating the value of the last bit of the shift register, and storing the calculated new random seed in the first bit of the array; when the random number is circularly calculated, the random seed is updated only relative to the last bit of the register array, and is not relative to other parameters, the data dependence is eliminated, the circularly expanded parallel calculation can be realized in the FPGA, and the parallel calculation flow in the FPGA is shown in figure 2.
In a pseudo code for generating n random numbers by using a pseudo random number calculation formula in kernel, firstly setting a random number generation range and initializing random seed parameters, then calculating and updating a new random seed by using a calculation formula of a rand () random number generation function in a common class C language standard, and calculating by using the calculated random seed to obtain the random number. Because data dependence exists when the calculation algorithm design is executed on the FPGA, the clock period is large when the parallel calculation is circularly expanded, and the calculation performance is not ideal. In pseudo codes for storing intermediate results through shift register shift processing, shift register array setting is added, the last bit of the array is used for calculating random seeds each time, new random seeds obtained through calculation are temporarily placed at the first bit of the register array, the new random seeds are gradually moved to the last bit of the array through a reverse shift method and participate in the calculation of the next random number, the method effectively solves the problem of data dependence of the random seeds during random number calculation, and the clock period of the FPGA is optimized to be the optimal cycle 1; the OpenCL kernel program for solving the data dependency can improve the parallelism of FPGA calculation and further improve the calculation performance of the algorithm in a circular expansion manner, and the algorithm calculation flow is shown in fig. 2.
Specifically, the method includes the steps that firstly, a random number generation function is realized by OpenCL high-level programming language codes, a shift register is arranged in a local memory of an FPGA board card and used for storing an intermediate result of a random seed, the random seed is gradually moved to the last bit of an array through reverse order shift and used for calculating the next random number, the problem of data dependence is solved, the clock period of an OpenCL core code is optimized to be 1, and finally, the parallelism of an OpenCL kernel program in calculation on the FPGA is improved through cyclic expansion, and the calculation performance is improved.
Referring to fig. 3, fig. 3 is a schematic structural diagram of a random number generation device in an OpenCL kernel program, the device being used to implement the random number generation method in the OpenCL kernel program, the device including:
the calculation module 101 is configured to set a random seed parameter in a kernel program, and calculate a random number by using a pseudo random number calculation formula;
a saving module 102, configured to save the new random seed parameter in a first bit of the shift register array;
and the moving module 103 is used for controlling the new random seed parameter to move to the last bit of the shift register array by a reverse-order shifting method.
Therefore, in the device, the intermediate result of the random seed, namely the new random seed parameter, is always stored in the first bit of the shift register array, the random seed is controlled to move to the last bit of the register array through reverse shift, and the last bit is always used for updating the random seed parameter in the pseudo random number calculation formula, so that the problem that the OpenCL standard does not support the rand random number generation function in the C language standard is solved by using the pseudo random number calculation formula, the parameter dependence problem in the calculation formula is solved by using the shift register reverse shift strategy, the random number can be generated in the kernel function of the OpenCL, and the problem that the random number cannot be generated in the Opencl standard is solved.
Based on the device, further, the calculation module is specifically configured to set a random seed parameter in the kernel program, initialize the random seed parameter, update the random seed parameter obtained by the last calculation to obtain a new random seed parameter, and calculate the new random parameter by using the new random seed parameter.
Further, the saving module further comprises: and the defining unit is used for defining a shift register array, and the last bit of the shift register array is used for updating the random seed parameter.
Further, the moving module is specifically configured to shift the shift register in reverse order after generating the random number each time, and gradually shift the new random seed to the last bit of the shift register array for participating in the calculation of the next random number.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
The method and the device for generating the random number in the OpenCL kernel program provided by the present invention are described in detail above. The principles and embodiments of the present invention are explained herein using specific examples, which are presented only to assist in understanding the method and its core concepts. It should be noted that, for those skilled in the art, it is possible to make various improvements and modifications to the present invention without departing from the principle of the present invention, and those improvements and modifications also fall within the scope of the claims of the present invention.
Claims (8)
1. A method for generating random numbers in OpenCL kernel programs is characterized by comprising the following steps:
setting a new random seed parameter by using the value of the last bit of the shift register array in the kernel program, and calculating by using a pseudo-random number calculation formula based on the new random seed parameter to obtain a random number;
saving the new random seed parameter in the first bit of the shift register array;
and controlling the new random seed parameter to move to the last bit of the shift register array by a reverse order shift method.
2. The method of claim 1, wherein calculating the random number using a pseudo random number calculation formula comprises:
initializing the random seed parameters, updating the random seed parameters obtained by the last calculation to obtain new random seed parameters, and calculating by using the new random seed parameters to obtain the new random parameters.
3. The method of claim 2, wherein saving the new random seed parameter before the first bit of the shift register array further comprises:
defining a shift register array, and using the last bit of the shift register array to update the random seed parameter.
4. The method of claim 3, wherein controlling the new random seed parameter to move to the last bit of the shift register array by a reverse shift method comprises:
after the random number is generated each time, the shift register is shifted in a reverse order, and new random seeds are gradually shifted to the last bit of the shift register array for participating in the calculation of the next random number.
5. An apparatus for generating random numbers in an OpenCL kernel program, the apparatus being configured to implement the method as claimed in any one of claims 1 to 4, and comprising:
the calculation module is used for setting a new random seed parameter by using the value of the last bit of the shift register array in the kernel program and calculating to obtain a random number based on the new random seed parameter by using a pseudo random number calculation formula;
the storage module is used for storing the new random seed parameter in the first bit of the shift register array;
and the moving module is used for controlling the new random seed parameter to move to the last bit of the shift register array by a reverse-order shifting method.
6. The apparatus according to claim 5, wherein the calculation module is specifically configured to set a random seed parameter in the kernel program, initialize the random seed parameter, update the random seed parameter obtained by the previous calculation to obtain a new random seed parameter, and calculate the new random parameter by using the new random seed parameter.
7. The apparatus of claim 6, wherein the save module further comprises:
and the defining unit is used for defining a shift register array, and the last bit of the shift register array is used for updating the random seed parameter.
8. The apparatus of claim 7, wherein the shifting module is specifically configured to shift the shift register in reverse order after each generation of the random number, and to gradually shift the new random seed to the last bit of the shift register array for participating in the calculation of the next random number.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710294725.XA CN107145332B (en) | 2017-04-28 | 2017-04-28 | Method and device for generating random number in OpenCL kernel program |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710294725.XA CN107145332B (en) | 2017-04-28 | 2017-04-28 | Method and device for generating random number in OpenCL kernel program |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107145332A CN107145332A (en) | 2017-09-08 |
| CN107145332B true CN107145332B (en) | 2021-06-29 |
Family
ID=59775142
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710294725.XA Active CN107145332B (en) | 2017-04-28 | 2017-04-28 | Method and device for generating random number in OpenCL kernel program |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107145332B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112527832A (en) * | 2019-09-17 | 2021-03-19 | 天翼电子商务有限公司 | Rule engine accelerated execution method, device, medium and equipment based on FPGA |
| CN111708762B (en) * | 2020-06-18 | 2023-09-01 | 北京金山云网络技术有限公司 | Authority authentication method and device and server device |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN203119915U (en) * | 2013-01-25 | 2013-08-07 | 深圳职业技术学院 | Device based on hardware encryption data |
| CN105761753A (en) * | 2016-02-02 | 2016-07-13 | 清华大学 | Data scrambler/descrambler, memory device and scrambling/descrambling method |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58101515A (en) * | 1981-12-14 | 1983-06-16 | Agency Of Ind Science & Technol | Binary random number generator |
| US6678707B1 (en) * | 2000-10-30 | 2004-01-13 | Hewlett-Packard Development Company, L.P. | Generation of cryptographically strong random numbers using MISRs |
| CN100542029C (en) * | 2005-08-17 | 2009-09-16 | 华为技术有限公司 | Pseudo-random sequence generating device |
| CN1987770A (en) * | 2005-12-22 | 2007-06-27 | 佛山市顺德区顺达电脑厂有限公司 | Seed number producer and its producing method |
| KR20130009392A (en) * | 2011-07-15 | 2013-01-23 | 삼성전자주식회사 | Operation method of controller and a memory system having the controller |
-
2017
- 2017-04-28 CN CN201710294725.XA patent/CN107145332B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN203119915U (en) * | 2013-01-25 | 2013-08-07 | 深圳职业技术学院 | Device based on hardware encryption data |
| CN105761753A (en) * | 2016-02-02 | 2016-07-13 | 清华大学 | Data scrambler/descrambler, memory device and scrambling/descrambling method |
Non-Patent Citations (2)
| Title |
|---|
| A seed selection procedure for LFSR-based random pattern generators;K. Ichino等;《Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003.》;IEEE;20030422;第869-874页 * |
| 一种改进的伪随机数生成算法及随机性分析;刘倩等;<<四川理工学院学报( 自然科学版)>>;20121231;第25卷(第6期);第50-52页 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN107145332A (en) | 2017-09-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Chen et al. | GPU-accelerated sparse LU factorization for circuit simulation with performance modeling | |
| US9606965B2 (en) | Semiconductor device | |
| RU2012127578A (en) | ANALYZER OF APPLICABILITY OF THE SOFTWARE MODULE FOR THE DEVELOPMENT AND TESTING OF THE SOFTWARE FOR MULTIPROCESSOR MEDIA | |
| CN105487838A (en) | Task-level parallel scheduling method and system for dynamically reconfigurable processor | |
| Gong et al. | Multi2Sim Kepler: A detailed architectural GPU simulator | |
| CN107145332B (en) | Method and device for generating random number in OpenCL kernel program | |
| CN113822004B (en) | Verification method and system for integrated circuit simulation acceleration and simulation | |
| Shi et al. | Design of parallel acceleration method of convolutional neural network based on fpga | |
| Chang et al. | Parallel logic simulation: Myth or reality? | |
| Brown | Accelerating advection for atmospheric modelling on Xilinx and Intel FPGAs | |
| Rezaei et al. | Data-rate-aware FPGA-based acceleration framework for streaming applications | |
| CN102541738B (en) | Method for accelerating soft error resistance test of multi-core CPUs (central processing units) | |
| Du et al. | Feature-aware task scheduling on CPU-FPGA heterogeneous platforms | |
| Vu et al. | Graphics processing unit optimizations for the dynamics of the HIRLAM weather forecast model | |
| US9098917B2 (en) | Method and system for accelerating collision resolution on a reconfigurable processor | |
| WO2018228528A1 (en) | Batch circuit simulation method and system | |
| Zhang et al. | Mcvp-noc: Many-core virtual platform with networks-on-chip support | |
| CN111090508A (en) | OpenCL-based dynamic task scheduling method among heterogeneous cooperative parallel computing devices | |
| Yudanov et al. | Scalable multi-precision simulation of spiking neural networks on GPU with OpenCL | |
| Yu et al. | Overview of a fpga-based overlay processor | |
| Cornelis et al. | The pipeline performance model: a generic executable performance model for GPUs | |
| Gu et al. | Case study of gate-level logic simulation on an extremely fine-grained chip multiprocessor | |
| Ye et al. | Fault Simulation Acceleration Based on ARM Multi-core CPU Architecture | |
| CN116151187B (en) | Method, apparatus and storage medium for processing trigger condition | |
| Kadry et al. | Comparative study of test generation methods for simulation accelerators |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |