CN107133533A - It is a kind of based on the multiple physics unclonable function circuit structure being delayed in groups - Google Patents
It is a kind of based on the multiple physics unclonable function circuit structure being delayed in groups Download PDFInfo
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- CN107133533A CN107133533A CN201710208358.7A CN201710208358A CN107133533A CN 107133533 A CN107133533 A CN 107133533A CN 201710208358 A CN201710208358 A CN 201710208358A CN 107133533 A CN107133533 A CN 107133533A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/77—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in smart cards
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Abstract
The invention discloses a kind of based on the multiple physics unclonable function circuit structure being delayed in groups, including the variable source module of multiple unitisation delay, Fuzzy extractor module and typing recurrent modules；Using multiple unitisation delay unit and the Fuzzy extractor based on liner code and hash function race, stability and the strong physics unclonable function of uniqueness are realized.
Description
Technical field
The method to circuit identifier is realized the present invention relates to a kind of manufacture changeability by device, especially one kind is based on
The multiple physics unclonable function circuit structure being delayed in groups.
Background technology
With the extensive use of ID cards, the method for producing ID is also multifarious, wherein physics unclonable function
(physical unclonable function, PUF) is because its is unclonable and realizes that the characteristic such as simple is shown one's talent.19th century
End, begins with the thought that scholar uses for reference bio-identification, by the random pattern on paper and optical markings, is used as the important items such as currency
Anti-counterfeiting mark.Afterwards, people realize electronics PUF using integrated circuit, and its core is interior in ic manufacturing process
In randomness, the randomness inevitable process deviation in manufacturing process is produced.
But, the Uniqueness and the stability problem caused by environmental factor caused by nonrandom systematic error,
So that physics unclonable function is not enough as ID performance, some optimisation techniques are currently had.Many counting methods exist steady
Qualitative deficiency, the shortcomings of uniqueness is poor.These weak points are improved, the main contents as this patent.
The content of the invention
The present invention propose it is a kind of based on the multiple physics unclonable function circuit structure being delayed in groups, using it is multiple into
The variable source module of groupization delay, realizes from error correction, strengthens stability, reduce the influence of systematic variability, strengthen uniqueness.
The technical solution adopted for the present invention to solve the technical problems is：
It is a kind of based on the multiple physics unclonable function circuit structure being delayed in groups, utilize multiple unitisation delay unit
Realize from the strong physics unclonable function of error correction and uniqueness, mainly include three below part：Multiple unitisation delay can
Become source module, Fuzzy extractor module and typing recurrent modules.
The variable source module of multiple unitisation delay, includes 2NIndividual multiple unitisation delay changing cell, one 2NSelect 1 choosing
Device and a delay variability quantizer are selected, corresponding multiple unitisation delay changing cell is obtained according to the pumping signal of input
Delay variability quantized result, obtain source response.Multiple unitisation delay changing cell includes 2*k+1 unitisation delay
Unit, each unitisation delay unit selects 1 selector to constitute by M delay unit and a M in parallel；Delay variability amount
Change configuration signal S of the device by given multiple unitisation delay changing cell, quantify the every of each unitisation delay unit respectively
The delay of individual ring, obtains each ring delay relation in groups, and correspondence repeats code character RC'sPosition.In registration phase, the delay can
It is denatured quantizer generating source and repeats code character RC；In regeneration stage, the delay variability quantizer repeats code character RC using source, entangles
The source response of just multiple unitisation delay changing cell.
Fuzzy extractor module, includes error correction module and redundancy compression module.Error correction module, which is utilized, is based on line
Property code safe sketch algorithm, calibration source response fault bit；Redundancy compression module, which is utilized, is based on linear feedback shift register
The redundancy of original response after the Li Ci hash functions race of Top of realization, compressed correction, is finally responded.
Typing recurrent modules, include memory and assistance data controller.Memory is used to deposit multiple unitisation delay
Assistance data in variable source module and Fuzzy extractor module routine；Assistance data controller, control assistance data
Typing and reproduction process, are write and read operation to memory.
Brief description of the drawings
Fig. 1 is the entire block diagram of the physics unclonable function circuit structure of the invention based on multi-delay；
Fig. 2 is the entire block diagram of multiple unitisation delay changing cell of the invention.
Embodiment
The invention will be further described below in conjunction with the accompanying drawings.
Referring to Figures 1 and 2, it is a kind of based on the multiple physics unclonable function circuit structure being delayed in groups, using multiple
Unitisation delay unit is realized from the strong physics unclonable function of error correction and uniqueness, mainly includes three below part：It is many
The variable source module (1) of weight unitisation delay, Fuzzy extractor module (2) and typing recurrent modules (3) (see Fig. 1).
The variable source module (1) of multiple unitisation delay, includes 2NIndividual multiple unitisation delay changing cell (4), one 2NChoosing
1 selector (5) and a delay variability quantizer (6), corresponding multiple unitisation is obtained according to the pumping signal of input
The quantized result of the delay variability of delay changing cell (4), obtains source response.Multiple unitisation delay changing cell (4) bag
Containing 2*k+1 unitisation delay unit (11), each unitisation delay unit (11) is by M delay unit (12) and one in parallel
Individual M selects 1 selector (13) to constitute (see Fig. 2)；Delay variability quantizer passes through given multiple unitisation delay changing cell (4)
Configuration signal S, quantify the delay of each ring of each unitisation delay unit (11) respectively, obtain each ring delay close in groups
System, corresponding source repeats code character RC'sPosition.In registration phase, delay variability quantizer (6) generating source repeats code character RC, and leads to
Cross assistance data controller (10) to recorded in memory (9), specifically with RC1Exemplified by, Schilling S1=1 the 1st ring of selection, measures week
Phase T1, then make S1=2 the 2nd rings of selection, measure cycle T2, by that analogy, measure cycle T1~TM, M cycle is compiled in groups two-by-two
Code, can obtain source and repeat code character RC'sPosition, i.e. RC1=(g (1,2) ... g (1, M), g (2,3) ... g (M-1, M)), g (i, j)=
Ti>Tj, make source respond m=RC1；In regeneration stage, delay variability quantizer (6) obtains RC ' using same method, and combines auxiliary
Help data source to repeat code character RC, obtain regeneration and repeat code character
ForThe matrix of row 2*k+1 row, then mi=De (Zi),Wherein ZiRepresent occur in Z the i-th row, De (X)=X
Then number of times be from the source response after error correction compared with multielement
Fuzzy extractor module (2), includes error correction module (7) and redundancy compression module (8).Error correction module
(7) the safe sketch algorithm based on liner code, the fault bit of calibration source response are utilized.In registration phase, m, meter are responded according to source
SS=m ⊕ C (X) are calculated, are stored SS as verification data；In regeneration stage, m ' is responded using verification data SS and renewable source, is obtained
To log-on messageWherein C (X) is Coded by Linear Codes, and D (C) decodes for liner code；Redundancy is compressed
Module (8) utilizes the source response after the Li Ci hash functions race of Top realized based on linear feedback shift register, compressed correction
Redundancy, finally responded.It is specific to index i as the initial shape of linear feedback shift register by the use of hash function
State, and NextState is constantly constructed, each state such as utilizes LSFR [128 126 as each row of Toeplitz matrix
101 99] Toeplitz matrix is constructed, then i'(2:128)=i (1:127),
The Toeplitz matrix of 128 row is obtained after repeating 127 times, the source of correction boil down to can be responded using the Toeplitz matrix
The final response of 128.Wherein, hash function index i, is generated, and pass through assistance data controller at random in registration phase
(10) it recorded in memory (9), in regeneration stage, read by assistance data controller (10) from memory (9).
Typing recurrent modules (3), include memory (9) and assistance data controller (10).Memory (9) is used to deposit many
The assistance data that weight unitisation is delayed in variable source module (1) and Fuzzy extractor module (2) course of work, including source duplication code
Group RC, verification data SS and hash function index i；Assistance data controller (10), controls the typing of assistance data and reappeared
Journey, is write and read operation to memory (9).
Above-described embodiment is used for illustrating the present invention, rather than limits the invention, the present invention spirit and
In scope of the claims, any modifications and changes made to the present invention both fall within protection scope of the present invention.
Claims (3)
1. it is a kind of based on the multiple physics unclonable function circuit structure being delayed in groups, including：Multiple unitisation delay is variable
Source module, Fuzzy extractor module and typing recurrent modules, it is characterised in that：The variable source module bag of the multiple unitisation delay
Containing 2NIndividual multiple unitisation delay changing cell, one 2NSelect 1 selector and a delay variability quantizer, according to input
Pumping signal obtain corresponding multiple unitisation delay changing cell delay variability quantized result, obtain source response；
The Fuzzy extractor module, including error correction module and redundancy compression module, the error correction module, which is utilized, is based on line
Property code safe sketch algorithm, calibration source response fault bit；The redundancy compression module, is posted using based on linear feedback shift
The redundancy of source response after the Li Ci hash functions race of Top that storage is realized, compressed correction, is finally responded；The record
Enter recurrent modules, including memory and assistance data controller, the memory can for depositing the multiple unitisation delay
The assistance data become in source module and Fuzzy extractor module routine；The assistance data controller, controls assistance data
Typing and reproduction process, the memory is write and read operation.
2. according to claim 1 based on the multiple physics unclonable function circuit structure being delayed in groups, its feature exists
In：The multiple unitisation delay changing cell includes 2*k+1 unitisation delay unit, and each unitisation delay unit is by M
Individual delay unit in parallel and a M select 1 selector to constitute.
3. according to claim 1 based on the multiple physics unclonable function circuit structure being delayed in groups, its feature exists
In：The delay variability quantizer is quantified each respectively by the configuration signal S of given multiple unitisation delay changing cell
The delay of each ring of unitisation delay unit, obtains each ring delay relation in groups, and corresponding source repeats code character RC'sPosition.
In registration phase, the delay variability quantizer generating source repeats code character RC；In regeneration stage, the delay variability quantifies
Device repeats code character RC using source, corrects the source response of multiple unitisation delay changing cell.
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107918741A (en) * | 2017-11-24 | 2018-04-17 | 北京中电华大电子设计有限责任公司 | A kind of reinforced electric line structure for realizing the unclonable function of physics |
| CN108932438A (en) * | 2018-06-27 | 2018-12-04 | 宁波大学 | The restructural PUF element circuit of multimodal fusion based on linear feedback |
| CN109086631A (en) * | 2018-06-27 | 2018-12-25 | 宁波大学 | A kind of strong/weakly mixing type PUF circuit of anti-model attack |
| CN114070565A (en) * | 2020-08-05 | 2022-02-18 | 美国亚德诺半导体公司 | Correcting physically unclonable function errors based on short integer solutions to lattice problems |
| CN114365134A (en) * | 2019-08-14 | 2022-04-15 | 亚萨合莱有限公司 | Secure identity card using unclonable functions |
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| CN103902930A (en) * | 2014-03-10 | 2014-07-02 | 杭州晟元芯片技术有限公司 | Physical unclonable function circuit structure based on ring oscillators |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107918741A (en) * | 2017-11-24 | 2018-04-17 | 北京中电华大电子设计有限责任公司 | A kind of reinforced electric line structure for realizing the unclonable function of physics |
| CN108932438A (en) * | 2018-06-27 | 2018-12-04 | 宁波大学 | The restructural PUF element circuit of multimodal fusion based on linear feedback |
| CN109086631A (en) * | 2018-06-27 | 2018-12-25 | 宁波大学 | A kind of strong/weakly mixing type PUF circuit of anti-model attack |
| CN109086631B (en) * | 2018-06-27 | 2021-08-10 | 宁波大学 | Strong/weak mixed PUF circuit for resisting model attack |
| CN108932438B (en) * | 2018-06-27 | 2021-08-10 | 宁波大学 | Multimode mixed reconfigurable PUF unit circuit based on linear feedback |
| CN114365134A (en) * | 2019-08-14 | 2022-04-15 | 亚萨合莱有限公司 | Secure identity card using unclonable functions |
| CN114070565A (en) * | 2020-08-05 | 2022-02-18 | 美国亚德诺半导体公司 | Correcting physically unclonable function errors based on short integer solutions to lattice problems |
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Inventor after: Zhang Shi Inventor after: Shen Haibin Inventor after: Sun Shichun Inventor after: Li Weiping Inventor before: Shen Haibin Inventor before: Sun Shichun Inventor before: Li Weiping |
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