CN107123691A - It is a kind of to mix the groove-shaped Schottky-barrier diode of knot - Google Patents
It is a kind of to mix the groove-shaped Schottky-barrier diode of knot Download PDFInfo
- Publication number
- CN107123691A CN107123691A CN201710289000.1A CN201710289000A CN107123691A CN 107123691 A CN107123691 A CN 107123691A CN 201710289000 A CN201710289000 A CN 201710289000A CN 107123691 A CN107123691 A CN 107123691A
- Authority
- CN
- China
- Prior art keywords
- layer
- groove
- epitaxial layer
- doped region
- schottky
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910052751 metal Inorganic materials 0.000 claims abstract description 35
- 239000002184 metal Substances 0.000 claims abstract description 35
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 22
- 238000002360 preparation method Methods 0.000 claims abstract description 21
- 229920005591 polysilicon Polymers 0.000 claims abstract description 20
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 16
- 239000000758 substrate Substances 0.000 claims abstract description 14
- 238000002156 mixing Methods 0.000 claims abstract description 13
- 230000035755 proliferation Effects 0.000 claims abstract description 13
- 125000006850 spacer group Chemical group 0.000 claims abstract description 4
- 238000000034 method Methods 0.000 claims description 15
- 238000002347 injection Methods 0.000 claims description 9
- 239000007924 injection Substances 0.000 claims description 9
- 238000005530 etching Methods 0.000 claims description 8
- 238000002513 implantation Methods 0.000 claims description 6
- 238000005516 engineering process Methods 0.000 claims description 4
- 239000000203 mixture Substances 0.000 claims description 4
- 229910021332 silicide Inorganic materials 0.000 claims description 4
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 4
- 238000009792 diffusion process Methods 0.000 claims description 3
- 238000000137 annealing Methods 0.000 claims description 2
- 238000001312 dry etching Methods 0.000 claims description 2
- 238000011049 filling Methods 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 230000004888 barrier function Effects 0.000 description 4
- 238000004088 simulation Methods 0.000 description 4
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 229910017052 cobalt Inorganic materials 0.000 description 1
- 239000010941 cobalt Substances 0.000 description 1
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 238000004151 rapid thermal annealing Methods 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
- H01L29/66143—Schottky diodes
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Groove-shaped Schottky-barrier diode is tied the present invention relates to technical field of semiconductors, more particularly to a kind of mix, including：Substrate；Epitaxial layer, is grown on the upper surface of substrate, and the upper surface of epitaxial layer is formed with the doped region that horizontal proliferation is formed with the top of multiple grooves, groove；The side surfaces of spacer medium layer, the sidepiece of covering groove and bottom and doped region；Polysilicon layer, fills each groove；The upper surface of polysilicon layer and upper surface flush one flat surfaces of formation of epitaxial layer；The first metal layer, is covered in above flat surfaces；Second metal layer, it is covered in the upper surface of the first metal layer, PN junction structure can be formed in Schottky-barrier diode, there is high withstand voltage low drain electrical property that trench type device has and the low pressure drop and surge capacity of Schottky rectifier structure simultaneously, the application demand of high-power and low-loss can be met；And the preparation method of groove-shaped Schottky-barrier diode is tied in above-mentioned mixing.
Description
Technical field
Groove-shaped Schottky-barrier diode is tied the present invention relates to technical field of semiconductors, more particularly to a kind of mix.
Background technology
Schottky-barrier diode possesses extremely short reverse recovery time because of it, the characteristics of relatively low forward conduction voltage drop,
Widely applied in the various fields such as solar cell module, multiple power source, frequency converter, communication, especially require to lead in low-power consumption
PN junction diode is gradually substituted in the application of domain, but due to normal Schottky barrier diode reverse leakage is bigger than normal, one
Determine to constrain its widely application in degree.
Schottky-barrier diode is common two ends power device, and it is formed by metal and low-doped n type epitaxial silicon
Schottky contacts carry out work, and being commonly used to be formed the metal of Schottky contacts has titanium, nickel, platinum and cobalt etc., these metals and table
The clean N-type silicon in face can form metal silicide after rapid thermal annealing.In recent years, trench technique is widely used, conventional
Slot type structure is to do dielectric layer.
The short drift region Schottky rectifier structure (MPS) of tradition contains planer schottky diode and P-I-N diodes
Structure, therefore its operation principle is also between two kinds of diodes.During MPS forward bias, as voltage is raised, schottky area
Conducting, the raceway groove that the electronics of epitaxial layer is formed by schottky area enters metal formation electric current；Continue to raise forward voltage, PN
Knot conducting, from p+ areas to N- drift regions injected holes, as voltage continues to raise, hole concentration continues to increase, most current-carrying
Son is built up in the presence of electric field and negative electrode height are tied, quantitatively almost equal with hole, conductance modulation now occurs
Area, body resistance reduction, shows the characteristic of mixed-rectification, existing Schottky rectification, while having PN junction rectification characteristic.
Mesolow Schottky-barrier diode can meet the low spy of forward conduction voltage drop using common slot type structure
Forward conduction voltage drop is very high in the case of point, but high pressure conventional trench type Schottky-barrier diode high current, it is impossible to meet big work(
The application demand of rate low-power consumption, therefore be badly in need of new method to obtain low forward conduction voltage drop Schottky barrier in the case of high current
Diode component.
The content of the invention
In view of the above-mentioned problems, the present invention, which proposes a kind of mix, ties groove-shaped Schottky-barrier diode, including：
Substrate；
Epitaxial layer, is grown on the upper surface of the substrate, and the upper surface of the epitaxial layer is formed with multiple grooves, the ditch
The doped region of horizontal proliferation is formed with the top of groove；
Spacer medium layer, covers the sidepiece of the groove and the side surfaces of bottom and the doped region；
Polysilicon layer, each groove of filling；
The upper surface of the polysilicon layer and upper surface flush one flat surfaces of formation of the epitaxial layer；
The first metal layer, is covered in above the flat surfaces；
Second metal layer, is covered in the upper surface of the first metal layer.
Above-mentioned Schottky-barrier diode, wherein, the two ends semicircular in shape in the section of the doped region.
Above-mentioned Schottky-barrier diode, wherein, the two ends in the section of the doped region are circular in a quarter.
Above-mentioned Schottky-barrier diode, wherein, depth bounds of the groove in the epitaxial layer is 1 μm~20
Between μm.
Above-mentioned Schottky-barrier diode, wherein, the doped region is p-type doped region.
A kind of preparation method for mixing the groove-shaped Schottky-barrier diode of knot, wherein, including：
There is provided a substrate by step S1；
Step S2, an epitaxial layer is grown in the upper surface of the substrate；
Step S3, first medium layer is deposited in the upper surface of the epitaxial layer；
Step S4, is performed etching to first medium layer, described outer to be ended in formation in first medium layer
Prolong multiple through holes of the upper surface of layer；
Step S5, is doped using injection technology into the epitaxial layer of the via bottoms, forms horizontal proliferation
Doped region；
Step S6, is performed etching, formation extends to the extension with first medium layer for mask to the doped region
Groove in layer；
Step S7, is situated between in the upper surface of the dielectric layer and sidepiece and the sidepiece of the groove and bottom covering one second
Matter layer；
Step S8, forms a polysilicon layer to fill the groove；
Step S9, etches the polysilicon layer and causes the upper surface of the polysilicon layer and the extension into the groove
Layer is flushed；
Step S10, removes first medium layer and the second dielectric layer above the epitaxial layer, will be described outer
Prolong one flat surfaces of upper surface formation of layer exposure, the upper surface of the polysilicon layer and the epitaxial layer exposed；
Step S11, in covering a first metal layer on the flat surfaces；
Step S12, in covering a second metal layer on the first metal layer.
Above-mentioned preparation method, wherein, the perpendicular bisector shape of the injection direction of the angled implantation process and the epitaxial layer
Into angle scope between 5 °~80 °.
Above-mentioned preparation method, wherein, after the completion of the step S11, also need quickly to move back the first metal layer
Fire processing, to form a metal silicide layer on the first metal layer surface, then performs the step S12.
Above-mentioned preparation method, wherein, the step S4, lithographic method is dry method in the step S6 and the step S9
Etching.
Above-mentioned preparation method, wherein, the doped region is p-type doped region.
Above-mentioned preparation method, wherein, in the step S5, using described in angled implantation process to the via bottoms
It is doped in epitaxial layer, forms the doped region of horizontal proliferation.
Above-mentioned preparation method, wherein, in the step S5, using described in vertical injection technique to the via bottoms
It is doped in epitaxial layer and heats diffusion, forms the doped region of horizontal proliferation.
Beneficial effect：A kind of groove-shaped Schottky-barrier diode proposed by the present invention and preparation method thereof, Neng Gou
PN junction structure is formed in Schottky-barrier diode, while having the high withstand voltage low drain electrical property and Xiao that trench type device has
The low pressure drop and surge capacity of special base rectifier structure, can meet the application demand of high-power and low-loss.
Brief description of the drawings
Fig. 1 ties the structural representation of groove-shaped Schottky-barrier diode for mixing in one embodiment of the invention；
Fig. 2 shows for the flow of the preparation method of the groove-shaped Schottky-barrier diode of mixing knot in one embodiment of the invention
It is intended to；
Fig. 3~9 are in the preparation method of the groove-shaped Schottky-barrier diode of mixing knot in one embodiment of the invention one
The schematic diagram of the structure of individual or multiple step formation；
Figure 10 be in one embodiment of the invention under the same terms the groove-shaped Schottky-barrier diode of mixing knot with it is existing
Schottky-barrier diode reverse characteristic simulation curve；
Figure 11 be in one embodiment of the invention under the same terms the groove-shaped Schottky-barrier diode of mixing knot with it is existing
Schottky-barrier diode forward characteristic simulation curve.
Embodiment
The present invention is further described with reference to the accompanying drawings and examples.
In a preferred embodiment, as shown in Figure 1, it is proposed that a kind of to mix the groove-shaped pole of Schottky barrier two of knot
Pipe, can include：
Substrate 101；
Epitaxial layer 102, is grown on the upper surface of substrate, and the upper surface of epitaxial layer is formed with multiple groove TR, groove TR's
Top is formed with the doped region 110 of horizontal proliferation；
The side surfaces of spacer medium layer 104, covering groove TR sidepiece and bottom and doped region 110；
Polysilicon layer 105, fills each groove TR；
The upper surface of polysilicon layer 105 and upper surface flush one flat surfaces of formation of epitaxial layer 102；
The first metal layer 107, is covered in above flat surfaces；
Second metal layer 108, is covered in the upper surface of the first metal layer 107.
In a preferred embodiment, the two ends in the section of doped region 110 are in circular arc.
In above-described embodiment, it is preferable that the two ends semicircular in shape in the section of doped region 110.
In a preferred embodiment, depth boundses of the groove TR in epitaxial layer 102 is between 1 μm~20 μm.
In a preferred embodiment, doped region 110 is p-type doped region.
As shown in Fig. 2 present invention also offers a kind of preparation method for mixing the groove-shaped Schottky-barrier diode of knot,
The structure of wherein single or multiple step formation can as shown in figs. 3 to 9, and the preparation method can include：
There is provided a substrate 101 by step S1；
Step S2, an epitaxial layer 102 is grown in the upper surface of substrate 101；
Step S3, first medium layer 103 is deposited in the upper surface of epitaxial layer 102；
Step S4, is performed etching to first medium layer 103, to end in epitaxial layer 102 in formation in first medium layer 103
Upper surface multiple through hole H；
Step S5, is doped using injection technology into the epitaxial layer 102 of through hole H bottoms, forms mixing for horizontal proliferation
Miscellaneous area 110；
Step S6, is that mask is performed etching to doped region 110 with first medium layer 103, formation is extended in epitaxial layer 102
Groove TR；
Step S7, in the upper surface of first medium layer 103 and sidepiece and groove TR sidepiece and bottom covering one second
Dielectric layer 104；
Step S8, forms a polysilicon layer 105 to fill groove TR；
Step S9, etches polycrystalline silicon layer 105 causes that the upper surface of polysilicon layer 105 and epitaxial layer 102 are neat into groove TR
It is flat；
Step S10, removes the first medium layer 103 and second dielectric layer 104 of the top of epitaxial layers 102, by epitaxial layer 102
The upper surface of exposure, the upper surface of polysilicon layer 105 and the epitaxial layer 102 exposed forms a flat surfaces；
Step S11, in covering a first metal layer 107 on flat surfaces；
Step S12, in covering a second metal layer 108 on the first metal layer 107.
Specifically, flat surfaces can be the surface of general planar；Etches polycrystalline silicon layer 105 may be such that in step S9
The upper surface of polysilicon layer 105 is slightly below the upper surface of epitaxial layer 102, now can fall portion by over etching in step slo
The upper surface for dividing epitaxial layer is that may be such that flat surfaces are as far as possible flat.
In a preferred embodiment, the injection direction of angled implantation process and the perpendicular bisector formation of epitaxial layer 102
The scope of angle is between 5 °~80 °.
In a preferred embodiment, after the completion of step S11, also need to carry out at short annealing the first metal layer 107
Reason, to form a metal silicide layer (not shown in accompanying drawing) on the surface of the first metal layer 107, then performs step S12.
In a preferred embodiment, step S4, lithographic method is dry etching in step S6 and step S9.
In a preferred embodiment, doped region 110 is p-type doped region.
In a preferred embodiment, in step S5, using the epitaxial layer from angled implantation process to through hole H bottoms
It is doped in 102, forms the doped region of horizontal proliferation.
In a preferred embodiment, in step S5, using epitaxial layer 102 from vertical injection technique to through hole H bottoms
Inside it is doped and heats diffusion, forms the doped region of horizontal proliferation.
As shown in Figure 9 and Figure 10, under the same terms the mixing groove-shaped Schottky-barrier diode of knot with it is existing and common
Schottky-barrier diode forward characteristic simulation curve and reverse characteristic simulation curve it is visible, the groove-shaped Xiao Te of mixing knot
The characteristic of base barrier diode is better than existing Schottky-barrier diode.
In summary, a kind of mix proposed by the present invention ties groove-shaped Schottky-barrier diode and preparation method thereof,
PN junction structure can be formed in Schottky-barrier diode, while the high withstand voltage low drain electrical property that there is trench type device to have
And the low pressure drop and surge capacity of Schottky rectifier structure, the application demand of high-power and low-loss can be met.
By explanation and accompanying drawing, the exemplary embodiments of the specific structure of embodiment are given, based on essence of the invention
God, can also make other conversions.Although foregoing invention proposes existing preferred embodiment, however, these contents are not intended as
Limitation.
For a person skilled in the art, read after described above, various changes and modifications undoubtedly will be evident.
Therefore, appended claims should regard whole variations and modifications of the true intention and scope that cover the present invention as.In power
Any and all scope and content of equal value, are all considered as still belonging to the intent and scope of the invention in the range of sharp claim.
Claims (12)
1. a kind of mix the groove-shaped Schottky-barrier diode of knot, it is characterised in that including：
Substrate；
Epitaxial layer, is grown on the upper surface of the substrate, and the upper surface of the epitaxial layer is formed with multiple grooves, the groove
Top is formed with the doped region of horizontal proliferation；
Spacer medium layer, covers the sidepiece of the groove and the side surfaces of bottom and the doped region；
Polysilicon layer, each groove of filling；
The upper surface of the polysilicon layer and upper surface flush one flat surfaces of formation of the epitaxial layer；
The first metal layer, is covered in above the flat surfaces；
Second metal layer, is covered in the upper surface of the first metal layer.
2. Schottky-barrier diode according to claim 1, it is characterised in that the two ends in the section of the doped region are in
It is semicircle.
3. Schottky-barrier diode according to claim 2, it is characterised in that the two ends in the section of the doped region are in
A quarter is circular.
4. Schottky-barrier diode according to claim 1, it is characterised in that the groove is in the epitaxial layer
Depth bounds is between 1 μm~20 μm.
5. Schottky-barrier diode according to claim 1, it is characterised in that the doped region is p-type doped region.
6. a kind of preparation method for mixing the groove-shaped Schottky-barrier diode of knot, it is characterised in that including：
There is provided a substrate by step S1；
Step S2, an epitaxial layer is grown in the upper surface of the substrate；
Step S3, first medium layer is deposited in the upper surface of the epitaxial layer；
Step S4, is performed etching to first medium layer, to end in the epitaxial layer in formation in first medium layer
Upper surface multiple through holes；
Step S5, is doped using injection technology into the epitaxial layer of the via bottoms, forms mixing for horizontal proliferation
Miscellaneous area；
Step S6, is performed etching, formation is extended in the epitaxial layer with first medium layer for mask to the doped region
Groove；
Step S7, is situated between in the upper surface of first medium layer and sidepiece and the sidepiece of the groove and bottom covering one second
Matter layer；
Step S8, forms a polysilicon layer to fill the groove；
Step S9, etches the polysilicon layer and causes that the upper surface of the polysilicon layer and the epitaxial layer are neat into the groove
It is flat；
Step S10, removes first medium layer and the second dielectric layer above the epitaxial layer, by the epitaxial layer
The upper surface of exposure, the upper surface of the polysilicon layer and the epitaxial layer exposed forms a flat surfaces；
Step S11, in covering a first metal layer on the flat surfaces；
Step S12, in covering a second metal layer on the first metal layer.
7. preparation method according to claim 6, it is characterised in that the injection direction of the angled implantation process with it is described
The scope of the angle of the perpendicular bisector formation of epitaxial layer is between 5 °~80 °.
8. preparation method according to claim 6, it is characterised in that after the completion of the step S11, also need to described first
Metal level carries out short annealing processing, to form a metal silicide layer on the first metal layer surface, then performs the step
Rapid S12.
9. preparation method according to claim 6, it is characterised in that the step S4, the step S6 and the step
Lithographic method is dry etching in S9.
10. preparation method according to claim 6, it is characterised in that the doped region is p-type doped region.
11. preparation method according to claim 6, it is characterised in that in the step S5, using angled implantation process to
It is doped in the epitaxial layer of the via bottoms, forms the doped region of horizontal proliferation.
12. preparation method according to claim 6, it is characterised in that in the step S5, using vertical injection technique to
It is doped in the epitaxial layer of the via bottoms and heats diffusion, forms the doped region of horizontal proliferation.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710289000.1A CN107123691A (en) | 2017-04-27 | 2017-04-27 | It is a kind of to mix the groove-shaped Schottky-barrier diode of knot |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710289000.1A CN107123691A (en) | 2017-04-27 | 2017-04-27 | It is a kind of to mix the groove-shaped Schottky-barrier diode of knot |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN107123691A true CN107123691A (en) | 2017-09-01 |
Family
ID=59725114
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710289000.1A Pending CN107123691A (en) | 2017-04-27 | 2017-04-27 | It is a kind of to mix the groove-shaped Schottky-barrier diode of knot |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107123691A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109786472A (en) * | 2019-03-01 | 2019-05-21 | 重庆平伟实业股份有限公司 | A kind of power semiconductor |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102916055A (en) * | 2012-10-11 | 2013-02-06 | 杭州立昂微电子股份有限公司 | Trenched Schottky-barrier diode and manufacturing method thereof |
| CN103887168A (en) * | 2012-12-19 | 2014-06-25 | 竹懋科技股份有限公司 | Manufacture method of Schottky rectifier element and forming method |
-
2017
- 2017-04-27 CN CN201710289000.1A patent/CN107123691A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102916055A (en) * | 2012-10-11 | 2013-02-06 | 杭州立昂微电子股份有限公司 | Trenched Schottky-barrier diode and manufacturing method thereof |
| CN103887168A (en) * | 2012-12-19 | 2014-06-25 | 竹懋科技股份有限公司 | Manufacture method of Schottky rectifier element and forming method |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109786472A (en) * | 2019-03-01 | 2019-05-21 | 重庆平伟实业股份有限公司 | A kind of power semiconductor |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101645448B (en) | Rectifier with pn clamp regions under trenches | |
| US20180358478A1 (en) | Trench type junction barrier schottky diode with voltage reducing layer and manufacturing method thereof | |
| US6710418B1 (en) | Schottky rectifier with insulation-filled trenches and method of forming the same | |
| CN103872099B (en) | Semiconductor Device with Step-Shaped Edge Termination, and Method for Manufacturing a Semiconductor Device | |
| US20030006473A1 (en) | Power diode having improved on resistance and breakdown voltage | |
| CN101800252B (en) | Groove-shaped Schottky barrier rectifier and manufacture method thereof | |
| CN109935634A (en) | The Schottky diode being integrated in super junction power MOSFET | |
| CN103606551A (en) | Silicon carbide channel-type semiconductor device and manufacturing method thereof | |
| CN106024915B (en) | A kind of super junction Schottky diode | |
| CN102593154B (en) | Trench gate diode with P-type buried layer structure | |
| CN103208529B (en) | Semiconductor diode and the method for forming semiconductor diode | |
| CN109037071A (en) | A kind of preparation method of shield grid power device | |
| CN106158631A (en) | Band buried regions groove power device and preparation method thereof | |
| CN104124151A (en) | Groove structure Schottky barrier diode and production method thereof | |
| CN107123691A (en) | It is a kind of to mix the groove-shaped Schottky-barrier diode of knot | |
| CN216120263U (en) | Multi-level trench semiconductor device | |
| CN210607276U (en) | Groove type power device based on Schottky structure | |
| CN115148826A (en) | Manufacturing method of deep-groove silicon carbide JFET structure | |
| CN106229342A (en) | A kind of metal-oxide-semiconductor diode of many accumulation layers | |
| RU122204U1 (en) | Schottky Diode with Groove Structure | |
| CN103367396A (en) | Super junction Schottky semiconductor device and preparation method thereof | |
| CN111261725A (en) | Novel ultra-low voltage drop Schottky diode and preparation method thereof | |
| CN108470719B (en) | Composite TMBS device and manufacturing method thereof | |
| CN207624707U (en) | Diamond schottky diode | |
| CN106158983A (en) | The manufacture method of a kind of superjunction diode and superjunction diode |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| CB02 | Change of applicant information | ||
| CB02 | Change of applicant information |
Address after: 401331 No. 25 Xiyong Avenue, Xiyong Town, Shapingba District, Chongqing Applicant after: Huarun Microelectronics (Chongqing) Co., Ltd. Address before: 401331 No. 25 Xiyong Avenue, Xiyong Town, Shapingba District, Chongqing Applicant before: China Aviation (Chongqing) Microelectronics Co., Ltd. |
|
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20170901 |