CN107102820A - The data processing method and device of a kind of NAND flash memory equipment - Google Patents
The data processing method and device of a kind of NAND flash memory equipment Download PDFInfo
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- CN107102820A CN107102820A CN201710251994.8A CN201710251994A CN107102820A CN 107102820 A CN107102820 A CN 107102820A CN 201710251994 A CN201710251994 A CN 201710251994A CN 107102820 A CN107102820 A CN 107102820A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0614—Improving the reliability of storage systems
- G06F3/0619—Improving the reliability of storage systems in relation to data integrity, e.g. data losses, bit errors
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0659—Command handling arrangements, e.g. command buffers, queues, command scheduling
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
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Abstract
The embodiment of the invention discloses a kind of data processing method of NAND flash memory equipment and device, methods described includes：When receiving the data write request order of main frame transmission, judge pending block number according to corresponding Page pages in the memory cell to be operated of NAND flash memory equipment；According to Page pages of type and the data characteristics of pending block number evidence, according to preset rules to the pending block number according to progress complementary operation, and the mark of data processing method is carried out in the meta-data region of Page pages of the memory cell correspondence to be operated；To the pending block number after processing according to encoding, and the coded data after coding is write into the memory cell to be operated.The data processing method and device for the NAND flash memory equipment that the embodiment of the present invention is proposed, can be effectively reduced the error in data probability of happening of NAND flash memory equipment, lift the overall performance of NAND flash memory equipment.
Description
Technical field
The present invention relates to the data processing method and dress of technical field of data storage, more particularly to a kind of NAND flash memory equipment
Put.
Background technology
Solid state hard disc has qualitative leap compared with traditional mechanical hard disk in access speed.And MLC nand flash memories are set
It is standby, by the way that MLC nand flash memories are applied into solid state hard disc, the storage density of memory can be greatly increased, reduction is stored into
This.MLC NAND refer to multilevel-cell (Multi-Level Cell) nand flash memory.One memory cell of nand flash memory is such as
Fruit only stores a bit data, referred to as SLC (Single-Level Cell) nand flash memory, if 2 bit numbers can be stored
According to the referred to as nand flash memory of multilevel-cell (MLC), if the NAND of 3 bit datas, referred to as three-layer unit (TLC) can be stored
Flash memory.But, due to storing multi-bit data in a memory cell of MLC NAND flash memory equipments, the probability of corrupt data is big
Big increase.Below 20nm is reduced to especially with process, the electric charge number stored in floating gate layer is reduced, the thickness of oxide layer
In the case that degree is smaller, the electric charge for being stored in floating gate layer is more likely escaped, so as to cause data to retain the probability that mistake occurs
Greatly improve.
At present, the method for MLC NAND flash memory equipment error in data is reduced in the prior art mainly including following several：
Utilize the error correcting techniques such as BCH/LDPC.They are general correcting data error technologies, it is not necessary to understand what mistake was produced
Principle and mechanism, available for the error in data appointed under conjunction scene.This method needs some redundant digits to compile initial data
Code.If the number of errors in flash memory it is more, it is necessary to redundant digit it is more, these redundant digits need additionally occupy depositing for flash memory
Space is stored up, therefore the data that user can store just tail off.Mainly there are two kinds of error in data modes in nand flash memory：It is a kind of
It is data interference mistake, another is that data retain mistake.Under current process, data retain the probability of mistake much
Mistake is disturbed more than data.Therefore, BCH/LDPC is as general correcting data error technology, and it can not utilize the difference of this probability
Property come reduce mistake probability.
Asymmetric encoding technology.The technology is by changing the data pattern inputted, the higher data of reduction threshold voltage
The probability of appearance, data are reduced with this and retain mistake.This method retains mistake to data good effect, but to data
Interference mistake is invalid, in some instances it may even be possible to can increase data interference mistake.The program is increased by a flag for every 16 bit data
Come identify this 16 bit be 0 number it is many or number of 1 is more, this flag is also required to be stored in nand flash memory, thus this
The space cost for planting coding is 6.25%.If asymmetric encoding is used alone, this space cost comes for solid state hard disc
Say, be not too big.But it is invalid to interference mistake, it is therefore necessary to simultaneously because this encryption algorithm is just for data reservation mistake
Using general BCH/LDPC error correcting techniques, the space cost of such asymmetric encoding algorithm 6.3% is exactly BCH/LDPC redundancies
Extra increased cost outside code, it is difficult to be received.
Therefore, how to provide at a kind of data for the error in data probability of happening that can be effectively reduced NAND flash memory equipment
Reason method is technical problem urgently to be resolved hurrily at present.
The content of the invention
In view of the above problems, the present invention proposes the data processing method and device of a kind of NAND flash memory equipment, Neng Gouyou
The error in data probability of happening of effect ground reduction NAND flash memory equipment, lifts the overall performance of NAND flash memory equipment.
One aspect of the present invention includes there is provided a kind of data processing method of NAND flash memory equipment, methods described:
When receiving the data write request order of main frame transmission, judge pending block number according to treating in NAND flash memory equipment
Corresponding Page pages is operated in memory cell；
According to Page pages of type and the data characteristics of pending block number evidence, according to preset rules to described pending piece
Data carry out complementary operation, and carry out data processing method in the meta-data region of Page pages of the memory cell correspondence to be operated
Mark；
To the pending block number after processing according to encoding, and the coded data after coding is write into the storage to be operated
Unit.
Alternatively, methods described also includes：
It is the corresponding meta-data region of each memory cell setting in the NAND flash memory equipment, the meta-data region in advance
The data corresponding data processing method different Page pages for identifying write storage unit.
Alternatively, the type and the data characteristics of pending block number evidence according to Page pages, according to preset rules pair
The pending block number enters line number according to progress complementary operation, and in the meta-data region of Page pages of the memory cell correspondence to be operated
According to the mark of processing mode, including：
When described Page pages is lower page page, judge whether the pending block number 0 quantity in is more than 1
Quantity；If so, the corresponding data of each bit in the pending block number evidence are then carried out into complementary operation, and the fortune that will negate
Calculate the meta-data region of corresponding data processing method mark write-in Page pages of the memory cell correspondence to be operated；Otherwise, directly
The pending block number evidence is performed the encoding operation.
Alternatively, the type and the data characteristics of pending block number evidence according to Page pages, according to preset rules pair
The pending block number enters line number according to progress complementary operation, and in the meta-data region of Page pages of the memory cell correspondence to be operated
According to the mark of processing mode, including：
When described Page pages is upper page page, judge whether the pending block number 1 quantity in is more than 0
Quantity；If so, the corresponding data of each bit in the pending block number evidence are then carried out into complementary operation, and the fortune that will negate
Calculate the meta-data region of corresponding data processing method mark write-in Page pages of the memory cell correspondence to be operated；Otherwise, directly
The pending block number evidence is performed the encoding operation.
Alternatively, after the coded data after by coding writes the memory cell to be operated, methods described also includes：
When receiving the data read request order that the main frame is sent, read from Page pages of memory cell to be operated
Target data is taken, and the target data is decoded；
Obtain the identification information in the meta-data region of Page pages of the target data correspondence；
Whether the identification information is judged as the corresponding data processing method mark of complementary operation, if so, after then decoding
Block number in the corresponding data of each bit carry out complementary operation, and by obtained block number according to main frame is transferred to, otherwise,
Decoded block number evidence is directly transferred to main frame.
It is still another aspect of the present invention to provide a kind of data processing equipment of NAND flash memory equipment, described device includes:
Determination module, for when receiving the data write request order of main frame transmission, judging that pending block number evidence exists
Corresponding Page pages in the memory cell to be operated of NAND flash memory equipment；
Data processing module, for the type according to Page pages and the data characteristics of pending block number evidence, according to default
Rule corresponds to Page pages of meta-data region to the pending block number according to progress complementary operation, and in the memory cell to be operated
Carry out the mark of data processing method；
Command execution module, for the pending block number after data processing module processing according to encoding, and general
Coded data after coding writes the memory cell to be operated.
Alternatively, described device also includes：
Configuration module, for being that each memory cell in the NAND flash memory equipment sets corresponding metadata in advance
Area, the meta-data region is used to identify the different Page pages corresponding data processing method of data of write storage unit.
Alternatively, the data processing module, specifically for when described Page pages is lower page page, judging described
Whether pending block number 0 quantity in is more than 1 quantity, if so, then by each bit pair in the pending block number evidence
The data answered carry out complementary operation, and the corresponding data processing method mark write-in of the complementary operation storage to be operated is single
The meta-data region of Page pages of member correspondence；
The command execution module, the quantity being additionally operable to when in the pending block number evidence 0 is less than or equal to 1 quantity
When, directly the pending block number evidence is performed the encoding operation.
Alternatively, the data processing module, specifically for when described Page pages is upper page page, judging described
Whether pending block number 1 quantity in is more than 0 quantity, if so, then by each bit pair in the pending block number evidence
The data answered carry out complementary operation, and the corresponding data processing method mark write-in of the complementary operation storage to be operated is single
The meta-data region of Page pages of member correspondence；
The command execution module, the quantity being additionally operable to when in the pending block number evidence 1 is less than or equal to 0 quantity
When, directly the pending block number evidence is performed the encoding operation.
Alternatively, the command execution module, is additionally operable to the coded data after by coding and writes the storage to be operated
After unit, when receiving the data read request order that the main frame is sent, from Page pages of memory cell to be operated
Target data is read, and the target data is decoded；
Described device also includes：
Acquisition module, the identification information in meta-data region for obtaining Page pages of the target data correspondence；
Accordingly, the determination module, be additionally operable to judge the identification information whether as the corresponding data of complementary operation at
Reason mode is identified；
The data processing module, is additionally operable to when the result of determination of the determination module is that the identification information is fortune of negating
When calculating corresponding data processing method mark, the corresponding data of each bit in decoded block number evidence are subjected to fortune of negating
Calculate, and by obtained block number according to main frame is transferred to, otherwise, decoded block number evidence is directly transferred to main frame.
The data processing method and device of NAND flash memory equipment provided in an embodiment of the present invention, receive the number of main frame transmission
During according to write request order, according to corresponding Page pages of type in memory cell to be operated and the data of pending block number evidence
Feature, treats process block data according to preset rules and carries out complementary operation, and the member in the memory cell of NAND flash memory equipment
Data field stores a small amount of information to identify the corresponding data processing method of data storage in Page pages of memory cell correspondence, and then
Use such information for reducing data reservation mistake, the error in data probability of happening of NAND flash memory equipment can be effectively reduced,
Lift the overall performance of NAND flash memory equipment.
Described above is only the general introduction of technical solution of the present invention, in order to better understand the technological means of the present invention,
And can be practiced according to the content of specification, and in order to allow above and other objects of the present invention, feature and advantage can
Become apparent, below especially exemplified by the embodiment of the present invention.
Brief description of the drawings
By reading the detailed description of hereafter preferred embodiment, various other advantages and benefit is common for this area
Technical staff will be clear understanding.Accompanying drawing is only used for showing the purpose of preferred embodiment, and is not considered as to the present invention
Limitation.And in whole accompanying drawing, identical part is denoted by the same reference numerals.In the accompanying drawings：
Fig. 1 is the structural representation of NAND memory cell；
Fig. 2 is the threshold voltage distribution schematic diagram of memory cell in MLC NAND flash memory equipments；
Fig. 3 is memory cell wrong caused threshold voltage shift signal because data retain in MLC NAND flash memory equipments
Figure；
Fig. 4 is a kind of flow chart of the data processing method of NAND flash memory equipment of the embodiment of the present invention；
Fig. 5 is the specific process chart of the write operation processing for 4K bytes；
Fig. 6 is the specific process chart of the read operation processing for 4K bytes；
Fig. 7 is a kind of structural representation of the data processing equipment of NAND flash memory equipment of the embodiment of the present invention；
Fig. 8 is a kind of structural representation of the data processing equipment of NAND flash memory equipment of another embodiment of the present invention.
Embodiment
The exemplary embodiment of the disclosure is more fully described below with reference to accompanying drawings.Although showing the disclosure in accompanying drawing
Exemplary embodiment, it being understood, however, that may be realized in various forms the disclosure without should be by embodiments set forth here
Limited.On the contrary, these embodiments are provided to facilitate a more thoroughly understanding of the present invention, and can be by the scope of the present disclosure
Complete conveys to those skilled in the art.
Those skilled in the art of the present technique are appreciated that unless otherwise defined, all terms used herein (including technology art
Language and scientific terminology), with the general understanding identical meaning with the those of ordinary skill in art of the present invention.Should also
Understand, those terms defined in such as general dictionary, it should be understood that with the context with prior art
The consistent meaning of meaning, and unless by specific definitions, otherwise will not be explained with idealization or excessively formal implication.
NAND flash memory equipment is a kind of nonvolatile memory of high-performance low-power-consumption, is just obtained in storage industry now
To being increasingly widely applied, especially solid state hard disc is even more that development is swift and violent.All the time, the manufacturing process of nand flash memory is more next
It is smaller.Fig. 1 is the structural representation of NAND memory cell, referring to Fig. 1, and each NAND memory cell is from an only bit data
SLC, develops into MLC/TLC now.The benefit of these development is it is clear that the quantity of memory cell is continuous on same area
Therefore increase, cost constantly declines.But incident challenge is that the distance between each memory cell is less and less, oxygen
Change layer more and more thinner, the interference of consecutive storage unit electric signal is more and more stronger, therefore error in data is more and more.
Fig. 2 is the threshold voltage distribution schematic diagram of memory cell in MLC NAND flash memory equipments, referring to Fig. 2, for MLC
For nand flash memory, a memory cell deposits 2 bit datas, and one of bit belongs to lower page, and another bit belongs to
upper page.Memory cell can be programmed into 4 kinds of different threshold voltages according to this 2 bit data.In Fig. 2, work as data storage
During for 11 (data mode data state being 0), the threshold voltage of memory cell meets leftmost Gaussian Profile；When storage number
According to for 01 (data state be 1, upper page be 0, lower page for 1) when, the threshold voltage of memory cell meets time
The Gaussian Profile on the left side；When data storage is 00 (data state are 2), the threshold voltage of memory cell meets time the right
Gaussian Profile；When data storage be 10 (data state be 3, upper page 0) be 1, lowerpage be when, memory cell
Threshold voltage meet the Gaussian Profile of rightmost.
After a memory cell programming, as time goes by, the electric charge of storage may be escaped, so as to occur number
According to reservation mistake.This mistake can cause the threshold voltage of this memory cell to reduce, as shown in Figure 3.It can be seen that, a storage
The thermal balance voltage of unit is that, in 0V or so, so threshold voltage is higher, may more occur electric charge effusion, so as to cause data to be protected
Stay mistake., it was also found that retaining mistake for data, upper page generations are relatively more from 1 to 0 mistake, and lower in statistics
Page generations are relatively more from 0 to 1 mistake.
Therefore, retaining mistake the embodiments of the invention provide a kind of data that reduced by reducing the probability of data 10 and 00
Data processing method, on the premise of not increasing excessive redundant digit, preventing take up excessive memory space, to be effectively reduced
The error in data probability of happening of NAND flash memory equipment, lifts the overall performance of NAND flash memory equipment.
Fig. 4 diagrammatically illustrates the flow chart of the data processing method of the NAND flash memory equipment of one embodiment of the invention.
Reference picture 4, the data processing method of the NAND flash memory equipment of the embodiment of the present invention specifically includes following steps：
S11, when receiving the data write request order of main frame transmission, judge pending block number according in NAND flash memory equipment
Memory cell to be operated in corresponding Page pages.
S12, the type according to Page pages and pending block number evidence data characteristics, wait to locate according to preset rules to described
Block number is managed according to progress complementary operation, and data processing side is carried out in the meta-data region of Page pages of the memory cell correspondence to be operated
The mark of formula.
S13, to the pending block number after processing according to encoding, it is and the coded data write-in after coding is described to be operated
Memory cell.
The data processing method of NAND flash memory equipment provided in an embodiment of the present invention, receives the data write-in of main frame transmission
During request command, according to corresponding Page pages of type in memory cell to be operated and the data characteristics of pending block number evidence,
Process block data, which are treated, according to preset rules carries out complementary operation, and the meta-data region in the memory cell of NAND flash memory equipment
Store a small amount of information to identify the corresponding data processing method of data storage in Page pages of memory cell correspondence, and then utilize this
A little information retain mistake to reduce data, can be effectively reduced the error in data probability of happening of NAND flash memory equipment, are lifted
The overall performance of NAND flash memory equipment.
Further, methods described also includes being each memory cell setting correspondence in the NAND flash memory equipment in advance
Meta-data region the step of.Wherein, the meta-data region is corresponding for identifying the different Page pages data of write storage unit
Data processing method.
In the embodiment of the present invention, step S12 can further include following two situations, specific as follows：
When described Page pages is lower page page, judge whether the pending block number 0 quantity in is more than 1
Quantity；If so, the corresponding data of each bit in the pending block number evidence are then carried out into complementary operation, and the fortune that will negate
Calculate the meta-data region of corresponding data processing method mark write-in Page pages of the memory cell correspondence to be operated；Otherwise, directly
The pending block number evidence is performed the encoding operation.
When described Page pages for lower page page, namely when described Page pages is upper page page, judge
Whether the pending block number 1 quantity in is more than 0 quantity；If so, then by each bit in the pending block number evidence
The corresponding data in position carry out complementary operation, and to be operated deposit the corresponding data processing method mark write-in of complementary operation is described
The meta-data region of Page pages of storage unit correspondence；Otherwise, directly the pending block number evidence is performed the encoding operation.
Technical solution of the present invention is explained by taking MLC NAND flash memory equipments as an example below.
When MLC nand flash memories are applied to solid state hard disc, accessed in the way of block device.The size of one block is more
For 512 bytes or 4K bytes.In the embodiment of the present invention by taking 4K bytes as an example.When main frame writes 4K byte datas, solid state hard disc
Main controller can be encoded according to the BCH/LDPC technologies of use, while for each 4K byte data, main controller all can
The metadata of a little byte is added, the management information for data storage.The data method that the embodiment of the present invention is proposed is exactly profit
The data that nand flash memory is reduced with the memory block of metadata retain mistake.
For solid state hard disc, the reliability of data is most important.According to Law of Barrel, the reliability of data occurs
Problem is frequently experienced in worst situation.Especially present solid state hard disc capacity is increasing, and small probability event also can be with
The increase of statistical sample and become very important.Such as, for data retain mistake, if the data stored in NAND
All being 10, (data state are that 3, upper page are 1, lower page for 0), then may occur many data and protect
Stay mistake, it is likely that more than the error correcting capability of the technologies such as BCH/LDPC, so as to cause irrecoverable error, influence data can
By property.Therefore, the data processing method that the embodiment of the present invention is proposed seeks to prevent the generation of this extreme case.Meanwhile, it is
Reduction redundant digit occupies too many memory space, and for one piece of (512 bytes or 4K bytes) data, the embodiment of the present invention is only in member
Data field stores a small amount of bit and carrys out mark data processing mode.Referring to Fig. 5, Fig. 5 is the tool of the write operation processing for 4K bytes
Body process chart, is specifically included：When receiving the data write request order of main frame transmission, the use in initialization metadata area
In the identification information of the different Page pages corresponding data processing method of data of mark write storage unit, in a specific implementation
In example, the identification information can be set to 0.For the block number evidence of the lower page in memory cell to be operated, if original
0 quantity is more than 1 quantity in data, then by monoblock data reversal, that is, carries out complementary operation, and stores 1 in meta-data region, with
The data for representing corresponding Page pages of the memory cell are the data after data reversal, subsequently to carry out digital independent
When, obtain initial data by carrying out corresponding reverse turn operation.If 0 quantity is less than or equal to 1 quantity in initial data,
Monoblock data are not inverted then, and 0 is stored in meta-data region, be with the data for representing corresponding Page pages of the memory cell
The data handled without data reversal, can subsequently be directly read and send main frame.Then, by after complementary operation
Data are encoded by BCH/LDPC error correcting techniques, and are sent to memory cell.For the upper in memory cell to be operated
Page block number evidence, if 1 quantity is more than 0 quantity in initial data, is deposited by monoblock data reversal, and in meta-data region
Storage 1.If 1 quantity is less than or equal to 0 quantity in initial data, monoblock data are not inverted, and in meta-data region
Storage 0.
In the embodiment of the present invention, after the coded data after by coding writes the memory cell to be operated, the side
Method is further comprising the steps of：
When receiving the data read request order that the main frame is sent, read from Page pages of memory cell to be operated
Target data is taken, and the target data is decoded；
Obtain the identification information in the meta-data region of Page pages of the target data correspondence；
Whether the identification information is judged as the corresponding data processing method mark of complementary operation, if so, after then decoding
Block number in the corresponding data of each bit carry out complementary operation, and by obtained block number according to main frame is transferred to, otherwise,
Decoded block number evidence is directly transferred to main frame.
In a specific embodiment, referring to Fig. 6, Fig. 6 is the specific processing stream of the read operation processing for 4K bytes
Cheng Tu, is specifically included：When receiving the data read request order of main frame transmission, read from Page pages of memory cell to be operated
Access evidence, and the data read are decoded by BCH/LDPC error correcting techniques, then obtain Page pages of data storage
Meta-data region in identification information, if the identification information of meta-data region be 1, then it represents that Page pages of the data are by data
Therefore the corresponding data of each bit in decoded block number evidence, are carried out complementary operation, and incite somebody to action by the data after reversion
To block number according to being transferred to main frame, otherwise directly by decoded block number according to being transferred to main frame.
The data processing method of NAND flash memory equipment provided in an embodiment of the present invention, with reference to error correction such as general BCH/LDPC
Technology, the meta-data region in using NAND FLASH as the block device of storage medium stores the mould that a small amount of information carrys out mark data
Formula, uses such information for reducing data reservation mistake, is effectively reduced the error in data probability of happening of NAND flash memory equipment.
Technical scheme provided in an embodiment of the present invention, is not limited only to MLC NAND flash memory equipments, for TLC and SLC NAND
Flash memory device is equally applicable, for the data processing method embodiment of TLC and SLC NAND flash memory equipments, due to its with
The data processing method embodiment of MLC NAND flash memory equipments is substantially similar, therefore does not do excessive description, and related part can be found in
The part explanation of the data processing method embodiment of MLC NAND flash memory equipments.
In addition, technical scheme provided in an embodiment of the present invention, is not limited only to solid state hard disc application, for NAND FLASH
For other block devices of storage medium, simply by the presence of meta-data region, it can be set using nand flash memory provided in an embodiment of the present invention
Standby data processing method, to be effectively reduced the error in data probability of happening of NAND flash memory equipment.
For embodiment of the method, in order to be briefly described, therefore it is all expressed as to a series of combination of actions, but this area
Technical staff should know that the embodiment of the present invention is not limited by described sequence of movement, because according to present invention implementation
Example, some steps can be carried out sequentially or simultaneously using other.Secondly, those skilled in the art should also know, specification
Described in embodiment belong to necessary to preferred embodiment, the involved action not necessarily embodiment of the present invention.
Fig. 7 diagrammatically illustrates the structural representation of the data processing equipment of the NAND flash memory equipment of one embodiment of the invention
Figure.The data processing equipment of the NAND flash memory equipment of the embodiment of the present invention can be arranged in the main controller of NAND flash memory equipment,
Or realized by main controller.Reference picture 7, the data processing equipment of the NAND flash memory equipment of the embodiment of the present invention, which is specifically included, to be sentenced
Cover half block 701, data processing module 702 and command execution module 703, wherein：Described determination module 701, for connecing
When receiving the data write request order of main frame transmission, judge pending block number according to the storage list to be operated in NAND flash memory equipment
Corresponding Page pages in member；Described data processing module 702, for the type according to Page pages and pending block number evidence
Data characteristics, according to preset rules to the pending block number according to progress complementary operation, and in the memory cell pair to be operated
Answer the mark of Page pages of meta-data region progress data processing method；Described command execution module 703, for the data
Pending block number after the processing of processing module 702 writes described to be operated deposit according to being encoded, and by the coded data after coding
Storage unit.
The data processing equipment of NAND flash memory equipment provided in an embodiment of the present invention, writes in the data for receiving main frame transmission
It is special according to the data of corresponding Page pages of type in memory cell to be operated and pending block number evidence when entering request command
Levy, treating process block data according to preset rules carries out complementary operation, and first number in the memory cell of NAND flash memory equipment
A small amount of information is stored according to area to identify the corresponding data processing method of data storage, Jin Erli in Page pages of memory cell correspondence
Data are reduced with these information and retain mistake, the error in data probability of happening of NAND flash memory equipment can be effectively reduced, carried
Rise the overall performance of NAND flash memory equipment.
In an alternate embodiment of the present invention where, the data processing equipment of the NAND flash memory equipment also includes in accompanying drawing
Unshowned configuration module, described configuration module, for being that each memory cell in the NAND flash memory equipment is set in advance
Corresponding meta-data region is put, the meta-data region is used to identify at the different Page pages corresponding data of data of write storage unit
Reason mode.
In the embodiment of the present invention, the data processing module 702, specifically for being lowerpage pages when described Page pages
When, the quantity whether pending block number 0 quantity in is more than 1 is judged, if so, then will be every in the pending block number evidence
The corresponding data of one bit carry out complementary operation, and will be treated described in the corresponding data processing method mark write-in of complementary operation
Operate the meta-data region of Page pages of memory cell correspondence；
The command execution module 703, the quantity being additionally operable to when in the pending block number evidence 0 is less than or equal to 1 number
During amount, directly the pending block number evidence is performed the encoding operation.
In the embodiment of the present invention, the data processing module 702, specifically for being upperpage pages when described Page pages
When, the quantity whether pending block number 1 quantity in is more than 0 is judged, if so, then will be every in the pending block number evidence
The corresponding data of one bit carry out complementary operation, and will be treated described in the corresponding data processing method mark write-in of complementary operation
Operate the meta-data region of Page pages of memory cell correspondence；
The command execution module 703, the quantity being additionally operable to when in the pending block number evidence 1 is less than or equal to 0 number
During amount, directly the pending block number evidence is performed the encoding operation.
In an alternate embodiment of the present invention where, the command execution module 703, is additionally operable to the coding after by coding
Data are write after the memory cell to be operated, when receiving the data read request order that the main frame is sent, from treating
Target data is read in Page pages of operation memory cell, and the target data is decoded.
Accordingly, reference picture 8, described device also includes acquisition module 704, described acquisition module 704, for obtaining
State the identification information in the meta-data region of Page pages of target data correspondence；
Further, described determination module 701, be additionally operable to judge the identification information whether as complementary operation it is corresponding
Data processing method is identified；
Described data processing module 702, is additionally operable to when the result of determination of the determination module 701 is the identification information
When being that the corresponding data processing method of complementary operation is identified, the corresponding data of each bit in decoded block number evidence are entered
Row complementary operation, and by obtained block number according to main frame is transferred to, otherwise, decoded block number evidence is directly transferred to main frame.
For device embodiment, because it is substantially similar to embodiment of the method, so description is fairly simple, it is related
Part illustrates referring to the part of embodiment of the method.
The data processing method and device of NAND flash memory equipment provided in an embodiment of the present invention, receive the number of main frame transmission
During according to write request order, according to corresponding Page pages of type in memory cell to be operated and the data of pending block number evidence
Feature, treats process block data according to preset rules and carries out complementary operation, and the member in the memory cell of NAND flash memory equipment
Data field stores a small amount of information to identify the corresponding data processing method of data storage in Page pages of memory cell correspondence, and then
Use such information for reducing data reservation mistake, the error in data probability of happening of NAND flash memory equipment can be effectively reduced,
Lift the overall performance of NAND flash memory equipment.
Device embodiment described above is only schematical, wherein the unit illustrated as separating component can
To be or may not be physically separate, the part shown as unit can be or may not be physics list
Member, you can with positioned at a place, or can also be distributed on multiple NEs.It can be selected according to the actual needs
In some or all of module realize the purpose of this embodiment scheme.Those of ordinary skill in the art are not paying creativeness
Work in the case of, you can to understand and implement.
Through the above description of the embodiments, those skilled in the art can be understood that each embodiment can
Realized by the mode of software plus required general hardware platform, naturally it is also possible to pass through hardware.Understood based on such, on
The part that technical scheme substantially in other words contributes to prior art is stated to embody in the form of software product, should
Computer software product can be stored in a computer-readable storage medium, such as ROM/RAM, magnetic disc, CD, including some fingers
Order is to cause a computer equipment (can be personal computer, server, or network equipment etc.) to perform each implementation
Method described in some parts of example or embodiment.
Although in addition, it will be appreciated by those of skill in the art that some embodiments in this include institute in other embodiments
Including some features rather than further feature, but not the combination of the feature of be the same as Example mean be in the scope of the present invention
Within and form different embodiments.For example, in the following claims, embodiment claimed it is any it
One mode can use in any combination.
Finally it should be noted that：The above embodiments are merely illustrative of the technical solutions of the present invention, rather than its limitations；Although
The present invention is described in detail with reference to the foregoing embodiments, it will be understood by those within the art that：It still may be used
To be modified to the technical scheme described in foregoing embodiments, or equivalent substitution is carried out to which part technical characteristic；
And these modification or replace, do not make appropriate technical solution essence depart from various embodiments of the present invention technical scheme spirit and
Scope.
Claims (10)
1. a kind of data processing method of NAND flash memory equipment, it is characterised in that including:
When receiving the data write request order of main frame transmission, judge pending block number according in the to be operated of NAND flash memory equipment
Corresponding Page pages in memory cell；
According to Page pages of type and the data characteristics of pending block number evidence, according to preset rules to the pending block number evidence
Complementary operation is carried out, and the mark of data processing method is carried out in the meta-data region of Page pages of the memory cell correspondence to be operated
Know；
To the pending block number after processing according to encoding, and the coded data write-in storage to be operated after coding is single
Member.
2. according to the method described in claim 1, it is characterised in that methods described also includes：
It is the corresponding meta-data region of each memory cell setting in the NAND flash memory equipment in advance, the meta-data region is used for
Identify the different Page pages corresponding data processing method of data of write storage unit.
3. method according to claim 1 or 2, it is characterised in that described according to Page pages of type and pending piece
The data characteristics of data, according to preset rules to the pending block number according to progress complementary operation, and in the storage to be operated
The meta-data region of Page pages of unit correspondence carries out the mark of data processing method, including：
When described Page pages is lower page page, the number whether pending block number 0 quantity in is more than 1 is judged
Amount；If so, then by the pending block number, the corresponding data of each bit carry out complementary operation in, and by complementary operation
The meta-data region of corresponding data processing method mark write-in Page pages of the memory cell correspondence to be operated；Otherwise, it is directly right
The pending block number evidence is performed the encoding operation.
4. method according to claim 1 or 2, it is characterised in that described according to Page pages of type and pending piece
The data characteristics of data, according to preset rules to the pending block number according to progress complementary operation, and in the storage to be operated
The meta-data region of Page pages of unit correspondence carries out the mark of data processing method, including：
When described Page pages is upper page page, the number whether pending block number 1 quantity in is more than 0 is judged
Amount；If so, then by the pending block number, the corresponding data of each bit carry out complementary operation in, and by complementary operation
The meta-data region of corresponding data processing method mark write-in Page pages of the memory cell correspondence to be operated；Otherwise, it is directly right
The pending block number evidence is performed the encoding operation.
5. according to the method described in claim 1, it is characterised in that coded data write-in after by coding is described to be operated to deposit
After storage unit, methods described also includes：
When receiving the data read request order that the main frame is sent, mesh is read from Page pages of memory cell to be operated
Data are marked, and the target data is decoded；
Obtain the identification information in the meta-data region of Page pages of the target data correspondence；
Whether the identification information is judged as the corresponding data processing method mark of complementary operation, if so, then by decoded piece
The corresponding data of each bit carry out complementary operation in data, and by obtained block number according to main frame is transferred to, otherwise, directly
Decoded block number evidence is transferred to main frame.
6. a kind of data processing equipment of NAND flash memory equipment, it is characterised in that including:
Determination module, for when receiving the data write request order of main frame transmission, judging pending block number according in NAND
Corresponding Page pages in the memory cell to be operated of flash memory device；
Data processing module, for the type according to Page pages and the data characteristics of pending block number evidence, according to preset rules
To the pending block number according to progress complementary operation, and carried out in the meta-data region of Page pages of the memory cell correspondence to be operated
The mark of data processing method；
Command execution module, for that according to encoding, and will be encoded to the pending block number after data processing module processing
Coded data afterwards writes the memory cell to be operated.
7. device according to claim 6, it is characterised in that described device also includes：
Configuration module, for being that each memory cell in the NAND flash memory equipment sets corresponding meta-data region, institute in advance
Stating meta-data region is used to identify the different Page pages corresponding data processing method of data of write storage unit.
8. the device according to claim 6 or 7, it is characterised in that the data processing module, specifically for when described
Page pages when being lower page page, judges the quantity whether pending block number 0 quantity in is more than 1, if so, then by
The corresponding data of the pending block number each bit in carry out complementary operation, and by the corresponding data of complementary operation
Reason mode identifies the meta-data region for writing Page pages of the memory cell correspondence to be operated；
The command execution module, is additionally operable to when 0 quantity is less than or equal to 1 quantity to the pending block number in, directly
Connect and the pending block number evidence is performed the encoding operation.
9. the device according to claim 6 or 7, it is characterised in that the data processing module, specifically for when described
Page pages when being upper page page, judges the quantity whether pending block number 1 quantity in is more than 0, if so, then by
The corresponding data of the pending block number each bit in carry out complementary operation, and by the corresponding data of complementary operation
Reason mode identifies the meta-data region for writing Page pages of the memory cell correspondence to be operated；
The command execution module, is additionally operable to when 1 quantity is less than or equal to 0 quantity to the pending block number in, directly
Connect and the pending block number evidence is performed the encoding operation.
10. device according to claim 6, it is characterised in that the command execution module, is additionally operable to after by coding
Coded data is write after the memory cell to be operated, when receiving the data read request order that the main frame is sent,
Target data is read from Page pages of memory cell to be operated, and the target data is decoded；
Described device also includes：
Acquisition module, the identification information in meta-data region for obtaining Page pages of the target data correspondence；
Accordingly, whether the determination module, be additionally operable to judge the identification information as the corresponding data processing side of complementary operation
Formula is identified；
The data processing module, is additionally operable to when the result of determination of the determination module is that the identification information is complementary operation pair
During the data processing method mark answered, the corresponding data of each bit in decoded block number evidence are subjected to complementary operation,
And by obtained block number according to main frame is transferred to, otherwise, decoded block number evidence is directly transferred to main frame.
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| CN201710251994.8A CN107102820B (en) | 2017-04-17 | 2017-04-17 | The data processing method and device of a kind of NAND flash memory equipment |
| PCT/CN2018/083355 WO2018192488A1 (en) | 2017-04-17 | 2018-04-17 | Data processing method and apparatus for nand flash memory device |
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| CN201710251994.8A CN107102820B (en) | 2017-04-17 | 2017-04-17 | The data processing method and device of a kind of NAND flash memory equipment |
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2018192488A1 (en) * | 2017-04-17 | 2018-10-25 | 北京紫光得瑞科技有限公司 | Data processing method and apparatus for nand flash memory device |
| CN109407989A (en) * | 2018-10-18 | 2019-03-01 | 郑州云海信息技术有限公司 | A kind of method and apparatus that metadata is write with a brush dipped in Chinese ink |
| CN110704235A (en) * | 2019-09-23 | 2020-01-17 | 深圳忆联信息系统有限公司 | SSD data protection method and device, computer equipment and storage medium |
| WO2020082348A1 (en) * | 2018-10-26 | 2020-04-30 | Yangtze Memory Technologies Co., Ltd. | Data processing method for memory and related data processor |
| CN111488122A (en) * | 2017-10-25 | 2020-08-04 | 华为技术有限公司 | Data writing method and storage device |
| CN114281271A (en) * | 2022-03-07 | 2022-04-05 | 北京得瑞领新科技有限公司 | Method for judging reliability of NAND flash memory data, storage medium and storage device |
| CN115617567A (en) * | 2022-12-16 | 2023-01-17 | 珠海妙存科技有限公司 | Data recovery method and device of flash memory, electronic equipment and medium |
| CN116757158A (en) * | 2023-08-11 | 2023-09-15 | 深圳致赢科技有限公司 | Data management method based on semiconductor storage |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101025792A (en) * | 2006-02-17 | 2007-08-29 | 游旭 | Audio book and pickup body |
| CN101083138A (en) * | 2007-05-30 | 2007-12-05 | 忆正存储技术(深圳)有限公司 | Flash memory data read-write processing method |
| CN101999148A (en) * | 2007-12-27 | 2011-03-30 | 韩商英得联股份有限公司 | Flash memory device and flash memory programming method equalizing wear-level |
| CN103578565A (en) * | 2012-07-19 | 2014-02-12 | 百富计算机技术（深圳）有限公司 | Calibration method and device of NAND Flash memory chip |
| CN104715102A (en) * | 2014-12-30 | 2015-06-17 | 华立仪表集团股份有限公司 | Intelligent ammeter load curve design method based on dichotomy |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9170933B2 (en) * | 2010-06-28 | 2015-10-27 | International Business Machines Corporation | Wear-level of cells/pages/sub-pages/blocks of a memory |
| JP5962258B2 (en) * | 2012-06-29 | 2016-08-03 | 富士通株式会社 | Data conversion method, data conversion apparatus, and data conversion program |
| CN107102820B (en) * | 2017-04-17 | 2018-07-06 | 北京得瑞领新科技有限公司 | The data processing method and device of a kind of NAND flash memory equipment |
-
2017
- 2017-04-17 CN CN201710251994.8A patent/CN107102820B/en active Active
-
2018
- 2018-04-17 WO PCT/CN2018/083355 patent/WO2018192488A1/en active Application Filing
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101025792A (en) * | 2006-02-17 | 2007-08-29 | 游旭 | Audio book and pickup body |
| CN101083138A (en) * | 2007-05-30 | 2007-12-05 | 忆正存储技术(深圳)有限公司 | Flash memory data read-write processing method |
| CN101999148A (en) * | 2007-12-27 | 2011-03-30 | 韩商英得联股份有限公司 | Flash memory device and flash memory programming method equalizing wear-level |
| CN103578565A (en) * | 2012-07-19 | 2014-02-12 | 百富计算机技术（深圳）有限公司 | Calibration method and device of NAND Flash memory chip |
| CN104715102A (en) * | 2014-12-30 | 2015-06-17 | 华立仪表集团股份有限公司 | Intelligent ammeter load curve design method based on dichotomy |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2018192488A1 (en) * | 2017-04-17 | 2018-10-25 | 北京紫光得瑞科技有限公司 | Data processing method and apparatus for nand flash memory device |
| CN111488122A (en) * | 2017-10-25 | 2020-08-04 | 华为技术有限公司 | Data writing method and storage device |
| CN109407989A (en) * | 2018-10-18 | 2019-03-01 | 郑州云海信息技术有限公司 | A kind of method and apparatus that metadata is write with a brush dipped in Chinese ink |
| CN109407989B (en) * | 2018-10-18 | 2022-02-18 | 郑州云海信息技术有限公司 | Method and device for flashing metadata |
| WO2020082348A1 (en) * | 2018-10-26 | 2020-04-30 | Yangtze Memory Technologies Co., Ltd. | Data processing method for memory and related data processor |
| CN110704235A (en) * | 2019-09-23 | 2020-01-17 | 深圳忆联信息系统有限公司 | SSD data protection method and device, computer equipment and storage medium |
| CN114281271A (en) * | 2022-03-07 | 2022-04-05 | 北京得瑞领新科技有限公司 | Method for judging reliability of NAND flash memory data, storage medium and storage device |
| CN115617567A (en) * | 2022-12-16 | 2023-01-17 | 珠海妙存科技有限公司 | Data recovery method and device of flash memory, electronic equipment and medium |
| CN116757158A (en) * | 2023-08-11 | 2023-09-15 | 深圳致赢科技有限公司 | Data management method based on semiconductor storage |
| CN116757158B (en) * | 2023-08-11 | 2024-01-23 | 深圳致赢科技有限公司 | Data management method based on semiconductor storage |
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| Publication number | Publication date |
|---|---|
| WO2018192488A1 (en) | 2018-10-25 |
| CN107102820B (en) | 2018-07-06 |
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