CN107102193B - Signal noise processing device in electric parameter metering process - Google Patents

Signal noise processing device in electric parameter metering process Download PDF

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CN107102193B
CN107102193B CN201610097257.2A CN201610097257A CN107102193B CN 107102193 B CN107102193 B CN 107102193B CN 201610097257 A CN201610097257 A CN 201610097257A CN 107102193 B CN107102193 B CN 107102193B
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CN107102193A (en
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尹汝泼
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Shanghai Beiling Co Ltd
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    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/06Measuring real component; Measuring reactive component
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/25Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques

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Abstract

The invention discloses a signal noise processing device in an electrical parameter metering process, which comprises a waveform processing module, a metering operation module and a noise calculation module which are electrically connected with each other; the waveform processing module is used for sampling an analog signal, converting the analog signal into a first digital signal and respectively outputting the first digital signal to the metering operation module and the noise calculation module; the noise calculation module is used for extracting a noise component from the first digital signal and outputting the noise component to the metering operation module as a second digital signal; the metering operation module is used for calculating the active energy according to the first digital signal, and the metering operation module is also used for calculating the average value of the active power and the second digital signal so as to reduce the noise component in the average value of the active power. The signal noise processing device can realize the extraction and compensation of key noise components under small signals and improve the performance of small signal measurement.

Description

Signal noise processing device in electric parameter metering process
Technical Field
The invention relates to a signal noise processing device in an electric parameter metering process, in particular to a noise estimation and compensation device in a small-signal electric parameter metering process.
Background
Along with the rapid development and popularization of power grid intellectualization, higher and higher requirements are provided for the electric quantity metering at a smart power grid terminal, the continuous enhanced communication, information processing and rich application capabilities are taken as basic functions, the first influence of intellectualization on the electric parameter metering is the great improvement of the metering precision or performance, and if the realization of one thousandth of metering precision in a ten thousandth of signal dynamic range becomes reality, the intelligent electric parameter metering method also becomes a focus of competitive deer-by-deer of numerous manufacturers at present. The improvement in metrology performance is a systematic engineering across analog circuit, digital circuit design and data information soft processing. Improving the accuracy of the analog sampling circuit can affect and improve the output performance of the circuit from the root, but can also bring about great changes in the circuit structure and design, for example, an analog ADC (analog-to-digital converter) based on a Sigma-Delta modulator is commonly applied to a traditional electricity metering circuit, and the output accuracy is generally between 16 bits and 19 bits. The metering terminal is sensitive to cost, the digital signal processing implementation cost is low, and the digital signal processing is used as an auxiliary compensation mode under the condition that the improvement of the analog precision is limited, so that the metering terminal becomes a key way for solving the performance problem. The traditional digital compensation mostly adopts simple gain and offset correction, does not consider the randomness of signal noise, and the deviation and nonlinearity of the traditional digital compensation are most obvious in small-signal measurement.
Disclosure of Invention
The invention provides a signal noise processing device in an electrical parameter metering process, aiming at overcoming the defects that the traditional digital compensation mostly adopts simple gain and offset correction in the small signal electrical parameter metering process in the prior art, the randomness of signal noise is not considered, and the deviation and nonlinearity are most obvious in small signal metering.
The invention solves the technical problems through the following technical scheme:
the invention provides a signal noise processing device in an electrical parameter metering process, which is characterized by comprising a waveform processing module, a metering operation module and a noise calculation module which are electrically connected with each other;
the waveform processing module is used for sampling an analog signal, converting the analog signal into a first digital signal and respectively outputting the first digital signal to the metering operation module and the noise calculation module;
the noise calculation module is used for extracting a noise component from the first digital signal and outputting the noise component to the metering operation module as a second digital signal;
the metering operation module is used for calculating active power according to the first digital signal and calculating active energy according to the active power, and the metering operation module is also used for calculating the average value of the active power and the second digital signal so as to reduce the noise component in the average value of the active power.
Preferably, the waveform processing module comprises a gain amplifier, an analog-to-digital converter, a high-pass filter and a gain compensator which are connected in sequence;
the gain amplifier is used for scaling the analog signal to a linear working interval of the analog-to-digital converter and outputting the analog signal to the analog-to-digital converter;
the analog-to-digital converter is used for converting the analog signal into a first precision digital signal, converting the first precision digital signal into a second precision digital signal with higher precision and outputting the second precision digital signal to the high-pass filter;
the high-pass filter is used for filtering out a direct-current component in the second precision digital signal and then outputting the direct-current component to the gain compensator;
the gain compensator is configured to perform global gain correction on the second precision digital signal and generate the first digital signal.
Preferably, the analog signal includes an analog current signal and an analog voltage signal, and the first digital signal includes a first digital current signal and a first digital voltage signal.
Preferably, the noise calculation module includes a first low-pass filter, a signal extractor, a zero-phase trap, a noise measurement multiplier, a direct current taking filter, and a bias compensator;
the first low-pass filter is used for filtering out high-frequency components in the first digital signal so as to generate a low-pass filtering signal and output the low-pass filtering signal to the signal decimator;
the signal decimator is used for decimating the low-pass filtering signal according to a sampling period and outputting the decimated signal to the zero-phase wave trap;
the zero phase trap is used for removing a power frequency signal component of a current signal in the extracted signal, extracting a noise component in the current signal and outputting the noise component to the noise measurement multiplier;
the noise measurement multiplier is used for calculating a noise component in the current signal and a voltage signal in the extracted signal to obtain a noise instantaneous power value and outputting the noise instantaneous power value to the direct current taking filter;
the direct current taking filter is used for filtering high-frequency fluctuation components in the noise instantaneous power value so as to generate a noise average power value and output the noise average power value to the bias compensator;
the offset compensator is used for adjusting the direct current component in the noise average power value and generating the second digital signal.
Preferably, the cut-off frequency of the first low-pass filter is lower than 100Hz and higher than 50 Hz.
Preferably, the zero-phase trap comprises a first notch filter, a first buffer, a first sequence inversion module, a second notch filter, a second buffer, and a second sequence inversion module, which are connected in sequence;
the first notch filter is a notch filter with a center frequency of 50Hz, the first buffer is used for buffering output signals of the first notch filter in a segmented manner, and the first sequence reversing module is used for reversing the sequence of buffered data in the first buffer and outputting the reversed data to the second notch filter;
the second notch filter is the same filter as the first notch filter, the second buffer is used for buffering an output signal of the second notch filter in a segmented manner, and the second sequence reversing module is used for reversing the sequence of buffered data in the second buffer and outputting the reversed data to the noise measurement multiplier.
Preferably, the metering operation module comprises a multiplier, a second low-pass filter, a compensator and an integrator which are connected in sequence;
the multiplier is used for calculating the instantaneous active power of the first digital signal and outputting the calculated instantaneous active power to the second low-pass filter;
the second low-pass filter is used for filtering high-frequency fluctuation components in the instantaneous active power, extracting direct-current components as an active power average value and outputting the active power average value to the compensator;
the compensator is used for subtracting the active power average value and the second digital signal to reduce the noise component in the active power average value and outputting the calculation result to the integrator;
the integrator is used for performing integral operation on the active power average value compensated by the compensator to generate a measurement result of active energy.
The positive progress effects of the invention are as follows: the method is based on the metering noise characteristic, utilizes the signal to extract the key component in the noise and estimates the average power of the noise, and the noise estimation has the self-adaptive characteristic. The signal noise processing device can realize the extraction and compensation of key noise components under small signals and improve the performance of the small signal measurement result.
Drawings
Fig. 1 is a schematic structural diagram of a signal noise processing apparatus in an electrical parametric metrology process according to a preferred embodiment of the present invention.
Fig. 2 is a schematic structural diagram of a waveform processing module of the signal noise processing apparatus in the electrical parametric metrology process according to the preferred embodiment of the invention.
Fig. 3 is a schematic structural diagram of a metering operation module of the signal noise processing apparatus in the electrical parameter metering process according to the preferred embodiment of the invention.
Fig. 4 is a schematic structural diagram of a noise calculation module of the signal noise processing apparatus in the electrical parametric metrology process according to the preferred embodiment of the invention.
Fig. 5 is a schematic structural diagram of a zero-phase trap of a noise calculation module of a signal noise processing apparatus in an electrical parametric metrology process according to a preferred embodiment of the invention.
Fig. 6 is a schematic diagram illustrating the effect of noise average power estimation performed by the signal noise processing apparatus in the electrical parameter measurement process according to the preferred embodiment of the present invention.
Detailed Description
The invention is further illustrated by the following examples, which are not intended to limit the scope of the invention.
As shown in fig. 1-5, the signal noise processing device in the electrical parameter measurement process of the present invention includes a waveform processing module 1, a measurement operation module 2 and a noise calculation module 3, which are electrically connected to each other;
the waveform processing module 1 is used for sampling an analog signal, converting the analog signal into a first digital signal and respectively outputting the first digital signal to the metering operation module 2 and the noise calculation module 3;
the noise calculation module 3 is configured to extract a noise component from the first digital signal, and output the noise average power component as a second digital signal to the metering operation module 2;
the metering operation module 2 is used for performing active power calculation according to the first digital signal, extracting a direct current component from a calculation result to be used as an active power average value, and the metering operation module 2 is also used for performing operation on the active power average value and the second digital signal to reduce a noise component in the active power average value and realize error compensation in an electric parameter metering process.
The waveform processing module 1 may be divided into a current signal channel and a voltage signal channel, and respectively receive an analog current signal and an analog voltage signal as analog signal inputs (that is, the analog signal may specifically include an analog current signal and an analog voltage signal), and correspondingly, the first digital signal also includes a first digital current signal and a first digital voltage signal, and the current signal channel and the voltage signal channel both include a gain amplifier 11, an analog-to-digital converter 12, a high-pass filter 13, and a gain compensator 14, which are sequentially connected;
the gain amplifier 11 is configured to scale the analog signal to a linear operating range of the analog-to-digital converter 12, and output the analog signal to the analog-to-digital converter 12;
the analog-to-digital converter 12 is configured to convert the analog signal into a first-precision digital signal, convert the first-precision digital signal into a second-precision digital signal with higher precision, and output the second-precision digital signal to the high-pass filter 13;
specifically, the analog-to-digital converter 12 may include a Sigma-Delta modulator and a digital decimation filter connected in sequence, where the analog signal is first output to the Sigma-Delta modulator to be converted into a 1-bit low-precision serial digital signal (i.e., the first-precision digital signal), in this embodiment, the order of the Sigma-Delta modulator selects the second order, and outputs the converted first-precision digital signal to the digital decimation filter to generate a second-precision digital signal with higher precision, in this embodiment, a third-order SINC filter is selected as the digital decimation filter, and the digital decimation filter outputs the second-precision digital signal to the high-pass filter 13.
The high-pass filter 13 is configured to filter a direct-current component in the second precision digital signal and output the filtered direct-current component to the gain compensator 14; in this embodiment, the cut-off frequency of the high-pass filter 13 is selected to be 1-2Hz, and the dc component in the second precision digital signal can be removed by filtering.
The gain compensator 14 is configured to perform global gain correction on the second precision digital signal from which the dc component is removed, and generate the first digital signal.
In this embodiment, the parameter designs of the current signal channel and the voltage signal channel in the waveform processing module 1 are all the same, so as to ensure symmetry between the two channels.
The noise calculation module 3 comprises a first low-pass filter 31, a signal decimator 32, a zero-phase trap 33, a noise metric multiplier 34, a direct current taking filter 35 and an offset compensator 36;
the noise calculation module 3 is connected to the waveform processing module 1, and performs noise estimation by using the received first digital current signal and first digital voltage signal, specifically, the noise spectrum distribution in the signal generated by the waveform processing module 1 is mainly composed of 1/f (f represents frequency) flicker noise inversely proportional to frequency when being lower than the corner frequency, the noise calculation module utilizes this characteristic to extract low-frequency noise as a key component in noise, and limits a high-frequency component in the received first digital signal by the first low-pass filter 31 in order to avoid interference caused by a power frequency harmonic signal, in this embodiment, the cut-off frequency of the first low-pass filter 31 should be lower than 100Hz and higher than the power frequency 50Hz, preferably, in this embodiment, set to 95Hz, and outputs the filtered signal to the signal extractor 32 for data speed reduction processing, on one hand, the operation amount and the power consumption can be reduced, and on the other hand, the resource overhead of the buffer in the zero-phase trap 33 connected with the buffer can be effectively reduced.
The first low-pass filter 31 is configured to filter out a high-frequency component in the first digital signal to generate a low-pass filtered signal and output the low-pass filtered signal to the signal decimator 32;
the signal decimator 32 is configured to decimate the low-pass filtered signal according to a sampling period, and output a decimated current signal to the zero-phase trap 33; the signal extractor 32 performs extraction on the low-pass filtered signal every D (D is an integer power of 2) sampling points (that is, the signal extractor is a D-time extractor), and preferably, the extraction multiple D satisfies that the extracted rate is greater than three times of the power frequency 50 Hz.
The zero-phase trap 33 is configured to remove a power frequency signal component of a current signal in the extracted signal, extract a noise component in the current signal, and output the noise component to the noise measurement multiplier 34;
after the zero-phase trap 33 removes the power frequency signal component of the current signal in the extracted signal, the remaining components are used as key components of noise, that is, the noise component, for this reason, the central frequency of the zero-phase trap 33 is set to be the power frequency of 50Hz, in order to reduce the loss of the noise component near the power frequency, the bandwidth of the zero-phase trap 33 should be designed to be as small as possible, ideally, the bandwidth approaches to 0Hz, in this embodiment, the bandwidth is selected to be 0.05Hz, and the zero-phase trap 33 is a non-causal zero-phase filter; under the condition of small signal measurement, the noise power generated by multiplying the power frequency voltage signal by the noise signal near the power frequency in the current signal is relatively high, the noise power estimation generates obvious distortion due to the nonlinear phase characteristics of a common wave trap, and the zero-phase wave trap 33 keeps the phase relation of the noise components unchanged while removing the power frequency components, so that the phase distortion is avoided.
The zero-phase trap 33 includes a first notch filter 331, a first buffer 332, a first order inversion module 333, a second notch filter 334, a second buffer 335, and a second order inversion module 336 connected in sequence;
the first notch filter 331 is a notch filter whose center frequency is power frequency 50Hz, preferably, the 3dB bandwidth approaches to 0Hz, the first buffer 332 is configured to buffer the output signal of the first notch filter 331 in a segmented manner, preferably, the buffer space capacity is set to be an integral multiple of the number of sampling points in a power frequency period, and the first order reversing module 333 is configured to reverse the order of the buffer data in the first buffer 332, and output the reversed data to the second notch filter 334;
the second notch filter 334 is a filter whose center frequency is power frequency 50Hz, the second notch filter 334 is completely the same as the first notch filter 331, the second buffer 335 is configured to buffer an output signal of the second notch filter 334 in a segmented manner, a size of a buffer space is completely the same as that of the first buffer 332, and the second order inversion module 336 is configured to invert an order of buffer data in the second buffer 335 and output the inverted data to the noise measurement multiplier 34.
Thus, one input signal connected to the noise measure multiplier 34 is a noise component in the current signal generated after the first digital current signal passes through the first low-pass filter 31, the signal extractor 32 and the zero-phase trap 33, and the other input signal connected to the noise measure multiplier 34 is a voltage signal generated after the first digital voltage signal passes through the first low-pass filter 31 and the signal extractor 32, where the first low-pass filter 31 is used to limit a high-frequency component in the input first digital voltage signal, a cut-off frequency of the first low-pass filter is the same as that of the first low-pass filter processing the first digital current signal, and the signal extractor 32 also performs data speed reduction processing, and an extraction multiple of the first low-pass filter is the same as that of the signal extractor processing the first digital current signal; when the small signal is measured, the power frequency signal of the current channel is very small, the noise power ratio generated by multiplying the power frequency signal by the noise of the voltage channel is relatively small, the first digital voltage signal is processed by the signal extractor 32 and then is not processed by the zero phase trap and is directly output to the noise measurement multiplier 34, and the first digital voltage signal is multiplied by the extracted noise component in the first digital current signal to obtain the noise instantaneous power estimated value.
The noise measurement multiplier 34 is configured to calculate a noise component in the current signal and a voltage signal in the extracted signal to obtain a noise instantaneous power value, and output the noise instantaneous power value to the direct current taking filter 35;
the direct current taking filter 35 is configured to filter a high-frequency fluctuation component in the noise instantaneous power value to generate a noise average power value, and output the noise average power value to the bias compensator 36; the dc-filter 35 is preferably a low-pass filter, and preferably, the cut-off frequency of the dc-filter 35 in this embodiment is selected to be 1-2 Hz.
The offset compensator 36 is configured to adjust a constant dc component of the noise average power value and generate the second digital signal. The offset compensator 36 is specifically a two-input adder, which implements noise power offset correction, further improves the accuracy of noise power estimation, and finally generates the second digital signal, and outputs the second digital signal to the metering operation module 2.
The metering operation module 2 receives a first digital signal output from the waveform processing module 1 and a second digital signal output from the noise calculation module 2, and is used for calculating active power and active energy, and specifically, the metering operation module 2 includes a multiplier 21, a second low-pass filter 22, a compensator 23 and an integrator 24, which are connected in sequence;
the multiplier 21 is configured to perform instantaneous active power calculation on the first digital signal, and output the calculated instantaneous active power to the second low-pass filter 22;
specifically, the multiplier 21 multiplies the first digital current signal and the first digital voltage signal as input signals to obtain instantaneous active power, and outputs the instantaneous active power to the second low-pass filter 22;
the second low-pass filter 22 is configured to filter a high-frequency fluctuation component in the instantaneous active power, extract a direct-current component as an active power average value, and output the direct-current component to the compensator 23; the cut-off frequency of the second low-pass filter 22 in this embodiment is selected to be 1-2 Hz;
the compensator 23 is configured to subtract the active power average value from the second digital signal (i.e. subtract a noise average power value from the active power average value) to reduce a noise component in the active power average value, and output a calculation result to the integrator 24;
the integrator 24 is configured to perform an integral operation on the active power average value compensated by the compensator 23 to generate a measurement result of the active power, so as to obtain the active energy.
Fig. 6 is a schematic diagram illustrating an effect of noise average power estimation performed by the signal noise processing apparatus of this embodiment, in which a solid line represents a true noise power average value, and the true noise power average value is generated by multiplying the true noise including the entire frequency spectrum range by the first digital voltage signal and performing low-pass filtering, and a dotted line represents a noise average power estimation value obtained by operation estimation by the signal noise processing apparatus of the present invention, that is, the second digital signal.
While specific embodiments of the invention have been described above, it will be appreciated by those skilled in the art that these are by way of example only, and that the scope of the invention is defined by the appended claims. Various changes and modifications to these embodiments may be made by those skilled in the art without departing from the spirit and scope of the invention, and these changes and modifications are within the scope of the invention.

Claims (6)

1. A signal noise processing device in the process of measuring electrical parameters is characterized by comprising a waveform processing module, a measuring operation module and a noise calculation module which are electrically connected with each other;
the waveform processing module is used for sampling an analog signal, converting the analog signal into a first digital signal and respectively outputting the first digital signal to the metering operation module and the noise calculation module;
the noise calculation module is used for extracting a noise component from the first digital signal and outputting the noise component to the metering operation module as a second digital signal;
the metering operation module is used for calculating active power according to the first digital signal and calculating active energy according to the active power, and the metering operation module is also used for calculating the average value of the active power and the second digital signal so as to reduce the noise component in the average value of the active power;
the waveform processing module comprises a gain amplifier, an analog-to-digital converter, a high-pass filter and a gain compensator which are connected in sequence;
the gain amplifier is used for scaling the analog signal to a linear working interval of the analog-to-digital converter and outputting the analog signal to the analog-to-digital converter;
the analog-to-digital converter is used for converting the analog signal into a first precision digital signal, converting the first precision digital signal into a second precision digital signal with higher precision and outputting the second precision digital signal to the high-pass filter;
the high-pass filter is used for filtering out a direct-current component in the second precision digital signal and then outputting the direct-current component to the gain compensator;
the gain compensator is configured to perform global gain correction on the second precision digital signal and generate the first digital signal.
2. The signal noise processing apparatus of claim 1, wherein the analog signal comprises an analog current signal and an analog voltage signal, and the first digital signal comprises a first digital current signal and a first digital voltage signal.
3. The signal noise processing apparatus of claim 1, wherein the noise calculation module comprises a first low pass filter, a signal decimator, a zero phase trap, a noise metric multiplier, a direct current filter, and an offset compensator;
the first low-pass filter is used for filtering out high-frequency components in the first digital signal so as to generate a low-pass filtering signal and output the low-pass filtering signal to the signal decimator;
the signal decimator is used for decimating the low-pass filtering signal according to a sampling period and outputting the decimated signal to the zero-phase wave trap;
the zero phase trap is used for removing a power frequency signal component of a current signal in the extracted signal, extracting a noise component in the current signal and outputting the noise component to the noise measurement multiplier;
the noise measurement multiplier is used for calculating a noise component in the current signal and a voltage signal in the extracted signal to obtain a noise instantaneous power value and outputting the noise instantaneous power value to the direct current taking filter;
the direct current taking filter is used for filtering high-frequency fluctuation components in the noise instantaneous power value so as to generate a noise average power value and output the noise average power value to the bias compensator;
the offset compensator is used for adjusting the direct current component in the noise average power value and generating the second digital signal.
4. The signal noise processing apparatus of claim 3, wherein a cut-off frequency of the first low-pass filter is lower than 100Hz and higher than 50 Hz.
5. The signal noise processing apparatus of claim 3, wherein the zero-phase trap comprises a first notch filter, a first buffer, a first order inversion module, a second notch filter, a second buffer, and a second order inversion module connected in sequence;
the first notch filter is a notch filter with a center frequency of 50Hz, the first buffer is used for buffering output signals of the first notch filter in a segmented manner, and the first sequence reversing module is used for reversing the sequence of buffered data in the first buffer and outputting the reversed data to the second notch filter;
the second notch filter is the same filter as the first notch filter, the second buffer is used for buffering an output signal of the second notch filter in a segmented manner, and the second sequence reversing module is used for reversing the sequence of buffered data in the second buffer and outputting the reversed data to the noise measurement multiplier.
6. The signal noise processing apparatus according to claim 1, wherein the measurement operation module includes a multiplier, a second low-pass filter, a compensator and an integrator, which are connected in sequence;
the multiplier is used for calculating the instantaneous active power of the first digital signal and outputting the calculated instantaneous active power to the second low-pass filter;
the second low-pass filter is used for filtering high-frequency fluctuation components in the instantaneous active power, extracting direct-current components as an active power average value and outputting the active power average value to the compensator;
the compensator is used for subtracting the active power average value and the second digital signal to reduce the noise component in the active power average value and outputting the calculation result to the integrator;
the integrator is used for performing integral operation on the active power average value compensated by the compensator to generate a measurement result of active energy.
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