CN107078003A - Electron emitting device and the transistor for being provided with it - Google Patents

Electron emitting device and the transistor for being provided with it Download PDF

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Publication number
CN107078003A
CN107078003A CN201580050591.6A CN201580050591A CN107078003A CN 107078003 A CN107078003 A CN 107078003A CN 201580050591 A CN201580050591 A CN 201580050591A CN 107078003 A CN107078003 A CN 107078003A
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China
Prior art keywords
electron emission
opening
emission layer
layer
emitting device
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Granted
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CN201580050591.6A
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CN107078003B (en
Inventor
石川刚
胜野高志
副岛成雅
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Toyota Central R&D Labs Inc
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Toyota Central R&D Labs Inc
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J29/00Details of cathode-ray tubes or of electron-beam tubes of the types covered by group H01J31/00
    • H01J29/46Arrangements of electrodes and associated parts for generating or controlling the ray or beam, e.g. electron-optical arrangement
    • H01J29/48Electron guns
    • H01J29/481Electron guns using field-emission, photo-emission, or secondary-emission electron source
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J1/00Details of electrodes, of magnetic control means, of screens, or of the mounting or spacing thereof, common to two or more basic types of discharge tubes or lamps
    • H01J1/02Main electrodes
    • H01J1/30Cold cathodes, e.g. field-emissive cathode
    • H01J1/304Field-emissive cathodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J1/00Details of electrodes, of magnetic control means, of screens, or of the mounting or spacing thereof, common to two or more basic types of discharge tubes or lamps
    • H01J1/02Main electrodes
    • H01J1/30Cold cathodes, e.g. field-emissive cathode
    • H01J1/304Field-emissive cathodes
    • H01J1/3042Field-emissive cathodes microengineered, e.g. Spindt-type
    • H01J1/3046Edge emitters
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J1/00Details of electrodes, of magnetic control means, of screens, or of the mounting or spacing thereof, common to two or more basic types of discharge tubes or lamps
    • H01J1/02Main electrodes
    • H01J1/34Photo-emissive cathodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J1/00Details of electrodes, of magnetic control means, of screens, or of the mounting or spacing thereof, common to two or more basic types of discharge tubes or lamps
    • H01J1/02Main electrodes
    • H01J1/35Electrodes exhibiting both secondary emission and photo-emission
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S3/00Lasers, i.e. devices using stimulated emission of electromagnetic radiation in the infrared, visible or ultraviolet wave range
    • H01S3/14Lasers, i.e. devices using stimulated emission of electromagnetic radiation in the infrared, visible or ultraviolet wave range characterised by the material used as the active medium
    • H01S3/16Solid materials
    • H01S3/163Solid materials characterised by a crystal matrix
    • H01S3/1631Solid materials characterised by a crystal matrix aluminate
    • H01S3/1636Al2O3 (Sapphire)

Abstract

Simple Photoinduced Electron emitter is produced there is provided a kind of its.The electron emitting device (1) includes substrate (12) and electron emissive film (14).Electron emissive film (14) is arranged on above substrate (12), and with the opening (14A) formed wherein.Electron emissive film (14) is such that when opening (14A) marginal portion (14a) is defined in light irradiation, is configured from the mode of this marginal portion (14a) launching electronics.

Description

Electron emitting device and the transistor for being provided with it
Technical field
Technology disclosed herein is related to a kind of electron emitting device.In addition, technology disclosed herein further relates to one kind It is provided with the transistor of the electron emitting device.
Background technology
Japanese Patent Application No.2010-257898, Peter Hommelhoff, Yvan Sortais, Anoush Aghajani-Talesh and Mark A.Kasevich Physical Review Letters 96,077401 (2006), and Anna Mustonen, Paul Beaud, Eugenie Kirk, Thomas Feurer and Soichiro Tsujino Scientific Reports 2, p.915 (2012) disclose Photoinduced Electron emitter.These electron emitting devices are each It is individual to be provided with electron emission source and laser beam irradiator.Electron emission source is provided with sharp cone-shaped metal.In this electron emission dress In putting, when laser beam is irradiated to the top of cone-shaped metal from laser beam irradiator, optical electric-field is applied to cone-shaped metal Top, and due to its tunneling effect, from the top emission electronic of cone-shaped metal.
The content of the invention
Technical problem
The cone-shaped metal for being used as electron emission source is manufactured by processing wire.In order to improve electron emission effect Rate, preferably reduces the radius of curvature in the top end of cone-shaped metal.However, processing gold under high accuracy with this shape It is technically difficult to belong to silk.Here explanation is intended to provide a kind of easily fabricated Photoinduced Electron emitter.Here Explanation be further intended to a kind of transistor for being provided with the easily fabricated Photoinduced Electron emitter be provided.
For the scheme of the technical problem
In one embodiment, a kind of electron emitting device disclosed herein includes substrate and electron emission layer.Electronics Emission layer is arranged on surface.Opening is disposed in electron emission layer.Electron emission layer has the edge for limiting opening And it is configured to when the edge is irradiated by light from the edge-emission electronics.When light is irradiated onto the opening of restriction electron emission layer Edge and optical electric-field when being applied in, the electron emitting device can be from its edge-emission electronics.The electron emission is filled Put and use electron emission layer as electron emission source, and allow the edge for limiting the opening of electron emission layer to be used as electron emission Region.It is readily able to obtain this electron emission region by setting opening in electron emission layer.Thus, this electronics is sent out Injection device can be evaluated as with easily fabricated structure.
In one embodiment, a kind of transistor disclosed herein includes substrate, cathode layer and anode layer.Cathode layer quilt It is arranged on surface.Opening is disposed in cathode layer.Anode layer is arranged on above cathode layer.Cathode layer is opened with restriction Mouthful edge and be configured to when the edge is irradiated by light from the edge-emission electronics.Cathode layer is limited when light is irradiated onto When the edge and optical electric-field of opening are applied in, the transistor can be from its edge-emission electronics.Launch from cathode layer Electronics is flowed into anode layer.As above, this transistor can irradiate what control was flowed between cathode layer and anode layer based on light Electric current.Transistor uses cathode layer as electron emission source, and allows the edge for limiting the opening of cathode layer to be sent out as electronics Penetrate region.It is readily able to obtain this electron emission region by setting opening in cathode layer.Thus, this transistor energy Enough it is be evaluated as with easily fabricated structure.
Brief Description Of Drawings
Fig. 1 roughly shows the perspective view of the major part of the electron emitting device of first embodiment.
Fig. 2 roughly shows the plan view of the major part of the electron emitting device of first embodiment.
Fig. 3 roughly shows the plan view of the major part of the electron emitting device of the modification of first embodiment.
Fig. 4 roughly shows the plan view of the major part of the electron emitting device of the modification of first embodiment.
The step of Fig. 5 A show the electron emitting device manufacturing process of first embodiment.
The step of Fig. 5 B show the electron emitting device manufacturing process of first embodiment.
The step of Fig. 5 C show the electron emitting device manufacturing process of first embodiment.
The step of Fig. 5 D show the electron emitting device manufacturing process of first embodiment.
The step of Fig. 5 E show the electron emitting device manufacturing process of first embodiment.
The step of Fig. 5 F show the electron emitting device manufacturing process of first embodiment.
Fig. 6 roughly shows the perspective view of the major part of the electron emitting device of second embodiment.
The step of Fig. 7 A show the electron emitting device manufacturing process of second embodiment.
The step of Fig. 7 B show the electron emitting device manufacturing process of second embodiment.
The step of Fig. 7 C show the electron emitting device manufacturing process of second embodiment.
The step of Fig. 7 D show the electron emitting device manufacturing process of second embodiment.
The step of Fig. 7 E show the electron emitting device manufacturing process of second embodiment.
The step of Fig. 7 F show the electron emitting device manufacturing process of second embodiment.
The step of Fig. 7 G show the electron emitting device manufacturing process of second embodiment.
The step of Fig. 7 H show the electron emitting device manufacturing process of second embodiment.
The step of Fig. 7 I show the electron emitting device manufacturing process of second embodiment.
The step of Fig. 7 J show the electron emitting device manufacturing process of second embodiment.
The step of Fig. 7 K show the electron emitting device manufacturing process of second embodiment.
The step of Fig. 7 L show the electron emitting device manufacturing process of second embodiment.
Fig. 8 roughly shows the perspective view of the major part of the electron emitting device of 3rd embodiment.
The step of Fig. 9 A show the electron emitting device manufacturing process of 3rd embodiment.
The step of Fig. 9 B show the electron emitting device manufacturing process of 3rd embodiment.
The step of Fig. 9 C show the electron emitting device manufacturing process of 3rd embodiment.
The step of Fig. 9 D show the electron emitting device manufacturing process of 3rd embodiment.
The step of Fig. 9 E show the electron emitting device manufacturing process of 3rd embodiment.
The step of Fig. 9 F show the electron emitting device manufacturing process of 3rd embodiment.
The step of Fig. 9 G show the electron emitting device manufacturing process of 3rd embodiment.
Figure 10 roughly shows the perspective view of the major part of the electron emitting device of fourth embodiment.
Figure 11 roughly shows the plan view of the major part of the electron emitting device of the modification of fourth embodiment.
The step of Figure 12 A show the electron emitting device manufacturing process of fourth embodiment.
The step of Figure 12 B show the electron emitting device manufacturing process of fourth embodiment.
The step of Figure 12 C show the electron emitting device manufacturing process of fourth embodiment.
The step of Figure 12 D show the electron emitting device manufacturing process of fourth embodiment.
The step of Figure 12 E show the electron emitting device manufacturing process of fourth embodiment.
The step of Figure 12 F show the electron emitting device manufacturing process of fourth embodiment.
The step of Figure 12 G show the electron emitting device manufacturing process of fourth embodiment.
The step of Figure 12 H show the electron emitting device manufacturing process of fourth embodiment.
Embodiment
Some features disclosed herein will be listed.It is noted that skill element respectively is separate, and often One has certain technological applicability.
The embodiment of electron emitting device disclosed herein can for example be configured to field emission array.It is used as this electricity The intention of sub- emitter, for example, can be with illustrative transistor, electron beam lithography device, or electronic display unit.Electron emission The embodiment of device can be at least provided with substrate and electron emission layer.The material of substrate is not particularly limited, however, it is excellent Selection of land is semiconductor or insulator.Electron emission layer is arranged on surface, and is provided with opening.Electron emission layer can be with It is arranged on surface directly to contact the upper surface of substrate, or can be arranged on via another part on substrate Side.Electron emission layer can be provided with single opening or multiple openings.The shape of the opening of electron emission layer is not by especially Limitation, and various types of shapes can be used.In addition, if multiple openings are arranged in electron emission layer, this is more Individual opening can be arranged to candy strip, or can be arranged to the comb mesh pattern configured by multiple row and columns.Electronics is sent out Penetrate layer and be utilized as electron emission source, and it is preferably made up of the material comprising free electron.The material of electron emission layer Material can be the composition of transition metal such as the molybdenum either single substance of tungsten or transition metal.Alternately, electron emission The material of layer can be metal such as gold, silver, copper, aluminium or platinum.Alternately, the material of electron emission layer can include barium Alkaline earth oxide.Alternately, the material of electron emission layer can be diamond or graphite.Electron emission layer by with It is set to when light is irradiated onto on the edge for limiting its opening from its edge-emission electronics.Thus, electron emission layer is preferred Ground is thin flat layer.
In one embodiment, electron emitting device disclosed herein may further include light irradiating appts.Light is irradiated Device is configured as towards electron emission layer exposure light.The type of light irradiating appts is not particularly limited, however, it is possible to using partly leading Body laser, solid state laser or gas laser are used as light irradiating appts.The electron emitting device of such embodiment The electron emission from electron emission layer can be controlled based on the light irradiation from light irradiating appts.
The opening of electron emission layer can include when the direction along the upper surface for being orthogonal to substrate is seen in longitudinal direction The shape of upper extension.In this case, preferably light irradiating appts be configured as irradiate its electric field plane of oscillation be orthogonal to longitudinal direction The laser beam of the linearly polarized photon in direction.Here, the laser beam of linearly polarized photon can be continuous oscillation laser, or can be Pulsative oscillation laser.The electron emitting device of such embodiment is efficiently on the side for the opening for limiting electron emission layer Apply optical electric-field in the edge extended in a longitudinal direction in edge, this to promote electric field concentration.As a result, this type The electron emitting device of embodiment there is the characteristic of high electric field electronic transmitting efficiency.
, the material of substrate can be transparent to the light of light irradiating appts.Specifically, the material of substrate preferably has light irradiating appts Light at least 80% or bigger transmissivity.In this case, light irradiating appts are preferably configured as allowing light through base Plate and it is irradiated onto electron emission layer.In the electron emitting device of such embodiment, the light from light irradiating appts By transparency carrier and it is irradiated onto on electron emission layer, so that the light from light irradiating appts arrives electronics by efficiently irradiation On emission layer.As a result, the electron emitting device of such embodiment can have the characteristic of high electric field electronic transmitting efficiency.
In one embodiment, the electron emitting device may further include extraction electrode.Extraction electrode is arranged on Above electron emission layer, and opening is disposed in extraction electrode.Opening of the opening of extraction electrode positioned at electron emission layer Top., can be as needed when applying voltage between electron emission layer and extraction electrode when setting this extraction electrode So that the electric-field intensity for limiting the edge of the opening of electron emission layer is high.By between electron emission layer and extraction electrode Apply voltage, when the optical electric-field that can not be produced just with being irradiated by light performs field-electron emission, such implementation The electron emitting device of example is able to carry out field-electron emission.
Preferably, when the direction along the upper surface for being orthogonal to substrate is seen, the edge of the opening of electron emission layer is limited In opening in extraction electrode.When the opening of electron emission layer and the opening of extraction electrode are arranged with this position relationship When, the electronics from the edge-emission of the opening for limiting electron emission layer and is drawing efficiently by the opening of extraction electrode Go out above electrode and be extracted.
In one embodiment of the electron emitting device including extraction electrode, substrate can include convex portion.In this respect In, a part for the preferably side surface of convex portion is covered by electron emission layer.Further, it is preferable to which the top surface of convex portion passes through electronics The opening exposure of emission layer.In the electron emitting device of such embodiment, even if when in electron emission layer and extraction When the voltage applied between electrode is low, the electric-field intensity for limiting the edge of the opening of electron emission layer is still uprised.Thus, Even if when the voltage applied between electron emission layer and extraction electrode is low, the electron emission of such embodiment Device remains able to perform field-electron emission.
In one embodiment, transistor disclosed herein can at least include substrate, cathode layer and anode layer.Substrate Material be not particularly limited, however, it is preferably semiconductor or insulator.Cathode layer is arranged on surface, and And it is provided with opening.Cathode layer can be arranged on surface directly to contact the upper surface of substrate, or can be via Another part is arranged on surface.Cathode layer can be provided with single opening or multiple openings.The opening of cathode layer Shape is not particularly limited.In addition, if multiple openings are arranged in cathode layer, the plurality of opening can be arranged to Candy strip, or the comb mesh pattern configured by multiple row and columns can be arranged to.Cathode layer is utilized as electron emission Source, and it is preferably made up of the material comprising free electron.The material of cathode layer can be transition metal such as molybdenum or The single substance of tungsten, or transition metal composition.Alternately, the material of cathode layer can be metal such as gold, silver, Copper, aluminium, tungsten or platinum.Alternately, the material of cathode layer can be the alkaline earth oxide for including barium.Alternately, it is cloudy The material of pole layer can be diamond or graphite.Anode layer is arranged on above cathode layer.Cathode layer is configured as light quilt From its edge-emission electronics when irradiating on the edge for limiting its opening.Thus, cathode layer is preferably thin flat layer.
In one embodiment, transistor disclosed herein may further include light irradiating appts.Light irradiating appts by with It is set to towards cathode layer exposure light.The type of light irradiating appts is not particularly limited, however, it is possible to using semiconductor laser, Solid state laser or gas laser are used as light irradiating appts.The transistor of such embodiment can be based on coming from light spoke The electric current that light irradiation control according to device is flowed between cathode layer and anode layer.
When the direction along the upper surface for being orthogonal to substrate is seen, the opening of cathode layer can have prolongs in a longitudinal direction The shape stretched.In this case, preferably light irradiating appts be configured as irradiate its electric field plane of oscillation be orthogonal to longitudinal direction Linearly polarized photon laser beam.Here, the laser beam of linearly polarized photon can be continuous oscillation laser, or can be pulsation Oscillating laser.The transistor of such embodiment is efficiently along longitudinal direction in the edge of opening for limiting cathode layer The edge of direction extension applies optical electric-field, and this to promote electric field concentration.As a result, the crystal of such embodiment Characteristic of the pipe with high electric field electronic transmitting efficiency.
The material of substrate can be to the just transparent of light irradiating appts.Specifically, the material of substrate preferably has light spoke According at least 80% transmissivity of the light of device.In this case, preferably light irradiating appts are configured as by substrate towards negative electrode Layer exposure light.In the transistor of such embodiment, the light from light irradiating appts is by transparency carrier and is illuminated Onto cathode layer, so that the light from light irradiating appts is efficiently irradiated onto cathode layer.As a result, such embodiment Transistor can have high electric field electronic transmitting efficiency characteristic.
In one embodiment, transistor disclosed herein may further include be arranged on cathode layer and anode layer it Between extraction electrode.Overthe openings of the opening of extraction electrode positioned at cathode layer.When setting this extraction electrode, by the moon Apply voltage between pole layer and extraction electrode, the electric-field intensity for limiting the edge of the opening of cathode layer can be caused to be as needed High.By applying voltage between cathode layer and extraction electrode, when can not just with by light irradiate produce optical electric-field When performing field-electron emission, the transistor of such embodiment is able to carry out field-electron emission.
Preferably, when the direction along the upper surface for being orthogonal to substrate is seen, the edge for limiting the opening of cathode layer is in In the opening of extraction electrode.When the opening of cathode layer and the opening of extraction electrode are arranged with this position relationship, from restriction The electronics of the edge-emission of the opening of cathode layer is carried efficiently by the opening of extraction electrode above extraction electrode Take.
In one embodiment of the transistor including extraction electrode, substrate can include convex portion.In this case, preferably A part for the side surface of ground convex portion is covered by cathode layer.Further, it is preferable to which the top surface of convex portion is sudden and violent by the opening of cathode layer Dew.In the transistor of such embodiment, even if when the voltage applied between cathode layer and extraction electrode is low When, the electric-field intensity for limiting the edge of the opening of cathode layer is still uprised.Thus, even if when between cathode layer and extraction electrode When the voltage of application is low, the transistor of such embodiment remains able to perform field-electron emission.
First embodiment
As shown in FIG. 1, electron emitting device 1 is the device for launching electronics in a vacuum, and is configured to Field emission array.Electron emitting device 1 includes substrate 12, electron emission layer 14, dielectric film 16, extraction electrode 18, and laser beam Irradiator 20.
Substrate 12 is made up of the material of the laser beam transparent to being irradiated from laser beam irradiator 20.Such as it will be described later Ground, in this example, the wave-length coverage by the laser beam irradiated from laser beam irradiator 20 are infrared near infrared range.By This, in this example, carborundum (SiC) base or gallium nitride (GaN) sound stage width gap semiconductor, sapphire or magnesia by with Make the material of substrate 12.
A part for the upper surface of the covering substrate 12 of electron emission layer 14, and directly contacted with the upper surface of substrate 12. Electron emission layer 14 is thin flat layer.Electron emission layer 14 is used as electron emission source.Thus, the material comprising free electron is excellent Selection of land is used for electron emission layer 14.In this example, the material of electron emission layer 14 is used as using tungsten.
Electron emission layer 14 is provided with multiple opening 14A.As shown in FIG. 2, the plurality of opening of electron emission layer 14 Each in 14A has when the direction (hereinafter referred to as z-axis line direction) along the upper surface for being orthogonal to substrate 12 is seen The rectangular shape extended with its longitudinal direction along y-axis direction.And then, by being arranged along x-axis direction with aturegularaintervals Row, the plurality of opening 14A of electron emission layer 14 is arranged to candy strip on the upper surface of substrate 12.Especially, Fig. 1 and 2 depict a major part of electron emitting device 1, and actually greater number of opening 14A is arranged along x-axis direction Row.
Dielectric film 16 is arranged between electron emission layer 14 and extraction electrode 18, and with electron emission layer 14 and draw Each in electrode 18 is directly contacted.Electron emission layer 14 is electrically insulated by dielectric film 16 from extraction electrode 18.In this example, Silica (SiO2) it is used as the material of dielectric film 16.
Extraction electrode 18 covers the upper surface of dielectric film 16, and is directly contacted with the upper surface of dielectric film 16.Such as will be Description later, by the way that positive voltage is put on into this so as to produce electrical potential difference with electron emission layer 14 and use extraction electrode 18. Thus, extraction electrode 18 is preferably conductor, more specifically, metal.In this example, molybdenum is used as the material of extraction electrode 18 Material.
Extraction electrode 18 is provided with multiple opening 18A.Corresponding to the plurality of opening 14A of electron emission layer 14, draw The plurality of opening 18A of electrode 18 is set along z-axis line direction.The opening 18A of extraction electrode 18 and electron emission layer 14 Opening 14A is arranged such that its corresponding space to by being formed in dielectric film 16 is connected.As shown in FIG. 2, draw Each gone out in the plurality of opening 18A of electrode 18 has when being seen along z-axis line direction with its longitudinal direction along y-axis Line direction extension rectangular shape, with the opening of electron emission layer 14 corresponding with it figure similar 14A, and be more than it The opening 14A of corresponding electron emission layer 14.Thus, when being seen along z-axis line direction, each of electron emission layer 14 is limited Opening 14A edge 14a is located in the opening 18A of its corresponding extraction electrode 18.
Laser beam irradiator 20 is arranged to the lower surface for facing substrate 12, and is configured as by causing laser beam saturating Cross substrate 12 and to the irradiation laser beam of electron emission layer 14.In this example, Ti- sapphire lasers are used as laser beam irradiation Device 20.Thus, the irradiation of laser beam irradiator 20 is carried in the infrared ripple to about 650nm to 1100nm near infrared range Long laser beam.In addition, laser beam irradiator 20 is configured such that the laser beam of irradiation turns into the p for electron emission layer 14 Polarised light.In this example, laser beam irradiator 20 is configured such that the plane of oscillation of the electric field of irradiation laser beam along xz Planar development.Thus, the plane of oscillation of the electric field of laser beam is orthogonal to the opening 14A of electron emission layer 14 longitudinal direction in position Direction (y-axis direction).
Then, the operation of electron emitting device 1 will be described.First, applied between electron emission layer 14 and extraction electrode 18 Making alive becomes to be in positive potential relative to electron emission layer 14 so as to extraction electrode 18.Thus, electron emission layer 14 is being limited Opening 14A edge 14a at electric-field intensity uprise.In this case, electron emission layer 14 and extraction electrode 18 it Between the voltage that applies be set so that the electric-field intensity at the edge 14a of electron emission layer 14 becomes 107V/cm or more It is low.
Electron emitting device 1 is sent out using the laser beam control from laser beam irradiator 20 from the electronics of electron emission layer 14 Penetrate.When the laser beam from laser beam irradiator 20 is not irradiated onto electron emission layer 14, as described above in electron emission layer Electric-field intensity at 14 edge 14a is 107V/cm is lower, and therefore not from the launching electronics of electron emission layer 14. On the other hand, when the laser beam from laser beam irradiator 20 is irradiated onto electron emission layer 14, optical electric-field is sent out in electronics Penetrate superposition on the edge 14a of layer 14, and the electric-field intensity at the edge 14a of electron emission layer 14 is uprised.And then, in electronics Plasma resonance, and the electric-field intensity change at the edge 14a of electron emission layer 14 are produced at the edge 14a of emission layer 14 It is high.When the laser beam from laser beam irradiator 20 is irradiated onto electron emission layer 14, using aforementioned phenomenon, in electron emission Electric-field intensity at the edge 14a of layer 14, which is increased to, is enough to be used in the value of field-electron emission.As a result, it is present in electron emission layer 14 In electronics pass through vacuum barrier using quantum mechanics tunneling effect, and by the edge 14a from electron emission layer 14 in vacuum Middle transmitting.The electronics launched from electron emission layer 14 is extracted to extraction electrode 18 by the opening 18A of extraction electrode 18 In the space of top.
As described above, electron emitting device 1 is operated with when the laser beam from laser beam irradiator 20 is irradiated onto electronics Electron emission is performed from the edge 14a of electron emission layer 14 during emission layer 14, and when the laser from laser beam irradiator 20 Beam stops the electron emission from the edge 14a of electron emission layer 14 when not being irradiated onto electron emission layer 14.Because electron emission Device 1 can use laser beam from laser beam irradiator 20 to control field-electron emission, so it has is for electrical noise It is healthy and strong and being capable of quick operating characteristic.In addition, the unique voltage for being applied to electron emitting device 1 is in electron emission layer Between 14 and extraction electrode 18, insulation ensure that using dielectric film 16 here.Electron emitting device 1, which can be utilized, simply matches somebody with somebody Putting ensures insulation, therefore it also has the characteristic of high reliability.
In electron emitting device 1, the edge 14a for limiting the opening 14A of electron emission layer 14 is used as electron emission region. Thus, using thinner electron emission layer 14, the edge 14a of electron emission layer 14 radius of curvature becomes smaller, and in electricity Electric field is concentrated and can be promoted at the edge 14a of sub- emission layer 14.If the edge 14a of electron emission layer 14 radius of curvature It is small, then can efficiently passes through the irradiation launching electronics of the laser beam from laser beam irradiator 20.Simply by tune The thickness of electron emission layer 14 is saved, electron emitting device 1 just can adjust the electron emission layer 14 as electron emission region Edge 14a radius of curvature.As above, electron emitting device 1 can be by forming the simple of 14A that be open in electron emission layer 14 The efficient electron emission region of process configuration height.Electron emitting device 1 carries the spy with the structure for being readily able to manufacture Property.Especially, the edge 14a of electron emission layer 14 thickness is to need to be that can thus perform the thickness of field-electron emission, So as to performance as requested, it is suitably adjusted.In an example, the edge 14a of electron emission layer 14 thickness is excellent Selection of land is about 10 to 100nm.In addition, the thickness of the edge 14a in order to reduce electron emission layer 14, whole electron emission layer 14 Thickness can with thinning, or alternately, as needed, only the edge 14a of electron emission layer 14 can with thinning, and its It is thick that it, which can partly keep,.
As described above, electron emitting device 1 is configured such that the laser beam from laser beam irradiator 20 passes through substrate 12 and it is irradiated onto electron emission layer 14.Thus, the laser beam from laser beam irradiator 20 can be irradiated efficiently To electron emission layer 14 without being hindered by other parts.
In electron emitting device 1, the laser beam irradiated from laser beam irradiator 20 is by p relative to electron emission layer 14 The light of polarization, and the electric field of laser beam plane of oscillation be orthogonal in position electron emission layer 14 opening 14A longitudinal direction Direction (y-axis direction).Thus, the optical electric-field produced by the laser beam irradiated from laser beam irradiator 20 is efficiently in limit It is each to superposition on edge 14a what is extended along y-axis direction in the edge 14a for the opening 14A for determining electron emission layer 14. In electron emitting device 1, because the opening 14A of electron emission layer 14 has rectangular shape of the longitudinal direction along y-axis direction, So what is upwardly extended in y-axis side each is formed to edge 14a with elongated shape.Thus, electron emitting device 1 can be thin Field-electron emission is performed at long paired edge 14a, so as to expeditiously perform field-electron emission.
In addition, the efficiency in order to further improve field-electron emission, as shown in FIG. 2, is preferably so that limiting electricity The each of each opening 14A of sub- emission layer 14 (is hereinafter referred to as electron emission layer 14 to the distance between edge 14a A/F 14W) relative to the wavelength of the laser beam from laser beam irradiator 20 it is short.In this example, electron emission The A/F 14W of layer 14 is preferably about 300 and arrives 1000nm.If the A/F 14W ratios of electron emission layer 14 come from The wavelength of the laser beam of laser beam irradiator 20 is shorter, then can suppress laser beam more than electron emission layer 14 and reach extraction In electrode 18, and heating in extraction electrode 18 can be suppressed.And then, if the A/F of electron emission layer 14 14W is short, then because the edge 14a of electron emission layer 14 is used as by with the electron emission region of high-density arrangement, electronics hair Injection device 1 highly can efficiently perform field-electron emission.
In addition, in electron emitting device 1, electron emission layer 14 is formed with the upper surface of substrate 12 and directly contacted.At this Plant in embodiment, substrate 12 is preferably half insulation material.For example, the material of substrate 12 preferably carries high-resistance width Gap semiconductor, such as carborundum or gallium nitride.In this case, by being applied between electron emission layer 14 and extraction electrode 18 Plus voltage formation equipotential line be bent so as to through electron emission layer 14 opening 14A and enter substrate 12 in.Such as On, such as compared with the situation that the bottom of electron emission layer 14 is in vacuum, as long as base material has the dielectric more than 1 normal Number, equipotential line is passed through the opening 14A of electron emission layer 14 and bent to dearly in substrate 12.Thus, electricity is being limited Electric field is concentrated and strengthened at the opening 14A of sub- emission layer 14 edge 14a, and the efficiency of field-electron emission is improved.
As shown in FIG. 3, when being seen along z-axis line direction, the opening 14A of electron emission layer 14 shape can be on edge The each to including multiple right-angled corners on edge 14a of y-axis direction extension.Alternately, as shown in FIG. 4 and edge Z-axis line direction to see, the opening 14A of electron emission layer 14 shape can along y-axis direction extend it is each to edge Include multiple acute angle portions on 14a.This right angle or acute angle portion allowable curvature radius is further reduced, so as to cause into one Step enhancing electric field is concentrated, and the efficiency of field-electron emission is further improved.
Then, the method that will describe to manufacture electron emitting device 1 with reference to Fig. 5 A to 5F.First, as shown in fig. 5, system For substrate 12.
Then, as shown in figure 5b, using gas phase deposition technology, electron emission layer 14 is deposited over the upper table of substrate 12 On face.Then, by using photoetching technique, photomask 42 is patterned on the upper surface of electron emission layer 14.Photomask 42 It is patterned so as to the corresponding region in the position of the opening formed on electron emission layer 14 is removed.
Then, as shown in figure 5 c, using dry etch technique or wet etch technique, electron emission layer 14 is in light The part of exposure is removed to form opening 14A in the opening of mask 42, and a part for the upper surface of substrate 12 is exposed. Hereafter, photomask 42 is removed.
Then, as shown in figure 5d, using CVD technology, dielectric film 16 is deposited over the upper surface of electron emission layer 14 On.Then, using gas phase deposition technology, extraction electrode 18 is deposited on the upper surface of dielectric film 16.
Then, as shown in Fig. 5 E, using photoetching technique and etching technique, the part of extraction electrode 18 be removed with Opening 18A is formed, and a part for the upper surface of dielectric film 16 is exposed.
Then, as shown in Fig. 5 F, using wet etch technique, exposed on the inside of the opening 18A of extraction electrode 18 Dielectric film 16 is removed.Hydrogen fluoride is used as etchant solutions.Thus, a part for dielectric film 16 is removed, and electronics is sent out Thus the opening 14A for penetrating layer 14 connects with the opening 18A of extraction electrode 18.Finally, attachment laser beam irradiator 20, is as a result completed Electron emitting device 1.
Second embodiment
Fig. 6 shows the electron emitting device 2 of second embodiment.Especially, the electron emitting device 1 with Fig. 1 is essentially identical Constitutive characteristic will be endowed identical reference, and its explanation will be omitted.
In electron emitting device 2, multiple convex portion 12A with platform-like step shape are arranged on the upper table of substrate 12 On face.Covered by electron emission layer 14 each convex portion 12A side surface portion.The top surface of each convex portion passes through electronics The corresponding opening 14A exposures of emission layer 14.Thus, the edge 14a for limiting the opening 14A of electron emission layer 14 is configured to court It is prominent to extraction electrode 18.
In this electron emitting device 2, when applying voltage between electron emission layer 14 and extraction electrode 18, in limit Electric-field intensity becomes more stronger than electron emitting device 1 at the edge 14a for the opening 14A for determining electron emission layer 14.Thus, even if The voltage applied between electron emission layer 14 and extraction electrode 18 is low, and electron emitting device 2 remains able to height effectively Perform field-electron emission to rate.Because the voltage applied between electron emission layer 14 and extraction electrode 18 can be suppressed to Low, so electron emitting device 2 can suppress dielectric breakdown, and high reliability can be achieved.
Then, the method that will describe to manufacture electron emitting device 2 with reference to Fig. 7 A to 7L.First, as shown in fig. 7, system Standby substrate 12.
Then, as shown in fig. 7b, by using photoetching technique, photomask 44 is on the upper surface of substrate 12 by pattern Change.It is corresponding that photomask 44 is patterned the position for remaining in convex portion with will be formed on the upper surface of substrate 12 so as to them In region.
Then, it is as shown in fig. 7c, use dry etch technique or wet etch technique, the upper surface quilt of substrate 12 Handle to form the convex portion 12A with platform-like step shape.
Then, as shown in fig. 7d, photomask 44 is removed.
Then, as shown in figure 7e, using gas phase deposition technology, electron emission layer 14 is deposited over the upper table of substrate 12 On face.Electron emission layer 14 fully covers the side surface and top surface, substrate 12 upper surface for including convex portion 12A.
Then, as shown in figure 7f, using CVD technology, mask 46 is deposited on the upper surface of electron emission layer 14. The material of mask 46 is, for example, silica.Especially, in this deposition step, in order to be conducive to subsequent etchback step, cover The upper surface of mould 46 is preferably flat.Thus, deposited mask 46 preferably had into excellent mobility and bag Phosphorous or boron additive.Alternately, the upper table for planarizing mask 46 can be performed after deposition mas 46 The heat treatment step in face.Alternately, the upper table of mask 46 can be planarized using CMP technique after deposition mas 46 Face.
Then, as shown in Fig. 7 G, mask 46 is etched back until using dry etch technique or wet etch technique The electron emission layer 14 of the convex portion 12A of exposure covering substrate 12 side surface.
Then, as shown in Fig. 7 H, using dry etch technique or wet etch technique, electron emission layer 14, The part for not being masked 46 coverings is removed to form opening 14A, and the convex portion 12A of substrate 12 side surface and top surface A part is exposed.
Then, as shown in Fig. 7 I, using dry etch technique or wet etch technique, mask 46 is removed.
Then, as shown in Fig. 7 J, using CVD technology, dielectric film 16 is deposited over the upper surface of electron emission layer 14 On.Then, using gas phase deposition technology, extraction electrode 18 is deposited on the upper surface of dielectric film 16.
Then, as shown in Fig. 7 K, using photoetching technique and etching technique, the part of extraction electrode 18 be removed with Opening 18A is formed, and a part for the upper surface of dielectric film 16 is exposed.
Then, as shown in Fig. 7 L, using wet etch technique, exposed on the inside of the opening 18A of extraction electrode 18 Dielectric film 16 is removed.Hydrogen fluoride is used as etchant solutions.Thus, a part for dielectric film 16 is removed, and electronics is sent out Thus the opening 14A for penetrating layer 14 connects with the opening 18A of extraction electrode 18.Finally, attachment laser beam irradiator 20, is as a result completed Electron emitting device 2.
3rd embodiment
Fig. 8 shows the electron emitting device 3 of 3rd embodiment.Especially, the electron emitting device 1 with Fig. 1 is essentially identical Constitutive characteristic will be endowed identical reference, and its explanation will be omitted.
Electron emitting device 3 includes the lower-side insulation film 13 being arranged between substrate 12 and electron emission layer 14.Silica (SiO2) it is used as the material of lower-side insulation film 13.Part of the lower-side insulation film 13 below the opening 14A of electron emission layer 14 It is selectively removed.Thus, by being protruded compared with other parts, it is provided with eaves shape state limits electronics in a vacuum The opening 14A of emission layer 14 edge 14a.
For example, in electron emitting device 1 shown in Fig. 1, if insulator is used as the material of substrate 12, substrate 12 Screen effect (effect that thus equipotential line does not enter in substrate 12 from the opening 14A of electron emission layer 14), which is reduced, to be limited Electric-field intensity at the opening 14A of electron emission layer 14 edge 14a.On the other hand, filled in the electron emission of the present embodiment Put in 3, in a vacuum in eaves shape state set limit electron emission layer 14 opening 14A edge 14a, it have so that etc. The structure that potential lines enter from the opening 14A of electron emission layer 14 and independently travelled downwardly with the material of substrate 12.As above, Electron emitting device 3 has characteristic of the increase on the selection free degree of the material of substrate 12.
Then, as shown in Fig. 9 A to 9G, the method for manufacture electron emitting device 3 will be described.First, as in figure 9 a It is shown, prepare substrate 12.
Then, as shown in figures 9 b and 9, using CVD technology, lower-side insulation film 13 is deposited on the upper surface of substrate 12. Then, using gas phase deposition technology, electron emission layer 14 is deposited on the upper surface of lower-side insulation film 13.
Then, as shown in Fig. 9 C, by using photoetching technique, photomask 48 is on the upper surface of electron emission layer 14 It is patterned.Photomask 48 is patterned so as to the corresponding region quilt in the position of opening with will be formed on electron emission layer 14 Remove.
Then, as shown in Fig. 9 D, using dry etch technique or wet etch technique, electron emission layer 14 is in light The part of exposure is removed to form opening 14A, and a part for the upper surface of lower-side insulation film 13 in the opening of mask 48 It is exposed.Hereafter, photomask 48 is removed.
Then, as shown in fig. 9e, using CVD technology, dielectric film 16 is deposited over the upper surface of electron emission layer 14 On.Then, using gas phase deposition technology, extraction electrode 18 is deposited on the upper surface of dielectric film 16.
Then, as shown in Fig. 9 F, using photoetching technique and etching technique, the part of extraction electrode 18 be removed with Opening 18A is formed, and a part for the upper surface of dielectric film 16 is exposed.
Then, as shown in Fig. 9 G, using wet etch technique, exposed on the inside of the opening 18A of extraction electrode 18 Dielectric film 16 is removed.Hydrogen fluoride is used as etchant solutions.When these parts of dielectric film 16 are removed and electron emission When layer 14 is exposed, the same lower-side insulation film 13 towards the exposure on the inside of the opening 14A of electron emission layer 14 of etching is carried out.By This, these parts of dielectric film 16 are removed and the opening 14A of electron emission layer 14 and the opening 18A of extraction electrode 18 connect It is logical, and the part opening 14A that is also removed and limits electron emission layer 14 of lower-side insulation film 13 edge 14a becomes Protruded compared with other parts.Finally, attachment laser beam irradiator 20, as a result completes electron emitting device 3.
Fourth embodiment
Figure 10 shows with triode configurations and is provided with the transistor 4 of electron emitting device.Especially, with Fig. 1's The essentially identical constitutive characteristic of electron emitting device 1 will be endowed identical reference, and its explanation will be omitted.
Except electron emitting device, transistor 4 further comprises upside dielectric film 32 and anode layer 34.In transistor 4, It is vacuum state in the space of electron emission layer 14 (being used as the cathode layer in transistor 4) between anode layer 34.
Upside dielectric film 32 is arranged between extraction electrode 18 and anode layer 34, and with extraction electrode 18 and anode layer Each in 34 is directly contacted.Extraction electrode 18 is electrically insulated by upside dielectric film 32 from anode layer 34.In this example, aoxidize Silicon (SiO2) it is used as the material of upside dielectric film 32.
The upper surface of the covering of anode layer 34 upside dielectric film 32, and directly contacted with the upper surface of upside dielectric film 32. Anode layer 34 is connected by the space in upside dielectric film 32 with the opening 18A of extraction electrode 18.From the side of electron emission layer 14 The electronics of edge 14a transmittings is flowed into anode layer 34.Thus, anode layer 34 is preferably conductor, and more specifically, metal. In this example, molybdenum is used as the material of anode layer 34.
Then, the operation of transistor 4 will be described.First, between electron emission layer 14 and extraction electrode 18 and drawing Go out between electrode 18 and anode layer 34 to apply voltage so as to which extraction electrode 18 becomes to be in positive potential relative to electron emission layer 14 And anode layer 34 becomes to be in positive potential relative to extraction electrode 18.In an example, 0V (earth potential) is applied to electricity Sub- emission layer 14 ,+100V is applied to extraction electrode 18, and+110V is applied to anode layer 34.Because the phase of extraction electrode 18 There is positive potential for electron emission layer 14, so the electric-field intensity at the opening 14A edge 14a for limiting electron emission layer 14 Uprise.In that case, the voltage applied between electron emission layer 14 and extraction electrode 18 is set so that in electronics Electric-field intensity at the edge 14a of emission layer 14 becomes 107V/cm is lower.
Transistor 4 flow to electron emission layer 14 using the laser beam control from laser beam irradiator 20 from anode layer 34 Electric current.When the laser beam from laser beam irradiator 20 is not irradiated onto electron emission layer 14, sent out as described above in electronics It is 10 to penetrate electric-field intensity at the edge 14a of layer 147V/cm is lower, and therefore not from the launching electronics of electron emission layer 14. On the other hand, when the laser beam from laser beam irradiator 20 is irradiated onto electron emission layer 14, optical electric-field is in electronics Superposition on the edge 14a of emission layer 14, and electric-field intensity is uprised at the edge 14a of electron emission layer 14.And then, in electronics Plasma resonance, and the electric-field intensity change at the edge 14a of electron emission layer 14 are produced at the edge 14a of emission layer 14 It is high.When the laser beam from laser beam irradiator 20 is irradiated onto electron emission layer 14, using aforementioned phenomenon, in electron emission Electric-field intensity, which is increased to, at the edge 14a of layer 14 is enough to be used in the value of field-electron emission.As a result, it is present in electron emission layer 14 Electronics pass through vacuum barrier using quantum mechanics tunneling effect, and by the edge 14a from electron emission layer 14 in a vacuum Transmitting.The electronics launched from electron emission layer 14 is flowed into anode layer 34 by the opening 18A of extraction electrode 18.Thus, Electric current flows from anode layer 34 towards electron emission layer 14.
As described above, transistor 4 is operated with by being sent out when the laser beam from laser beam irradiator 20 is irradiated onto electronics Cause electric current flowing from the edge 14a launching electronics of electron emission layer 14 when penetrating layer 14, and by when from laser beam spoke Stop when not being irradiated onto electron emission layer 14 according to the laser beam of device 20 from the edge 14a of electron emission layer 14 electron emission Stop electric current.Transistor 4 can be controlled with break-make by using the laser beam from laser beam irradiator 20 from anode layer 34 flow to the electric current of electron emission layer 14.As above, because transistor 4 can use the laser beam from laser beam irradiator 20 Control electric current, so it is healthy and strong for electrical noise and being capable of quick operating characteristic that it, which has,.In addition, being applied to transistor 4 unique voltage is between electron emission layer 14 and extraction electrode 18 and between extraction electrode 18 and anode layer 34, Insulation is ensure that here with dielectric film 16 and upside dielectric film 32.Transistor 4 can ensure insulation using simple configuration, because This it also there is the characteristic of high reliability.
In addition, the space that transistor 4 is maintained between electron emission layer 14 and anode layer 34 is in vacuum state.By This, undergoes from electron emission layer 14 to the ballistic conduction of anode layer 34 from the edge 14a of electron emission layer 14 electronics launched.Cause This, in transistor 4, such as in the transistor that wherein electronics is conducted by semiconductor, in conducting resistance and depends on Any tradeoff is not present between the proof voltage of impurity concentration.Transistor 4 can realize extremely low conducting resistance and high Proof voltage both.In addition, in the transistor using semiconductor, high-quality half with crystal defect as few as possible The research and development of conductor substrate are necessary.However, being born using the transistor 4 of vacuum state in the absence of this material development.And then, Even if transistor 4 has the characteristic that its operation is still stablized at high operating temperatures.
Transistor 4 with triode configurations is similar to wherein electric current and undersaturated electrostatic induction transistor npn npn (SIT) operated under pattern.If it should be operated in the pattern similar to field-effect transistor (FET), such as in fig. 11 It is shown, then it can use with the quadrupole that wherein bucking electrode (screen-grid) 33 is inserted between extraction electrode 18 and anode layer 34 The transistor 5 of pipe configuration.Bucking electrode 33 is electrically insulated by the first upside dielectric film 32a from extraction electrode 18, and by second Side dielectric film 32b is electrically insulated from anode layer 34.Multiple opening 33A are arranged in bucking electrode 33.The opening of bucking electrode 33 In 33A each by along z-axis line set with its corresponding phase in the plurality of opening 18A of extraction electrode 18 Alignment.The opening 33A of bucking electrode 33 and the opening 18A of extraction electrode 18 are arranged to by being arranged on the first upside dielectric film Space connection in 32a.The opening 33A and anode layer 34 of bucking electrode 33 are arranged to by being arranged on the second upside dielectric film Space connection in 32b.
In transistor 5, for example, 0V (earth potential) is applied to electron emission layer 14 ,+100V is applied to extraction electrode 18,0V (earth potentials) are applied to bucking electrode 33, and+2 to 3V are applied to anode layer 34.Under these conditions, crystal Pipe 5 can use laser beam from laser beam irradiator 20 to control to flow to the electric current of electron emission layer 14 from anode layer 34 Break-make, and its operator scheme is analogous to field-effect transistor (FET) operator scheme.
Then, as shown in Figure 12 A to 12H, the manufacture method of transistor 4 will be described.First, such as institute in fig. 12 Show, prepare substrate 12.
Then, as shown in Figure 12 B, using gas phase deposition technology, electron emission layer 14 is deposited over the upper of substrate 12 On surface.Then, by using photoetching technique, photomask 52 is patterned on the upper surface of electron emission layer 14.Photomask 52 are patterned so as to the corresponding region in the position of the opening formed on electron emission layer 14 is removed.
Then, as shown in fig. 12 c, using dry etch technique or wet etch technique, electron emission layer 14 exists The part of exposure is removed to form opening 14A in the opening of photomask 52, and a part for the upper surface of substrate 12 is sudden and violent Dew.Hereafter, photomask 52 is removed.
Then, as shown in fig. 12d, using CVD technology, dielectric film 16 is deposited over the upper surface of electron emission layer 14 On.Then, using gas phase deposition technology, extraction electrode 18 is deposited on the upper surface of dielectric film 16.
Then, as shown in fig. 12e, using photoetching technique and etching technique, a part for extraction electrode 18 is removed To form opening 18A, and a part for the upper surface of dielectric film 16 is exposed.
Then, as shown in Figure 12 F, using CVD technology, upside dielectric film 32 is deposited over the upper table of extraction electrode 18 On face.Then, using gas phase deposition technology, anode layer 34 is deposited on the upper surface of upside dielectric film 32.
Then, as shown in Figure 12 G, using photoetching technique and etching technique, the part of anode layer 34 be removed with Opening 34A is formed, and a part for the upper surface of upside dielectric film 32 is exposed.The opening 34A preferably edges of anode layer 34 The longitudinal direction (Figure 10 y-axis direction) for the opening 18A of extraction electrode 18 is formed with the constant cycle.It is further preferred that positive Pole layer 34 opening 34A be extraction electrode 18 opening 18A A/F (along the width in Figure 10 x-axis direction) The cycle of the twice or three times longitudinal direction of the opening 18A along extraction electrode 18 is formed.
Then, as shown in Figure 12 H, wet etch technique, opening 34A of the upside dielectric film 32 in anode layer 34 are used The part of middle exposure is removed.Hydrogen fluoride is used as etchant solutions.When upside dielectric film 32 these parts be removed and When extraction electrode 18 is exposed, the dielectric film 16 of etching towards the exposure on the inside of the opening 18A of extraction electrode 18 is carried out.Thus, These parts of upside dielectric film 32 are removed and the opening 18A of extraction electrode 18 is connected with anode layer 34, and dielectric film 16 part is also removed and the opening 14A of electron emission layer 14 is connected with the opening 18A of extraction electrode 18.Especially, The opening of the shape in the space formed in upside dielectric film 32 and dielectric film 16 setting anode layer 34 dependent on how densely 34A.It is therefore preferred to set the opening 34A of anode layer 34 with aforementioned arrangements.Finally, attachment laser beam irradiator 20, as a result complete Into transistor 4.
The instantiation of the present invention is described in detail, however, these are exemplary signal and therefore not Limit the scope of claim.The technology described in the claims includes the modifications and variations of instantiation set forth above. The technical characteristic described in the specification and illustrated in the drawings can be technically individually or in the form of various combinations it is useful, And it is not limited to as primitively required the combination being protected.In addition, the technology described in the specification and illustrated in the drawings can be simultaneously Multiple targets are realized on ground, and its technical meaning is to realize any one in this target.

Claims (14)

1. a kind of electron emitting device, including:
Substrate;With
Electron emission layer, the electron emission layer is arranged on the surface, wherein, opening is disposed in the electronics hair Penetrate in layer,
Wherein, the electron emission layer has the edge for limiting the opening, and is configured as the edge and is irradiated by light When from the edge-emission electronics.
2. electron emitting device according to claim 1, further comprises:
Light irradiating appts, the light irradiating appts are configured as irradiating the light towards the electron emission layer.
3. electron emitting device according to claim 2, wherein
The opening of the electron emission layer is included when the direction along the upper surface for being orthogonal to the substrate is seen in longitudinal direction The shape that side is upwardly extended, and
The light irradiating appts are configured as irradiating the laser beam of linearly polarized photon, the plane of oscillation of the electric field of the linearly polarized photon It is orthogonal to the longitudinal direction.
4. the electron emitting device according to claim 2 or 3, wherein
The material of the substrate to just transparent described in the light irradiating appts, and
The light irradiating appts are configured as irradiating the light towards the electron emission layer through the substrate.
5. the electron emitting device according to any one of claim 1 to 4, further comprises:
Extraction electrode, the extraction electrode is arranged on above the electron emission layer, wherein, opening is disposed in the extraction In electrode,
Wherein, the opening of the extraction electrode is located at the overthe openings of the electron emission layer.
6. electron emitting device according to claim 5, wherein
When the direction along the upper surface for being orthogonal to the substrate is seen, limit the electron emission layer the opening it is described Edge is in the opening of the extraction electrode.
7. the electron emitting device according to claim 5 or 6, wherein
Convex portion is disposed on the upper surface of the substrate,
A part for the side surface of the convex portion is covered by the electron emission layer, and
The top surface of the convex portion is exposed by the opening of the electron emission layer.
8. a kind of transistor, including:
Substrate;
Cathode layer, the cathode layer is arranged on the surface, wherein, opening is disposed in the cathode layer;With
Anode layer, the anode layer is arranged on above the cathode layer,
Wherein, the cathode layer has an edge for limiting the opening, and be configured as when the edge is irradiated by light from The edge-emission electronics.
9. transistor according to claim 8, further comprises:
Light irradiating appts, the light irradiating appts are configured to irradiate the light towards the cathode layer.
10. transistor according to claim 9, wherein
The opening of the cathode layer has when the direction along the upper surface for being orthogonal to the substrate is seen along longitudinal side To the shape of extension, and
The light irradiating appts are configured as irradiating the laser beam of linearly polarized photon, the plane of oscillation of the electric field of the linearly polarized photon It is orthogonal to the longitudinal direction.
11. the transistor according to claim 9 or 10, wherein
The material of the substrate to just transparent described in the light irradiating appts, and
The light irradiating appts are configured as irradiating the light towards the cathode layer through the substrate.
12. transistor according to claim 11, further comprises:
Extraction electrode, the extraction electrode is arranged between the cathode layer and the anode layer, wherein, opening is disposed in In the extraction electrode,
Wherein, the opening of the extraction electrode is located at the overthe openings of the cathode layer.
13. the transistor according to claim 11 or 12, wherein
When the direction along the upper surface for being orthogonal to the substrate is seen, the edge of the opening of the cathode layer is limited In the opening of the extraction electrode.
14. the transistor according to claim 12 or 13, wherein
Convex portion is disposed on the upper surface of the substrate,
A part for the side surface of the convex portion is covered by the cathode layer, and
The top surface of the convex portion is exposed by the opening of the cathode layer.
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