CN107077186B - 低功率计算成像 - Google Patents

低功率计算成像 Download PDF

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Publication number
CN107077186B
CN107077186B CN201580051324.0A CN201580051324A CN107077186B CN 107077186 B CN107077186 B CN 107077186B CN 201580051324 A CN201580051324 A CN 201580051324A CN 107077186 B CN107077186 B CN 107077186B
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China
Prior art keywords
power
memory
computing device
processor
interface
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Expired - Fee Related
Application number
CN201580051324.0A
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English (en)
Chinese (zh)
Other versions
CN107077186A (zh
Inventor
B·巴里
R·里士满
F·康纳
D·莫洛尼
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Movidius Ltd Netherland
Original Assignee
Linear Algebra Technologies Ltd
Movidius Ltd Netherland
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Filing date
Publication date
Priority claimed from US14/458,014 external-priority patent/US9727113B2/en
Priority claimed from US14/458,052 external-priority patent/US9910675B2/en
Application filed by Linear Algebra Technologies Ltd, Movidius Ltd Netherland filed Critical Linear Algebra Technologies Ltd
Priority to CN202010104557.5A priority Critical patent/CN111240460A/zh
Publication of CN107077186A publication Critical patent/CN107077186A/zh
Application granted granted Critical
Publication of CN107077186B publication Critical patent/CN107077186B/zh
Expired - Fee Related legal-status Critical Current
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/3287Power saving characterised by the action undertaken by switching off individual functional units in the computer system
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7807System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7867Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7867Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
    • G06F15/7885Runtime interface, e.g. data exchange, runtime control
    • G06F15/7889Reconfigurable logic implemented as a co-processor
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/80Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053Vector processors
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/80Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053Vector processors
    • G06F15/8061Details on data memory access
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00General purpose image data processing
    • G06T1/20Processor architectures; Processor configuration, e.g. pipelining
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Advance Control (AREA)
  • Image Processing (AREA)
  • Multi Processors (AREA)
  • Gyroscopes (AREA)
  • Bus Control (AREA)
  • Information Transfer Systems (AREA)
  • Memory System (AREA)
  • Studio Devices (AREA)
  • Power Sources (AREA)
CN201580051324.0A 2014-07-30 2015-07-29 低功率计算成像 Expired - Fee Related CN107077186B (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010104557.5A CN111240460A (zh) 2014-07-30 2015-07-29 低功率计算成像

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US201462030913P 2014-07-30 2014-07-30
US62/030,913 2014-07-30
US14/458,014 US9727113B2 (en) 2013-08-08 2014-08-12 Low power computational imaging
US14/458,052 2014-08-12
US14/458,014 2014-08-12
US14/458,052 US9910675B2 (en) 2013-08-08 2014-08-12 Apparatus, systems, and methods for low power computational imaging
PCT/IB2015/001845 WO2016016730A1 (en) 2014-07-30 2015-07-29 Low power computational imaging

Related Child Applications (1)

Application Number Title Priority Date Filing Date
CN202010104557.5A Division CN111240460A (zh) 2014-07-30 2015-07-29 低功率计算成像

Publications (2)

Publication Number Publication Date
CN107077186A CN107077186A (zh) 2017-08-18
CN107077186B true CN107077186B (zh) 2020-03-17

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CN201580051324.0A Expired - Fee Related CN107077186B (zh) 2014-07-30 2015-07-29 低功率计算成像
CN202010104557.5A Pending CN111240460A (zh) 2014-07-30 2015-07-29 低功率计算成像

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EP (3) EP3982234A3 (enExample)
JP (3) JP6695320B2 (enExample)
KR (2) KR20220148328A (enExample)
CN (2) CN107077186B (enExample)
BR (1) BR112017001975B1 (enExample)
WO (1) WO2016016730A1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11768689B2 (en) 2013-08-08 2023-09-26 Movidius Limited Apparatus, systems, and methods for low power computational imaging

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10949365B2 (en) * 2016-09-05 2021-03-16 IOT.nxt BV Software-defined device interface system and method
CN112041817B (zh) * 2018-05-08 2024-11-08 瑞典爱立信有限公司 用于管理借助于加速器装置的硬件加速的请求的方法和节点
EP3579219B1 (en) * 2018-06-05 2022-03-16 IMEC vzw Data distribution for holographic projection
CN110399781A (zh) * 2019-04-27 2019-11-01 泰州悦诚科技信息咨询中心 智能化道路信息分析系统
CN111858016A (zh) * 2019-04-29 2020-10-30 阿里巴巴集团控股有限公司 计算作业处理方法、系统、移动设备及加速设备
US11231963B2 (en) * 2019-08-15 2022-01-25 Intel Corporation Methods and apparatus to enable out-of-order pipelined execution of static mapping of a workload
KR102607421B1 (ko) * 2020-04-27 2023-11-29 한국전자통신연구원 광 회선을 통해 상호 연결된 컴퓨팅 자원 분할 협업 시스템, 자원 분할 협업 방법
US12032839B2 (en) * 2020-07-01 2024-07-09 Meta Platforms Technologies, Llc Hierarchical power management of memory for artificial reality systems
KR20240136078A (ko) * 2023-03-06 2024-09-13 주식회사 사피온코리아 벡터 프로세서 및 그의 동작 방법

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013251884A (ja) * 2012-01-23 2013-12-12 Semiconductor Energy Lab Co Ltd 半導体装置

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3841820B2 (ja) * 1995-05-02 2006-11-08 株式会社ルネサステクノロジ マイクロコンピュータ
DK1066559T3 (da) * 1998-03-18 2005-10-03 Qualcomm Inc Digital signalprocessor
US7158141B2 (en) * 2002-01-17 2007-01-02 University Of Washington Programmable 3D graphics pipeline for multimedia applications
JP2004040214A (ja) * 2002-06-28 2004-02-05 Sony Corp 撮像装置
US7430652B2 (en) * 2003-03-28 2008-09-30 Tarari, Inc. Devices for performing multiple independent hardware acceleration operations and methods for performing same
US20050251644A1 (en) * 2004-05-06 2005-11-10 Monier Maher Physics processing unit instruction set architecture
US7623732B1 (en) * 2005-04-26 2009-11-24 Mercury Computer Systems, Inc. Method and apparatus for digital image filtering with discrete filter kernels using graphics hardware
US7415595B2 (en) 2005-05-24 2008-08-19 Coresonic Ab Data processing without processor core intervention by chain of accelerators selectively coupled by programmable interconnect network and to memory
US20070198815A1 (en) * 2005-08-11 2007-08-23 Coresonic Ab Programmable digital signal processor having a clustered SIMD microarchitecture including a complex short multiplier and an independent vector load unit
US20070067605A1 (en) * 2005-08-17 2007-03-22 Jung-Lin Chang Architecture of a parallel-processing multi-microcontroller system and timing control method thereof
WO2007130582A2 (en) * 2006-05-04 2007-11-15 Sony Computer Entertainment America Inc. Computer imput device having gearing effects
EP1923793A2 (en) * 2006-10-03 2008-05-21 Sparsix Corporation Memory controller for sparse data computation system and method therefor
US8248422B2 (en) * 2008-01-18 2012-08-21 International Business Machines Corporation Efficient texture processing of pixel groups with SIMD execution unit
US8452997B2 (en) * 2010-04-22 2013-05-28 Broadcom Corporation Method and system for suspending video processor and saving processor state in SDRAM utilizing a core processor
US8798386B2 (en) * 2010-04-22 2014-08-05 Broadcom Corporation Method and system for processing image data on a per tile basis in an image sensor pipeline
US8806232B2 (en) * 2010-09-30 2014-08-12 Apple Inc. Systems and method for hardware dynamic cache power management via bridge and power manager
US9405357B2 (en) * 2013-04-01 2016-08-02 Advanced Micro Devices, Inc. Distribution of power gating controls for hierarchical power domains
JP6385077B2 (ja) * 2014-03-05 2018-09-05 ルネサスエレクトロニクス株式会社 半導体装置

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013251884A (ja) * 2012-01-23 2013-12-12 Semiconductor Energy Lab Co Ltd 半導体装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11768689B2 (en) 2013-08-08 2023-09-26 Movidius Limited Apparatus, systems, and methods for low power computational imaging

Also Published As

Publication number Publication date
BR112017001975A2 (pt) 2017-11-21
KR20170067716A (ko) 2017-06-16
BR112017001975B1 (pt) 2023-02-28
KR20220148328A (ko) 2022-11-04
JP2017525047A (ja) 2017-08-31
EP3982234A3 (en) 2022-05-11
EP3982234A2 (en) 2022-04-13
EP3175320B1 (en) 2019-03-06
JP7053713B2 (ja) 2022-04-12
WO2016016730A1 (en) 2016-02-04
JP2022097484A (ja) 2022-06-30
EP3506053A1 (en) 2019-07-03
EP3175320A1 (en) 2017-06-07
EP3506053B1 (en) 2021-12-08
KR102459716B1 (ko) 2022-10-28
JP6695320B2 (ja) 2020-05-20
JP2020129386A (ja) 2020-08-27
CN111240460A (zh) 2020-06-05
CN107077186A (zh) 2017-08-18

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Effective date of registration: 20191022

Address after: Schippick, the Netherlands

Applicant after: Movidius Ltd.

Address before: Ai Er Landubailin

Applicant before: LINEAR ALGEBRA TECHNOLOGIES LTD.

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Granted publication date: 20200317