CN106992783B - Sampling time mismatch correction method for time-interleaved ADC (analog to digital converter) based on binary search - Google Patents

Sampling time mismatch correction method for time-interleaved ADC (analog to digital converter) based on binary search Download PDF

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CN106992783B
CN106992783B CN201710221692.6A CN201710221692A CN106992783B CN 106992783 B CN106992783 B CN 106992783B CN 201710221692 A CN201710221692 A CN 201710221692A CN 106992783 B CN106992783 B CN 106992783B
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correction
sampling time
mismatch
tcali
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CN106992783A (en
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李靖
王朝驰
李成泽
叶欣
宁宁
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University of Electronic Science and Technology of China
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    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/10Calibration or testing
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Abstract

a sampling time mismatch correction method for a time-interleaved ADC based on binary search belongs to the field of integrated circuit design. When the sampling time mismatch characterization quantity | Bi | ≧ Bs, a method of combining a binary search method and a fixed correction step length is adopted to adjust a sampling time mismatch correction coefficient Tcali (n +1) in the next correction period, when | Bi | < Bs, the sampling time mismatch correction coefficient Tcali (n +1) in the next correction period is adjusted in a fixed correction step length mode, then the adjusted Tcali (n +1) is fed back to a clock unit in the time-interleaved ADC, the clock phase of the corresponding ith time-interleaved ADC channel is adjusted, mismatch of sampling time is continuously reduced, and correction of the sampling time mismatch in the correction period is completed, wherein Bs is the maximum range of | Bi | when no sampling time mismatch exists and is called as a sampling time mismatch threshold value. The invention adopts a binary search method to greatly shorten the correction period; the correction accuracy is ensured by adopting a correction algorithm with fixed correction step length.

Description

Sampling time mismatch correction method for time-interleaved ADC (analog to digital converter) based on binary search
Technical Field
The invention relates to the field of integrated circuit design, in particular to a time-interleaved analog-to-digital converter, and particularly relates to a correction algorithm for sampling time mismatch of the time-interleaved analog-to-digital converter.
Background
an analog-to-digital converter (ADC) is a bridge that connects the analog world and the digital world and is capable of quantizing an analog signal into a digital signal that can be readily processed using a variety of digital processing techniques. With the development of digital signal processing technology and integrated circuit manufacturing process, the speed of digital circuits is faster and faster, and accordingly, the requirement for the conversion rate of the analog-to-digital converter is higher and higher. The time-interleaved analog-to-digital converter is an analog-to-digital converter capable of realizing high sampling rate, adopts a time-interleaved architecture, and comprises M subchannel analog-to-digital converters working in parallel, wherein the clock frequency of each subchannel is fs/M, but the phases are staggered, as shown in figure 1, so that the integral sampling rate of the system can reach fs. The sampling rate is multiplied with respect to a single channel.
however, the dynamic performance of the time-interleaved analog-to-digital converter is deteriorated by the mismatch between channels, gain mismatch, and sampling time mismatch, and therefore, the mismatch must be corrected by a corresponding correction algorithm. Some known correction algorithms mainly correct the mismatch in two stages, namely, mismatch detection, that is, the magnitude of the existing mismatch needs to be detected; then, mismatch correction is performed, that is, data is processed correspondingly according to the detected mismatch, so that the mismatch value finally approaches zero.
For the correction of the sampling time mismatch, patent CN103312329A proposes an algorithm based on the difference between quantized values of adjacent channels. In the detection stage, the difference is made by using the quantization values between adjacent channels to obtain a variable which can represent the sampling time mismatch of each channel, namely a sampling time mismatch representation Bi, then in the correction stage, the statistical error of the relative error, namely the sampling time mismatch representation Bi, is eliminated through the filtering of an accumulation and reset module, and the summed relative error is fed back to a variable delay line to adjust the channel sampling clock, so that the negative feedback adjustment of the sampling time mismatch is realized. Although the algorithm can well correct the sampling time mismatch, the algorithm adopts a linear adjustment mode when the sampling time mismatch is adjusted, so the convergence speed of the algorithm is related to the size of the mismatch value, and for a larger mismatch value, more correction cycles are needed to achieve the correction purpose.
Disclosure of Invention
The invention mainly solves the technical problem of providing a correction algorithm for sampling time mismatch, which has higher convergence rate.
the technical scheme for solving the problems is as follows:
the sampling time mismatch correction method for the time-interleaved ADC based on binary search comprises the following steps:
a: time-interleaved ADC samples an input signal and quantizes it into a digital signal;
b: defining the sampling time mismatch correction coefficient of the nth correction period of the ith time-interleaved ADC channel as Tcali (1) ═ 0, and processing the digital signal obtained in the step a in each correction period to obtain a sampling time mismatch characterization quantity Bi of each channel of the time-interleaved ADC, (i ═ 1,2, …, M), wherein M is the total number of channels of the time-interleaved ADC;
c: in each correction period, when | Bi | ≧ Bs, a method of combining a binary search method and a fixed correction step length is adopted to adjust a sampling time mismatch correction coefficient Tcali (n +1) in the next correction period, when | Bi | < Bs, the sampling time mismatch correction coefficient Tcali (n +1) in the next correction period is adjusted in a fixed correction step length mode, then the adjusted sampling time mismatch correction coefficient Tcali (n +1) of the next correction period is fed back to a clock unit in a time-interleaved ADC, a clock phase of a corresponding ith time-interleaved ADC channel is adjusted, mismatch of sampling time is reduced continuously, and correction of sampling time mismatch in the correction period is completed, wherein Bs is the maximum range of | Bi | when no sampling time mismatch exists and is called as a sampling time mismatch threshold;
the method for adjusting the sampling time mismatch correction coefficient Tcali (n +1) in the next correction period by combining the binary search method and the fixed correction step length comprises the following specific steps:
c 1.1: when Bi is more than BS, let ut (n) be the correction step length of the current correction period; tmax is the maximum time delay which can be adjusted by the clock unit;
c 1.2: when Bi < -BS >, let
c 1.3: for steps c1.1 and c1.2, when the correction step ut (n) reaches the minimum precision step utmin, keeping the value of the minimum precision step utmin unchanged, where the minimum precision step utmin is tmin, where tmin represents the minimum time delay that can be adjusted by the clock unit, and the minimum precision step utmin is a fixed correction step;
the specific steps of adjusting the sampling time mismatch correction coefficient Tcali (n +1) in the next correction period in a fixed correction step length mode are as follows:
c2.1:0< Bi < BS, let Tcali (n +1) ═ Tcali (n) -utmin;
c 2.2: -when BS < Bi <0, let Tcali (n +1) ═ Tcali (n) + utmin.
Specifically, the step b of obtaining the sampling time mismatch characteristic quantity Bi of each channel of the time-interleaved ADC includes:
b1. differencing the digital signal output of adjacent channels in the acquired time-interleaved ADC, assuming that the acquired is a sinusoidal signal x (t) with an input frequency fin, generating digital output of each channel as: Y-Y1 k, Y2 k, …, yM k, (k-1, 2, …, P), where M is the total number of channels of the time-interleaved ADC and P represents the number of single-channel sample points, then differencing the digital outputs of adjacent-channel ADCs by:
b2. And the obtained absolute values of the difference Ei [ k ] are summed and averaged to obtain Ai which is characterized by the sampling time interval between adjacent channel ADCs,
b3. Summing and averaging all Ai to obtain a standard sampling time gap which is characterized as being between adjacent channel ADCs;
b4. Differencing all Ai sums to yield: and Bi is the relative error between the sampling time gap between the ADCs of the adjacent channels and the standard sampling time gap, namely the sampling time mismatch characterization quantity of each channel.
specifically, the sampling time mismatch threshold Bs is obtained by performing multiple test statistics on | Bi | under the condition of no sampling time mismatch.
the invention has the beneficial effects that: the sampling time mismatch is gradually approximated by adopting an algorithm for correcting the sampling time mismatch by a binary search method, so that the correction period is greatly shortened; the correction algorithm with fixed correction step length is adopted, and the correction precision of the algorithm provided by the invention is also ensured.
Drawings
FIG. 1 is a schematic block diagram of a time-interleaved ADC
FIG. 2 is a flowchart of a sampling time mismatch correction method for a time-interleaved ADC based on binary search according to the present invention
FIG. 3 is a spectrum of an output signal before correction
FIG. 4 is a corrected output signal spectrum
FIG. 5 is a graph of the convergence of the sample time mismatch after the algorithm of the present invention is used
FIG. 6 is a graph of convergence of sample time mismatch after a fixed step correction algorithm
FIG. 7 shows the correction algorithm of fixed step size under different sampling time mismatch conditions and the correction period corresponding to the algorithm in the embodiment
Detailed Description
for a detailed description of the present invention, reference will now be made in detail to the present embodiments of the invention, examples of which are illustrated in the accompanying drawings. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
in this embodiment, a two-channel time-interleaved ADC is taken as an example, and only the existence of sampling time mismatch is considered, and other mismatches are not considered, and the detailed steps are as follows:
1. The sinusoidal signal x (t) with frequency fin is the input signal of the time-interleaved ADC, the sampling frequency fs (0< fin < fs/2), y1[ k ] and y2[ k ] (k is 1,2, … N) of the ADC are the quantized values of the two channels, respectively, where N represents the number of quantization points.
2. taking the difference between the quantized values of adjacent channels, let Ai be the mean of Ei, representing the actual sampling time interval between channels, then
3. Let denote the inter-channel standard sample time gap.
4. all Ai's are subtracted to obtain a sampling time mismatch characterization quantity Bi, namely
5. When the absolute value of Bi is more than or equal to Bs, adjusting a sampling time mismatch correction coefficient Tcali (n +1) in the next correction period by adopting a method of combining a binary search method and a fixed correction step length, when the absolute value of Bi is less than the Bs, adjusting the sampling time mismatch correction coefficient Tcali (n +1) in the next correction period by adopting a fixed correction step length mode, then feeding the adjusted sampling time mismatch correction coefficient Tcali (n +1) in the next correction period back to a clock unit in the time-interleaved ADC, adjusting the clock phase of a corresponding ith time-interleaved ADC channel to continuously reduce the mismatch of sampling time, and completing the correction of the mismatch of the sampling time in the correction period, wherein the Bs is the maximum range of the absolute value of Bi when no sampling time mismatch exists and is called as a sampling time mismatch threshold value;
The method for adjusting the sampling time mismatch correction coefficient Tcali (n +1) in the next correction period by combining the binary search method and the fixed correction step length comprises the following specific steps:
1.1: when Bi is greater than BS, the sampling clock phase of the current channel is delayed relative to the ideal clock phase, and the sampling clock phase of the current channel should be advanced, so that ut (n) is the correction step length of the current correction period; tmax is the maximum time delay which can be adjusted by the clock unit;
1.2: when Bi < -BS indicates that the sampling clock phase of the current channel has a phase advance relative to the ideal clock phase, the sampling clock phase of the current channel should be delayed, so that it can be seen that the adjustment value of Tcali at present is half of the value of the previous correction step ut (n), and therefore, the method is also called a binary search method.
1.3: for steps c1.1 and c1.2, as the correction proceeds, the correction step ut (n) is continuously reduced, and finally reduced to the minimum precision step utmin, at this time, the step cannot be reduced any more, so the correction step is kept unchanged as the minimum precision step utmin, and the correction is continued, where the minimum precision step utmin is tmin, where tmin represents the minimum time delay that can be adjusted by the clock unit, and the minimum precision step utmin is a fixed correction step;
the specific steps of adjusting the sampling time mismatch correction coefficient Tcali (n +1) in the next correction period in a fixed correction step length mode are as follows:
2.1:0< Bi < BS, let Tcali (n +1) ═ Tcali (n) -utmin;
2.2: -when BS < Bi <0, let Tcali (n +1) ═ Tcali (n) + utmin.
6. and repeating the step 2 to the step 5, wherein the sampling time mismatch between the channels gradually approaches to 0, so that the purpose of correcting the sampling time mismatch is achieved.
Because the value of the adjustment to the Tcali each time is half of the previous Tcali value, the mismatch can be converged quickly in the initial stage of correction, which is similar to the convergence mode of the dynamic step length. Along with the correction, the mismatch is gradually reduced, the correction step length is also reduced to the minimum precision step length and is kept unchanged, so that the fixed step length correction is recovered, and the correction precision is ensured.
Matlab modeling analysis was performed on the above embodiments, and fig. 3 and 4 show the output signal spectra before and after correction, respectively, and it can be seen from the graphs that after correction, the effective bit (ENOB) is improved by 5.18dB, and the Spurious Free Dynamic Range (SFDR) is improved by 47.21 dB. Fig. 5 and fig. 6 show the convergence of the sampling time mismatch of the correction algorithm in the embodiment and the correction algorithm with a fixed step length, respectively, and it can be seen from the diagrams that while the correction accuracy is ensured, when the correction algorithm in the embodiment is adopted, the sampling time mismatch can be converged stably by 12 correction periods, and when the correction algorithm with a fixed step length is adopted, 180 correction periods are required, so that the correction algorithm of the present invention has a faster convergence speed. Moreover, under the condition of different sampling time mismatches, the correction algorithm with fixed step length is adopted, the required correction period number is in direct proportion to the mismatch size, and when the correction algorithm in the embodiment is adopted, the mismatch of sampling time can be converged and stabilized only by 12 correction periods, as shown in fig. 7, the horizontal axis represents the percentage of the mismatch value in the sampling period, the vertical axis represents the correction period number required by the different correction algorithms, and the comparison of the two curves proves that the correction algorithm in the embodiment has great advantages in convergence speed.

Claims (3)

1. The sampling time mismatch correction method for the time-interleaved ADC based on binary search is characterized by comprising the following steps of:
a: time-interleaved ADC samples an input signal and quantizes it into a digital signal;
b: defining the sampling time mismatch correction coefficient of the nth correction period of the ith time-interleaved ADC channel as Tcali (1) ═ 0, and processing the digital signal obtained in the step a in each correction period to obtain a sampling time mismatch characterization quantity Bi of each channel of the time-interleaved ADC, (i ═ 1,2, …, M), wherein M is the total number of channels of the time-interleaved ADC;
c: in each correction period, when | Bi | ≧ Bs, a method of combining a binary search method and a fixed correction step length is adopted to adjust a sampling time mismatch correction coefficient Tcali (n +1) in the next correction period, when | Bi | < Bs, the sampling time mismatch correction coefficient Tcali (n +1) in the next correction period is adjusted in a fixed correction step length mode, then the adjusted sampling time mismatch correction coefficient Tcali (n +1) of the next correction period is fed back to a clock unit in a time-interleaved ADC, a clock phase of a corresponding ith time-interleaved ADC channel is adjusted, mismatch of sampling time is reduced continuously, and correction of sampling time mismatch in the correction period is completed, wherein Bs is the maximum range of | Bi | when no sampling time mismatch exists and is called as a sampling time mismatch threshold;
the method for adjusting the sampling time mismatch correction coefficient Tcali (n +1) in the next correction period by combining the binary search method and the fixed correction step length comprises the following specific steps:
c 1.1: when Bi is more than BS, let ut (n) be the correction step length of the current correction period; tmax is the maximum time delay which can be adjusted by the clock unit;
c 1.2: when Bi < -BS >, let
c 1.3: for steps c1.1 and c1.2, when the correction step ut (n) reaches the minimum precision step utmin, keeping the value of the minimum precision step utmin unchanged, where the minimum precision step utmin is tmin, where tmin represents the minimum time delay that can be adjusted by the clock unit, and the minimum precision step utmin is a fixed correction step;
the specific steps of adjusting the sampling time mismatch correction coefficient Tcali (n +1) in the next correction period in a fixed correction step length mode are as follows:
c2.1:0< Bi < BS, let Tcali (n +1) ═ Tcali (n) -utmin;
c 2.2: -when BS < Bi <0, let Tcali (n +1) ═ Tcali (n) + utmin.
2. The sampling time mismatch correction method for a time-interleaved ADC based on binary search according to claim 1, wherein the specific step of obtaining the sampling time mismatch characterization quantity Bi of each channel of the time-interleaved ADC in the step b comprises:
b1. differencing the digital signal output of adjacent channels in the acquired time-interleaved ADC, assuming that the acquired is a sinusoidal signal x (t) with an input frequency fin, generating digital output of each channel as: Y-Y1 k, Y2 k, …, yM k, (k-1, 2, …, P), where M is the total number of channels of the time-interleaved ADC and P represents the number of single-channel sample points, then differencing the digital outputs of adjacent-channel ADCs by:
b2. And the obtained absolute values of the difference Ei [ k ] are summed and averaged to obtain Ai which is characterized by the sampling time interval between adjacent channel ADCs,
b3. Summing and averaging all Ai to obtain a standard sampling time gap which is characterized as being between adjacent channel ADCs;
b4. Differencing all Ai sums to yield: and Bi is the relative error between the sampling time gap between the ADCs of the adjacent channels and the standard sampling time gap, namely the sampling time mismatch characterization quantity of each channel.
3. the method of claim 1, wherein the sampling time mismatch threshold Bs is obtained by performing multiple test statistics on | Bi | without sampling time mismatch.
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