CN106973245B - Image Sensor and the image capture unit for using it - Google Patents
Image Sensor and the image capture unit for using it Download PDFInfo
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- CN106973245B CN106973245B CN201610021035.2A CN201610021035A CN106973245B CN 106973245 B CN106973245 B CN 106973245B CN 201610021035 A CN201610021035 A CN 201610021035A CN 106973245 B CN106973245 B CN 106973245B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
- H04N23/50—Constructional details
- H04N23/54—Mounting of pick-up tubes, electronic image sensors, deviation or focusing coils
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Abstract
The present invention provides a kind of Image Sensor and the influence capture device using it.Image Sensor includes image sensing array and voltage supply array.Image sensing array and voltage supply array are coupled to analog-digital converter array.Image sensing array pick-up image data.Image sensing array is according to one of set supporting rolling shutter mechanism and global shutter mechanism.It includes multiple voltage supply circuits that voltage, which supplies array, proposes voltage to provide.During automatically correcting, voltage supply array offer proposes voltage to analog-digital converter array.Multiple comparators of analog-digital converter array execute zero offset capability according to voltage is proposed.After comparator completes zero offset capability, image sensing array image output data to analog-digital converter array.Image data is converted into digitized image data by analog-digital converter array.The circuit design of the Image Sensor is more simplified, easily fabricated and manufacturing cost is cheap.
Description
Technical field
The present invention relates to a kind of Image Sensor, and in particular to one kind can support rolling shutter mechanism and global shutter machine
The Image Sensor of system, and the image capture unit using it.
Background technique
With the development of photovoltaic, the demand of Image Sensor also ceaselessly increases.Image Sensor substantially can be divided into
Two major classes: complementary metal oxide semiconductor (Complementary Metal-Oxide-Semiconductor, CMOS) shadow
As sensor and charge coupled cell (charge-coupled device, CCD) Image Sensor, wherein because of CMOS image sense
It surveys utensil low power consumption and low manufacture cost and other advantages and is used by broad development.
Image Sensor include multiple matrix arrangements pixel and multiple comparators.If Image Sensor is row simulation
Digital quantizer (Column Analog-to-Digital Converter) structure is located at a line in the multiple pixel
Pixel is coupled to the same comparator.Each pixel is to sense a luminance information and one image data of corresponding generation.It is each
The reading circuit that a pixel generally comprises photosensitive element and is made of an at least output transistor.It further says, photosensitive member
Part to sensing incident light line, and accordingly output charge to a floating diffusion region (floating diffusion region)
Storage.The charge of the accumulated storage in floating diffusion region is converted to image data and exported to comparator by the output transistor.
Comparator further according to image data and the corresponding comparison result of a reference voltage output to rear end image-processing circuit, to produce
Raw corresponding image.
Current Image Sensor can support two kinds of mechanism, be rolling shutter (Rolling Shutter) mechanism respectively
With global shutter (Global Shutter) mechanism.When Image Sensor works in rolling shutter mechanism, multiple pixels expose by column
Light simultaneously generates image data, then provides image data by column to comparator.On the other hand, when Image Sensor works in the overall situation
Shutter mechanism, all pixels are exposed simultaneously, and then the multiple pixel provides image data to comparator by column again.
Each comparator is different respectively when Image Sensor works in rolling shutter mechanism and global shutter mechanism
Bias.In general, Image Sensor handles rolling shutter mechanism using two sets of comparators and image-processing circuit respectively
With the image data exported under global shutter mechanism.Meet two kinds to use same set of comparator and image-processing circuit
Different biass can make designing complexity just and being difficult to realize for comparator.However, using two sets of comparators and image processing electricity
Road will cause the cost of Image Sensor again and area improves.
Summary of the invention
The present invention provides a kind of Image Sensor and the image capture unit using it, to solve image sense in the prior art
Survey that device handles rolling shutter mechanism with image-processing circuit using two sets of comparators respectively and global shutter mechanism is lower is exported
Image data when bring cost and area improve the technical issues of.
The embodiment of the present invention provides a kind of Image Sensor.The Image Sensor includes image sensing array and voltage
Supply array.Image sensing array and voltage supply array are coupled to an analog-digital converter array.Analog-digital converter
Array includes multiple comparators.Image sensing array includes multiple pixels.Image sensing array is to pick-up image data.Image
Array is sensed according to one of one rolling shutter mechanism of set supporting and a global shutter mechanism.It includes more that voltage, which supplies array,
A voltage supply circuit proposes voltage to provide one.During automatically correcting, voltage supply array offer proposes voltage to mould
Quasi- digitizer array.The multiple comparator executes a zero offset capability according to voltage is proposed.In the multiple comparison
After device completes zero offset capability, image sensing array image output data to analog-digital converter array.Simulation numeral turns
Image data is converted into digitized image data by converter array.
The embodiment of the present invention provides a kind of image capture unit.The image capture unit includes analog-digital converter battle array
Column and Image Sensor.The Image Sensor includes image sensing array and voltage supply array.Image sensing array
Analog-digital converter array is coupled to voltage supply array.Analog-digital converter array includes multiple comparators.Image
Sensing array includes multiple pixels.Image sensing array is to pick-up image data.Image sensing array is according to set supporting one
One of rolling shutter mechanism and a global shutter mechanism.It includes multiple voltage supply circuits that voltage, which supplies array, to mention
Voltage is proposed for one.During automatically correcting, voltage supply array offer proposes voltage to analog-digital converter array.It is described
Multiple comparators execute a zero offset capability according to voltage is proposed.After the multiple comparator completes zero offset capability,
Image sensing array image output data are to analog-digital converter array.Analog-digital converter array converts image data
At digitized image data.
In conclusion Image Sensor provided by the embodiment of the present invention and the image capture unit using it, pass through electricity
Pressure supply array provide it is stable propose voltage to the comparator of analog-digital converter array, image capture unit can be allowed to make
Rolling shutter mechanism and global shutter mechanism are realized with same set of analog-digital converter array and image-processing circuit, and
Generate corresponding image.Compared to traditional image capture unit, Image Sensor and use provided by the embodiment of the present invention
The circuit design of its image capture unit is more simplified, easily fabricated and manufacturing cost is cheap.
Be further understood that feature and technology contents of the invention to be enabled, please refer to below in connection with it is of the invention specifically
Bright and attached drawing, but these explanations are only used to illustrate the present invention with Detailed description of the invention book attached drawing, rather than to interest field of the invention
Make any limitation.
Detailed description of the invention
Fig. 1 is the schematic diagram of image capture unit provided in an embodiment of the present invention.
Fig. 2 is the schematic diagram of Image Sensor provided in an embodiment of the present invention Yu analog-digital converter array.
Fig. 3 is the schematic diagram of comparator provided in an embodiment of the present invention.
Fig. 4 is traditional comparator in the running waveform diagram of rolling shutter mechanism and global shutter mechanism.
Fig. 5 is the running waveform diagram of comparator provided in an embodiment of the present invention.
Description of symbols:
1: image capture unit
10: Image Sensor
11: analog-digital converter array
12: image-processing circuit
100: row picture element matrix
101: voltage supply circuit
110: comparator
111: counter
VDD: supply voltage
PD: photosensitive element
TG: transfering transistor
FD: floating diffusion region
RST: reset transistor
SF: source electrode following device
RSL: column selection transistor
RSEL: array selecting signal
C1: first capacitor
C2: the second capacitor
PXO: image data
RDAC: ramp voltage
Vdummy: propose voltage
IS: current source
M1: the first transistor
M2: second transistor
M3: third transistor
M4: the four transistor
SW1: first switch transistor
SW2: second switch transistor
Vdip: first end point
Vdin: the second endpoint
T1, T2, T3, T4: time point
Specific embodiment
Various exemplary embodiments will be more fully described referring to Figure of description below, shown in Figure of description
Some exemplary embodiments.However, concept of the present invention may embody in many different forms, and should not be construed as limited by herein
Middle illustrated exemplary embodiments.Specifically, provide these exemplary embodiments make the present invention will to be detailed and complete,
And the scope for concept of the present invention sufficiently being conveyed to those skilled in the art.In all attached drawings, can be lavished praise on oneself in order to clear layer and
The size and relative size in area.Similar number indicates similar component always.
It should be understood that although various elements or signal etc. may be described using term first, second, third, etc. herein,
But these elements or signal should not be limited by these terms.These terms are to distinguish an element and another element, Huo Zheyi
Signal and another signal.In addition, as used herein, term "or" may include depending on actual conditions and associated list project
Any one of or more persons all combinations.
Referring to Fig. 1, Fig. 1 is the schematic diagram of image capture unit provided in an embodiment of the present invention.Image capture unit 1 wraps
Include Image Sensor 10, analog-digital converter array 11 and image-processing circuit 12.Image Sensor 10 is coupled to simulation
Digitizer array 11.Analog-digital converter array 11 is coupled to image-processing circuit 12.
The electronic device that image capture unit 1 can be applied to tool imaging function includes but is not limited to digital camera (digital
Camera), digital camera-recorder (camcorder), drive recorder (driving recorder), Vehicular navigation system (car
Navigation system), scanning means (scanner), network cameras (web camera), visual telephone (video
Phone) with monitoring system (surveillance system).
Image Sensor 10 is, for example, complementary metal oxide semiconductor (Complementary Metal-Oxide-
Semiconductor, CMOS) Image Sensor and charge coupled cell (charge-coupled device, CCD) image sense
Survey device.Image Sensor 10 is exported to capture an image data, and by image data to analog-digital converter array 11.Shadow
As the detailed construction of sensor 10 will describe in detail in lower section paragraph.
Analog-digital converter array 11 includes logic appropriate, circuit and/or coding, image data to be converted into
Image data is converted to two-symbol form by digitized image data.Then analog-digital converter array 11 will count
The image data of word is exported to image-processing circuit 12.The detailed construction of analog-digital converter array 11 will be in lower section paragraph
It describes in detail.
Image-processing circuit 12 includes logic appropriate, circuit and/or coding, to obtain from digitized image data
True image is taken, or image processing is carried out to digitized image data.For example, image-processing circuit 12 can be used to pair
Digitized image data carries out pixel intensity compensation and integration processing.Image-processing circuit 12 has a pixel compensation mechanism,
The digitized image data of each pixel of correspondence can be subjected to adequate compensation according to the conversion gain of ambient brightness and each pixel.
It is described further below for Image Sensor 10 and the structure of analog-digital converter array 11 with work.
Referring to Fig. 2, Fig. 2 is the schematic diagram of Image Sensor provided in an embodiment of the present invention Yu analog-digital converter array.Image
Sensor 10 includes that image sensing array and voltage supply array.Image sensing array includes multiple pixels, and forms a picture
Pixel array.It includes multiple voltage supply circuits 101 that voltage, which supplies array,.Analog-digital converter array 11 includes multiple comparators
110, multiple counters 111, multiple first capacitor C1 and multiple second capacitor C2.The multiple first capacitor C1 and multiple the
Two capacitor C2 are respectively coupled to the reverse input end and non-inverting input of the multiple comparator 110.The multiple comparator
110 output end is respectively coupled to the multiple counter 111.The output end of the multiple counter 111 is respectively coupled to shadow
As processing circuit 12.For convenience of description, Fig. 2 be only painted 111, one, the counter first capacitor C1 of comparator 110, one with
An and second capacitor C2.
In this present embodiment, image sensing array is row analog-digital converter (Column Analog-to-Digital
Converter) structure.Therefore, the pixel being located in the multiple pixel with a line is coupled to the same comparator 110, and shape
At multiple row picture element matrixs 100, wherein the multiple row picture element matrix 100 is set parallel to each other and forms image sensing array.
In other words, the quantity of comparator 110 corresponds to the line number of image sensing array.In addition, a voltage supply circuit 101 is coupled to
One row picture element matrix 100 and a comparator 110, therefore the quantity of voltage supply circuit 101 also corresponds to image sensing
The line number of array.It is noted that Fig. 2 equally only depicts a row picture element matrix 100 and a voltage supply circuit
101.However, the present embodiment does not limit the pixel quantity of row picture element matrix 100 and the quantity of voltage supply circuit 101.In
In other embodiments, a voltage supply circuit 101 can also be coupled to multiple row picture element matrixs 100 and multiple comparators 110.
Image sensing array is to capture an image data PXO.Image sensing array can roll fastly according to set supporting one
Door one of (Rolling Shutter) mechanism and a global shutter (Global Shutter) mechanism.When image sensing battle array
Column work in rolling shutter mechanism, and the multiple pixel exposes by column and generates image data PXO, then provide image number by column
According to PXO to analog-digital converter array 11.On the other hand, when Image Sensor works in global shutter mechanism, all pictures
Element is exposed simultaneously, and then the multiple pixel provides image data PXO to analog-digital converter array 11 by column again.
As shown in Figure 2, the pixel of the present embodiment is 4T (four-transistor) structure.Each pixel includes photosensitive element
PD, floating diffusion region FD, source electrode following device (source follower) SF, column selection transistor RSL, reset transistor RST with
And transfering transistor (transfer transistor) TG.One end of photosensitive element PD is coupled to transfering transistor TG, and photosensitive
The other end of element PD is grounded.Transfering transistor TG is coupled between photosensitive element PD and floating diffusion region FD.Source electrode following device
The grid of SF is coupled to floating diffusion region FD, and the drain electrode of source electrode following device SF is coupled to a power source supply end, is supplied with receiving one
Answer voltage VDD.The drain electrode of column selection transistor RSL is coupled to the source electrode of source electrode following device SF, and the source of column selection transistor RSL
Pole is coupled to comparator 110.Reset transistor RST is coupled between power source supply end and floating diffusion region FD.In addition, transfer is brilliant
The grid of the grid of body pipe TG, the grid of reset transistor RST and column selection transistor RSL is respectively coupled to driving circuit
(Fig. 2 is not painted).
Photosensitive element PD is corresponded to sensing incident light line and is generated charge.Photosensitive element PD may be, for example, two pole of photoelectricity
Pipe, optotransistor, optical gate (photo-gate), nail letter photodiode (Pinned Photo Diode) or combinations thereof etc. can incite somebody to action
Light is converted to the electronic component of charge.
Floating diffusion region FD is by parasitic capacitance between photosensitive element PD and source electrode following device SF and/or set in addition outer
Capacitor is hung to be formed.Floating diffusion region FD is to receive and store charge caused by photosensitive element PD.
Transfering transistor TG is to the electric charge transfer that selectively generates photosensitive element PD to floating diffusion region FD.In detail
Say that transfering transistor TG is controlled by the transfer signal of driving circuit output in ground.When the transfer of driving circuit output logic low
When signal cut-off transition transistor TG, charge caused by photosensitive element PD can not be transferred into floating diffusion region FD.And work as
When transfering transistor TG is connected in the transfer signal that driving circuit generates logic high, transfering transistor TG can be by photosensitive element PD
Generated electric charge transfer is sent to floating diffusion region FD accumulation storage.
Source electrode following device SF can be according to the charge that floating diffusion region FD is exported in the grid of source electrode following device SF when conducting
The grid voltage of formation, it is corresponding to generate image data PXO.Column selection transistor RSL receives image data PXO, and according to driving
The array selecting signal RSEL of circuit output selectively exports image data PXO to comparator 110.
Reset transistor RST is selectively exported to the reset signal exported according to driving circuit with power source supply end
Supply voltage VDD reset floating diffusion region FD.For example, when reset signal is logic low, reset transistor RST
Running can be ended and pull down the voltage level of the cathode of photosensitive element PD, at this point, photosensitive element PD can sensing incident light line and right
Charge should be generated and be stored in floating diffusion region FD.And when reset signal is logic high, reset transistor RST can be led
Lead to so that the voltage level of the cathode of photosensitive element PD is reset as initial potential (that is, supply voltage VDD), so that release is clear
Except the charge remained in the FD of floating diffusion region, i.e. resetting floating diffusion region FD.
It is noted that in this present embodiment, the multiple pixel is 4T structure.However, the present invention not as
Limit.In other embodiments, the multiple pixel also can be 3T (three-transistor) structure or 5T (five-
Transistor) structure.If the multiple pixel is 3T structure, the multiple pixel does not include transfering transistor TG.If institute
Stating multiple pixels is 5T structure, then the multiple pixel is in addition to photosensitive element PD, floating diffusion region FD, source electrode following device SF, column
It further include a global shutter transistor (global outside selection transistor RSL, reset transistor RST and transfering transistor TG
shutter transistor).The operation principles of the pixel of the pixel and 5T structure of 3T structure are that technical field tool is usual
Skill, the common technology in image processing field, therefore details are not described herein.
Voltage supply circuit 101 includes logic appropriate, circuit and/or coding, proposes voltage V to provide onedummyIt gives
Comparator 110.Propose voltage VdummyFor a stable fixed voltage.Comparator 110 is according to proposing voltage VdummyIt is automatic to execute one
(Auto Zero) function is corrected, multiple transistors to solve the problems, such as comparator 110 are unmatched because of process variations.
In this present embodiment, voltage supply circuit 101 is a kind of shading pixel.For example, the structure of shading pixel with
Pixel above-mentioned is identical, for example, the pixel of 4T structure.Unlike pixel above-mentioned, the photosensitive element PD quilt of shading pixel
Masking by incident ray without being influenced.Therefore, the voltage stabilization of the floating diffusion region FD of shading pixel.Then shading picture
Element provides according to floating diffusion region FD and stable proposes voltage VdummyTo comparator 110, comparator 110 executes again automatically corrects function
Energy.
The structure of the present embodiment not stop voltage supply circuit 101.In other embodiments, voltage supply circuit 101
Can be the shading pixel of 3T structure, the shading pixel of 5T structure or other can provide the circuit of fixed voltage.However, in order to
Facilitate production, the structure of voltage supply circuit 101 is designed to identical as the pixel of image sensing array.
The structure of comparator 110 will be described further below.Cooperate Fig. 2, referring to Fig. 3, Fig. 3 is implementation of the present invention
The schematic diagram for the comparator that example provides.Comparator 110 includes the first transistor M1, second transistor M2, third transistor M3, the
Four transistor M4, first switch transistor SW1, second switch transistor SW2 and current source IS.In this present embodiment, first
Transistor M1 and second transistor M2 is N-type metal-oxide half field effect transistor, and third transistor M3 and the 4th transistor M4
For p-type metal-oxide half field effect transistor.
The source electrode of the first transistor M1 is coupled to current source IS, and the drain electrode of the first transistor M1 is coupled to third transistor
M3.The source electrode of second transistor M2 is coupled to current source IS, and the drain electrode of second transistor M2 is coupled to the 4th transistor M4.Electricity
Stream source IS flows through the magnitude of current of the first transistor M1 and second transistor M2 to control.The grid of the first transistor M1 couples
In first capacitor C1.The grid of second transistor M2 is coupled to the second capacitor C2.The grid of 4th transistor M4 is coupled to the 4th
The drain electrode of transistor M4, and the drain electrode of the 4th transistor M4 is further coupled to counter 111.
In addition, first switch transistor SW1 is electrically connected between the drain electrode and grid of the first transistor M1.Second switch
Transistor SW2 is electrically connected between second transistor M2 drain electrode and grid.In this present embodiment, first switch transistor SW1
It is p-type metal-oxide half field effect transistor with second switch transistor SW2.However, the present invention is not limited thereto.In other embodiments
In, first switch transistor SW1 and second switch transistor SW2 can also be N-type metal-oxide half field effect transistor.Affiliated technology neck
Voltage swing that field technique personnel Ke Yi comparator 110 is born changes first switch transistor SW1 and second switch crystal
The type of pipe SW2.
Comparator 110 receives ramp voltage RDAC by the grid of the first transistor M1, and passes through second transistor M2's
Grid receives the image data PXO that row picture element matrix 100 provides.Comparator 110 is then according to ramp voltage RDAC and image number
Comparison result is exported to counter 111 according to PXO.
It is noted that the structure of above-mentioned comparator 110 is by way of example only, it is not intended to limit the invention.In other
In embodiment, comparator 110 can also be different structure.
The structure of the comparator 110 according to Fig. 3 is illustrated into rolling shutter mechanism and global shutter mechanism below.Please refer to figure
4, Fig. 4 be traditional comparator in the running waveform diagram of rolling shutter mechanism and global shutter mechanism.Ramp voltage RDAC is solid
Standing wave shape.Comparator 110 is designed to can be according to set supporting rolling shutter mechanism or global shutter mechanism.It should be noted
It is that in this present embodiment, Image Sensor 10 does not include the voltage supply electricity of voltage supply array or voltage supply array
Road 101 does not propose voltage V to the offer of comparator 110dummy。
Firstly, image sensing array operates on being described as follows for rolling shutter mechanism.The image sensing of Image Sensor 10
Pixel in array is exposed column by column.In time point T1, comparator 110 executes zero offset capability.In image sensing array
After the pixel of first row completes exposure, the transfering transistor TG of the multiple pixel is not yet connected, therefore floating diffusion region FD is not
Receive any charge.In other words, the image data PXO of pixel output at this time is reference voltage.The column selection transistor of pixel
RSL receives the array selecting signal RSEL of logic high, so that pixel starts to provide the image data PXO of logic high to right
The comparator 110 answered.The first switch transistor SW1 and second switch transistor SW2 of comparator 110 are on (Turn
On) state.Therefore, comparator 110 corrects and records the first transistor M1, second transistor M2, third transistor M3 and the
The offset voltage V of four transistor M4 to each otheroffset, and by offset voltage VoffsetIt is stored in first capacitor C1 and the second capacitor C2
In, to complete zero offset capability.In other words, during time point T1 to time point T2 is the automatically correcting of comparator 110.
It is noted that the first end point V of comparator 110 at this timedipCurrent potential be supply voltage VDD and third crystal
The operating voltage V of pipe M3th_pDifference, i.e. (VDD-Vth_p).Second endpoint V of comparator 110dinCurrent potential be supply voltage
The operating voltage V of VDD and the 4th transistor M4th_pDifference, i.e. (VDD-Vth_p)。
In time point T2, during comparator 110 enters first relatively.Due to having stored offset voltage in first capacitor C1
Voffset, first end point VdipCurrent potential will become (VDD-Vth_p+Voffset).Then, first end point VdipCurrent potential will be with oblique
Wave voltage RDAC is reduced and is begun to decline.Counter 111 starts operation, to calculate first end point VdipCurrent potential be decreased below
Second endpoint VdinCurrent potential between the time it takes.
At this point, transfering transistor TG is not yet connected with by electric charge transfer to floating diffusion region FD, therefore image data PXO is to patrol
Collect the reference voltage of high level.Therefore, the second endpoint VdinCurrent potential will remain in (VDD-Vth_p).Until first end point Vdip's
Current potential is lower than the second endpoint VdinCurrent potential, counter 111 stops counting, and internal count value is exported and gives image processing electricity
Road 12.That is, counter 111 in first relatively during count value obtained correspond to offset voltage VoffsetSize.Shadow
As count value is converted to the shade of gray of image by processing circuit 12.In other words, image capture unit 1 will by counter 111
Voltage representated by image is converted to the concept of time.Image-processing circuit 12 converts the time into the concept of shade of gray again.
Specifically, ramp signal RDAC is a kind of step signal.The count value of counter 111 corresponds to ramp signal
Every single order of RDAC.Such as: count value is the first rank of 1 corresponding step signal, and count value is the second of 2 corresponding step signals
Rank, and so on.In addition, count value can correspond to the one of them of grayscale value (0~255) again.Accordingly, image-processing circuit
12 can directly judge the binary bit grayscale value of image according to the count value that counter 111 exports.
Subsidiary one mentions, and first switch transistor SW1 and second switch transistor SW2 enters comparison pattern (i.e. in comparator
First relatively during or second relatively during) after just ended.
In time point T3, during comparator 110 enters second relatively.Ramp voltage RDAC returns to the logic level of script,
Namely first end point VdipCurrent potential will be returned to (VDD-Vth_p+Voffset).Then ramp voltage RDAC is begun to decline, so that the
End point VdipCurrent potential change again.Counter 111 resets internal count value, and starts counting again.At this point,
The transfering transistor TG of the pixel of first row is switched in image sensing array, so that the image transfer that pixel captures expands to floating
Dissipate area FD.Then, the multiple pixel respectively exports the image data PXO of logic low.Image data PXO can be pale pinkish purple into
Two endpoint Vdin, so that the second endpoint VdinCurrent potential become (VDD-Vth_p-|ΔV|).Δ V represents true image.
Similarly, counter 111 calculates first end point VdipCurrent potential be decreased below the second endpoint VdinCurrent potential between spend
The time taken, and count value is exported to image-processing circuit 12.The count value obtained during second compares of counter 111
Corresponding offset voltage VoffsetWith the summation of the absolute value of true image, i.e. (Voffset+|ΔV|)。
Subsidiary one mentions, in order to ensure comparator 110 can be designed to be under second with normal operation, the current potential of current source IS
Endpoint VdinCurrent potential.Because of the second endpoint VdinCurrent potential lower than current source IS current potential if, current source IS can not be normally
Provide current to the element in comparator 110.
In time point T4, during comparator 110 terminates second relatively.Array selecting signal RSEL becomes logic low, makes
Obtain column selection transistor RSL cut-off.Image-processing circuit 12 by first relatively during compared with second during counting obtained
Be worth corresponding grayscale value to subtract each other, can be obtained true image | Δ V | grayscale value.
On the other hand, comparator 110 operates on being described as follows for global shutter mechanism.The image sensing of Image Sensor 10
All pixels in array are exposed simultaneously, and then image sensing array provides image data PXO to corresponding ratio by column again
Compared with device 110.It is noted that in order to support rolling shutter mechanism, the bias of the transistor in comparator 110 is set at phase
To high level.
In time point T1, comparator 110 executes zero offset capability.Since the multiple pixel has captured image,
At this time comparator 110 it is received be logic low image data PXO.Comparator 110 correct and record the first transistor M1,
Second transistor M2, the offset voltage V of third transistor M3 and the 4th transistor M4 to each otheroffset, and by offset voltage
VoffsetIt is stored in first capacitor C1 and the second capacitor C2, to complete zero offset capability.
It is noted that the first end point V of comparator 110 at this timedipCurrent potential be supply voltage VDD and third crystal
The operating voltage V of pipe M3th_pDifference, i.e. (VDD-Vth_p).Second endpoint V of comparator 110dinCurrent potential be similarly supply electricity
Press the operating voltage V of VDD and the 4th transistor M4th_pDifference, i.e. (VDD-Vth_p)。
In time point T2, during comparator 110 enters first relatively.First end point VdipCurrent potential be (VDD-Vth_p+
Voffset), and first end point VdipCurrent potential will with ramp voltage RDAC reduce and begin to decline.Counter 111 starts operation,
To calculate first end point VdipCurrent potential be decreased below the second endpoint VdinCurrent potential between the time it takes.At this point, described more
A pixel is exposed to be finished, therefore image data PXO still maintains logic low.In other words, the second endpoint VdinCurrent potential
It will remain in (VDD-Vth_p), and it is lower than first end point VdipCurrent potential.
In time point T3, during comparator 110 enters second relatively.At this point, the reset transistor RST of pixel is switched on,
So that floating diffusion region FD is reset.In other words, that comparator 110 receives is the image data PXO of logic high, that is, is referred to
Voltage.And voltage corresponding to true image Δ V equally can be pale pinkish purple into the second endpoint Vdin, so that the second endpoint VdinCurrent potential
Become (VDD-Vth_p+|ΔV|).That is, when comparator 110 operates on rolling shutter mechanism and global shutter mechanism, the
Two endpoint VdinSeveral different biass are had, the difficult design of comparator 110 is caused.
On the other hand, the second capacitor C2 of analog-digital converter array 11 has stored offset voltage Voffset.At this time
The image data PXO of logic high is received again, and second switch transistor SW2 can be touched accidentally and is connected, so that the second capacitor C2
Interior stored charge loss.That is, comparator 110 is unable to complete and automatically corrects.
In addition, the operation interval of comparator 110 can be also destroyed because of the image data PXO for receiving logic high.
For example, the operation interval of comparator 110 is in 0~3.3V, and wherein each of comparator 110 element will consume one
Operating voltage.Current source IS will equally consume an operating voltage (such as 0.5V), and the second endpoint VdinCurrent potential cannot be below
The operating voltage of current source IS.Assuming that the bias in comparator 110 is maintained at 2.8V, logic high of coming in again at this time
Image data PXO (such as 0.6V), the voltage that comparator 110 is born can be more than operation interval, cause each element normal
Ground running.
In order to solve the problem above-mentioned, the operation interval of comparator 110 can be increased.However, if by the work of comparator 110
Done as section too big, the manufacturing cost of comparator 110 can be made to improve, and high potential operation interval it is fresh lack used.
Therefore, the embodiment of the present invention solves the problem above-mentioned in different ways so that image sensing array with than
Rolling shutter mechanism or global shutter mechanism can be supported compared with device 110.Referring to Fig. 5, Fig. 5 is ratio provided in an embodiment of the present invention
Compared with the running waveform diagram of device.Unlike embodiment in Fig. 4, Image Sensor 10 also supplies array to comparator by voltage
110 offers propose voltage Vdummy。
Elder generation global shutter mechanism is operated on regard to image sensing array below to be illustrated.In time point T1, comparator 110
Into period is automatically corrected, to execute zero offset capability.All pixels in the image sensing array of Image Sensor 10
It is exposed simultaneously.At this point, array selecting signal RSEL keeps logic low, so that column selection transistor RSL ends, and described more
Not input comparator 110 the image data PXO that a pixel captures.
It replaces, the voltage supply circuit 101 of voltage supply array starts to provide to corresponding comparator 110 logically high
Level proposes voltage Vdummy.Comparator 110 proposes voltage V according to logic highdummyZero offset capability is completed, and
Offset voltage is stored in first capacitor C1 and the second capacitor C2.The first end point V of comparator 110 at this timedipWith the second endpoint
VdinCurrent potential be similarly (VDD-Vth_p)。
In time point T2, comparator 110 enters comparison pattern.Voltage supply array stops supply and proposes voltage Vdummy.The
End point VdipCurrent potential be (VDD-Vth_p+Voffset), and first end point VdipCurrent potential with ramp voltage RDAC reduce and open
Begin to decline.In addition, array selecting signal RSEL is changed into logic high, column selection transistor RSL is connected.The multiple pixel
Start the image data PXO input comparator 110 that will be captured.At this time voltage corresponding to true image Δ V can it is pale pinkish purple into
Second endpoint Vdin, so that the second endpoint VdinCurrent potential become (VDD-Vth_p-|ΔV|).Second endpoint V at this timedinCurrent potential phase
As the second endpoint V when during the second of above-mentioned rolling shutter mechanism comparesdinCurrent potential.
Comparator 110 compares first end point VdipCurrent potential and the second endpoint VdinCurrent potential, and export the first comparison result
To counter 111.Counter 111 calculates first end point V then according to the first comparison resultdipCurrent potential be decreased below second
Endpoint VdinCurrent potential between the time it takes, and corresponding count value is exported to image-processing circuit 12.111 institute of counter
The count value of acquisition corresponds to offset voltage VoffsetWith the summation of the absolute value of true image, i.e. (Voffset+|ΔV|)。
In time point T3, during comparator 110 enters second relatively.First end point VdipCurrent potential will be returned to (VDD-Vth_p
+Voffset).At this point, the reset transistor RST of pixel is switched on, so that floating diffusion region FD is reset.In other words, comparator
110 receive be logic high image data PXO, i.e. reference voltage.Second endpoint VdinCurrent potential will be returned to (VDD-
Vth_p), it is equivalent to the second endpoint V when during the first of above-mentioned rolling shutter mechanism comparingdinCurrent potential.It follows that comparing
The bias having the same under rolling shutter mechanism and global shutter mechanism of device 110.Therefore, image capture unit 1 can be used
Same set of analog-digital converter array 11 operates on rolling shutter machine with image-processing circuit 12 to handle Image Sensor 10
The image data PXO generated when system and global shutter mechanism.
Comparator 110 compares first end point VdipCurrent potential and the second endpoint VdinCurrent potential, and export the second comparison result
To counter 111.Counter 111 calculates first end point V also according to the second comparison resultdipCurrent potential be decreased below second
Endpoint VdinCurrent potential between the time it takes, and corresponding count value is exported to image-processing circuit 12.At this point, counter
111 count values obtained correspond to offset voltage VoffsetSize.
In time point T4, during comparator 110 terminates second relatively.Array selecting signal RSEL becomes logic low, makes
Obtain column selection transistor RSL cut-off.Image-processing circuit 12 by first relatively during compared with second during counting obtained
Be worth corresponding grayscale value to subtract each other, to obtain true image | Δ V | grayscale value.
In this way, which comparator 110 is still able to normally transport when image sensing array fortune works in global shutter mechanism
Make, image-processing circuit 12 allowed to obtain real image from the image data PXO that image sensing array provides | Δ V
|。
Subsidiary one mentions, and when image sensing array operates on rolling shutter mechanism, voltage supply circuit 101 equally can be to right
The offer logic high of comparator 110 answered proposes voltage Vdummy, so that the completion of comparator 110 automatically corrects.However, this hair
It is bright to be limited not to this.The reason for this is that the multiple pixel exists when image sensing array operates on rolling shutter mechanism
After the completion of comparator 110 automatically corrects, corresponding transfering transistor TG can be just connected, so that electric charge transfer is to floating diffusion region
FD.The multiple pixel same voltage for providing logic high during automatically correcting is automatically corrected to comparator 110.
Therefore, when image sensing array operates on rolling shutter mechanism, voltage supply circuit 101 can not also provide and propose voltage
VdummyTo comparator 110.
In conclusion Image Sensor provided by the embodiment of the present invention and the image capture unit using it, pass through electricity
Pressure supply array provide it is stable propose voltage to the comparator of analog-digital converter array, image capture unit can be allowed to make
Rolling shutter mechanism and global shutter mechanism are realized with same set of analog-digital converter array and image-processing circuit, and
Generate corresponding image.Compared to traditional image capture unit, Image Sensor and use provided by the embodiment of the present invention
The circuit design of its image capture unit is more simplified, easily fabricated and manufacturing cost is cheap.
In addition, Image Sensor provided by the embodiment of the present invention and the image capture unit using it, also utilize simulation
The image data that Image Sensor captures is converted to two-symbol form by the counter of digitizer array.At image
It manages circuit and operation is equally carried out with binary bit, image-processing circuit can not have to the format for spending the time in converting image data.
The above, optimal specific embodiment only of the invention, and feature of the invention is not limited thereto, Ren Heben
Field technical staff within the field of the present invention, can think easily and changes or modifications, can all cover the patent in following this case
Range.
Claims (20)
1. a kind of Image Sensor is coupled to an analog-digital converter array, wherein the analog-digital converter array includes
Multiple comparators, which is characterized in that the Image Sensor includes:
One image sensing array, to capture an image data, which includes multiple pixels, wherein the image sense
It surveys array and supports a rolling shutter mechanism and a global shutter mechanism；
One voltage supplies array, the analog-digital converter array, including multiple voltage supply circuits is coupled to, to provide one
Propose voltage；
Wherein, during one automatically corrects, voltage supply array provides this and proposes voltage to the analog-digital converter array,
And the multiple comparator proposes voltage according to this and executes a zero offset capability；The automatic school is completed in the multiple comparator
After orthofunction, which exports the image data to the analog-digital converter array, and then the simulation numeral turns
The image data is converted into the digitized image data by converter array；
Wherein, the analog-digital converter array further include:
Multiple counters, the multiple counter are respectively couple in the output end of the multiple comparator, the multiple counter
Count value increase with the time, after completing the zero offset capability, the multiple comparator respectively enters one and compares mould
Formula；In one first relatively during, which provides a part of the image data to the Analog-digital Converter by column
Device array, then the multiple comparator respectively compares the image data and a ramp voltage, and exports one first and compare
As a result to corresponding counter, the multiple counter adjusts the multiple counting further according to the multiple first comparison result
Value.
2. Image Sensor as described in claim 1, which is characterized in that the output end of the multiple counter is coupled to a shadow
As processing circuit, and the image-processing circuit judges the digitized image number according to the count value that the multiple counter exports
According to grayscale value.
3. Image Sensor as claimed in claim 2, which is characterized in that when first comparison result indicates that the ramp voltage is low
In the image data, the multiple counter stops counting, and exports current count value to the image-processing circuit.
4. Image Sensor as claimed in claim 3, which is characterized in that during Yu Yi second compares, the image sensing array
The floating diffusion region of each pixel is reset, and provides a reference voltage by column to the analog-digital converter array, it is then described more
A comparator respectively compares the reference voltage and the ramp voltage, and exports one second comparison result to corresponding counting
Device；When second comparison result indicates the ramp voltage lower than the reference voltage, the multiple counter stops counting, and exports
Current count value is to the image-processing circuit.
5. Image Sensor as claimed in claim 4, which is characterized in that the image-processing circuit is according to the multiple counter
In this first relatively during the count value that is provided during this is compared with second calculate separately the image data grayscale value and
The grayscale value of the reference voltage, then the image-processing circuit is by the grayscale value of the grayscale value of the image data and the reference voltage
Subtract each other, to obtain the grayscale value of true image.
6. Image Sensor as described in claim 1, which is characterized in that the quantity of the multiple comparator corresponds to the image
The line number of array is sensed, and the multiple pixel in the image sensing array with a line is coupled to the same comparator.
7. Image Sensor as described in claim 1, which is characterized in that the image sensing array is a CMOS image sensing battle array
Column.
8. Image Sensor as described in claim 1, which is characterized in that the multiple pixel is respectively a 3T structure, a 4T
Structure or a 5T structure.
9. Image Sensor as described in claim 1, which is characterized in that the voltage supply circuit includes:
Multiple shading pixels, are respectively coupled to the multiple comparator, propose voltage to the multiple comparator to provide this；
Wherein, the photosensitive element of the multiple shading pixel is shielded, so that the floating diffusion region of the multiple shading pixel
Voltage stabilization, then the multiple shading pixel provides stable this according to the multiple floating diffusion region and proposes voltage.
10. Image Sensor as claimed in claim 9, which is characterized in that the multiple shading pixel be respectively a 3T structure,
One 4T structure or a 5T structure.
11. a kind of image capture unit characterized by comprising
One analog-digital converter array, including multiple comparators；
One Image Sensor is coupled to the analog-digital converter array, comprising:
One image sensing array, to capture an image data, which includes multiple pixels, wherein the image sense
It surveys array and supports a rolling shutter mechanism and a global shutter mechanism；
One voltage supplies array, the analog-digital converter array, including multiple voltage supply circuits is coupled to, to provide one
Propose voltage；
Wherein, during one automatically corrects, voltage supply array provides this and proposes voltage to the analog-digital converter array,
And the multiple comparator proposes voltage according to this and executes a zero offset capability；The automatic school is completed in the multiple comparator
After orthofunction, which exports the image data to the analog-digital converter array, and then the simulation numeral turns
The image data is converted into the digitized image data by converter array；
Wherein, the analog-digital converter array further include:
Multiple counters, the multiple counter are respectively couple in the output end of the multiple comparator, the multiple counter
Count value increase with the time, after completing the zero offset capability, the multiple comparator respectively enters one and compares mould
Formula；In one first relatively during, which provides a part of the image data to the Analog-digital Converter by column
Device array, then the multiple comparator respectively compares the image data and a ramp voltage, and exports one first and compare
As a result to corresponding counter, the multiple counter adjusts the multiple counting further according to the multiple first comparison result
Value.
12. image capture unit as claimed in claim 11, which is characterized in that the output end of the multiple counter is coupled to
One image-processing circuit of the image capture unit, and the count value that the image-processing circuit is exported according to the multiple counter
Judge the grayscale value of the digitized image data.
13. image capture unit as claimed in claim 12, which is characterized in that when first comparison result indicates oblique wave electricity
It forces down in the image data, the multiple counter stops counting, and exports current count value to the image-processing circuit.
14. image capture unit as claimed in claim 13, which is characterized in that during Yu Yi second compares, the image sensing
Array resets the floating diffusion region of each pixel, and provides a reference voltage by column to the analog-digital converter array, then institute
It states multiple comparators respectively to compare the reference voltage and the ramp voltage, and exports one second comparison result to corresponding meter
Number device；When second comparison result indicates the ramp voltage lower than the reference voltage, the multiple counter stops counting, and defeated
Current count value is to the image-processing circuit out.
15. image capture unit as claimed in claim 14, which is characterized in that the image-processing circuit is according to the multiple meter
Number devices in this first relatively during the count value that is provided during this is compared with second calculate separately the grayscale value of the image data
And the grayscale value of the reference voltage, then the image-processing circuit is by the ash of the grayscale value of the image data and the reference voltage
Rank value is subtracted each other, to obtain the grayscale value of true image.
16. image capture unit as claimed in claim 11, which is characterized in that the quantity of the multiple comparator corresponds to should
The line number of image sensing array, and the multiple pixel in the image sensing array with a line is coupled to the same comparator.
17. image capture unit as claimed in claim 11, which is characterized in that the image sensing array is a CMOS image sense
Survey array.
18. image capture unit as claimed in claim 11, which is characterized in that the multiple pixel be respectively a 3T structure,
One 4T structure or a 5T structure.
19. image capture unit as claimed in claim 11, which is characterized in that the voltage supply circuit includes:
Multiple shading pixels, are respectively coupled to the multiple comparator, propose voltage to the multiple comparator to provide this；
Wherein, the photosensitive element of the multiple shading pixel is shielded, so that the floating diffusion region of the multiple shading pixel
Voltage stabilization, then the multiple shading pixel provides stable this according to the multiple floating diffusion region and proposes voltage.
20. image capture unit as claimed in claim 19, which is characterized in that the multiple shading pixel is respectively 3T knot
Structure, a 4T structure or a 5T structure.
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| JP5098831B2 (en) * | 2008-06-06 | 2012-12-12 | ソニー株式会社 | Solid-state imaging device and camera system |
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