CN106972062A - Field-effect transistor and its manufacture method, display element, display device, system - Google Patents
Field-effect transistor and its manufacture method, display element, display device, system Download PDFInfo
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- CN106972062A CN106972062A CN201610991447.9A CN201610991447A CN106972062A CN 106972062 A CN106972062 A CN 106972062A CN 201610991447 A CN201610991447 A CN 201610991447A CN 106972062 A CN106972062 A CN 106972062A
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Thin Film Transistor (AREA)
- Electroluminescent Light Sources (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Liquid Crystal (AREA)
Abstract
The present invention relates to field-effect transistor, the manufacture method of display element, display device, system, and field-effect transistor.The problem of the present invention is, suppresses to produce infringement to semiconductor layer or substrate, prevents characteristic and the homogeneity reduction of thin film transistor (TFT).Field-effect transistor includes：Gate electrode；Source electrode and drain electrode, for applying voltage according to above-mentioned gate electrode, take out electric current；Semiconductor layer, connect configuration with above-mentioned source electrode and above-mentioned drain electrode, and raceway groove is formed between above-mentioned source electrode and above-mentioned drain electrode；As the first insulating barrier of gate insulating film, between above-mentioned semiconductor layer and above-mentioned gate electrode；And second insulating barrier, cover at least a portion of above-mentioned semiconductor layer surface；Above-mentioned second insulating barrier includes the metal oxide containing silicon and alkaline-earth metal.
Description
Technical field
The present invention relates to field-effect transistor, its display element, display device and system, field effect transistor are used
The manufacture method of pipe.
Background technology
Be switched on/disconnect by applying grid voltage field-effect transistor (Field Effect Transistor,
Be abbreviated as " FET ") be applied to display etc. of active matrix mode, as thin film transistor (TFT) (Thin Film Transistor,
It is abbreviated as " TFT ").
Develop the bottom-gate-type transistor that oxide semiconductor is used in the semiconductor layer for forming TFT channel region.Typically,
Oxide semiconductor is easily because acid is dissolved in etching solution.Therefore, when the figure that source electrode and drain electrode are formed on oxide semiconductor
During case, carry out highly difficult using the wet etching of acid, it is general to use (lift-off) method of stripping.But, it is difficult to shape with stripping method
Into the pattern of fine, there is the problem of productivity yield rate is poor.
Then, it is proposed that when making bottom gate thin film transistor, silica (SiO is set on oxide semiconductorx)
Or silicon oxynitride (SiOxNy) etch stop layer, etching source electrode and drain electrode method (for example, with reference to patent document 1 and specially
Sharp document 2).
Propose use the metal composite oxide for containing silicon (Si) and alkaline-earth metal as protection use oxide partly
The structure (for example, with reference to patent document 3) of the protective layer of the thin film transistor (TFT) of conductor.
If as mentioned above, it is necessary, forming silica (SiO on oxide semiconductor layerx) or silicon oxynitride (SiOxNy) etching
Barrier layer, then above-mentioned SiOxOr SiOxNyThere are problems that in the heating of process afterwards easily occurring crack, turn into
One reason of characteristic and the homogeneity reduction of thin film transistor (TFT).
【Patent document】
【Patent document 1】Japanese Unexamined Patent Publication 2008-166716 publications
【Patent document 2】Japanese Unexamined Patent Publication 2009-21612 publications
【Patent document 3】Japanese Unexamined Patent Publication 2014-107527 publications
The content of the invention
Then, it is an object of the present invention to provide suppress to produce infringement to semiconductor layer or substrate, prevent thin film transistor (TFT)
Characteristic and homogeneity reduction structure and method.
In order to solve above-mentioned problem, in the embodiment of the present invention, by wet processing, on the surface of semiconductor layer,
Configuration includes the layer of the oxide containing silicon (Si) and alkaline-earth metal.
Specifically, in the first form of the present invention, field-effect transistor is characterised by:
Above-mentioned field-effect transistor includes：
Gate electrode；
Source electrode and drain electrode, for applying voltage according to above-mentioned gate electrode, take out electric current；
Semiconductor layer, connect configuration with above-mentioned source electrode and above-mentioned drain electrode, above-mentioned source electrode and above-mentioned drain electrode it
Between form raceway groove；
As the first insulating barrier of gate insulating film, between above-mentioned semiconductor layer and above-mentioned gate electrode；And
Second insulating barrier, covers at least a portion of above-mentioned semiconductor layer surface；
Above-mentioned second insulating barrier includes the oxide containing silicon and alkaline-earth metal.
In the second form of the present invention, the manufacture method of field-effect transistor is characterised by, including following process：
Form semiconductor layer；
Above-mentioned semiconductor layer surface is covered, formation includes the insulating barrier of the oxide containing silicon and alkaline-earth metal；
Above-mentioned semiconductor layer and above-mentioned insulating barrier are covered, conductive layer is formed；
Using above-mentioned insulating barrier as etch stop layer, above-mentioned conductive layer is etched, the source connected with above-mentioned semiconductor layer is formed
Electrode and drain electrode.
Below, the effect of the present invention is illustrated:
According to said structure and method, it can suppress to produce infringement to semiconductor layer or substrate, prevent the spy of thin film transistor (TFT)
Property and homogeneity reduction.
Brief description of the drawings
Figure 1A~Fig. 1 C are the figure of the configuration example for the field-effect transistor for representing embodiment of the present invention.
Fig. 2A~Fig. 2 D are the manufacturing procedure picture of the field-effect transistor of embodiment of the present invention.
Fig. 3 A~Fig. 3 C are the manufacturing procedure picture of the field-effect transistor of embodiment of the present invention.
Fig. 4 A~Fig. 4 C are the manufacturing procedure picture of the field-effect transistor of embodiment of the present invention.
Fig. 5 is the figure of the configuration example for the field-effect transistor for representing embodiment of the present invention.
Fig. 6 is figure of the expression using the circuit configuration example of the display device of Fig. 1 field-effect transistor.
Fig. 7 is the circuit diagram of the display element used in the display part of Fig. 6 display device.
Fig. 8 is the summary sectional view of the configuration example for the display element for representing Fig. 7.
Fig. 9 is the figure of another circuit configuration example of the display part for the display device for representing Fig. 6.
Figure 10 is the circuit diagram of the display element used in Fig. 9 display part.
Figure 11 is the skeleton diagram of the system of the display device using Fig. 6.
Embodiment
With reference now to the embodiment of the brief description of the drawings present invention.
Figure 1A~Fig. 1 C are the figure of the configuration example for the field-effect transistor for representing embodiment of the present invention.Figure 1A represents bottom gate
The field-effect transistor 10A, Figure 1B of type represent the field-effect transistor 10B of bottom gate type.Field-effect transistor 10A and 10B is total
Referred to as " field-effect transistor 10 ".
Field-effect transistor 10A and 10B are comprising gate electrode 12, semiconductor layer 19, positioned at gate electrode 12 and semiconductor layer 19
Between gate insulating film 13, source electrode 24 and drain electrode 25, cover semiconductor layer 19 surface at least one of insulating barrier
17。
As the feature of this embodiment, insulating barrier 17 is to include the oxide containing silicon (Si) and alkaline-earth metal
Layer.Insulating barrier 17 causes pattern to be formed as set shape by etching (such as wet etching).Insulating barrier 17 is also in etching
The function as etch stop layer is played when source electrode 24 and drain electrode 25.
Figure 1A field-effect transistor (hereinafter referred to as " FET ") 10A includes substrate 11, forms grid electricity on the substrate 11
Pole 12, the gate insulating film 13 of covering grid electrode 12, and form the semiconductor layer 19 on gate insulating film 13.Semiconductor layer 19 by
For example oxide semiconductor is formed.At raceway groove length (L) direction two ends of semiconductor layer 19, source electrode 24 and drain electrode 25 are formed.
FET10A is the bottom-gate-type transistor that gate electrode 12 is located at below raceway groove.Again, be to be formed raceway groove source electrode 24 and
Drain electrode 25 is located at the transistor of the top contact type on the upside of the stack direction of semiconductor layer 19.The surface region of semiconductor layer 19 it
In, the region at least extended between source electrode 24 and drain electrode 25 is covered by insulating barrier 17.
In Figure 1B FET10B, gate electrode 12 clips gate insulating film 13 and is located at the semiconductor layer 19 formed on the substrate 11
On the upside of stack direction.Semiconductor layer 19 is identical with Figure 1A, for example, formed with oxide semiconductor.Cover the raceway groove of semiconductor layer 19
Direction two ends, form source electrode 24 and drain electrode 25.
FET10B is the top gate-type transistors that gate electrode 12 is located above raceway groove.Again, be to be formed raceway groove source electrode 24 and
Drain electrode 25 is located at the transistor of the top contact type on the upside of the stack direction of semiconductor layer 19.The surface region of semiconductor layer 19 it
In, the region at least extended between source electrode 24 and drain electrode 25 is covered by insulating barrier 17.
In FET10A and FET10B, insulating barrier 17 is processed by wet etching, therefore, mitigate for semiconductor layer 19 or
The damage of substrate 11.Again, etch stop layer when insulating barrier 17 may be used as being formed source electrode 24 and drain electrode 25, suppress for
The damage of semiconductor layer 19 or substrate 11.
Have again, insulating barrier 17 includes the oxide containing silicon (Si) and alkaline-earth metal, even if after at the heat of process
Also it is difficult to occur crack or stripping after reason.
As insulating barrier 17, if including the oxide containing silicon (Si) and alkaline-earth metal, being not particularly limited, as long as energy
Protect the semiconductor layer 19 of lower floor from etching damage, constituent can be properly selected.Both above-mentioned oxide sheet can be used
Body formation insulating barrier 17, can also include other elements such as aluminium (Al) or boron (B).Again, solvent composition can also be included.It is used as life
Into solvent during material comprising above-mentioned oxide, any solvent that those skilled in the art can be appropriately selected can be used.
Among above-mentioned oxide, the SiO formed by Si2Formed with noncrystalline state.Alkaline-earth metal has cut-out Si-O keys
Effect, the dielectric constant and linear expansion coefficient of above-mentioned oxide can be controlled by the ratio of components of alkaline-earth metal difference.
As alkaline-earth metal, such as Beryllium (Be), magnesium (Mg), calcium (Ca), strontium (Sr), barium (Ba), radium (Ra) can be enumerated
Deng.Both independent one kind can be used, can also two or more be used in combination.
Al or B occasions are included in above-mentioned oxide, amorphous structure Al is formed2O3Or B2O3, the insulation that can be stablized
Layer 17.Alkaline-earth metal has the effect of cut-out Al-O keys or B-O keys, different by its ratio of components, can control above-mentioned oxide
Dielectric constant and linear expansion coefficient.
Fig. 2~Fig. 4 is the manufacturing procedure picture of field-effect transistor 10.FET10A and FET10B is covering half with insulating barrier 17
On this point of conductor layer 19, formation source electrode 24 and drain electrode 25, is common, therefore, is illustrated so that FET10A makes as an example.
In fig. 2, on the substrate 11, the gate insulating film 13 of gate electrode 12 and covering grid electrode 12 is formed.
Shape, structure, size, the material of substrate 11, are not particularly limited, and can be properly selected according to purpose.Substrate
11 as one, is rectangular glass or plastic base.For glass material, it is not particularly limited, can be according to purpose suitably
Selection, it is, for example, possible to use alkali-free glass, silica glass etc..For plastic material, it is not particularly limited, can be suitable according to purpose
Locality selection, it is, for example, possible to use makrolon (PC), polyimides (PI), polyethylene terephthalate (PET), gather
(ethylene naphthalate) (PEN) etc..
Substrate 11 is from surface cleaning and improves the consideration of adhesion angle, can impose oxygen plasma, UV ozone, UV irradiations
The pre-treatment of cleaning etc..
Gate electrode 12 is formed on the substrate 11.Conducting film is formed in the entire surface of substrate 11, pattern forms set shape
Shape.For the material of conducting film, it is not particularly limited, can uses such as molybdenum (Mo), aluminium (Al), silver-colored (Ag), copper (Cu)
Metal or alloy, ITO (tin indium oxide), ATO (antimony-doped tin oxide) etc. transparent conductive oxides, poly- ethylidene dioxy thiophene
Organic electric conductor of fen (PEDOT), polyaniline (PANI) etc. etc..
After film by the above-mentioned conductive material of the formation such as sputtering method, dip coating, by photoetching process by the film figure.Or
Person can also directly form the film of intended shape by typographies such as ink jet printing, nano print, intaglio printings.
The thickness of gate electrode is not particularly limited, and can be properly selected according to purpose, in this example, is 20nm~1 μm,
It is preferred that 50nm~300nm.
So that the covering substrate 11 of gate insulating film 13 and gate electrode 12, are formed in entire surface.Gate insulating film 13 can be used
Such as SiO2、SiNxDeng a large amount of Commercial cultivations material, La2O3、HfO2、Y2O3Deng high dielectric constant material, polyimides
(PI) or fluorine resin etc. organic material etc..
Gate insulating film 13 can use sputtering method, chemical vapor coating method (Chemical Vapor Deposition, brief note
For CVD), the vacuum technology of atomic layer vapour deposition method (Atomic Layer Deposition, be abbreviated as ALD) etc. or spin coating, mould
Solution process (print process) formation of painting, ink-jet etc..The thickness of gate insulating film 13 is not particularly limited, can be appropriate according to purpose
Ground is selected, and is 50nm~3 μm in this example, preferably 100nm~1 μm.
In fig. 2b, oxide semiconductor layer 14 and etch stop layer 15 are formed.As the material of semiconductor, it can make
With oxide semiconductor, silicon semiconductor, organic semiconductor, in this example, oxide semiconductor use such as In-Ga-Zn-0, I-
Z-0, In-Mg-0 etc..The sputtering method of oxide semiconductor layer 14, pulsed laser deposition (PLD) method, CVD, ALD etc. it is true
The solution process of empty technique or dip-coating, spin coating, die coating etc. is formed.The average thickness of oxide semiconductor layer 14 be, for example, 5nm~
L μm, preferably 10nm~0.5 μm.
On oxide semiconductor layer 14 etch stop layer 15 is formed for example, by spin coating.Etch stop layer 15 is to include containing
There is the amorphous layer of the oxide of silicon (Si) and alkaline-earth metal, can at least one party containing Al and B.Etch stop layer 15 is wrapped
Containing SiO2、Al2O3、B2O3, BeO, MgO, CaO, SrO, BaO, RaO etc., its thickness is 10nm~1000nm, preferably 30nm~
500nm.After spin coating, dry at 80~120 DEG C, and 200~400 DEG C burn till.It is unwanted by drying removing
Moisture, by burning till generation metal composite oxide.
In fig. 2 c, on etch stop layer 15 set by position, by the exposed and developed of photoengraving, form anti-
Lose layer 16.Using resist layer 16 as mask, etch stop layer 15 is processed into set shape with wet etching.Resist layer
16 form in position corresponding with field-effect transistor 10A raceway groove, and etch stop layer 15 is processed as covering the shape of raceway groove.
The etching solution of wet etching uses the selection of relative etch stop layer 15 than high solution, it is, for example, possible to use containing
There are hydrogen fluoride ammonia or ammonium fluoride or at least one etching solution of hydrogen fluoride.By using such etching solution, stopped using etching
The difference of the selection ratio of the oxide semiconductor layer 14 of the relative lower floor of layer 15, can be while suppress the damage to oxide semiconductor layer 14
Evil, while processing etch stop layer 15.
In figure 2d, peel off, clean resist layer 16.Thus, the position of the raceway groove on covering oxide semiconductor layer 14,
Form insulating barrier 17.
In figure 3 a, set position on the substrate 11 forms resist layer 18, using diluted hf liquid by oxide
Semiconductor layer 14 is processed into set shape.
In figure 3b, peel off, clean resist layer 18.Thus, gate insulating film 13, the position relative with gate electrode 12 are being clipped
Put, form semiconductor layer 19.
In fig. 3 c, in entire surface formation conductive layer 21.Conductive layer 21 is the layer for forming source electrode and drain electrode, tool
There are such as 20nm~1 μm, preferably 50nm~300nm thickness.The material of conductive layer 21 can be properly selected according to purpose, example
Such as, Al, W, Mo, Zr, Hf, V, Nb, Ta, Cu, Co, Ni, Pt, Ti, Ag, Au, the alloy of above-mentioned metal can be used.Or also may be used
To use ITO (tin indium oxide), IZO (indium zinc oxide), ZnO (zinc oxide), SnO2The material of the translucency of (tin oxide) etc..
In Figure 4 A, resist layer 22 is formed on conductive layer 21.
In figure 4b, by processing conductive layer 21 using resist layer 22 as mask etching, source electrode 24 and drain electrode are formed
25.Consider from pattern tractability and processing large-area substrates angle, it is desirable to carry out dry etching.As one example, RIE is carried out
(Reactive Ion Etching, reactive ion etching).
Typically, dry etching is given and damaged to basalis (being in this example, the semiconductor layer 19 of use oxide semiconductor)
Evil.In this embodiment, the insulating barrier 17 on semiconductor layer 19 plays the function as etch stop layer, prevents in back tender
The infringement of ordered pair semiconductor layer 19.Hereafter, peel off, clean resist layer 22, make field-effect transistor 10A.
Wet etching source electrode 24 and the occasion of drain electrode 25, electrode material and etching solution can be set to following combination.
Electrode material is material at least a certain among ITO, molybdenum, aluminium, ZnO (zinc oxide).At this moment, ITO, ZnO (oxidation
Zinc) etched with the etching solution of oxalic acid class.Molybdenum, aluminium are etched with the etching solution of PAN classes.So, can with respect to lower floor oxide half
Etch stop layer in conductor layer keeps selection than (not removing etch stop layer, can protect the oxide semiconductor as bottom
Layer), source electrode 24 and drain electrode 25 can be etched again.
In figure 4 c, interlayer dielectric 27 is formed in entire surface.Though it is not illustrated, as needed with known side
Insertion plug, capacitor, top distribution that method formation is electrically connected with field-effect transistor 10A etc..
Fig. 2 B~Fig. 4 B process also can be suitably used for Figure 1B top gate type field-effect transistor 10B making.The occasion
Insulating barrier 17 is processed into set shape by using wet etching, the infringement to semiconductor layer 19 can be suppressed.Also, by inciting somebody to action
Insulating barrier 17, with dry etching formation source electrode 24 and drain electrode 25, can be prevented for semiconductor layer 19 as etch stop layer
Infringement.
Etch stop layer can also be formed after semiconductor layer is formed by etching.The occasion, stops as etching is formed
Etching solution during layer, the etching solution of the semiconductor layer of selection not etch lower floor.As such etching solution, preferably TMAH is water-soluble
Liquid.
Such top gate type field-effect transistor occasion shown in Figure 1B, etch stop layer (insulating barrier) is configured in gate insulating film
Between oxide semiconductor layer.If the film thickness of etch stop layer (insulating barrier) is thick, in the presence of because dielectric constant is low, for
TFT characteristic produces the possibility of bad influence (for example, degree of excursion reduction etc.)., can be such as Fig. 1 C institutes in order to avoid above-mentioned situation
Show that field-effect transistor 10C like that, removes the etch stop layer (insulating barrier 17) between semiconductor layer 19 and gate insulating film 13.Figure
Field-effect transistor 10C shown in 1C is that etch stop layer is removed during Figure 1B field-effect transistor 10B is made (absolutely
Edge layer 17) a part form.In the field-effect transistor 10C shown in Fig. 1 C, in order to form source electrode 24 and electric leakage
Etch stop layer (insulating barrier 17) is removed behind pole 25, does not remove and remains configuration in source electrode 24 and drain electrode 25 and semiconductor layer
A part for etch stop layer (insulating barrier 17) between 19.
As the removing method of etch stop layer, such as following methods can be enumerated：Using source electrode and drain electrode as covering
Mould, using etching solution (such as hydrogen fluoride ammonia spirit, fluorination ammonia spirit, alkaline etching liquid (the TMAH aqueous solution)), is removed
Etch stop layer on oxide semiconductor.
Also, gate insulating film be the oxide occasion containing Sr and La, the gate insulating film can by the use of as In-Ga-Zn-0,
The etch stop layer of I-Z-0, In-Mg-0 etc. oxide semiconductor layer.
For example, field-effect transistor occasion as shown in Figure 5 is made, can be for example, by PAN class etching solutions
Etching, from conductive layer make gate electrode 12 when, be used as In-Ga-Zn-0, I-Z-0, In-Mg-0 etc. by the use of gate insulating film 13
The etch stop layer of semiconductor layer 19.The occasion, when making source/drain electrode, using alkaline etching liquid, (TMAH is water-soluble
Liquid) etc., gate insulating film 13 (etch stop layer) is removed, oxide semiconductor and the contact area of source/drain electrode is formed.
Embodiment
As described above, insulating barrier 17 is formed on semiconductor layer 19 by using wet etching processing, add in insulating barrier 17
Man-hour and using insulating barrier 17 as etch stop layer source electrode 24 and drain electrode 25 processing when both sides, can prevent for half
The infringement of conductor layer 19.
The insulating barrier 17 of this embodiment also has the effect for being difficult to produce crack or stripping in the heat treatment of rear process.
In embodiment, confirm insulating barrier 17 prevents the effect of crack or stripping.Embodiments of the invention are described below, the present invention
It is not limited by the following embodiments." % " expression " quality % ", unless specifically stated otherwise.
The making ＞ of ＜ etch stop layer coating fluids
With deal shown in the embodiment 1~4 of table 1, SiO will be used as2Source four butoxy silanes (T5702-100G, by
Aldrich system), be used as Al2O3Source aluminium 2 (s- butoxides) acetoacetate chelate (Al content 8.4%,
Alfa89349, by Alfa Aesar company systems), be used as B2O3Triisopropyl borate ester (the Wako 320-41532, by Wako in source
Chemical company systems), as CaO sources 2 ethyl hexanoic acid calcium mineral spirits solution (Ca contents 5%, Wako 351-01162,
By Wako Chemical company systems) and it is used as 2 ethyl hexanoic acid strontium toluene solution (the Sr contents 2%, Wako in SrO sources
195-09561, by Wako Pure Chemical Industries, Ltd.'s system) dilution with toluene is used, obtain the coating for forming etch stop layer 15
Liquid.
The metal oxide of the embodiment 1~4 formed by etch stop layer coating fluid turns into constituting shown in table 1.
＜ visual examinations ＞
By etch stop layer coating fluid 0.4mL to dripping on glass substrate, spin coating is (with 300rpm under conditions of set
After rotating 5 seconds, rotated 20 seconds with 3000rpm, stopped the rotation with 5 seconds and become 0rpm).
Then, in atmospheric air at 120 DEG C after drying process 1 hour, in O2Carried out 3 hours with 400 DEG C in atmosphere
Burn till, form SiO2-Al2O3-B2O3- CaO-SrO metal oxides dielectric film (etch stop layer 15).Average film thickness about 30nm.
Finally, as the heating carried out in actual semiconductor device manufacturing process, carried out 30 minutes at 320 DEG C
After heat treatment, ocular estimate is carried out.As a result the outward appearance column of table 1 is documented in, in the composition of embodiment 1~4, stripping is not observed
From.
＜ Dielectric Coefficient electricity container is made ＞
For the insulating barrier (dielectric layer) for the etch stop layer coating fluid that the composition determined using embodiment 1~4 is constituted
Dielectric constant, generate capacitor.
Diagram is omitted, and forms lower electrode, dielectric film, and upper electrode on the glass substrate.As lower electrode,
Sputtered by the DC by metal mask and form Mo (molybdenum) film, film forming obtains average film thickness 100nm.Hereafter, using embodiment 1~4
Etch stop layer 15 coating fluid, during with visual examination same process formation dielectric film.Finally, with lower electrode phase
Upper electrode is formed on the dielectric layer with technique.The average film thickness of dielectric film about 30nm.Counted using LCR (4284A,
Agilent company systems) determine make capacitor dielectric constant.Measurement result is represented on the dielectric constant column of table 1.
The making ＞ of ＜ linear expansion coefficient determining samples
The etch stop layer coating fluid 1L of the composition of embodiment 1~4 is made, removes after solvent, gains is placed in platinum earthenware
In crucible, after heating and melt at 1600 DEG C, diameter 5mm, height 10mm cylindrical object are manufactured by floating process.On
The cylindrical object of making, 20~300 DEG C of temperature are determined using thermo-mechanical analysis device (8310 series, Co., Ltd.'s REGAKU systems)
Spend the average coefficient of linear expansion of scope.The composition of made cylindrical object with by the etch stop layer coating fluid of embodiment 1~4
The occasion of etch stop layer 15 for being used in bottom gate type field-effect transistor 10A is identical, is also taken even if on linear expansion coefficient identical
Value.Measurement result is represented on the linear expansion coefficient column of table 1.
As described later, the linear expansion coefficient of the sample of embodiment 1~4 and the SiO of conventional artxEtch stop layer is compared,
Big one digit number, even if being after heat treatment also difficult to produce crack or stripping.
Table 1
＜ comparative examples ＞
As comparative example, as the conventional art, implementation uses SiOx、SiOxNyIt is used as the outward appearance of etch stop layer occasion
Check, and determine dielectric constant and linear expansion coefficient.Inspection result is represented in table 2.
For visual examination, with SiCl4As raw material, pass through plasma enhanced chemical vapor deposition method (Plasma
Enhanced chemical vapor deposition, are abbreviated as PECVD) SiO is formed on the glass substrate2Layer, is formed
SiO2The average film thickness of layer is identical with embodiment 1~4, about 30nm.Finally, as heating, 30 are carried out at 320 DEG C
After minute heat treatment, ocular estimate is carried out.As a result table 2 is documented in, it was observed that peeling off.
Also, in order to determine dielectric constant, making SiO2Film as dielectric film capacitor, with the phase of embodiment 1~4
Together, on the glass substrate, the lower electrode to form Mo (molybdenum), average film thickness 100nm are sputtered with DC by metal mask.Then,
Same process SiO during with visual examination2Form dielectric film.Finally, with lower electrode same process in dielectric film
Upper formation upper electrode.Make capacitor.The average film thickness of dielectric film is about 30nm.
The dielectric constant that (4284A, Agilent company system) determines the capacitor made is counted using LCR.Measurement result is represented
It is 3.9 in table 2, it is lower than embodiment 1~4.
Then, as linear expansion coefficient determining sample, the cylindrical object with the same shape of embodiment 1~4 is made.With
SiCl4As raw material, the hydrolyzable in oxyhydrogen flame so that resulting SiO 2 powder growth obtains SiO2Porous plastid
Afterwards, melt it under 1600 DEG C of high temperature, manufacture diameter 5mm, height 10mm columned SiO2Glass.Circle on making
Column glass, uses thermo-mechanical analysis device (8310 series, Co., Ltd.'s REGAKU systems) 20~300 DEG C of temperature ranges of measure
Average coefficient of linear expansion.Measurement result is represented in table 2, compared with embodiment 1~4, small one digit number, because linear expansion coefficient is small,
After heat treatment it is also easy to produce crack or stripping.
Table 2
So, by using the insulating barrier 17 of embodiment, crack or stripping can be suppressed in the heat treatment of rear process.
The Application Example ＞ of ＜ field-effect transistors
Fig. 6 is the circuit diagram of the display device 500 for the field-effect transistor 10 for being applicable this embodiment.As for
The field-effect transistor 10 of display device 500, can both use Figure 1A bottom gate type field-effect transistor 10A, can also use
Figure 1B top gate type field-effect transistor 10B.
Display device 500 includes display part 310 and display control unit 400.Display part 310 is rectangular with being configured to
Multiple display elements 300.Display element 300 and scan line (gate line) X0~Xn-1And data wire (signal wire or source electrode
Line) Y0~Ym-1Connection, forms N × N matrix.
Display control unit 400 includes selection scan line X0~Xn-1Scan line drive circuit 404, selection data wire Y0~
Ym-1Data line drive circuit 406, and the picture number being connected with scan line drive circuit 404 and data line drive circuit 406
According to process circuit 402.According to the selection of scan line and data wire, particular display element 300.
Image data processing circuit 402 controls each of display part 310 according to the output signal from aftermentioned video generation device
The brightness of display element 300.
Fig. 7 is the circuit diagram of Fig. 6 display element 300.Display element 300 includes being used as the organic of light control element
Electroluminescent (EL) element 350, and drive the drive circuit 320 of organic EL element 350.Drive circuit 320 is to include two
Transistor 10-1,10-2 and capacitor 313 2TFT type circuits.The first transistor 10-1 is switching transistor, the second crystal
Pipe 10-2 is driving transistor.
The first transistor 10-1 grid G is connected with scan line X0, and source S is connected with data wire Y0, and drain D is brilliant with second
Body pipe 10-2 grid G and capacitor 313 is connected.It is brilliant that one electrode of capacitor 313 is connected to the first transistor 10-1 and second
Node between body pipe 10-2, another electrode is connected with power line YOi.
Second transistor 10-2 source S is connected with power line YOi, and drain D is connected with the anode of organic EL element 350.
By selecting display element 300, the first transistor 10-1 conductings apply voltage, electric current stream to second transistor 10-2 grid
Organic EL element 350 is crossed, is turned on.
The first transistor 10-1, the second transistor 10-2 used in each display element 300 suppresses for as raceway groove
The infringement of semiconductor layer 19, suppresses crack or stripping, with homogeneous characteristic.Therefore, display part 310 is overall has homogeneous hair
Light characteristic.
Fig. 8 is the vertical cross-section diagram for realizing the display element 300 that Fig. 7 circuit is constituted.Display element 300 is lamination-type member
Part, with substrate vertical direction, drive circuit 320 top configure organic EL element 350.The structure can reduce each pixel
Area, very properly.
In organic EL element 350, electrode 43, organic EL layer 44, electrode 45 lamination in the order, electrode 43 pass through insertion
Plug 35 is connected with second transistor 10-2 drain electrode.
In Fig. 8 examples, electrode 43 is anode, and electrode 45 is negative electrode, and light takes out in lower section.Therefore, it is intended that electrode 43, grid
Electrode 12, source electrode 24 and drain electrode 25 are formed with transparent electrode materials such as ITO.Using transparent electrode material occasion, also because
There is insulating barrier 17, the semiconductor layer 19 of oxide semiconductor etc. is protected, from from source electrode 24 and drain electrode 25
Damaged caused by dry etching.
When taking out light from the top of display element 300 so that polarity inversion, using the electrode of upside as anode, it is set to
ITO etc. transparency electrode.
The component structure of display element 300 is not limited to Fig. 8 examples, can also be by organic EL element 350 in driving electricity
The horizontal direction adjoining configuration on road 320.
The display part 310 of Fig. 9 replacement of display part 311 Fig. 6 display device 500 can also be used.Fig. 9 is display part
311 circuit diagram.Display part 311, which has, is configured to rectangular multiple display elements 301.Select each display element 301
Scan line X0~Xn-1It is connected with Fig. 6 scan line drive circuit 404, data wire Y0~Ym-1With Fig. 6 data line drive circuit
406 connections.
Figure 10 is the circuit diagram of Fig. 9 display element 301.Display element 301 includes the liquid as light control element
Crystal cell 370, and drive the drive circuit 321 of liquid crystal cell 370.Drive circuit 321 is included as semiconductor device 10
Transistor Tr and capacitor 315 1TFT type circuits.
Transistor Tr grid G is connected with scan line X0, and source S is connected with data wire Y0, drain D and capacitor 315 and
Liquid crystal cell 370 is connected.Another electrode of capacitor 315 is connected with common electrode 316.Equally, another electricity of liquid crystal cell 370
Pole is connected with common electrode 372.
By selecting display element 301, transistor Tr conductings, electric current flows through liquid crystal cell 370, is turned on.
The transistor Tr used in each display element 301 suppresses the infringement for the semiconductor layer 19 as raceway groove, and suppression
Crack processed or stripping, with homogeneous characteristic.Therefore, display part 311 is overall has the homogeneous characteristics of luminescence.
Figure 11 is the skeleton diagram of the system 1 of the display device 500 using Fig. 6.System 1 includes display device 500 and figure
As data generating device 2.Image data generating device 2 includes data output circuit 3.The video exported from data output circuit 3
Data or view data are input to the image data processing circuit 402 of display device 500, carry out brilliance control.From view data
Generating means 2 are not limited to the cable connection of physics to the data supply of display device 500, can also be entered by wireless connection
OK.
System 1 is applied to electronic equipment as mobile information terminal, computer, digital-code type video camera, TV combination, used
In image system of outdoor advertising or concert etc..Display device 500 is used for the display picture as above-mentioned electronic equipment or system
Face, monitoring picture, image screen etc..Image data generating device 2 can both have camera function, computer graphics function, fortune
Calculate function etc., it is possible to have the function for the view data (video data) that storage is externally supplied.
Each display element of the display part 310 or 311 of display device 500 suppresses for the raceway groove as driving transistor
The infringement of semiconductor layer 19, suppresses occur crack or stripping, therefore, with homogeneous acting characteristic and display characteristic.Therefore, fit
It is highly beneficial for the system application with giant screen.
The present invention is illustrated according to particular implementation form above, but is not limited to above-mentioned example.For example, display element
As long as light control element controls the element of light output according to drive signal, its species is not particularly limited, can be according to purpose
Properly select.Except using organic EL element 350, liquid crystal cell 370, inorganic el element can also be used, electroluminescent
Photochromic elements, electrophoresis element, Electrowetting element etc..
Display device 500 can be also used for except carrying information equipment, digital-code type video camera, television set, advertising media etc.
It is used as the display means of various information in the movable body systems such as frequency still camera, automobile, aircraft, train, ship.In addition it is also possible to
Suitable for measurement apparatus, analytical equipment, the various information of medical treatment device display means.
Claims (15)
1. a kind of field-effect transistor, it is characterised in that:
Above-mentioned field-effect transistor includes：
Gate electrode；
Source electrode and drain electrode, for applying voltage according to above-mentioned gate electrode, take out electric current；
Semiconductor layer, connect configuration with above-mentioned source electrode and above-mentioned drain electrode, the shape between above-mentioned source electrode and above-mentioned drain electrode
Into raceway groove；
As the first insulating barrier of gate insulating film, between above-mentioned semiconductor layer and above-mentioned gate electrode；And
Second insulating barrier, covers at least a portion of above-mentioned semiconductor layer surface；
Above-mentioned second insulating barrier includes the oxide containing silicon and alkaline-earth metal.
2. field-effect transistor as claimed in claim 1, it is characterised in that:
Above-mentioned second insulating barrier is etch stop layer, and it is processed into the area at least forming above-mentioned raceway groove for covering above-mentioned semiconductor layer
The shape in domain.
3. field-effect transistor as claimed in claim 1 or 2, it is characterised in that:
Above-mentioned second insulating barrier is by etching and processing into set shape.
4. such as field-effect transistor of the claims 1 to 3 as described in any one, it is characterised in that:
Above-mentioned semiconductor layer connects in the uper side surface of the stack direction of substrate with above-mentioned source electrode and above-mentioned drain electrode；
Above-mentioned second insulating barrier is located at the part of above-mentioned semiconductor layer and the linkage interface of above-mentioned source electrode, and above-mentioned semiconductor
The part of the linkage interface of layer and above-mentioned drain electrode.
5. such as field-effect transistor of the Claims 1 to 4 as described in any one, it is characterised in that:
Above-mentioned second insulating barrier further includes at least one party of aluminium and boron.
6. such as field-effect transistor of the Claims 1 to 5 as described in any one, it is characterised in that:
Above-mentioned semiconductor layer is formed with oxide semiconductor.
7. a kind of display element, it is characterised in that:
Above-mentioned display element includes:
Drive circuit；And
Light control element, according to the drive signal from above-mentioned drive circuit, controls light output；
Above-mentioned drive circuit drives above-mentioned photocontrol member by the field-effect transistor such as claim 1~6 as described in any one
Part.
8. display element as claimed in claim 7, it is characterised in that:
Above-mentioned light control element is electroluminescent cell, electric driven color-changing part, liquid crystal cell, electrophoresis element and electrowetting member
A certain kind among part.
9. a kind of display device, it is characterised in that including：
Display part, multiple display elements as claimed in claim 7 or 8 is configured to rectangular；And
Display control unit, individually controls above-mentioned each display element.
10. a kind of system, it is characterised in that, including:
Display device described in claim 9；And
Image data generating device, above-mentioned display device is supplied to by view data.
11. a kind of manufacture method of field-effect transistor, it is characterised in that including following process：
Form semiconductor layer；
Above-mentioned semiconductor layer surface is covered, formation includes the insulating barrier of the oxide containing silicon and alkaline-earth metal；
Above-mentioned semiconductor layer and above-mentioned insulating barrier are covered, conductive layer is formed；
Using above-mentioned insulating barrier as etch stop layer, above-mentioned conductive layer is etched, the source electrode connected with above-mentioned semiconductor layer is formed
And drain electrode.
12. the manufacture method of field-effect transistor as claimed in claim 11, it is characterised in that:
Above-mentioned insulating barrier is processed as first shape with etching；
Using the above-mentioned above-mentioned insulating barrier for being processed as first shape as above-mentioned etch stop layer, above-mentioned conductive layer is etched.
13. the manufacture method of field-effect transistor as claimed in claim 12, it is characterised in that:
After the etching of above-mentioned insulating barrier, further comprise the process that above-mentioned semiconductor layer is processed as to the second shape with etching；
Above-mentioned source electrode and above-mentioned drain electrode be formed as the both ends of the above-mentioned above-mentioned semiconductor layer for being processed as the second shape with
Above-mentioned semiconductor layer connects.
14. the manufacture method of the field-effect transistor as described in claim 12 or 13, it is characterised in that the erosion of above-mentioned insulating barrier
Carve using at least containing etching solution progress a kind of among hydrogen fluoride ammonia, ammonium fluoride, hydrogen fluoride.
15. such as the manufacture method of field-effect transistor of the claim 11~14 as described in any one, it is characterised in that above-mentioned conduction
Layer be etched to dry etching.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2015224837 | 2015-11-17 | ||
| JP2015-224837 | 2015-11-17 | ||
| JP2016-201791 | 2016-10-13 | ||
| JP2016201791A JP6878820B2 (en) | 2015-11-17 | 2016-10-13 | Field-effect transistor, display element, display device, system, and method of manufacturing field-effect transistor |
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| CN110752255A (en) * | 2018-07-23 | 2020-02-04 | 株式会社理光 | Metal oxide, field effect transistor and manufacturing method thereof |
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| JP2010165922A (en) * | 2009-01-16 | 2010-07-29 | Idemitsu Kosan Co Ltd | Field effect transistor, method for manufacturing field effect transistor and method for manufacturing semiconductor element |
| JP6121149B2 (en) * | 2012-11-28 | 2017-04-26 | 富士フイルム株式会社 | Oxide semiconductor element, manufacturing method of oxide semiconductor element, display device, and image sensor |
| TWI614813B (en) * | 2013-01-21 | 2018-02-11 | 半導體能源研究所股份有限公司 | Method for manufacturing semiconductor device |
| JP6394171B2 (en) * | 2013-10-30 | 2018-09-26 | 株式会社リコー | Field effect transistor, display element, image display device, and system |
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| CN103839834A (en) * | 2008-07-31 | 2014-06-04 | 株式会社半导体能源研究所 | Semiconductor device and manufacturing method thereof |
| US20150318312A1 (en) * | 2010-02-11 | 2015-11-05 | Samsung Display Co.,Ltd | Thin film transistor panel having an etch stopper on semiconductor |
| CN104823270A (en) * | 2012-11-30 | 2015-08-05 | 株式会社理光 | Field-effect transistor, display element, image display device, and system |
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