CN106952921A - A kind of method for designing of Nonvolatile programmable optoelectronic memory - Google Patents
A kind of method for designing of Nonvolatile programmable optoelectronic memory Download PDFInfo
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- CN106952921A CN106952921A CN201710141643.1A CN201710141643A CN106952921A CN 106952921 A CN106952921 A CN 106952921A CN 201710141643 A CN201710141643 A CN 201710141643A CN 106952921 A CN106952921 A CN 106952921A
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- 230000005693 optoelectronics Effects 0.000 title claims abstract description 31
- 230000015654 memory Effects 0.000 title claims abstract description 17
- 238000000034 method Methods 0.000 title claims abstract description 9
- 238000006243 chemical reaction Methods 0.000 claims abstract description 21
- 239000004065 semiconductor Substances 0.000 claims abstract description 21
- 239000000463 material Substances 0.000 claims abstract description 12
- 230000005684 electric field Effects 0.000 claims description 7
- 230000007704 transition Effects 0.000 claims description 4
- 230000006870 function Effects 0.000 abstract description 11
- 230000001105 regulatory effect Effects 0.000 abstract description 3
- 230000001276 controlling effect Effects 0.000 abstract 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 7
- 229910052710 silicon Inorganic materials 0.000 description 7
- 239000010703 silicon Substances 0.000 description 7
- 229910003090 WSe2 Inorganic materials 0.000 description 4
- 230000003287 optical effect Effects 0.000 description 4
- 239000013078 crystal Substances 0.000 description 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 230000005622 photoelectricity Effects 0.000 description 2
- 230000009466 transformation Effects 0.000 description 2
- 229910052582 BN Inorganic materials 0.000 description 1
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical group [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 229910021389 graphene Inorganic materials 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000006386 memory function Effects 0.000 description 1
- 239000002086 nanomaterial Substances 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
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- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
Abstract
The purpose of the present invention is by designing a kind of device architecture method of half floating gate fet based on bipolar semiconductor, device is set to possess a kind of new function of Nonvolatile programmable optoelectronic memory, i.e. by regulating and controlling to apply pulse voltage on the control gate, realize that device regulates and controls in the storage of photoelectric conversion performance different conditions and logic.A kind of method for designing of Nonvolatile programmable optoelectronic memory, the structure of design is followed successively by, provided with electrode;Bipolar semiconductor material is selected as channel layer, under electrode;Provided with the first dielectric layer, under electrode channel layer;Provided with floating boom, under the first dielectric layer, floating boom does not cover whole channel layer for half FGS floating gate structure, i.e. floating boom, by one and half floating booms (Fig. 1) or can extend to multiple half floating booms and constitutes;Provided with the second dielectric layer, under floating boom;Provided with control gate, under the second dielectric layer.
Description
Technical field
It the present invention relates to the use of semiconductor technology and prepare the device with Nonvolatile programmable optoelectronic memory function
Structure.
Background technology
Pn-junction has photoelectric conversion performance, is the basis of opto-electronic device, be widely used in solar cell, detector,
The multiple fields such as LED.Traditional semi-conducting material, such as silicon, its carrier type (p-type or N-shaped) are mainly mixed by element
It is miscellaneous to realize, once forming doping, it just can not dynamically realize conversion of the semi-conducting material between different type charge-doping.It is right
In the pn-junction of a silicon, once after being formed, the carrier concentration that electric field can only be to silicon in the range of pn-junction regulates and controls, and
Silicon pn-junction can not be regulated and controled into non-pn-junction;For a n-type silicon, electric field can only realize the regulation and control of electron concentration, and can not be N-shaped
Silicon regulates and controls into p-type silicon or pn-junction, and vice versa.It is well known that pn-junction and single p-type or n-type semiconductor have it is different
Photoelectron performance, wherein pn-junction has photovoltaic performance, can do light emitting diode (LED), and single p-type material or N-shaped
Material does not have photovoltaic performance and light emitting diode performance.Partly led because in traditional semi-conducting material, electric field can not be realized
Dynamic regulation of the body material between p-type and N-shaped, thus can not also realize electric field to semi-conducting material photoelectron (photovoltaic or
LED) storage of performance and dynamic regulation.
The content of the invention
It was found by the inventors of the present invention that some nano materials, such as WSe2Two dimensional crystal, black phosphorus two dimensional crystal and carbon nanometer
Pipe etc., their carrier type can be by Electric Field Modulated, and (present invention defines this material to dynamic transition between p-type and N-shaped
Expect for bipolar semiconductor material).Using this property, the present invention can prepare the pn-junction device changed with logic.
In floating gate fet, by using the pulse voltage applied on the control gate, it is possible to achieve device exists
The storage of different conditions and logic change.
The purpose of the present invention is by designing a kind of device of half floating gate fet based on bipolar semiconductor
Structural approach, makes device possess a kind of new function of Nonvolatile programmable optoelectronic memory, i.e., be applied to by regulation and control
Pulse voltage on control gate, realizes that device regulates and controls in the storage of photoelectric conversion performance different conditions and logic.
The present invention needs the technical scheme to be protected to be:
A kind of method for designing of Nonvolatile programmable optoelectronic memory, it is characterised in that the structure of design is followed successively by,
Provided with electrode 1;
Bipolar semiconductor material is selected as channel layer 2, under electrode 1;
Provided with the first dielectric layer 3, under the channel layer 2 of electrode 1;
Provided with floating boom 4, under the first dielectric layer 3, floating boom 4 does not cover whole ditch for half FGS floating gate structure, i.e. floating boom
Channel layer, by one and half floating booms (Fig. 1) or can extend to multiple half floating booms and constitute;
Provided with the second dielectric layer 5, under floating boom 4;
Provided with control gate 6, under the second dielectric layer 5;
By inputting different pulse voltages in the control gate 6, the channel layer 2 is obtained different from non-pn-junction in pn-junction
The storage of state and logic transition so that the channel layer can be stored in a kind of opto-electronic conversion state (being defined as 1) or in addition
A kind of non-opto-electronic conversion state (0 state), and can be with saltus step, so as to realize photoelectron of the control gate pulse voltage to channel layer
The non-volatile memories of energy different conditions and logic regulation and control.
Because pn-junction and non-pn-junction have different photoelectron performances, such as pn-junction has opto-electronic conversion performance, and non-pn-junction is not
With opto-electronic conversion performance, it is hereby achieved that storage and logic transition of the device in photoelectron performance different conditions, with non-
The function of volatibility programmable optical electronic memory;
The concept of function for proposing Nonvolatile programmable optoelectronic memory first of the invention, in such device
In, input signal is optical signal (optical signal is irradiated on channel layer), and output signal is electric signal, otherwise or.We indicated that
Device can be made to be stored in different opto-electronic conversion performance states and can be at it by applying different control gate pulse voltages
Between change.Such device is similar to Nonvolatile programmable memory electronic device.In Nonvolatile programmable electronic memory
In part, control gate pulse voltage can make channel layer electric conductivity be in different storage states, and can change in-between, its
Input signal and output signal are all electric signals.It is proposed that Nonvolatile programmable optoelectronic memory part in, control
Gate pulse voltage can make channel layer be stored in the different conditions with opto-electronic conversion performance and without opto-electronic conversion performance, and can
To change in-between, so that the function with Nonvolatile programmable optoelectronic memory.
The photoelectron device cell that the inventive method design is obtained, is expected to expand the application field of opto-electronic device.
Brief description of the drawings
Fig. 1 is device architecture schematic diagram of the present invention.
Fig. 2 is the device architecture schematic diagram of extension.
Fig. 3 can store function demonstration for the non-volatile of embodiment device.
Fig. 4 changes function presentation for the logic of embodiment device.
Numeral mark:
1 electrode
2 channel layers (use bipolar semiconductor)
3 first dielectric layers
4 the first half floating booms
5 second dielectric layers
6 control gates
7 the second half floating booms
Embodiment
Technical solution of the present invention is further described below in conjunction with accompanying drawing.
Physical characteristic of the invention based on nano semiconductor material, by the structure design of half floating gate fet,
Storage and logic regulation and control of the control gate pulse voltage to channel layer opto-electronic conversion performance different conditions are realized, so that with non-volatile
The function of property programmable optical electronic memory.The device primary structure and function are as follows:(1) there is half floating gate fet
Structure;(2) material of composition channel layer is bipolar semiconductor material, the carrier type (p-type or N-shaped) of this kind of semiconductor
Electric field dynamic regulation can be passed through;(3) it is half FGS floating gate structure, i.e. floating boom covering part channel layer;(4) by this design,
Bipolar semiconductor formation pn-junction and non-pn-junction can be regulated and controled by control gate pulse voltage.Turn by using the photoelectricity of different knots
Transsexual energy, realizes storage and logic regulation and control of the control gate pulse voltage to channel layer opto-electronic conversion performance different conditions, makes photoelectricity
Sub- device, which has, non-volatile stores programmable functions.
The structure of the device obtained by the inventive method as shown in Figure 1 and Figure 2,
Including electrode;
It is bipolar semiconductor material including channel layer;
Including 2 dielectric layers;
Be that half FGS floating gate structure, i.e. floating boom do not cover whole channel layer including floating boom, can by one and half floating booms (Fig. 1) or
Extend to multiple half floating boom (Fig. 2) compositions;
Including control gate.
By inputting different pulse voltages in the control gate, the channel layer is obtained in pn-junction shape different from non-pn-junction
The storage and transformation of state so that the channel layer is in a kind of opto-electronic conversion state (being defined as 1) and another non-opto-electronic conversion
The storage and saltus step of state (0 state), so as to realize storage and logic of the control gate pulse voltage to the photoelectron performance of channel layer
Regulation and control.
For such device, its channel layer can be made by control gate pulse voltage its store (or saltus step) pn-junction with it is non-
Between pn-junction.Because pn-junction and non-pn-junction have different opto-electronic conversion performances, so as to real by control gate pulse voltage
Existing channel layer realizes photoelectronic Nonvolatile programmable store function, i.e., in the storage and transformation of different opto-electronic conversion performances
By adding a control gate pulse voltage channel layer can be made to be stored in a kind of opto-electronic conversion state (being defined as 1), plus other one
Individual control gate pulse voltage makes it be stored in another opto-electronic conversion state (0 state), so as to realize control gate pulse voltage pair
The storage of the photoelectron performance of channel layer and logic regulation and control.
The present invention provides following examples.
Embodiment 1
Bipolar semiconductor WSe2Nonvolatile programmable optoelectronic memory
The device is gold using the device architecture shown in Fig. 1, wherein electrode 1, and channel layer 2 is bipolar semiconductor WSe2Two
Crystal is tieed up, dielectric layer 3 is boron nitride, and half floating boom 4 is graphene, and dielectric layer 4 is SiO2, control gate 5 is Si.Input signal
Light irradiation is in WSe2On channel layer, output electric signal passes through electrode measurement.
Fig. 3, it is shown that when control gate pulse voltage is+20V, device output photovoltaic voltage VOCAbout
0.7V (state 1), when control gate pulse voltage is -20V, VOCIt can ignore (state 2).Almost do not became by more than 2000 seconds
Change, it was demonstrated that the photoelectron performance can be stored effectively, show non-volatile storability energy.Pulse voltage width is 200
Millisecond.
As shown in figure 4, when control gate pulse voltage changes between+20V and -20V, photovoltaic voltage is accordingly in 0.7V
With 0 between change, show logic regulation and control feature, it is thus programmable.
Claims (2)
1. a kind of method for designing of Nonvolatile programmable optoelectronic memory, it is characterised in that the structure of design is followed successively by,
Provided with electrode (1);
Bipolar semiconductor material is selected as channel layer (2), under electrode (1);
Provided with the first dielectric layer (3), under electrode (1) channel layer (2);
Provided with floating boom (4), under the first dielectric layer (3), floating boom (4) is not covered entirely for half FGS floating gate structure, i.e. floating boom
Channel layer, by one and half floating booms (Fig. 1) or can extend to multiple half floating booms and constitute;
Provided with the second dielectric layer (5), under floating boom (4);
Provided with control gate (6), under the second dielectric layer (5);
By inputting different pulse voltages in the control gate (6), the channel layer (2) is obtained different from non-pn-junction in pn-junction
The storage of state and logic transition so that the channel layer can be stored in a kind of opto-electronic conversion state (being defined as 1) or in addition
A kind of non-opto-electronic conversion state (0 state), and can be with saltus step, so as to realize photoelectron of the control gate pulse voltage to channel layer
The non-volatile memories of energy different conditions and logic regulation and control.
2. application process as claimed in claim 1, it is characterised in that the channel layer (2) is bipolar semiconductor, i.e., it is carried
Stream subtype can be modulated by extra electric field.
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107910442A (en) * | 2017-10-17 | 2018-04-13 | 国家纳米科学中心 | Suspended gate phototransistor and preparation method thereof |
CN108666314A (en) * | 2018-04-09 | 2018-10-16 | 复旦大学 | Quasi- nonvolatile memory and preparation method thereof based on the controllable PN junction of two-dimensional material |
CN113594167A (en) * | 2021-07-29 | 2021-11-02 | 上海集成电路制造创新中心有限公司 | Non-volatile programmable heterojunction memory |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1459383A1 (en) * | 2001-12-20 | 2004-09-22 | Koninklijke Philips Electronics N.V. | Fabrication of non-volatile memory cell |
CN103579119A (en) * | 2012-07-27 | 2014-02-12 | 上海华虹Nec电子有限公司 | Manufacturing method of EEPROM memory cell |
CN104916640A (en) * | 2014-03-13 | 2015-09-16 | 中芯国际集成电路制造(上海)有限公司 | Semi-floating gate memory structure |
CN105742291A (en) * | 2016-03-09 | 2016-07-06 | 复旦大学 | Floating gate memory and preparation method and control method therefor |
CN106409886A (en) * | 2016-11-10 | 2017-02-15 | 同济大学 | Logic application method for bipolar semiconductor photoelectronic device |
-
2017
- 2017-03-10 CN CN201710141643.1A patent/CN106952921B/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1459383A1 (en) * | 2001-12-20 | 2004-09-22 | Koninklijke Philips Electronics N.V. | Fabrication of non-volatile memory cell |
CN103579119A (en) * | 2012-07-27 | 2014-02-12 | 上海华虹Nec电子有限公司 | Manufacturing method of EEPROM memory cell |
CN104916640A (en) * | 2014-03-13 | 2015-09-16 | 中芯国际集成电路制造(上海)有限公司 | Semi-floating gate memory structure |
CN105742291A (en) * | 2016-03-09 | 2016-07-06 | 复旦大学 | Floating gate memory and preparation method and control method therefor |
CN106409886A (en) * | 2016-11-10 | 2017-02-15 | 同济大学 | Logic application method for bipolar semiconductor photoelectronic device |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107910442A (en) * | 2017-10-17 | 2018-04-13 | 国家纳米科学中心 | Suspended gate phototransistor and preparation method thereof |
CN107910442B (en) * | 2017-10-17 | 2020-12-01 | 国家纳米科学中心 | Floating gate phototransistor and preparation method thereof |
CN108666314A (en) * | 2018-04-09 | 2018-10-16 | 复旦大学 | Quasi- nonvolatile memory and preparation method thereof based on the controllable PN junction of two-dimensional material |
CN113594167A (en) * | 2021-07-29 | 2021-11-02 | 上海集成电路制造创新中心有限公司 | Non-volatile programmable heterojunction memory |
WO2023005563A1 (en) * | 2021-07-29 | 2023-02-02 | 上海集成电路制造创新中心有限公司 | Non-volatile programmable heterojunction memory |
CN113594167B (en) * | 2021-07-29 | 2024-03-12 | 上海集成电路制造创新中心有限公司 | Nonvolatile programmable heterojunction memory |
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