CN106952895B - A kind of manufacturing method of MIM capacitor structure - Google Patents
A kind of manufacturing method of MIM capacitor structure Download PDFInfo
- Publication number
- CN106952895B CN106952895B CN201710097726.5A CN201710097726A CN106952895B CN 106952895 B CN106952895 B CN 106952895B CN 201710097726 A CN201710097726 A CN 201710097726A CN 106952895 B CN106952895 B CN 106952895B
- Authority
- CN
- China
- Prior art keywords
- insulating layer
- mim capacitor
- layer
- manufacturing
- capacitor structure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000003990 capacitor Substances 0.000 title claims abstract description 55
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 12
- 239000000758 substrate Substances 0.000 claims abstract description 17
- 239000004065 semiconductor Substances 0.000 claims abstract description 16
- 229910052751 metal Inorganic materials 0.000 claims description 13
- 239000002184 metal Substances 0.000 claims description 13
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 6
- 239000000463 material Substances 0.000 claims description 6
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 5
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 5
- 239000012636 effector Substances 0.000 claims description 4
- 238000005530 etching Methods 0.000 claims description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 3
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- 229910052802 copper Inorganic materials 0.000 claims description 3
- 239000010949 copper Substances 0.000 claims description 3
- 238000000151 deposition Methods 0.000 claims description 3
- 239000007769 metal material Substances 0.000 claims description 3
- 229910052759 nickel Inorganic materials 0.000 claims description 3
- 239000000377 silicon dioxide Substances 0.000 claims description 3
- 239000010936 titanium Substances 0.000 claims description 3
- 229910052719 titanium Inorganic materials 0.000 claims description 3
- 239000011248 coating agent Substances 0.000 claims description 2
- 238000000576 coating method Methods 0.000 claims description 2
- 230000015572 biosynthetic process Effects 0.000 claims 1
- 239000004020 conductor Substances 0.000 claims 1
- 239000010410 layer Substances 0.000 description 43
- 238000009413 insulation Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000012774 insulation material Substances 0.000 description 1
- 230000002452 interceptive effect Effects 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 230000037361 pathway Effects 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Semiconductor Integrated Circuits (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
Abstract
The present invention provides a kind of manufacturing methods of MIM capacitor structure, which comprises the following steps: (1) provides semiconductor substrate, have opposite upper and lower surfaces, have multiple function elements on the upper surface；(2) isolated groove is formed, the isolated groove is arranged in the semiconductor substrate and between the function element；(3) MIM capacitor is formed in isolated groove.
Description
Technical field
The present invention relates to technical field of integrated circuits, in particular to a kind of manufacturing method of MIM capacitor structure.
Background technique
The passive devices such as capacitor, resistance (Passive Circuit Element) are widely used in production of integrated circuits
In technology, these devices generally use the integrated circuit technology of standard, utilize doped monocrystalline silicon, DOPOS doped polycrystalline silicon and oxidation film
Or nitrogen oxidation film etc. is made, such as polysilicondielectric film-polysilicon (PIP, Poly-Insulator-Poly) capacitor.Due to
Relatively silicon substrate, the parasitic capacitance between device and substrate make the performance of device be affected to these devices, are especially penetrating
Frequently in (RF) cmos circuit, with the rising of frequency, the performance decline of device is quickly.
The exploitation of metal-insulator-metal type (MIM, Metal-Insulator-Metal) capacitance technology is to solve this
Problem provides effective approach, which is produced on interconnection layer, i.e. postchannel process (BEOL, Back End Of for capacitor
Line both mutually compatible with integrated circuit technology in), further through zoom out passive device between conductive substrates at a distance from, overcome and post
The drawbacks of raw capacitor is big, device performance increases with frequency and is decreased obviously, so that the technology has been increasingly becoming in integrated circuit and has made
Make the mainstream of passive device capacitor.
But in the MIM capacitor structure with MIM capacitor, there is also some problems, mainly if MIM is electric
Container playing function device (such as transistor) directly below, then MIM capacitor can be generated with following function element and be interfered with each other.
As shown in Figure 1, multiple function elements 11 are formed on substrate 10, the top crown 13 of the capacitor in insulating layer 15 is set under
Pole plate 12 is electrically connected to the part of multiple function elements by conductive path 14 respectively.However, due to semiconductor integrated circuit
Volume size is all smaller, and the signal of capacitor can be interfered with each other with the signal of function element 11, also, when capacitor have it is multiple
When, distribution in the dielectric layer can be adjacent relatively close, leads to interfering with each other between capacitor；In addition, the pole plate 12 and 13 of capacitor
The stress relative to stressor layers can be generated, under it function element and access have an impact.Further, table on substrate
Face, which forms capacitor, will increase the thickness of entire device.
For the MIM capacitor structure with MIM capacitor, there are mainly two types of implementations in the prior art:
1, not playing function device below MIM capacitor, it is mutual so as to thoroughly avoid MIM capacitor and function element from generating
Interference, but such implementation will greatly waste wafer area；
2, some less sensitive function elements are put below MIM capacitor, so as to save a part of wafer area, but
It is such implementation or that MIM capacitor and its lower function element generation can be made to interfere with each other is (only this to interfere pair
Function element under it can be even tolerated), and also limit the function element that can be placed under MIM capacitor
Type (can only be some less sensitive function elements).
Therefore, how a kind of MIM capacitor structure with MIM capacitor is provided, can be avoided drawbacks described above, Cheng Liao
Those skilled in the art's urgent problem to be solved.
Summary of the invention
Based on the problems in above-mentioned encapsulation is solved, the present invention provides a kind of manufacturing methods of MIM capacitor structure, special
Sign is, comprising the following steps:
(1) semiconductor substrate is provided, there are opposite upper and lower surfaces, there are multiple functions on the upper surface
Device；
(2) isolated groove is formed, the isolated groove setting is in the semiconductor substrate and positioned at the function element
Between；
(3) MIM capacitor is formed in isolated groove.
According to an embodiment of the invention, formed isolated groove specifically include: in the semiconductor, be located at function element it
Between position etch groove, and deposit one layer of metal screen layer in the side wall of groove and bottom wall, then deposit and fill first
Insulating layer.
According to an embodiment of the invention, the shielded layer is copper metal layer, aluminum metal layer, nickel metal layer or the titanium of ground connection
Belong to layer etc..
According to an embodiment of the invention, first insulating layer covers entire upper surface and so function element, and high
The certain height in the upper surface out.
It is specifically included according to an embodiment of the invention, forming MIM capacitor: the first insulating layer etching in isolated groove
Two slot electrodes perpendicular to the upper surface out, and the slot electrode is filled with metal material.
According to an embodiment of the invention, further including step (4): being formed and be electrically connected the MIM capacitor and the effector
Multiple conductive paths of part.
It is specifically included according to an embodiment of the invention, forming multiple conductive paths: forming second on the first insulating layer absolutely
Edge layer, and longitudinal conductive path formed by etching opening and by depositing, being lithographically formed transverse conductance access.
According to an embodiment of the invention, further including covering third insulating layer on the second insulating layer.
According to an embodiment of the invention, the material of first insulating layer is silicon nitride, second insulating layer and third insulation
The material of layer is silica.
According to an embodiment of the invention, further including the lower surface that the semiconductor substrate is thinned.
Technical solution of the present invention, using vertical capacitor, multiple capacitors can be simutaneously arranged in a lateral direction and
Avoid its mutual interference；Using forming capacitor in isolated groove, it is possible to reduce shadow of the capacitor to function element
It rings, and reduces the thickness of device entirety, isolated groove also has one layer of shielded layer, can preferably prevent capacitor and effector
Electromagnetic interference between part；Dielectric layer using silicon nitride as capacitor can will be electric since the dielectric constant of silicon nitride is larger
Container is done small as far as possible.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of the MIM capacitor structure of the prior art；
Fig. 2 is the structural schematic diagram of the MIM capacitor structure of the embodiment of the present invention；
Fig. 3-8 is the flow diagram of the manufacturing method of MIM capacitor structure of the invention.
Specific embodiment
Referring to fig. 2, the present invention provides a kind of MIM capacitor structures, comprising: semiconductor substrate 10, with opposite upper
Surface and lower surface；The multiple function elements 11 being formed on the upper surface；Simultaneously position is formed in the semiconductor substrate 10
Isolated groove between the function element 11；MIM capacitor is formed in the isolated groove.
The MIM capacitor can be perpendicular to the upper surface.Have one on the side wall and bottom wall of the isolated groove
Layer shielded layer 16, the shielded layer are copper metal layer, aluminum metal layer, nickel metal layer or the titanium coating etc. of ground connection.The MIM electricity
Container can part the stretching isolated groove.
It further, further include the insulating layer 15 for being covered on the upper surface, the insulating layer 15 is by three-layer insulated layer
It constitutes, which will formerly be described in detail.The MIM capacitor is electrically connected to the function element by conductive path 14a
At least one of 11.
The MIM capacitor include perpendicular to the upper surface the first metal polar plate 12a and the second metal polar plate 13a with
And the insulating layer between first and second metal polar plate.
Preparation method can be found in Fig. 3-8, comprising the following steps:
(1) referring to Fig. 3, semiconductor is provided and is served as a contrast, 10, there are opposite upper and lower surfaces, have on the upper surface
There are multiple function elements 11；
(2) referring to fig. 4, in the semiconductor 10, the position between function element 11 etch groove 17；
(3) referring to Fig. 5, one layer of metallic shield is deposited in the side wall and bottom wall of groove 17,16, it then deposits and fills insulation
Material 18 forms isolated groove, and insulating materials 18 continues to fill up the first insulation to be formed higher than semiconductor substrate upper surface
Layer 19；
(4) referring to Fig. 6, the first insulating layer in isolated groove etches two electrodes perpendicular to the upper surface
Slot, and the slot electrode is filled with metal material, form MIM capacitor.
(5) referring to Fig. 7, second insulating layer 20 is formed on the first insulating layer 19, and longitudinal lead is formed by etching opening
Electric pathway and by depositing, be lithographically formed transverse conductance access, is consequently formed and is electrically connected the MIM capacitor and the effector
Multiple conductive path 14a of part 11.
(6) referring to Fig. 8, third insulating layer 21 is covered in second insulation 20.
According to an embodiment of the invention, the material of first insulating layer is silicon nitride, second insulating layer and third insulation
The material of layer is silica.
According to an embodiment of the invention, further including the lower surface (not shown) that the semiconductor substrate is thinned.
Finally, it should be noted that obviously, the above embodiment is merely an example for clearly illustrating the present invention, and simultaneously
The non-restriction to embodiment.For those of ordinary skill in the art, it can also do on the basis of the above description
Other various forms of variations or variation out.There is no necessity and possibility to exhaust all the enbodiments.And thus drawn
The obvious changes or variations that Shen goes out are still in the protection scope of this invention.
Claims (5)
1. a kind of manufacturing method of MIM capacitor structure, which comprises the following steps:
(1) semiconductor substrate is provided, there are opposite upper and lower surfaces, there are multiple effectors on the upper surface
Part；
(2) isolated groove is formed, comprising: the position in the semiconductor, between function element etches groove, and
The side wall and bottom wall of groove deposit one layer of metal screen layer, then deposit and fill the first insulating layer, first insulating layer covers
Entire upper surface and the function element are covered, and is higher by the certain height in the upper surface, the isolated groove is arranged in institute
It states in semiconductor substrate and between the function element；
(3) MIM capacitor is formed in isolated groove, comprising: the first insulating layer in isolated groove etches two vertically
Slot electrode in the upper surface, and the slot electrode is filled with metal material；
(4) multiple conductive paths of the electrical connection MIM capacitor and the function element are formed, comprising: in the first insulating layer
Upper formation second insulating layer, and longitudinal conductive path is formed by etching opening and is led to by depositing, being lithographically formed transverse conductance
Road.
2. the manufacturing method of MIM capacitor structure according to claim 1, which is characterized in that the shielded layer is ground connection
Copper metal layer, aluminum metal layer, nickel metal layer or titanium coating.
3. the manufacturing method of MIM capacitor structure according to claim 1, which is characterized in that further include described second
Third insulating layer is covered on insulating layer.
4. the manufacturing method of MIM capacitor structure according to claim 1, which is characterized in that first insulating layer
Material is silicon nitride, and the material of second insulating layer and third insulating layer is silica.
5. the manufacturing method of MIM capacitor structure according to claim 1, which is characterized in that further include being thinned described half
The lower surface of conductor substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710097726.5A CN106952895B (en) | 2017-02-22 | 2017-02-22 | A kind of manufacturing method of MIM capacitor structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710097726.5A CN106952895B (en) | 2017-02-22 | 2017-02-22 | A kind of manufacturing method of MIM capacitor structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106952895A CN106952895A (en) | 2017-07-14 |
| CN106952895B true CN106952895B (en) | 2019-05-10 |
Family
ID=59466832
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710097726.5A Active CN106952895B (en) | 2017-02-22 | 2017-02-22 | A kind of manufacturing method of MIM capacitor structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106952895B (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4999689A (en) * | 1987-11-06 | 1991-03-12 | Sharp Kabushiki Kaisha | Semiconductor memory |
| CN1484295A (en) * | 2002-09-18 | 2004-03-24 | 上海宏力半导体制造有限公司 | Method for mfg. channel capacitor of mixing analogue unit |
| US9349787B1 (en) * | 2014-12-10 | 2016-05-24 | GlobalFoundries, Inc. | Integrated circuits with capacitors and methods of producing the same |
| CN106057779A (en) * | 2016-07-29 | 2016-10-26 | 王汉清 | Semiconductor device structure |
-
2017
- 2017-02-22 CN CN201710097726.5A patent/CN106952895B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4999689A (en) * | 1987-11-06 | 1991-03-12 | Sharp Kabushiki Kaisha | Semiconductor memory |
| CN1484295A (en) * | 2002-09-18 | 2004-03-24 | 上海宏力半导体制造有限公司 | Method for mfg. channel capacitor of mixing analogue unit |
| US9349787B1 (en) * | 2014-12-10 | 2016-05-24 | GlobalFoundries, Inc. | Integrated circuits with capacitors and methods of producing the same |
| CN106057779A (en) * | 2016-07-29 | 2016-10-26 | 王汉清 | Semiconductor device structure |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106952895A (en) | 2017-07-14 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102569250B (en) | High-density capacitor and electrode leading-out method thereof | |
| US9793340B2 (en) | Capacitor structure | |
| CN109075164A (en) | 3 dimension capacitor arrangements | |
| US7678659B2 (en) | Method of reducing current leakage in a metal insulator metal semiconductor capacitor and semiconductor capacitor thereof | |
| US9425140B2 (en) | Capacitors in integrated circuits and methods of fabrication thereof | |
| CN105990095B (en) | MIM capacitor and preparation method thereof | |
| CN105789183A (en) | Semiconductor device | |
| US7911026B2 (en) | Chip carrier with reduced interference signal sensitivity | |
| CN106952895B (en) | A kind of manufacturing method of MIM capacitor structure | |
| CN101924101B (en) | Structure of semiconductor passive device and making method thereof | |
| CN103700645A (en) | MOM (metal-oxide-metal) capacitor and manufacturing method thereof | |
| CN106469716B (en) | A kind of vertical-type capacitor arrangement | |
| KR20120069797A (en) | Through silicon via capacitor, methode of manufacturing the same and 3-dimensional integrated circuit | |
| CN102446709B (en) | A kind of manufacture method of metal-silicon nitride-metal capacitor | |
| CN209087832U (en) | Capacitor and system | |
| JP7062075B2 (en) | Module structure and its manufacturing method | |
| CN106340509B (en) | A kind of manufacturing method of semiconductor devices | |
| CN106449607B (en) | A kind of MIM capacitor structure | |
| CN106409809B (en) | A kind of semiconductor devices with capacitor | |
| CN106449372B (en) | A kind of manufacturing method of MIM capacitor structure | |
| CN102446915B (en) | Novel metal-insulator-metal (MIM) capacitor structure and manufacturing method thereof | |
| CN105097769B (en) | A kind of device of three dimensional integrated circuits and preparation method thereof | |
| CN110071096A (en) | A kind of stacked capacitor and production method improving capacitance and pressure resistance | |
| CN111900251B (en) | MOM capacitor and semiconductor device | |
| KR20100071206A (en) | Mim capacitor of semiconductor device and manufacturing method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20190329 Address after: 312500 Fangshan 29-2, Lianfeng Village, Qiaoying Township, Xinchang County, Shaoxing City, Zhejiang Province (Residence Declaration) Applicant after: XINCHANG NUOQU INTELLIGENT TECHNOLOGY Co.,Ltd. Address before: 226300 Jianghai Zhihui Park, 266 New Century Avenue, Nantong High-tech Zone, Jiangsu Province Applicant before: NANTONG WOTE OPTOELECTRONICS TECHNOLOGY CO.,LTD. |
|
| TA01 | Transfer of patent application right | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20230111 Address after: No. d133, No. 866, Baiyun South Road, Deqing County, Deqing County, Huzhou City, Zhejiang Province Patentee after: Huzhou langpei Intelligent Technology Co.,Ltd. Address before: 312500 Fangshan No. 29-2, Lianfang village, Qiaoying Township, Xinchang County, Shaoxing City, Zhejiang Province (residence declaration) Patentee before: XINCHANG NUOQU INTELLIGENT TECHNOLOGY Co.,Ltd. |
|
| TR01 | Transfer of patent right | ||
| EE01 | Entry into force of recordation of patent licensing contract |
Application publication date: 20170714 Assignee: Huzhou Lizhuo mechanical equipment technology development Co.,Ltd. Assignor: Huzhou langpei Intelligent Technology Co.,Ltd. Contract record no.: X2023980052789 Denomination of invention: A manufacturing method for MIM capacitor structure Granted publication date: 20190510 License type: Common License Record date: 20231215 Application publication date: 20170714 Assignee: Huzhou Heming Machinery Technology Co.,Ltd. Assignor: Huzhou langpei Intelligent Technology Co.,Ltd. Contract record no.: X2023980052788 Denomination of invention: A manufacturing method for MIM capacitor structure Granted publication date: 20190510 License type: Common License Record date: 20231215 |
|
| EE01 | Entry into force of recordation of patent licensing contract | ||
| EE01 | Entry into force of recordation of patent licensing contract |
Application publication date: 20170714 Assignee: Huzhou Ruixun Electromechanical Equipment Co.,Ltd. Assignor: Huzhou langpei Intelligent Technology Co.,Ltd. Contract record no.: X2023980052840 Denomination of invention: A manufacturing method for MIM capacitor structure Granted publication date: 20190510 License type: Common License Record date: 20231219 |
|
| EE01 | Entry into force of recordation of patent licensing contract |