CN106952650B - A kind of train voice amplifying unit based on ARM+FPGA framework - Google Patents
A kind of train voice amplifying unit based on ARM+FPGA framework Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04H—BROADCAST COMMUNICATION
- H04H20/00—Arrangements for broadcast or for distribution combined with broadcast
- H04H20/44—Arrangements characterised by circuits or components specially adapted for broadcast
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
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- G—PHYSICS
- G10—MUSICAL INSTRUMENTS; ACOUSTICS
- G10L—SPEECH ANALYSIS OR SYNTHESIS; SPEECH RECOGNITION; SPEECH OR VOICE PROCESSING; SPEECH OR AUDIO CODING OR DECODING
- G10L19/00—Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis
- G10L19/0017—Lossless audio signal coding; Perfect reconstruction of coded audio signal by transmission of coding error
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- G—PHYSICS
- G10—MUSICAL INSTRUMENTS; ACOUSTICS
- G10L—SPEECH ANALYSIS OR SYNTHESIS; SPEECH RECOGNITION; SPEECH OR VOICE PROCESSING; SPEECH OR AUDIO CODING OR DECODING
- G10L19/00—Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis
- G10L19/04—Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis using predictive techniques
- G10L19/16—Vocoder architecture
- G10L19/18—Vocoders using multiple modes
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- G—PHYSICS
- G10—MUSICAL INSTRUMENTS; ACOUSTICS
- G10L—SPEECH ANALYSIS OR SYNTHESIS; SPEECH RECOGNITION; SPEECH OR VOICE PROCESSING; SPEECH OR AUDIO CODING OR DECODING
- G10L21/00—Processing of the speech or voice signal to produce another audible or non-audible signal, e.g. visual or tactile, in order to modify its quality or its intelligibility
- G10L21/02—Speech enhancement, e.g. noise reduction or echo cancellation
- G10L21/0316—Speech enhancement, e.g. noise reduction or echo cancellation by changing the amplitude
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04H—BROADCAST COMMUNICATION
- H04H20/00—Arrangements for broadcast or for distribution combined with broadcast
- H04H20/53—Arrangements specially adapted for specific applications, e.g. for traffic information or for mobile receivers
- H04H20/61—Arrangements specially adapted for specific applications, e.g. for traffic information or for mobile receivers for local area broadcast, e.g. instore broadcast
- H04H20/62—Arrangements specially adapted for specific applications, e.g. for traffic information or for mobile receivers for local area broadcast, e.g. instore broadcast for transportation systems, e.g. in vehicles
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04H—BROADCAST COMMUNICATION
- H04H20/00—Arrangements for broadcast or for distribution combined with broadcast
- H04H20/86—Arrangements characterised by the broadcast information itself
- H04H20/88—Stereophonic broadcast systems
Abstract
The invention discloses a kind of train voice amplifying units based on ARM+FPGA framework, belong to embedded system field.The train voice amplifying unit includes main control module, encoding and decoding amplification module and communication module three parts.Main control module includes main control chip and peripheral components, is responsible for initialization, audio storage and the processing of system, and operation application program and AGC, clipping frequency limit algorithm.Encoding and decoding amplification module includes encoding and decoding submodule, power amplifier submodule and detection sub-module, is responsible for that the audio signal of various formats is handled and amplified, while realizing current detecting and audio degradation function.Communication module includes two-way gigabit Ethernet and RS485 and RS232 bus, is responsible for audio and makes an uproar to examine signal transmission.Each functional module co-ordination constitutes complete voice amplifying unit.The present invention can apply in the field of traffic such as motor-car, city underground, light rail.
Description
Technical field
The invention belongs to embedded computer fields, and it is single to be related to a kind of train voice amplification based on ARM+FPGA framework
Member.
Background technique
With sharply increasing for multimedia era information content, the information content of train communication is consequently increased, therefore track is handed over
It is logical that increasingly higher demands are proposed to the performance of train broadcasting system.Firstly, audio transmission network communication will have real-time
The characteristics of, this requires the bandwidth of communication equipment to be continuously improved；Secondly, requirement of the broadcasting for train to sound quality, audio is continuously improved,
This just needs to improve sample frequency and increases the quantization digit etc. of digital-to-analogue conversion；Again, broadcasting for train needs are made an uproar according to environment
The variation automatic adjustment broadcast volume of sound, and while manually broadcasting, should ensure that broadcast is not interfered by artificial and environmental factor, this
Broadcast system is required to need to have the function of noise measuring and automatic growth control etc.；Finally, in order to guarantee broadcasting for train system
The stability of system, it is desirable that train broadcasting system has the characteristics that backup, guarantees the unimpeded of communication network or maintains artificial broadcast
Etc. basic functions.In this context, the invention proposes a kind of train voice amplifying units based on ARM+FPGA framework, with full
The demand of sufficient current train broadcast system.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of train voice amplifying units based on ARM+FPGA framework, make
With gigabit Ethernet communication and can the audio signal to various formats carry out encoding and decoding and power amplification, while can also be real
Existing stereo audio, the output of high-low sound frequency branch, volume and Gain Automatic control, induced field current detect and audio degrades etc.
Function.
Technical solution of the present invention:
A kind of train voice amplifying unit based on ARM+FPGA framework, the train voice amplifying unit include three functions
Module: main control module, encoding and decoding amplification module, communication module.
Main control module is made of main control chip and its peripheral components, is mainly responsible for the initialization of system, the storage of audio
With processing, the operation of AGC (automatic growth control) and clipping frequency limit algorithm.Main control chip uses the processing of ARM+FPGA framework
Device, inside include double ARM Cortex-A9 kernels, FPGA and dynamic memory control interface, static memory control interface, SDIO
Interface, gigabit MAC interface, UART interface etc., wherein double ARM Cortex-A9 kernels are connected with FPGA by AXI high-speed bus,
Double ARM kernels are mainly responsible for the processing of audio signal, and FPGA is responsible for the forwarding of audio signal, AGC and clipping frequency limit algorithm
Operation, AGC algorithm are used to the different amplitude audio signals of input being converted to identical amplitude and export, and clipping frequency limit algorithm is used
In the amplitude-frequency characteristic for limiting audio signal.Peripheral components include DDR3 memory chip, Flash chip, iNAND chip, CPLD core
Piece and clock-reset chip；Wherein, DDR3 memory chip is connected with the dynamic memory control interface of main control chip, for running
Operating system and application program；Flash chip is connected with the static memory control interface of main control chip, for storing
Bootloader file；INAND chip is connected depositing as application program and audio file with the SDIO interface of main control chip
Store up chip；CPLD chip is used to ensure the safety of various algorithms in FPGA；Clock-reset chip is used to provide to master control reliable
Clock and reset signal.The gigabit MAC interface of FPGA extension is connected with the chip of ethernet physical layer all the way of communication module,
As audio signal transmission access；The gigabit MAC interface of main control chip and the another way ethernet physical layer chip of communication module
It is connected, the backup as communication network；Main control chip UART interface and FPGA extension UART interface respectively with communication module
RS232 with RS485 bus transceiver is connected, and examines signal transmission for equipment debugging and making an uproar；FPGA extended SPI, I2S and I2C
Transmission and configuration management of the interface for audio signal between main control module and encoding and decoding amplification module.
Encoding and decoding amplification module includes encoding and decoding submodule, power amplifier submodule and detection sub-module.Encoding and decoding submodule by
Two-way codec chip, two-way switch and filter composition.It is lossless and damage two groups of codec chips and realize various formats
The encoding and decoding of audio signal；The gating of two-way switch control two-way codec chip；Filter is responsible for the height in audio signal
Low frequency component is separated.Encoding and decoding submodule passes through different power amplifications using left and right acoustic channels separation output, audio signal
Chip, which can be realized, plays different content at left and right sides of guest room, to reach stereosonic effect.Power amplifier submodule is by four railway digitals
Power amplifier chips and low-pass filter composition.It is high that four railway digital power amplifier chips constitute left and right acoustic channels low frequency channel, left and right acoustic channels
Frequency access, left and right acoustic channels high frequency channel and left and right acoustic channels low frequency channel respectively correspond corresponding middle/high frequency loudspeaker and low frequency is raised
Sound device, avoids using full range speaker.Detection sub-module is made of induced field current detector and analogue audio frequency access.Magnetic
Induced current detector detects the electric current of digital power amplifier output channel by Hall effect, can determine that and raises according to the variation of electric current
The short circuit of sound device circuit network and open circuit；Analogue audio frequency access is for realizing audio degradation function, i.e., when communication network failure
The audio signal of acceptable analogue audio frequency access transmission, maintains substantially artificial broadcast capability, codec chip has been internally integrated firmly
Part automatic gain control function can make the audio signal of input reach identical output amplitude, guarantee broadcast volume not by artificial
Factor interference.
Communication module is made of two-way gigabit Ethernet, RS485 bus and RS232 bus, is mainly used for audio and is made an uproar
Examine the transmission and unit debugging of signal.Two-way gigabit Ethernet is for transmitting audio signal, wherein being located at equipment all the way
The backboard of unit, another way are located at the panel of unit, and audio signal passes through the backboard gigabit of unit when normal use
Ethernet enters main control module, and panel gigabit ethernet interface is used for the backup of communication network, when the event of backboard gigabit Ethernet
When barrier, panel gigabit Ethernet can switch to, ensure that the stability of broadcast system.Ethernet physical layer chip and master control molding
EMAC (Ethernet MAC controller) and MDIO (physical layer equipment data transmit-receive management module) interface of block is connected, EMAC
Data packet stream for controlling main control module to ethernet physical layer chip, MDIO are mainly responsible for configuration and monitoring and EMAC phase
Ethernet physical layer chip even.Ethernet physical layer chip is connected by Ethernet transformer with extraneous Ethernet, is realized
Ethernet physical layer chip is isolated with extraneous.Noise collector unit has been placed in the left and right sides in compartment, and RS485 bus is for passing
Making an uproar for noise collector unit transmission is sent to examine signal, each noise collector unit of compartment two sides is responsible for the gap detection vehicle in broadcast
Level of noise in compartment will make an uproar and examine signal and send back to main control module by RS485 bus, and the main control chip of main control module is responsible for meter
The noise average value that each noise collector unit detects is calculated, is adjusted according to output gain of the average value size to codec chip
Section, to achieve the purpose that automatically control broadcast volume.In order to enhance signal quality, the transceiver of RS485 bus uses optocoupler
It is isolated with the external world.RS232 bus is mainly used for the debugging of unit, by RS232 bus come commissioning device unit
Each functional module, it is whether working properly to verify each functional module.
The train voice amplifying unit method of operation based on ARM+FPGA framework is as follows: main control module is complete after device power
At the initialization of system, the configuration management of encoding and decoding amplification module and operation application program and AGC, clipping frequency limit algorithm；Sound
Gigabit Ethernet of the frequency signal Jing Guo communication module enters main control module, in the double ARM kernels and FPGA of main control module
AGC, clipping frequency limit algorithm be responsible for handling audio signal, be forwarded to encoding and decoding by SPI, I2S interface after the completion and put
Big module, encoding and decoding submodule drive after amplifying to it to power amplifier submodule, power amplifier submodule is forwarded to after audio signal decoding
Loudspeaker is broadcasted, and detection sub-module is responsible for detecting electric current in broadcast.The gap noise collector unit of broadcast, which can detect, makes an uproar
Value will make an uproar and examine RS485 Bus repeater of the signal Jing Guo communication module to main control chip, realizes Automatic control of sound volume.Each function
Module coordination work, constitutes complete voice amplifying unit.
Automatic volume is able to carry out the beneficial effects of the present invention are train voice amplifying unit first to adjust and automatic
Gain controls (AGC), to guarantee that passenger can clearly hear automatic broadcast or artificial broadcast；Secondly, can encoding and decoding it is various
The audio signal of format meets the demand for promoting sound quality；Again, high-low sound frequency signal branch exports, and increases loudspeaker
Service life；Finally, having the function of detecting and back up, pass through magnetic induction measurement electric current device, two-way ethernet communication and sound
Frequency degradation function ensure that the stability of broadcast system.
Detailed description of the invention
Fig. 1 is the hardware block diagram of train voice amplifying unit of the present invention.
Fig. 2 is the main control module of train voice amplifying unit of the present invention.
Fig. 3 is the encoding and decoding amplification module of train voice amplifying unit of the present invention.
Fig. 4 is the communication module of train voice amplifying unit of the present invention.
Specific embodiment
Below in conjunction with attached drawing and the technical solution specific embodiment that the present invention will be described in detail.
Train voice amplifying unit based on ARM+FPGA framework includes main control module, encoding and decoding amplification module and communication
Module three parts, structure are as shown in Figure 1.Main control module is responsible for the configuration management of the initialization of system, encoding and decoding amplification module
And operation application program and AGC, clipping frequency limit algorithm etc.；Communication module is responsible for receiving the audio signal sent on network and making an uproar
Examine signal；Encoding and decoding amplification module be responsible for audio signal is handled and is amplified, detection sub-module then complete current detecting with
And audio degradation function.In addition, this equipment is powered using DC-DC mode, 24V DC voltage is converted into needed for related chip
Voltage is powered.
Main control module is made of main control chip and its peripheral components, as shown in Figure 2.Main control chip selects ARM+FPGA frame
The chip of structure, the chip integrate FPGA and double ARM Cortex-A9 kernels, by arm processor rather than FPGA into
Row control.Designer can be programmed arm processor, configure FPGA as needed, thus reduce design threshold and
Period, while may be programmed in FPGA and realizing AGC and frequency limit slicing algorithm, can be to the amplitude-frequency characteristic of audio signal at
Reason.Main control chip includes a variety of Peripheral Interfaces: including an addressing space 1GB, supporting the dynamic memory control interface of DDR3；One
A static memory control interface for supporting Quad-SPI；Two have the SDIO interface of DMA；Two compatible GMII/RGMII/
The gigabit MAC interface of SGMII；Two transmission rates are up to the High Speed UART interface of 1Mb/s, if peripheral hardware can excessively pass through FPGA
Carry out Interface Expanding.The two panels DDR3 memory chip that the present invention uses constitutes the memory headroom of 1GB, and the address bank is BA
[0:2], row address are A [0:14], and column address is A [0:9], and data bit width is 16, for operating system and application program
Operation；There is the Flash chip of Quad-SPI interface using two panels to constitute the memory space of 16MB, for storing
Bootloader file, two panels Flash chip collectively form 8 reading data interfaces, and reading speed contracts significantly up to 52MB/s
The short starting time of system；Storage using iNAND chip for application program and audio file, iNAND chip will be interior
Memory controller and NAND Flash are integrated, and master controller need to only be written and read iNAND, and Memory Controller Hub is responsible for data
The work such as storage and interface protocol, not only reduce the workload of main control chip in this way and have saved system resource；CPLD
Chip is used in FPGA starting, and FPGA sends a string of code streams to CPLD, and CPLD and FPGA is made to execute same algorithm, and CPLD is held
Operation result is given to FPGA after row algorithm, and FPGA runs program if CPLD is consistent with FPGA result, if inconsistent lock
FPGA, to guarantee the safety of algorithm in FPGA；Clock-reset chip is used to provide reliable clock and reset to master control
Signal.Main control chip gigabit MAC and FPGA extension gigabit MAC communication interface be all configured to RGMII interface, as with communicate mould
The audio signal transmission interface of block；Main control chip UART interface and FPGA extension UART interface respectively with the RS232 of communication module
It is connected with RS485 bus transceiver, examines signal transmission for equipment debugging and making an uproar；The I2S and SPI interface of FPGA extension are as master
The audio signal transmission interface of module and encoding and decoding amplification module is controlled, I2C is used for the management and configuration of codec chip.Equipment electricity
Source use by 24V DC voltage by switching power source chip and peripheral circuit be converted into 1.0V, 1.2V, 1.5V, 1.8V, 2.5V,
The mode of 2.8V and 3.3V is come for related chip power supply.
Encoding and decoding amplification module includes encoding and decoding submodule, power amplifier submodule and detection sub-module three parts, such as Fig. 3 institute
Show.Encoding and decoding submodule includes two-way encoding and decoding access, wherein another way is lossless encoding/decoding all the way to damage encoding and decoding access
Access.The encode/decode audio signal that encoding and decoding access is responsible for the compressed formats such as MP3 is damaged, audio signal is entered by SPI interface
The serial data interface of codec chip then passes to the DSP of codec chip, enters DAC by DSP forwarding, most passes through afterwards
Driver drive output audio signal, DAC using advanced ∑-△ oversampling technique, sample rate is adjustable and sampling resolution can
Up to 18.Lossless encoding/decoding access is responsible for the encode/decode audio signal of the unpacked formats such as PCM, WAV, and main control module passes through
It is managed for configuration in I2C interface, and audio signal enters the audio serial interface of codec chip by I2S interface, passes through
It is forwarded to DAC after the processing of codec chip, finally output audio signal is driven by driver, in the frequency of 8KHZ to 96KHZ
Within the scope of rate, DAC supports 16,20,24 and 32 samplings.Codec chip all has the adjustable function of output gain and supports
Left and right acoustic channels output, left and right acoustic channels are separately connected different power amplifier chips, so that it may realize that the left and right sides is simultaneously in guest room
Different content is played, to reach stereosonic effect.According to the difference of audio format, main control module control two-way switch into
The gating of row codec chip carries out encoding and decoding to the audio signal of different-format to realize.Audio after encoding and decoding
Signal passes through low pass respectively and high-pass filter is converted into low frequency and high-frequency audio access, to realize the low-and high-frequency of audio signal
The separation of component.Power amplifier submodule is made of four railway digital power amplifier chips and corresponding low-pass filter.Power amplifier it is worked
Journey are as follows: when inputting analog audio signal, analog audio signal is transformed into pulsewidth pair by comparator and PWM modulator first
The high-frequency PWM pulse signal for answering its amplitude finally passes through low-pass filter through driving circuit driving high-power switch device work
Acoustic information in PWM waveform is restored, the load sounding such as loudspeaker is pushed.Detection sub-module is detected by induced field current
Device and analogue audio frequency access composition.Induced field current detector is by introducing hall device for the electric current of power amplifier output end, suddenly
Current value is converted corresponding voltage differential signal by that devices use Hall effect, and corresponding voltage differential signal is reached magnetic induction
The DSP of current detector is forwarded to ADC after DSP is converted to corresponding current value, and ADC converts analog signals into digital signal
Into main control module, to realize the detection of current value.Analogue audio frequency access is for realizing audio degradation function, because of simulation
Signal has certain loss by long transmission line transmission, so transmitting terminal first boosts to it, receiving end by transformer into
Audio signal, is then sent into the linear input terminal of codec chip, can make to input by hardware automatic gain control by row decompression
Audio signal reach identical output amplitude, last audio signal pushes loudspeaker work after power amplifier chips carry out power amplification
Make.
Communication module is made of two-way gigabit Ethernet, RS485 bus and RS232 bus, as shown in Figure 4.In order to full
The requirement of real-time communicated enough, the present invention transmit audio signal using two-way gigabit Ethernet, wherein being located at unit all the way
Backboard, another way is located at the panel of unit, and audio signal passes through the gigabit ether of unit backboard when normal use
Net enters main control module, and panel gigabit ethernet interface is used for the backup of communication network, when backboard gigabit Ethernet failure,
It can switch to panel gigabit Ethernet, ensure that the stability of broadcast system.The EMAC and Ethernet object of two-way gigabit Ethernet
Communication between reason layer chip is all configured to RGMII interface comprising 12 signals such as data transmission, reception, clock, control
Line.MDIO includes MDCLK and DATA, respectively manages the clock line and data line of data module.Main control chip is internally integrated
Meet the EMAC and MDIO of IEEE802.3 standard.EMAC provides a kind of efficient interface between equipment and network, for real
The data packet stream of existing MAC layer to ethernet physical layer chip controls；MDIO using a kind of shared two-wire system bus go access and
Ethernet physical layer chip is controlled, the ethernet physical layer chip that configuration and monitoring are connected with EMAC, including system are mainly responsible for
Reset, interruption and priority of system etc..Ethernet physical layer chip is connected by transformer with extraneous Ethernet, and Ethernet becomes
Depressor mainly plays the effects of signal transmission, impedance matching, waveform reparation, signal noise inhibition and high-voltage isolating.RS485 bus
Transceiver is connected with the FPGA UART interface extended, and in order to enhance communication quality, RS485 bus transceiver passes through with external equipment
Optocoupler is isolated.In order to exclude the interference of broadcast, each noise collector unit of compartment two sides is responsible for examining in the gap of broadcast
Inspection value of making an uproar in measuring car compartment, the inspection value that will make an uproar send back to main control module by RS485 bus, and the main control chip of main control module is responsible for
The noise average value that each noise collector unit detects is calculated, examines average value size to the output gain of codec chip according to making an uproar
It is adjusted, to achieve the purpose that automatically control broadcast volume.The transceiver of RS232 bus and the UART of main control module connect
Mouth is connected, and RS232 bus is mainly used for the debugging of unit, such as memory read-write, codec chip register configuration and function
Whether putting chip makes can control, working properly convenient for verifying each functional module.
Claims (1)
1. a kind of train voice amplifying unit based on ARM+FPGA framework, including three modules: main control module, encoding and decoding are put
Big module and communication module, it is characterised in that:
Main control module is made of main control chip and its peripheral components, the initialization of responsible system, the storage of audio and processing,
The operation of AGC (automatic growth control) and clipping frequency limit algorithm；Main control chip uses the processor of ARM+FPGA framework, internal
Include double ARM Cortex-A9 kernels, FPGA, dynamic memory control interface, static memory control interface, SDIO interface, gigabit
MAC interface and UART interface, wherein double ARM Cortex-A9 kernels are connected with FPGA by AXI high-speed bus, double ARM
Cortex-A9 kernel is responsible for the processing of audio signal, and FPGA is responsible for the forwarding of audio signal, AGC algorithm and clipping frequency limit and calculates
The operation of method, AGC algorithm are used to the different amplitude audio signals of input being converted to identical amplitude and export, and clipping frequency limit is calculated
Method is used to limit the amplitude-frequency characteristic of audio signal；Peripheral components include DDR3 memory chip, Flash chip, iNAND chip,
CPLD chip and clock-reset chip；Wherein, DDR3 memory chip is connected with the dynamic memory control interface of main control chip, uses
In operation operating system and application program；Flash chip is connected with the static memory control interface of main control chip, for storing
Bootloader file；INAND chip is connected depositing as application program and audio file with the SDIO interface of main control chip
Store up chip；CPLD chip is used to ensure the safety of various algorithms in FPGA；Clock-reset chip is used to provide to main control chip
Reliable clock and reset signal；The gigabit MAC interface of FPGA extension and the ethernet physical layer chip all the way of communication module
It is connected, as audio signal transmission access；The gigabit MAC interface of main control chip and the another way ethernet physical layer of communication module
Chip is connected, the backup as communication network；The UART interface of main control chip and FPGA extension UART interface respectively with communicate mould
RS232 with the RS485 bus transceiver of block is connected, and examines signal transmission for equipment debugging and making an uproar；FPGA extended SPI, I2S and
Transmission and configuration management of the I2C interface for audio signal between main control module and encoding and decoding amplification module；
Encoding and decoding amplification module includes encoding and decoding submodule, power amplifier submodule and detection sub-module；Encoding and decoding submodule is by two-way
Codec chip, two-way switch and filter composition；It is lossless and damage two-way codec chip and realize various format audios letter
Number encoding and decoding, two-way switch control two-way codec chip gating, filter be responsible for the height frequency division in audio signal
Amount is separated；For encoding and decoding submodule using left and right acoustic channels separation output, audio signal is real by different power amplifier chips
Different content is played at left and right sides of existing guest room, to reach stereosonic effect；Power amplifier submodule is by four railway digital power amplifier chips
And low-pass filter composition；Four railway digital power amplifier chips form left and right acoustic channels low frequency channel and left and right acoustic channels high frequency channel, left
Right channel high frequency channel and left and right acoustic channels low frequency channel respectively correspond corresponding middle/high frequency loudspeaker and woofer, avoid
Use full range speaker；Detection sub-module is made of induced field current detector and analogue audio frequency access；Induced field current
Detector detects the electric current of digital power amplifier output channel by Hall effect, determines speaker wire road network according to the variation of electric current
Short circuit with open circuit；Analogue audio frequency access receives analogue audio frequency access for realizing audio degradation when communication network failure
The audio signal of transmission, maintains substantially artificial broadcast capability, and codec chip is internally integrated hardware automatic gain control function, makes
The audio signal of input reaches identical output amplitude, guarantees broadcast volume not by interference from human factor；
Communication module is made of two-way gigabit Ethernet, RS485 bus and RS232 bus, for audio and is made an uproar and is examined signal
Transmission and unit debugging；Two-way gigabit Ethernet is for transmitting audio signal, wherein being located at the back of unit all the way
Plate, another way are located at the panel of unit, when normal use audio signal by the backboard gigabit Ethernet of unit into
Entering main control module, panel gigabit ethernet interface is used for the backup of communication network, when backboard gigabit Ethernet failure, switching
To panel gigabit Ethernet, guarantee the stability of broadcast system；EMAC (the ether of ethernet physical layer chip and main control module
Net MAC controller) it is connected with MDIO (physical layer equipment data transmit-receive management module) interface, EMAC is for controlling master control
To the data packet stream of ethernet physical layer chip, MDIO is responsible for configuring and monitoring the ethernet physical layer that is connected with EMAC molding block
Chip；Ethernet physical layer chip is connected by Ethernet transformer with extraneous Ethernet, realization ethernet physical layer chip and
Extraneous isolation；Noise collector unit is placed in the left and right sides in compartment, and RS485 bus is used to transmit the transmission of noise collector unit
It makes an uproar and examines signal, each noise collector unit of compartment two sides is responsible for the level of noise in the gap detection compartment of broadcast, and will make an uproar inspection
Value sends back to main control module by RS485 bus, and the main control chip of main control module is responsible for calculating each noise collector unit detection
The noise average value arrived is adjusted according to output gain of the average value size to codec chip, to reach automatic control
Broadcast the purpose of volume；In order to enhance signal quality, the transceiver of RS485 bus is isolated using optocoupler with the external world；RS232
Bus is used for the debugging of unit, by RS232 bus come each functional module of commissioning device unit, to verify each function mould
Whether block is working properly.
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| CN109963227A (en) * | 2017-12-25 | 2019-07-02 | 长城汽车股份有限公司 | A kind of horn control circuit and loudspeaker control method |
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